coreboot April 2003

coreboot@coreboot.org

68 participants
177 discussions

mtd & bios flashing
by Nathanael Noblet 22 Apr '03

22 Apr '03

Hello again, you may be sick of my questions today but well here's another one..;) I read over the Sis630 howto. It does explain pretty well how to get this all flashed. I have two problems, it uses the flash_on / flash_and_burn programs which don't work on my board (sis 530 based). I don't know where to start to get that working pointers would be nice if this is the road I should take. I say should take, because it was mentioned that I could use the mtd utils to burn to the flash that the original bios is on. I don't understand how I can do this. I haven't seen anything in the mtd packages that would allow me to find the bios holding flash chip. I also noticed that some of the instructions assume that the DoC and the flash are in the same socket (as in you remove the flash chip and replace it with a DoC) my particular board has a PLCC type flash AND a DoC. I have the DoC working close to perfectly. I had grub installed and able to boot from it. I was thinking of installing a jffs2 file system on it. I also am just realizing that I wouldn't be using grub or any "bootloader" persay. Which is good because well, the grub doesn't support jffs2 I don't think. In anycase, here is what I wonder about. Do I need to go about finding out how to access the flash holding the regular bios so as to be able to flash it? Is there documentation on basic procedures to do this. If there is an easier way, please let me know of that instead. -- Nathanael Noblet Gnat Solutions 4604 Monterey Ave NW Calgary, AB T3B 5K4 T/F 403.288.5360 C 403.809.5368 http://www.gnat.ca/

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Status freebios2
by ebiederman＠lnxi.com 22 Apr '03

22 Apr '03

There is now a port that builds in the freebios2 tree. Currently it includes the latest romcc code. The build will now fail if you don't include exactly one stream driver to load your kernel. Drivers for the console code are now have an ELF section they are selected from. Cpu configuration still has to be rethought. The current mess where there are multiple CPUs selected is just wrong. I think sharing parts between cpus is pretty much the same as sharing parts between motherboards as far as solutions. This still needs to be looked at. In addition I need to see how to fit cpu configuration into the the generic pci setup code. There need to be hooks to enumerate cpus just like everything else. The only board in the tree so far is the amd solo. A prototype Athlon64 board. Enumerating a Hypertransport chain is a different problem from Enumerating a pci bus so that code still needs to be written. And to make it fun the HT chain needs to be setup before we can talk to the smbus controller on the 8111. Anyway this is starting point for a clean interface. The code is still in flux and but this is a snapshot so you can get the feel of it. And so work on the solo port can be coordinated. Romcc needs to mature more. There is a bug in constant propagation which keeps some C files from compiling. And romcc cannot handle setting manipulating mtrrs. So there are pieces that are still done in assembly. But it is a start. Eric

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flashing the bios
by Nathanael Noblet 22 Apr '03

22 Apr '03

Ok, so again here I am working on a sis 530 based board. I'd like to copy the bios to disk as a precaution, I would also like to flash linuxbios to the flash chip. I also need to know how to get the kernel in the right place on the DoC. Are there any docs on how to do that? I have looked at the flash_and_burn utils, which work only for the 630/950 sis stuff. Where do I go from now? -- Nathanael Noblet Gnat Solutions 4604 Monterey Ave NW Calgary, AB T3B 5K4 T/F 403.288.5360 C 403.809.5368 http://www.gnat.ca/

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new build failure on p4dpe-g2
by ron minnich 22 Apr '03

22 Apr '03

cp /home/rminnich/src/bios/freebios/src/arch/i386/config/crt0.base crt0.S gcc -x assembler-with-cpp -DASSEMBLY -E ... crt0.S > crt0.s cpp0: warning: changing search order for system directory "/usr/lib/gcc-lib/i386-redhat-linux/3.2/include" cpp0: warning: as it has already been specified as a non-system directory In file included from crt0_includes.h:15, from crt0.S:41: /home/rminnich/src/bios/freebios/src/southbridge/intel/82801ca/cmos_failover.inc:42:2: #error "MAX_REBOOT_CNT not defined" I'll set it but how does it get set automagically? ron

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pci_init_table
by Nathanael Noblet 22 Apr '03

22 Apr '03

Hello again, Working on an sis530 based board. I've taken most code from other boards and have been modifying the code to what I think it should be for my board. Since my board has a DoC socket (and I have a DoC) I would like to use it. So I have altered the ipl.S file where it needed altering (the sis950_init_table is now the it8661f_init_table and the registers have been changed to suit). I've come across the mainboard dll.inc file which is commented out in the ipl.S file and has similar clock control statements. I've looked at my spec sheet and I have no where near that many registers for clock control. I'm wondering what they all do. What the purpose is, this way I may be able to find the information in the sis530 spec sheet. As well it would be nice to know whether they are being set to their default values or something else, because all I know is what to set the default values to. -- Nathanael Noblet Gnat Solutions 4604 Monterey Ave NW Calgary, AB T3B 5K4 T/F 403.288.5360 C 403.809.5368 http://www.gnat.ca/

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super I/O
by Nathanael Noblet 22 Apr '03

22 Apr '03

Hello, I've been working on getting linuxbios working on a sis530 board on and off for the last little while, using a datasheet I have for the sis530 and the actual SBC I have. I finally have it all compiling. Though I know I'm using some sourcefiles that are incorrect for my board since they have been taken from the other sis based mainboards. The super IO for this board is an ITE 8661F and the only one in the tree is the ITE8671F. Obviously they aren't exactly the same, so I'm wondering how I proceed to get that chip working. I don't have any special hardware to do this with, (logic analyzer etc..). Would there be a spec sheet somewhere I could get? Ideas on ways to proceed? -- Nathanael Noblet Gnat Solutions 4604 Monterey Ave NW Calgary, AB T3B 5K4 T/F 403.288.5360 C 403.809.5368 http://www.gnat.ca/

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(no subject)
by zhu shi song 22 Apr '03

22 Apr '03

i have boot linux-2.4.20 using linuxbios cvs 20030422 under winfast6300 successfully. But i met two problems: (1) acpi error in kernel (2) I can't warm reboot linux using ctrl-alt-del. thankszhu --------------------------------- Do you Yahoo!? The New Yahoo! Search - Faster. Easier. Bingo.

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Re: entry16.inc code doubt
by dkotian3＠vsnl.net 22 Apr '03

22 Apr '03

Hi, I checked the pentium manuals, could not find any reference to these statements as listed below. > > andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0 */ > > orl $0x60000001, %eax /* CD, NW, PE = 1 */ The syntax for and is reverse and <register> <immediate value> Whereas the code reads andl <immediate value> <register> Could someone please help me on this or redirect to exact reference for the above statements. Regards Deepak > you really need to get a pengium manual. Where do I get this one. Is it some Linux Man Page. Could you please give me the link where I can look for it. Thanks and Regards Deepak ----- Original Message ----- From: "ron minnich" <rminnich(a)lanl.gov> To: <dkotian3(a)vsnl.net> Cc: <linuxbios(a)clustermatic.org> Sent: Monday, April 21, 2003 9:34 PM Subject: Re: entry16.inc code doubt > On Mon, 21 Apr 2003 dkotian3(a)vsnl.net wrote: > > > ***Extract*** > > andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0 */ > > orl $0x60000001, %eax /* CD, NW, PE = 1 */ > > you really need to get a pengium manual. > > > Then it will all make sense. > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org

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RE: serial debug patch for ADLO
by hcyun＠etri.re.kr 22 Apr '03

22 Apr '03

The patch doesn't initialize serial port because it assume serial was already initialized by linuxbios. I think your problem is you didn't enabled debugs flags. you must enable DEBUG_ROMBIOS and also appropriate debug flags you want to see such as DEBUG_INT15, DEBUG_INT16 and etc. Heechul > -----Original Message----- > From: klos [mailto:klos1980@sina.com] > Sent: Tuesday, April 22, 2003 4:45 PM > To: hcyun(a)etri.re.kr; adam(a)cfar.umd.edu; linuxbios(a)clustermatic.org > Subject: RE: serial debug patch for ADLO > > > Hi, > It seems to have no responds in my serial port; I use > etherboot to load the ADLO. > Loading 192.168.1.1: payload > ... > (ELF)......................................................... > ...................... > ................done > No more information. > > Some one gives me some suggestions? > > Baud rate? > > > Best regards > klos > -----Original Message----- > From: linuxbios-admin(a)clustermatic.org > [mailto:linuxbios-admin@clustermatic.org] On Behalf Of > hcyun(a)etri.re.kr > Sent: 2003年4月19日 23:07 > To: adam(a)cfar.umd.edu; linuxbios(a)clustermatic.org > Subject: serial debug patch for ADLO > > Hello, > I made a patch which make all bochs debug message can be seen > from serial terminal. > I think it might be useful if you want to apply ADLO to your > own target. > you can apply this patch againt util/ADLO/bochs/bios/rombios.c by > # patch -p0 < rombios-serial.patch > Regards, > > >

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serial debug patch for ADLO
by hcyun＠etri.re.kr 22 Apr '03

22 Apr '03

Hello, I made a patch which make all bochs debug message can be seen from serial terminal. I think it might be useful if you want to apply ADLO to your own target. you can apply this patch againt util/ADLO/bochs/bios/rombios.c by # patch -p0 < rombios-serial.patch Regards,

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coreboot April 2003