It should work for quertet.
I compare the schematic of S4880 and quartet, and the SPD_ROM access part is
the same.
You need to update raminit.h and amd8111_early_sumbus.c too.
YH.
-----邮件原件-----
发件人: Stefan Reinauer [mailto:stepan@suse.de]
发送时间: 2003年12月2日 6:16
收件人: YhLu
抄送: ron minnich; ebiederman(a)lnxi.com; linuxbios(a)clustermatic.org
主题: Re: Tyan S4880
* YhLu <YhLu(a)tyan.com> [031202 02:05]:
> With update 1 and 2, you can get ride of FAKE_SPD_ROM.
> You need to change some lines in auto.c for quartet.
> 1. I2C HUB address: 0x30 --> 0x18,
> 2. RC0-> (1<<1)<<8, RC1-> (1<<2)<<8, RC2-> (1<<3)<<8, RC3-> (1<<4)<<8.
Tried this, doesn't work. I end up with 0KB memory detected on each
CPU. Is it only my Quartets that behave like this?
Stefan
--
Stefan Reinauer, SUSE LINUX AG
Teamleader Architecture Development
Hi linuxbiosians,
Heard and Read that Windows 2000 can be booted using
Linuxbios. Keeeeeeen and Interested in entering
linuxbios. Could i get the list of OS's
booted using LINUXBIOS and a brief explanation
document along with it ? or links plz....
I am stilll looking for a motherboard in Chennai,INDIA
Has anyone tried linuxbios in CHENNAI,INDIA ?
need your support to start linuxbios with.
Regards,
karthik bala guru
________________________________________________________________________
Yahoo! India Promos: Win TVs, Bikes, DVD players & more!
Go to http://in.promos.yahoo.com
i think we need a new thread for the ``intel dual netwokcard problem on epia-m'' topic.
facts (correct me if i am wrong!):
* intel dual eth nic is not working with linuxbios (2003-10-24).
* it can be plugged into the pci slot (00:14.0) of the epia-m.
* the dual nic has a pci-to-pci bridge on the card.
* that bridge assignes pci bus 2 (0=internal, 1=vga/agp?)
* the 2 nics on the card assign: 02:04.0 and 02:05.0
* linuxbios detects the bus/bridge and also sees the 2 nic.
!!* linuxbios does not assign irqs to the nics.
* default (2003-10-24) linuxbios src/mainboard/via/epia-m/irq_tables.c:
===
/* This file was generated by getpir.c, do not modify!
(but if you do, please run checkpir on it to verify)
Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
*/
#include <arch/pirq_routing.h>
const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */
32+16*5, /* there can be total 5 devices on the bus */
0, /* Where the interrupt router lies (bus) */
0, /* Where the interrupt router lies (dev) */
0x1c20, /* IRQs devoted exclusively to PCI usage */
0, /* Vendor */
0, /* Device */
0, /* Crap (miniport) */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
#if 0
0x58, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this st
ructu
re (including checksum) */
{
{0,0xa0, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x1, 0},
{0,0x98, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x2, 0},
{0,0x50, {{0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}}, 0x3, 0},
{0,0x68, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
{0,0x8, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0, 0},
{0x50,0, {{0, 0}, {0, 0}, {0, 0}, {0, 0}}, 0, 0}
}
#else
0xac, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this st
ructu
re (including checksum) */
{
/* ethernet */
{0,0x90, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x1, 0},
/* usb */
{0,0x80, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
/* pci */
{0,0xa0, {{0x1, 0xdeb8}, {0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}}, 0x3, 0},
/* audio */
{0,0x8d, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x0, 0},
/* 1394 */
{0,0x68, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0}
}
#endif
};
===
* if i run util/getpir/getpir (with the dual eth nic board) i get:
===
/* This file was generated by getpir.c, do not modify!
(but if you do, please run checkpir on it to verify)
Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
*/
#include <arch/pirq_routing.h>
const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */
32+16*5, /* there can be total 5 devices on the bus */
0, /* Where the interrupt router lies (bus) */
0, /* Where the interrupt router lies (dev) */
0x1c00, /* IRQs devoted exclusively to PCI usage */
0, /* Vendor */
0, /* Device */
0, /* Crap (miniport) */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
0x78, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this st
ructu
re (including checksum) */
{
{0,0xa0, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x1, 0},
{0,0x98, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x2, 0},
{0,0x50, {{0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}}, 0x3, 0},
{0,0x68, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
{0,0x8, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0, 0},
}
};
===
* it does not help using the new irq_tables.c.
* i had to modify src/mainboard/via/epia-m/mainboard.c in addition to get it running.
--> basically add: ``pci_assign_irqs(2, 0x4, dualenetaIrq); pci_assign_irqs(2, 0x5, dualenetbIrq);''
in addition i had to play with the irq lists.
questions:
* what do the strange numbers in my new irq_table.c mean?
* if everything is hardcoded in mainboard.c -- what is irq_table.c for?
* is it possible that all this is hardcoded in mainboard.c for epia/epia-m only,
but not for other boards?
other boards use irq_table.c to assign interrupts?
* if you plug a card to the pci slot linuxbios seems to detect everything
(devices/bridges/devices behind bridges).
why cannot we say: ok there is irq 5, 10, 11 and 12. assign that 4 irqs
to all devices which were detected in the previous stage.
this must be the way the regular bios does it...
* when booting the epia-m with the std (award) bios and using the getpir
prg -> the resulting irq_table.c does not work either. is it just ignored
by the epia-m setup, or what is it actually for?
niki
Most modern motherboards supports the timer based automatic power on
via BIOS settings. With linuxbios this is not(?) possible. There is a program
for linux, called nvram-wakeup, to set the wakeup time in nvram or rtc. But
especially for the K7SEM or EPIA boards a reboot is needed after it, so the
wakeup settings can take effect.
Does anyone know what the BIOS is doing what linuxbios does not?
Perhaps it can be done in a program?
Thanks
Thomas Wehrspann
Hi,
I have Diskonchip millennium MD2800 (8 MB capacity) and Microns SDRAM
capacity (256 Mbits).
Then the flash is to be mapped into the physical address
0xFFFFFFFF-0xFF800000. SDRAM is to mapped into the physical address
0x00000000-0xFE000000. Is this mapping correct?
>From: ron minnich <rminnich(a)lanl.gov>
>To: Devi Priya <ijpriya(a)hotmail.com>
>CC: gizara(a)cox.net, <linuxbios(a)clustermatic.org>
>Subject: Re: Linuxbios with Diskonchip?
>Date: Sat, 29 Nov 2003 18:35:20 -0700 (MST)
>
>On Fri, 28 Nov 2003, Devi Priya wrote:
>
> > Hi,
> >
> > I am using Diskonchip millennium with boot capability. I just want
>to
> > know if diskonchip is mapped to the high order physical address (at
>reset)
> > and is any remapping is done later?
>
>usually mapped at flash address, right? 0xf0000 and 0xfff00000
>
>ron
>
>_______________________________________________
>Linuxbios mailing list
>Linuxbios(a)clustermatic.org
>http://www.clustermatic.org/mailman/listinfo/linuxbios
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