the following patch was just integrated into master: commit 6d04f0f89e4bf8ea4bea35dd850dad7469ca5ab3 Author: Aaron Durbin adurbin@chromium.org Date: Wed Oct 31 22:57:16 2012 -0500
haswell: always use MMIO PCI config accesses
Add a bootblock.c file for the northbridge and setup the PCIEXBAR as the first thing using IO PCI config acceses. After that all PCI config accesses can use MMIO.
Change-Id: I51d229c626c45705dda1757c2f14265cbc0e6183 Signed-off-by: Aaron Durbin adurbin@chromium.org Reviewed-on: http://review.coreboot.org/2617 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich rminnich@gmail.com
Build-Tested: build bot (Jenkins) at Mon Mar 11 23:44:11 2013, giving +1 Reviewed-By: Ronald G. Minnich rminnich@gmail.com at Thu Mar 14 01:45:50 2013, giving +2 See http://review.coreboot.org/2617 for details.
-gerrit