[PATCH] Fix flashrom init for VT8237S - coreboot

26 Dec 2008


      Hello,
Following patch fixes VIA SPI (VT8237S). It needs to have opcodes initialized 
same way as ICH7.
Signed-off-by: Rudolf Marek r.marek@assembler.cz
Oh btw there is some logic problem with the flashrom -E.
The spi_chip_erase_c7 gets called for mine chip:
result = spi_disable_blockprotect();
         if (result) {
                 printf_debug("spi_disable_blockprotect failed\n");
                 return result;
         }
         result = spi_write_enable();
         if (result) {
                 printf_debug("spi_write_enable failed\n");
                 return result;
         }
But it will fail sending spi_write_enable() because:
int spi_write_enable()
{
         const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN };
/* Send WREN (Write Enable) */
         return spi_command(sizeof(cmd), 0, cmd, NULL);
}
And final fail:
         /* unknown / not programmed command */
         if (opcode_index == -1) {
                 printf_debug("Invalid OPCODE 0x%02x\n", cmd);
                 return 1;
         }
Because its just a prefix opcode. And prefix opcodes are not checked. Question 
is now what to do. Silently complete command the spi_write_enable, when we find 
the opcode in prefix opcode? The prefix opcode should get executed with the 
prefix automatically.
Rudolf