r3624 - in trunk/coreboot-v2/src: arch/i386/boot arch/i386/lib arch/i386/smp arch/ppc/boot cpu/amd/model_10xxx cpu/amd/sc520 cpu/emulation/qemu-x86 drivers/ati/ragexl mainboard/a-trend/atc-6220 mainboard/agami/aruma mainboard/amd/dbm690t mainboard/amd/serengeti_cheetah mainboard/amd/serengeti_cheetah_fam10 mainboard/arima/hdama mainboard/artecgroup/dbe61 mainboard/asus/a8n_e mainboard/asus/mew-vm mainboard/asus/p2b mainboard/asus/p2b-f mainboard/asus/p3b-f mainboard/azza/pt-6ibd mainboard/biostar
Author: hailfinger Date: 2008-10-01 14:52:52 +0200 (Wed, 01 Oct 2008) New Revision: 3624
Modified: trunk/coreboot-v2/src/arch/i386/boot/acpi.c trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c trunk/coreboot-v2/src/arch/i386/lib/cpu.c trunk/coreboot-v2/src/arch/i386/lib/exception.c trunk/coreboot-v2/src/arch/i386/smp/ioapic.c trunk/coreboot-v2/src/arch/ppc/boot/coreboot_table.c trunk/coreboot-v2/src/cpu/amd/model_10xxx/init_cpus.c trunk/coreboot-v2/src/cpu/amd/sc520/sc520.c trunk/coreboot-v2/src/cpu/emulation/qemu-x86/northbridge.c trunk/coreboot-v2/src/drivers/ati/ragexl/xlinit.c trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/auto.c trunk/coreboot-v2/src/mainboard/agami/aruma/auto.c trunk/coreboot-v2/src/mainboard/agami/aruma/get_bus_conf.c trunk/coreboot-v2/src/mainboard/agami/aruma/resourcemap.c trunk/coreboot-v2/src/mainboard/amd/dbm690t/get_bus_conf.c trunk/coreboot-v2/src/mainboard/amd/dbm690t/resourcemap.c trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/resourcemap.c trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c trunk/coreboot-v2/src/mainboard/arima/hdama/auto.c trunk/coreboot-v2/src/mainboard/arima/hdama/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/asus/a8n_e/get_bus_conf.c trunk/coreboot-v2/src/mainboard/asus/mew-vm/auto.c trunk/coreboot-v2/src/mainboard/asus/p2b-f/auto.c trunk/coreboot-v2/src/mainboard/asus/p2b/auto.c trunk/coreboot-v2/src/mainboard/asus/p3b-f/auto.c trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/auto.c trunk/coreboot-v2/src/mainboard/biostar/m6tba/auto.c trunk/coreboot-v2/src/mainboard/broadcom/blast/get_bus_conf.c trunk/coreboot-v2/src/mainboard/broadcom/blast/resourcemap.c trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/auto.c trunk/coreboot-v2/src/mainboard/dell/s1850/auto.c trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/auto.c trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/auto.c trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/auto.c trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/resourcemap.c trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/fanctl.c trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/get_bus_conf.c trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/resourcemap.c trunk/coreboot-v2/src/mainboard/ibm/e325/auto.c trunk/coreboot-v2/src/mainboard/ibm/e325/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/ibm/e325/resourcemap.c trunk/coreboot-v2/src/mainboard/ibm/e326/auto.c trunk/coreboot-v2/src/mainboard/ibm/e326/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/ibm/e326/resourcemap.c trunk/coreboot-v2/src/mainboard/intel/jarrell/auto.c trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/auto.c trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/get_bus_conf.c trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/resourcemap.c trunk/coreboot-v2/src/mainboard/iwill/dk8s2/auto.c trunk/coreboot-v2/src/mainboard/iwill/dk8x/auto.c trunk/coreboot-v2/src/mainboard/msi/ms6178/auto.c trunk/coreboot-v2/src/mainboard/msi/ms7135/get_bus_conf.c trunk/coreboot-v2/src/mainboard/msi/ms7260/get_bus_conf.c trunk/coreboot-v2/src/mainboard/msi/ms7260/resourcemap.c trunk/coreboot-v2/src/mainboard/msi/ms9185/get_bus_conf.c trunk/coreboot-v2/src/mainboard/msi/ms9185/resourcemap.c trunk/coreboot-v2/src/mainboard/msi/ms9282/get_bus_conf.c trunk/coreboot-v2/src/mainboard/msi/ms9282/resourcemap.c trunk/coreboot-v2/src/mainboard/newisys/khepri/auto.c trunk/coreboot-v2/src/mainboard/newisys/khepri/resourcemap.c trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/resourcemap.c trunk/coreboot-v2/src/mainboard/sunw/ultra40/auto.c trunk/coreboot-v2/src/mainboard/sunw/ultra40/get_bus_conf.c trunk/coreboot-v2/src/mainboard/sunw/ultra40/resourcemap.c trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/get_bus_conf.c trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/resourcemap.c trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/auto.c trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/auto.c trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/auto.c trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/auto.updated.c trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/auto.c trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/auto.c trunk/coreboot-v2/src/mainboard/tyan/s1846/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2735/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2850/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2850/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/tyan/s2875/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2875/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/tyan/s2880/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/tyan/s2881/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2881/get_bus_conf.c trunk/coreboot-v2/src/mainboard/tyan/s2881/resourcemap.c trunk/coreboot-v2/src/mainboard/tyan/s2882/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2882/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/tyan/s2885/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2885/get_bus_conf.c trunk/coreboot-v2/src/mainboard/tyan/s2885/resourcemap.c trunk/coreboot-v2/src/mainboard/tyan/s2891/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2891/get_bus_conf.c trunk/coreboot-v2/src/mainboard/tyan/s2891/resourcemap.c trunk/coreboot-v2/src/mainboard/tyan/s2892/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2892/get_bus_conf.c trunk/coreboot-v2/src/mainboard/tyan/s2892/resourcemap.c trunk/coreboot-v2/src/mainboard/tyan/s2895/auto.c trunk/coreboot-v2/src/mainboard/tyan/s2895/get_bus_conf.c trunk/coreboot-v2/src/mainboard/tyan/s2895/resourcemap.c trunk/coreboot-v2/src/mainboard/tyan/s2912/get_bus_conf.c trunk/coreboot-v2/src/mainboard/tyan/s2912/resourcemap.c trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/get_bus_conf.c trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/resourcemap.c trunk/coreboot-v2/src/mainboard/tyan/s4880/auto.c trunk/coreboot-v2/src/mainboard/tyan/s4880/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/tyan/s4880/resourcemap.c trunk/coreboot-v2/src/mainboard/tyan/s4882/auto.c trunk/coreboot-v2/src/mainboard/tyan/s4882/resourcemap.c trunk/coreboot-v2/src/mainboard/via/epia-m/auto.c trunk/coreboot-v2/src/mainboard/via/epia/auto.c trunk/coreboot-v2/src/northbridge/amd/amdfam10/resourcemap.c trunk/coreboot-v2/src/northbridge/amd/amdk8/coherent_ht.c trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit.c trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_f.c trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_test.c trunk/coreboot-v2/src/northbridge/amd/amdk8/resourcemap.c trunk/coreboot-v2/src/northbridge/amd/gx2/chipsetinit.c trunk/coreboot-v2/src/northbridge/intel/e7501/raminit.c trunk/coreboot-v2/src/northbridge/intel/e7520/raminit.c trunk/coreboot-v2/src/northbridge/intel/e7520/raminit_test.c trunk/coreboot-v2/src/northbridge/intel/e7525/raminit.c trunk/coreboot-v2/src/northbridge/intel/e7525/raminit_test.c trunk/coreboot-v2/src/northbridge/intel/i3100/raminit.c trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c trunk/coreboot-v2/src/northbridge/intel/i855pm/raminit.c trunk/coreboot-v2/src/northbridge/via/vt8601/northbridge.c trunk/coreboot-v2/src/northbridge/via/vt8623/northbridge.c trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_lpc.c trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536.c trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sm.c trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_early_setup.c trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_early_setup_car.c trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_lpc.c trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_lpc.c trunk/coreboot-v2/src/southbridge/sis/sis966/sis966_lpc.c trunk/coreboot-v2/src/stream/fs/vfs.c trunk/coreboot-v2/src/superio/ite/it8661f/superio.c trunk/coreboot-v2/src/superio/ite/it8671f/superio.c trunk/coreboot-v2/src/superio/ite/it8673f/superio.c trunk/coreboot-v2/src/superio/ite/it8705f/superio.c trunk/coreboot-v2/src/superio/ite/it8712f/superio.c trunk/coreboot-v2/src/superio/ite/it8716f/superio.c trunk/coreboot-v2/src/superio/ite/it8718f/superio.c trunk/coreboot-v2/src/superio/nsc/pc8374/superio.c trunk/coreboot-v2/src/superio/nsc/pc87309/superio.c trunk/coreboot-v2/src/superio/nsc/pc87351/superio.c trunk/coreboot-v2/src/superio/nsc/pc87360/superio.c trunk/coreboot-v2/src/superio/nsc/pc87366/superio.c trunk/coreboot-v2/src/superio/nsc/pc87417/superio.c trunk/coreboot-v2/src/superio/nsc/pc87427/superio.c trunk/coreboot-v2/src/superio/nsc/pc97307/superio.c trunk/coreboot-v2/src/superio/nsc/pc97317/superio.c trunk/coreboot-v2/src/superio/smsc/fdc37m60x/superio.c trunk/coreboot-v2/src/superio/smsc/lpc47b272/superio.c trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c trunk/coreboot-v2/src/superio/smsc/lpc47m10x/superio.c trunk/coreboot-v2/src/superio/smsc/lpc47n217/superio.c trunk/coreboot-v2/src/superio/via/vt1211/vt1211.c trunk/coreboot-v2/src/superio/winbond/w83627ehg/superio.c trunk/coreboot-v2/src/superio/winbond/w83627hf/superio.c trunk/coreboot-v2/src/superio/winbond/w83627thf/superio.c trunk/coreboot-v2/src/superio/winbond/w83977f/superio.c trunk/coreboot-v2/src/superio/winbond/w83977tf/superio.c Log: The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of code to use it. That makes the code more readable and also less error-prone.
Abuild tested.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net Acked-by: Peter Stuge peter@stuge.se
Modified: trunk/coreboot-v2/src/arch/i386/boot/acpi.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/acpi.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/arch/i386/boot/acpi.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -44,7 +44,7 @@ { int i; - int entries_num = sizeof(rsdt->entry)/sizeof(rsdt->entry[0]); + int entries_num = ARRAY_SIZE(rsdt->entry); for (i=0; i<entries_num; i++) { if(rsdt->entry[i]==0) {
Modified: trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -184,7 +184,7 @@ { LB_TAG_ASSEMBLER, coreboot_assembler, }, }; unsigned int i; - for(i = 0; i < sizeof(strings)/sizeof(strings[0]); i++) { + for(i = 0; i < ARRAY_SIZE(strings); i++) { struct lb_string *rec; size_t len; rec = (struct lb_string *)lb_new_record(header);
Modified: trunk/coreboot-v2/src/arch/i386/lib/cpu.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/lib/cpu.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/arch/i386/lib/cpu.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -123,7 +123,7 @@ { const char *name; name = "<invalid cpu vendor>"; - if ((vendor < (sizeof(x86_vendor_name)/sizeof(x86_vendor_name[0]))) && + if ((vendor < (ARRAY_SIZE(x86_vendor_name))) && (x86_vendor_name[vendor] != 0)) { name = x86_vendor_name[vendor]; @@ -185,7 +185,7 @@ } } cpu->vendor = X86_VENDOR_UNKNOWN; - for(i = 0; i < sizeof(x86_vendors)/sizeof(x86_vendors[0]); i++) { + for(i = 0; i < ARRAY_SIZE(x86_vendors); i++) { if (memcmp(vendor_name, x86_vendors[i].name, 12) == 0) { cpu->vendor = x86_vendors[i].vendor; break;
Modified: trunk/coreboot-v2/src/arch/i386/lib/exception.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/lib/exception.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/arch/i386/lib/exception.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -377,7 +377,7 @@ gdb_stub_registers[CS] = info->cs; gdb_stub_registers[PS] = info->eflags; signo = GDB_UNKNOWN; - if (info->vector < sizeof(exception_to_signal)/sizeof(exception_to_signal[0])) { + if (info->vector < ARRAY_SIZE(exception_to_signal)) { signo = exception_to_signal[info->vector]; }
Modified: trunk/coreboot-v2/src/arch/i386/smp/ioapic.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/smp/ioapic.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/arch/i386/smp/ioapic.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -67,7 +67,7 @@ l[0] = 0x03; l[4] = 1; #endif /* i786 */ - for (i = 0; i < sizeof(ioapicregvalues) / sizeof(ioapicregvalues[0]); + for (i = 0; i < ARRAY_SIZE(ioapicregvalues); i++, a++) { l[0] = (a->reg * 2) + 0x10; l[4] = a->value_low;
Modified: trunk/coreboot-v2/src/arch/ppc/boot/coreboot_table.c =================================================================== --- trunk/coreboot-v2/src/arch/ppc/boot/coreboot_table.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/arch/ppc/boot/coreboot_table.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -116,7 +116,7 @@ { LB_TAG_ASSEMBLER, coreboot_assembler, }, }; unsigned int i; - for(i = 0; i < sizeof(strings)/sizeof(strings[0]); i++) { + for(i = 0; i < ARRAY_SIZE(strings); i++) { struct lb_string *rec; size_t len; rec = (struct lb_string *)lb_new_record(header);
Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/init_cpus.c =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_10xxx/init_cpus.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/cpu/amd/model_10xxx/init_cpus.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -522,7 +522,7 @@ printk_debug("setup_remote_node: %02x", node);
/* copy the default resource map from node 0 */ - for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) { + for(i = 0; i < ARRAY_SIZE(pci_reg); i++) { u32 value; u16 reg; reg = pci_reg[i]; @@ -852,7 +852,7 @@ revision = mctGetLogicalCPUID(0xFF); platform = get_platform_type();
- for(i = 0; i < sizeof(fam10_msr_default)/sizeof(fam10_msr_default[0]); i++) { + for(i = 0; i < ARRAY_SIZE(fam10_msr_default); i++) { if ((fam10_msr_default[i].revision & revision) && (fam10_msr_default[i].platform & platform)) { msr = rdmsr(fam10_msr_default[i].msr); @@ -889,7 +889,7 @@
AMD_SetupPSIVID_d(platform, node); /* Set PSIVID offset which is not table driven */
- for(i = 0; i < sizeof(fam10_pci_default)/sizeof(fam10_pci_default[0]); i++) { + for(i = 0; i < ARRAY_SIZE(fam10_pci_default); i++) { if ((fam10_pci_default[i].revision & revision) && (fam10_pci_default[i].platform & platform)) { val = pci_read_config32(NODE_PCI(node, @@ -903,7 +903,7 @@ } }
- for(i = 0; i < sizeof(fam10_htphy_default)/sizeof(fam10_htphy_default[0]); i++) { + for(i = 0; i < ARRAY_SIZE(fam10_htphy_default); i++) { if ((fam10_htphy_default[i].revision & revision) && (fam10_htphy_default[i].platform & platform)) { /* HT Phy settings either apply to both sublinks or have
Modified: trunk/coreboot-v2/src/cpu/amd/sc520/sc520.c =================================================================== --- trunk/coreboot-v2/src/cpu/amd/sc520/sc520.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/cpu/amd/sc520/sc520.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -151,7 +151,7 @@ // int i; int idx; #if 0 - for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) { + for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { unsigned char reg; reg = pci_read_config8(mc_dev, ramregs[i]); /* these are ENDING addresses, not sizes.
Modified: trunk/coreboot-v2/src/cpu/emulation/qemu-x86/northbridge.c =================================================================== --- trunk/coreboot-v2/src/cpu/emulation/qemu-x86/northbridge.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/cpu/emulation/qemu-x86/northbridge.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -80,7 +80,7 @@ unsigned char rambits; int i, idx;
- for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) { + for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { unsigned char reg; reg = pci_read_config8(mc_dev, ramregs[i]); /* these are ENDING addresses, not sizes.
Modified: trunk/coreboot-v2/src/drivers/ati/ragexl/xlinit.c =================================================================== --- trunk/coreboot-v2/src/drivers/ati/ragexl/xlinit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/drivers/ati/ragexl/xlinit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -281,7 +281,7 @@ aty_st_le32(0xEC, 0x00000000, info); aty_st_le32(0xFC, 0x00000000, info);
- for (i=0; i<sizeof(lcd_tbl)/sizeof(lcd_tbl_t); i++) { + for (i=0; i<ARRAY_SIZE(lcd_tbl); i++) { aty_st_lcd(lcd_tbl[i].lcd_reg, lcd_tbl[i].val, info); }
@@ -547,7 +547,7 @@ chip_id = aty_ld_le32(CONFIG_CHIP_ID, info); type = chip_id & CFG_CHIP_TYPE; rev = (chip_id & CFG_CHIP_REV)>>24; - for (j = 0; j < (sizeof(aty_chips)/sizeof(*aty_chips)); j++) + for (j = 0; j < ARRAY_SIZE(aty_chips); j++) if (type == aty_chips[j].chip_type && (rev & aty_chips[j].rev_mask) == aty_chips[j].rev_val) { chipname = aty_chips[j].name;
Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -67,6 +68,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/agami/aruma/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/agami/aruma/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/agami/aruma/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -171,7 +172,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
#if 0 /* Check the first 1M */
Modified: trunk/coreboot-v2/src/mainboard/agami/aruma/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/agami/aruma/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/agami/aruma/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -3,6 +3,7 @@ #include <device/pci_ids.h> #include <string.h> #include <stdint.h> +#include <stdlib.h> #if CONFIG_LOGICAL_CPUS==1 #include <cpu/amd/dualcore.h> #endif @@ -62,7 +63,7 @@
get_bus_conf_done = 1;
- hc_possible_num = sizeof(pci1234) / sizeof(pci1234[0]); + hc_possible_num = ARRAY_SIZE(pci1234);
get_sblk_pci1234();
Modified: trunk/coreboot-v2/src/mainboard/agami/aruma/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/agami/aruma/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/agami/aruma/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -265,7 +265,7 @@
}; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -22,6 +22,7 @@ #include <device/pci_ids.h> #include <string.h> #include <stdint.h> +#include <stdlib.h> #if CONFIG_LOGICAL_CPUS==1 #include <cpu/amd/dualcore.h> #endif @@ -72,7 +73,7 @@ return; /* do it only once */ get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x) / sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for (i = 0; i < sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -273,6 +273,6 @@ };
int max; - max = sizeof(register_values) / sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -9,6 +9,7 @@
#include <cpu/amd/amdk8_sysconf.h>
+#include <stdlib.h> #include "mb_sysconf.h"
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -90,7 +91,7 @@ m = sysconf.mb;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -258,7 +258,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -28,6 +28,7 @@
#include <cpu/amd/amdfam10_sysconf.h>
+#include <stdlib.h> #include "mb_sysconf.h"
/* Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables */ @@ -111,7 +112,7 @@ m->bus_type[i] = 0; }
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -275,7 +275,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/arima/hdama/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/arima/hdama/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/arima/hdama/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -157,11 +158,11 @@ #endif enable_smbus(); #if 0 - dump_spd_registers(sizeof(cpu)/sizeof(cpu[0]), cpu); + dump_spd_registers(ARRAY_SIZE(cpu), cpu); #endif
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu); #if 0 dump_pci_devices();
Modified: trunk/coreboot-v2/src/mainboard/arima/hdama/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/arima/hdama/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/arima/hdama/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -215,7 +216,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram();
Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -51,7 +52,7 @@ int i;
if (device == DIMM0){ - for (i=0; i < (sizeof spd_table/sizeof spd_table[0]); i++){ + for (i=0; i < (ARRAY_SIZE(spd_table)); i++){ if (spd_table[i].address == address){ return spd_table[i].data; }
Modified: trunk/coreboot-v2/src/mainboard/asus/a8n_e/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/a8n_e/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/asus/a8n_e/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -31,6 +31,7 @@ #include <cpu/amd/dualcore.h> #endif #include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
/* * Global variables for MB layouts and these will be shared by irqtable,
Modified: trunk/coreboot-v2/src/mainboard/asus/mew-vm/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-vm/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/asus/mew-vm/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -77,7 +78,7 @@ /* dump_spd_registers(&memctrl[0]); */
/* sdram_initialize() runs out of registers. */ - /* sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); */ + /* sdram_initialize(ARRAY_SIZE(memctrl), memctrl); */
sdram_set_registers(memctrl); sdram_set_spd_registers(memctrl);
Modified: trunk/coreboot-v2/src/mainboard/asus/p2b/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/asus/p2b/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -67,6 +68,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-f/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-f/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-f/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -70,6 +71,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/asus/p3b-f/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p3b-f/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/asus/p3b-f/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -70,6 +71,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -70,6 +71,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/biostar/m6tba/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/biostar/m6tba/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/biostar/m6tba/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -67,6 +68,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/broadcom/blast/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/broadcom/blast/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/broadcom/blast/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -61,7 +62,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/broadcom/blast/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/broadcom/blast/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/broadcom/blast/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -259,7 +259,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -70,6 +71,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -139,7 +140,7 @@ // dump_ipmi_registers(); mainboard_set_e7520_leds(); // memreset_setup(); - sdram_initialize(sizeof(mch)/sizeof(mch[0]), mch); + sdram_initialize(ARRAY_SIZE(mch), mch); #if 0 dump_pci_devices(); #endif
Modified: trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -10,6 +10,7 @@ #endif #include <arch/hlt.h> //#include "option_table.h" +#include <stdlib.h> #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" #include "arch/i386/lib/console.c" @@ -100,7 +101,7 @@
memreset_setup();
- sdram_initialize(sizeof(memctrl)/sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
} #if 0
Modified: trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -48,7 +49,7 @@ #endif }; int i; - for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) { + for(i = 0; i < ARRAY_SIZE(check_addrs); i++) { ram_check(check_addrs[i].lo, check_addrs[i].hi); } #endif
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -67,6 +68,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -31,6 +31,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -82,7 +83,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -277,7 +277,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/fanctl.c =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/fanctl.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/fanctl.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -1,4 +1,5 @@ #include <arch/io.h> +#include <stdlib.h>
static void write_index(uint16_t port_base, uint8_t reg, uint8_t value) { @@ -67,15 +68,13 @@ { 0x13, 0x77} };
-#define ARRAYSIZE(x) sizeof x/sizeof *x - /* * Called from superio.c */ void init_ec(uint16_t base) { int i; - for (i=0; i<ARRAYSIZE(sequence); i++) { + for (i=0; i<ARRAY_SIZE(sequence); i++) { write_index(base, sequence[i].index, sequence[i].value); } }
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -29,6 +29,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -80,7 +81,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -277,7 +277,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/ibm/e325/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e325/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/ibm/e325/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -163,7 +164,7 @@ #endif
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
#if 0 dump_pci_devices();
Modified: trunk/coreboot-v2/src/mainboard/ibm/e325/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e325/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/ibm/e325/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -211,7 +212,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram();
Modified: trunk/coreboot-v2/src/mainboard/ibm/e325/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e325/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/ibm/e325/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -266,6 +266,6 @@ PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0, }; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/ibm/e326/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e326/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/ibm/e326/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -163,7 +164,7 @@ #endif
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
#if 0 dump_pci_devices();
Modified: trunk/coreboot-v2/src/mainboard/ibm/e326/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e326/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/ibm/e326/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -211,7 +212,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram();
Modified: trunk/coreboot-v2/src/mainboard/ibm/e326/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e326/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/ibm/e326/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -266,6 +266,6 @@ PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0, }; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/intel/jarrell/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/jarrell/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/intel/jarrell/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -120,7 +121,7 @@ power_down_reset_check(); // dump_ipmi_registers(); mainboard_set_e7520_leds(); - sdram_initialize(sizeof(mch)/sizeof(mch[0]), mch); + sdram_initialize(ARRAY_SIZE(mch), mch); ich5_watchdog_on(); #if 0 dump_pci_devices();
Modified: trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -83,7 +84,7 @@ // dump_smbus_registers();
// memreset_setup(); No-op for this chipset - sdram_initialize(sizeof(memctrl)/sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); } // NOTE: ROMCC dies with an internal compiler error
Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -9,6 +9,7 @@
#include <cpu/amd/amdk8_sysconf.h>
+#include <stdlib.h> #include "mb_sysconf.h"
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -90,7 +91,7 @@ m = sysconf.mb;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -258,7 +258,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8s2/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8s2/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8s2/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -149,7 +150,7 @@ #endif
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
#if 0 dump_pci_devices();
Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8x/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8x/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8x/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -148,7 +149,7 @@ #endif
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
#if 1 dump_pci_devices(); @@ -181,7 +182,7 @@ #endif }; int i; - for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) { + for(i = 0; i < ARRAY_SIZE(check_addrs); i++) { ram_check(check_addrs[i].lo, check_addrs[i].hi); } #endif
Modified: trunk/coreboot-v2/src/mainboard/msi/ms6178/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6178/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/msi/ms6178/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -65,6 +66,6 @@ console_init(); report_bist_failure(bist); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/msi/ms7135/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms7135/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/msi/ms7135/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -32,6 +32,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
/* Global variables for MB layouts and these will be shared by irqtable, * mptable and acpi_tables. @@ -67,8 +68,8 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x) / sizeof(pci1234x[0]); - sysconf.hc_possible_num = sizeof(pci1234x) / sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for (i = 0; i < sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/msi/ms7260/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms7260/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/msi/ms7260/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -28,6 +28,7 @@ #include <cpu/amd/dualcore.h> #endif #include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
/* Global variables for MB layouts (shared by irqtable/mptable/acpi_table). */ // busnum is default. @@ -81,7 +82,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x) / sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for (i = 0; i < sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/msi/ms7260/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms7260/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/msi/ms7260/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -278,6 +278,6 @@
};
- int max = sizeof(register_values) / sizeof(register_values[0]); + int max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/msi/ms9185/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9185/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/msi/ms9185/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -32,6 +32,7 @@
#include <cpu/amd/amdk8_sysconf.h>
+#include <stdlib.h> #include "mb_sysconf.h"
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -82,7 +83,7 @@
m = sysconf.mb;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i];
Modified: trunk/coreboot-v2/src/mainboard/msi/ms9185/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9185/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/msi/ms9185/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -285,7 +285,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/msi/ms9282/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9282/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/msi/ms9282/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -33,6 +33,7 @@
#include <cpu/amd/amdk8_sysconf.h>
+#include <stdlib.h> #include "mb_sysconf.h"
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -110,7 +111,7 @@ m = sysconf.mb; memset(m, 0, sizeof(struct mb_sysconf_t));
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/msi/ms9282/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9282/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/msi/ms9282/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -293,7 +293,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/newisys/khepri/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/newisys/khepri/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/newisys/khepri/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -138,7 +139,7 @@ dump_spd_registers(&cpu[0]); #endif memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
#if 0 dump_pci_devices();
Modified: trunk/coreboot-v2/src/mainboard/newisys/khepri/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/newisys/khepri/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/newisys/khepri/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -265,7 +265,7 @@ PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -30,6 +30,7 @@
#include <cpu/amd/amdk8_sysconf.h>
+#include <stdlib.h> #include "mb_sysconf.h"
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -108,7 +109,7 @@ m = sysconf.mb; memset(m, 0, sizeof(struct mb_sysconf_t));
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
for (i = 0; i < sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i];
Modified: trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -277,7 +277,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/sunw/ultra40/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/sunw/ultra40/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/sunw/ultra40/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -191,7 +192,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/sunw/ultra40/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/sunw/ultra40/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/sunw/ultra40/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #if CONFIG_LOGICAL_CPUS==1 #include <cpu/amd/dualcore.h> #endif +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -75,7 +76,7 @@
get_bus_conf_done = 1;
- hc_possible_num = sizeof(pci1234)/sizeof(pci1234[0]); + hc_possible_num = ARRAY_SIZE(pci1234); get_sblk_pci1234();
Modified: trunk/coreboot-v2/src/mainboard/sunw/ultra40/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/sunw/ultra40/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/sunw/ultra40/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -260,7 +260,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -29,6 +29,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -81,7 +82,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -277,7 +277,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -113,7 +114,7 @@ } #endif disable_watchdogs(); - sdram_initialize(sizeof(mch)/sizeof(mch[0]), mch); + sdram_initialize(ARRAY_SIZE(mch), mch); #if 1 dump_pci_device(PCI_DEV(0, 0x00, 0)); // dump_bar14(PCI_DEV(0, 0x00, 0));
Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -138,7 +139,7 @@ // dump_ipmi_registers(); // mainboard_set_e7520_leds(); // memreset_setup(); - sdram_initialize(sizeof(mch)/sizeof(mch[0]), mch); + sdram_initialize(ARRAY_SIZE(mch), mch); #if 0 dump_pci_devices(); #endif
Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -139,7 +140,7 @@ // dump_ipmi_registers(); // mainboard_set_e7520_leds(); // memreset_setup(); - sdram_initialize(sizeof(mch)/sizeof(mch[0]), mch); + sdram_initialize(ARRAY_SIZE(mch), mch); #if 0 dump_pci_devices(); #endif
Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/auto.updated.c =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/auto.updated.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/auto.updated.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -139,7 +140,7 @@ // dump_ipmi_registers(); // mainboard_set_e7520_leds(); // memreset_setup(); - sdram_initialize(sizeof(mch)/sizeof(mch[0]), mch); + sdram_initialize(ARRAY_SIZE(mch), mch); #if 0 dump_pci_devices(); #endif
Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -139,7 +140,7 @@ // dump_ipmi_registers(); mainboard_set_e7520_leds(); // memreset_setup(); - sdram_initialize(sizeof(mch)/sizeof(mch[0]), mch); + sdram_initialize(ARRAY_SIZE(mch), mch); #if 1 dump_pci_devices(); #endif
Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -139,7 +140,7 @@ // dump_ipmi_registers(); mainboard_set_e7520_leds(); // memreset_setup(); - sdram_initialize(sizeof(mch)/sizeof(mch[0]), mch); + sdram_initialize(ARRAY_SIZE(mch), mch); #if 0 dump_pci_devices(); #endif
Modified: trunk/coreboot-v2/src/mainboard/tyan/s1846/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s1846/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s1846/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -67,6 +68,6 @@ report_bist_failure(bist); enable_smbus(); /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); /* ram_check(0, 640 * 1024); */ }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2735/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2735/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2735/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -96,7 +97,7 @@ #endif
memreset_setup(); - sdram_initialize(sizeof(memctrl)/sizeof(memctrl[0]), memctrl); + sdram_initialize(ARRAY_SIZE(memctrl), memctrl); } #if 0 else {
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2850/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2850/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2850/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -197,6 +198,6 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu) / sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2850/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2850/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2850/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -206,7 +207,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram(); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2875/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2875/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2875/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -167,6 +168,6 @@
enable_smbus(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2875/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2875/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2875/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -203,7 +204,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram();
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2880/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2880/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2880/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -205,7 +206,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram(); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2881/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2881/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2881/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -172,6 +173,6 @@ enable_smbus(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2881/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2881/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2881/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -63,7 +64,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2881/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2881/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2881/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -258,7 +258,7 @@ PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2882/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2882/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2882/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -176,6 +177,6 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2882/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2882/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2882/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -208,7 +209,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram();
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2885/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2885/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2885/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -178,7 +179,7 @@
enable_smbus(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2885/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2885/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2885/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables //busnum is default @@ -65,7 +66,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2885/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2885/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2885/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -259,7 +259,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2891/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2891/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2891/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -145,6 +146,6 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2891/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2891/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2891/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables //busnum is default @@ -71,7 +72,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2891/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2891/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2891/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -260,7 +260,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2892/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2892/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2892/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -147,6 +148,6 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2892/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2892/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2892/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables //busnum is default @@ -68,7 +69,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2892/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2892/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2892/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -260,7 +260,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -172,6 +173,6 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #endif
#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h>
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables //busnum is default @@ -76,7 +77,7 @@
get_bus_conf_done = 1;
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -261,7 +261,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -30,6 +30,7 @@
#include <cpu/amd/amdk8_sysconf.h>
+#include <stdlib.h> #include "mb_sysconf.h"
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -107,7 +108,7 @@ m = sysconf.mb; memset(m, 0, sizeof(struct mb_sysconf_t));
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -277,7 +277,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/get_bus_conf.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/get_bus_conf.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/get_bus_conf.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -30,6 +30,7 @@
#include <cpu/amd/amdfam10_sysconf.h>
+#include <stdlib.h> #include "mb_sysconf.h"
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables @@ -83,7 +84,7 @@ m = sysconf.mb; memset(m, 0, sizeof(struct mb_sysconf_t));
- sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i<sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i];
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -277,7 +277,7 @@ };
int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s4880/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4880/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s4880/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -227,6 +228,6 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/mainboard/tyan/s4880/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4880/cache_as_ram_auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s4880/cache_as_ram_auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -7,6 +7,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -254,7 +255,7 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram(); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s4880/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4880/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s4880/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -258,7 +258,7 @@ PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s4882/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4882/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s4882/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -227,6 +228,6 @@ enable_smbus();
memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu); }
Modified: trunk/coreboot-v2/src/mainboard/tyan/s4882/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4882/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/tyan/s4882/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -258,7 +258,7 @@ PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/mainboard/via/epia/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/via/epia/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -6,6 +6,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -107,7 +108,7 @@
/* this is way more generic than we need. - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu); */ sdram_set_registers((const struct mem_controller *) 0); sdram_set_spd_registers((const struct mem_controller *) 0); @@ -129,7 +130,7 @@ #endif }; int i; - for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) { + for(i = 0; i < ARRAY_SIZE(check_addrs); i++) { ram_check(check_addrs[i].lo, check_addrs[i].hi); } #endif
Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/auto.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/auto.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -10,6 +10,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> +#include <stdlib.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "ram/ramtest.c" @@ -146,7 +147,7 @@ #endif }; int i; - for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) { + for(i = 0; i < ARRAY_SIZE(check_addrs); i++) { ram_check(check_addrs[i].lo, check_addrs[i].hi); } #endif
Modified: trunk/coreboot-v2/src/northbridge/amd/amdfam10/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdfam10/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/amd/amdfam10/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -281,7 +281,7 @@ };
u32 max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/coherent_ht.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/coherent_ht.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/coherent_ht.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -66,6 +66,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <device/hypertransport_def.h> +#include <stdlib.h> #include "arch/romcc_io.h"
#include "amdk8.h" @@ -510,7 +511,7 @@ print_spew("setup_remote_node: ");
/* copy the default resource map from node 0 */ - for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) { + for(i = 0; i < ARRAY_SIZE(pci_reg); i++) { uint32_t value; uint8_t reg; reg = pci_reg[i]; @@ -802,7 +803,7 @@ }; #endif
- setup_row_indirect_group(conn4_1, sizeof(conn4_1)/sizeof(conn4_1[0])); + setup_row_indirect_group(conn4_1, ARRAY_SIZE(conn4_1));
setup_temp_row(0,2); verify_connection(7); @@ -893,7 +894,7 @@ 3,0,1,1, }; #endif - setup_remote_row_indirect_group(conn4_3, sizeof(conn4_3)/sizeof(conn4_3[0])); + setup_remote_row_indirect_group(conn4_3, ARRAY_SIZE(conn4_3));
/* ready to enable RT for Node 3 */ rename_temp_node(3); @@ -909,7 +910,7 @@ 2,1,0,1, }; #endif - setup_row_indirect_group(conn4_2, sizeof(conn4_2)/sizeof(conn4_2[0])); + setup_row_indirect_group(conn4_2, ARRAY_SIZE(conn4_2));
#if 0 /*We need to do sth to reverse work for setup_temp_row (0,1) (1,3) */ @@ -974,7 +975,7 @@ #endif };
- setup_row_indirect_group(conn6_1, sizeof(conn6_1)/sizeof(conn6_1[0])); + setup_row_indirect_group(conn6_1, ARRAY_SIZE(conn6_1)); for(byte=0; byte<4; byte+=2) { setup_temp_row(byte,byte+2); @@ -998,7 +999,7 @@ #endif }; - setup_remote_row_indirect_group(conn6_2, sizeof(conn6_2)/sizeof(conn6_2[0])); + setup_remote_row_indirect_group(conn6_2, ARRAY_SIZE(conn6_2)); rename_temp_node(4); enable_routing(4); @@ -1084,7 +1085,7 @@ #endif }; - setup_remote_row_indirect_group(conn6_3, sizeof(conn6_3)/sizeof(conn6_3[0])); + setup_remote_row_indirect_group(conn6_3, ARRAY_SIZE(conn6_3));
/* ready to enable RT for 5 */ rename_temp_node(5); @@ -1110,7 +1111,7 @@ #endif }; - setup_row_indirect_group(conn6_4, sizeof(conn6_4)/sizeof(conn6_4[0])); + setup_row_indirect_group(conn6_4, ARRAY_SIZE(conn6_4));
#if 0 /* We need to do sth about reverse about setup_temp_row (0,1), (2,4), (1, 3), (3,5) @@ -1202,7 +1203,7 @@ #endif };
- setup_row_indirect_group(conn8_1,sizeof(conn8_1)/sizeof(conn8_1[0])); + setup_row_indirect_group(conn8_1,ARRAY_SIZE(conn8_1));
for(byte=0; byte<6; byte+=2) { setup_temp_row(byte,byte+2); @@ -1225,7 +1226,7 @@ #endif };
- setup_remote_row_indirect_group(conn8_2, sizeof(conn8_2)/sizeof(conn8_2[0])); + setup_remote_row_indirect_group(conn8_2, ARRAY_SIZE(conn8_2));
#if CROSS_BAR_47_56 //init 5, 6 here @@ -1414,7 +1415,7 @@ #endif };
- setup_row_indirect_group(conn8_3, sizeof(conn8_3)/sizeof(conn8_3[0])); + setup_row_indirect_group(conn8_3, ARRAY_SIZE(conn8_3));
#if CROSS_BAR_47_56 /* for 47, 56, 57, 75, 46, 64 we need to substract another link to @@ -1455,7 +1456,7 @@ 7, 3, 6, };
- opt_broadcast_rt_group(conn8_4, sizeof(conn8_4)/sizeof(conn8_4[0])); + opt_broadcast_rt_group(conn8_4, ARRAY_SIZE(conn8_4));
static const u8 conn8_5[] = { 2, 7, 0, @@ -1463,7 +1464,7 @@ 3, 6, 1, };
- opt_broadcast_rt_plus_group(conn8_5, sizeof(conn8_5)/sizeof(conn8_5[0])); + opt_broadcast_rt_plus_group(conn8_5, ARRAY_SIZE(conn8_5)); #endif
@@ -1770,7 +1771,7 @@ 1,3, 2,3, }; - needs_reset |= optimize_connection_group(opt_conn4, sizeof(opt_conn4)/sizeof(opt_conn4[0])); + needs_reset |= optimize_connection_group(opt_conn4, ARRAY_SIZE(opt_conn4)); } #endif
@@ -1783,7 +1784,7 @@ 4, 5, #endif }; - needs_reset |= optimize_connection_group(opt_conn6, sizeof(opt_conn6)/sizeof(opt_conn6[0])); + needs_reset |= optimize_connection_group(opt_conn6, ARRAY_SIZE(opt_conn6)); } #endif
@@ -1798,7 +1799,7 @@ 5, 7, 6, 7, }; - needs_reset |= optimize_connection_group(opt_conn8, sizeof(opt_conn8)/sizeof(opt_conn8[0])); + needs_reset |= optimize_connection_group(opt_conn8, ARRAY_SIZE(opt_conn8)); } #endif
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -10,6 +10,7 @@ #include <cpu/x86/mem.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> +#include <stdlib.h> #include "raminit.h" #include "amdk8.h"
@@ -555,7 +556,7 @@ print_spew("setting up CPU"); print_spew_hex8(ctrl->node_id); print_spew(" northbridge registers\r\n"); - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { device_t dev; unsigned where; @@ -1303,7 +1304,7 @@ } device0 = ctrl->channel0[i]; device1 = ctrl->channel1[i]; - for(j = 0; j < sizeof(addresses)/sizeof(addresses[0]); j++) { + for(j = 0; j < ARRAY_SIZE(addresses); j++) { unsigned addr; addr = addresses[j]; value0 = spd_read_byte(device0, addr);
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_f.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_f.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_f.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -25,6 +25,7 @@ #include <cpu/x86/mtrr.h> #include <cpu/x86/tsc.h>
+#include <stdlib.h> #include "raminit.h" #include "amdk8_f.h" #include "spd_ddr2.h" @@ -715,7 +716,7 @@ print_spew("setting up CPU"); print_spew_hex8(ctrl->node_id); print_spew(" northbridge registers\r\n"); - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for (i = 0; i < max; i += 3) { device_t dev; unsigned where; @@ -1496,7 +1497,7 @@ } device0 = ctrl->channel0[i]; device1 = ctrl->channel1[i]; - for (j = 0; j < sizeof(addresses)/sizeof(addresses[0]); j++) { + for (j = 0; j < ARRAY_SIZE(addresses); j++) { unsigned addr; addr = addresses[j]; value0 = spd_read_byte(device0, addr);
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_test.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_test.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_test.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -4,6 +4,7 @@ #include <string.h> #include <setjmp.h> #include <device/pci_def.h> +#include <stdlib.h> #include "amdk8.h"
jmp_buf end_buf; @@ -341,7 +342,7 @@ }; console_init(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/resourcemap.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/resourcemap.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/resourcemap.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -253,6 +253,6 @@ PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); }
Modified: trunk/coreboot-v2/src/northbridge/amd/gx2/chipsetinit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/gx2/chipsetinit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/amd/gx2/chipsetinit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -177,7 +177,7 @@ { FLASH_TYPE_NONE, 0, 0 }, /* CS3, or Flash Device 3 */ };
-#define FlashInitTableLen (sizeof(FlashInitTable)/sizeof(FlashInitTable[0])) +#define FlashInitTableLen (ARRAY_SIZE(FlashInitTable))
uint32_t FlashPort[] = { MDD_LBAR_FLSH0,
Modified: trunk/coreboot-v2/src/northbridge/intel/e7501/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/e7501/raminit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/intel/e7501/raminit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -14,6 +14,7 @@ #include <assert.h> #include <spd.h> #include <sdram_mode.h> +#include <stdlib.h> #include "e7501.h"
// Uncomment this to enable run-time checking of DIMM parameters @@ -1631,7 +1632,7 @@ static void ram_set_d0f0_regs(const struct mem_controller *ctrl) { int i; - int num_values = sizeof(constant_register_values)/sizeof(constant_register_values[0]); + int num_values = ARRAY_SIZE(constant_register_values);
ASSERT((num_values % 3) == 0); // Bad table?
Modified: trunk/coreboot-v2/src/northbridge/intel/e7520/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/e7520/raminit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/intel/e7520/raminit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -21,6 +21,7 @@ #include <cpu/x86/mem.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> +#include <stdlib.h> #include "raminit.h" #include "e7520.h"
@@ -62,7 +63,7 @@ int i; int max;
- max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { device_t dev; unsigned where;
Modified: trunk/coreboot-v2/src/northbridge/intel/e7520/raminit_test.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/e7520/raminit_test.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/intel/e7520/raminit_test.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -4,6 +4,7 @@ #include <string.h> #include <setjmp.h> #include <device/pci_def.h> +#include <stdlib.h> #include "e7520.h"
jmp_buf end_buf; @@ -341,7 +342,7 @@ }; console_init(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
Modified: trunk/coreboot-v2/src/northbridge/intel/e7525/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/e7525/raminit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/intel/e7525/raminit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -21,6 +21,7 @@ #include <cpu/x86/mem.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> +#include <stdlib.h> #include "raminit.h" #include "e7525.h"
@@ -62,7 +63,7 @@ int i; int max;
- max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { device_t dev; unsigned where;
Modified: trunk/coreboot-v2/src/northbridge/intel/e7525/raminit_test.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/e7525/raminit_test.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/intel/e7525/raminit_test.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -4,6 +4,7 @@ #include <string.h> #include <setjmp.h> #include <device/pci_def.h> +#include <stdlib.h> #include "e7525.h"
jmp_buf end_buf; @@ -313,7 +314,7 @@ }; console_init(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu);
} #endif
Modified: trunk/coreboot-v2/src/northbridge/intel/i3100/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i3100/raminit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/intel/i3100/raminit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -22,6 +22,7 @@ #include <cpu/x86/mem.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> +#include <stdlib.h> #include "raminit.h" #include "i3100.h"
@@ -64,7 +65,7 @@ int i; int max;
- max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { device_t dev; u32 where;
Modified: trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -21,6 +21,7 @@ #include <spd.h> #include <sdram_mode.h> #include <delay.h> +#include <stdlib.h> #include "i440bx.h"
/*----------------------------------------------------------------------------- @@ -430,7 +431,7 @@ PRINT_DEBUG("Northbridge prior to SDRAM init:\r\n"); DUMPNORTH();
- max = sizeof(register_values) / sizeof(register_values[0]); + max = ARRAY_SIZE(register_values);
/* Set registers as specified in the register_values[] array. */ for (i = 0; i < max; i += 3) {
Modified: trunk/coreboot-v2/src/northbridge/intel/i855pm/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i855pm/raminit.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/intel/i855pm/raminit.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -384,7 +384,7 @@ #endif int i; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { uint32_t reg; #if DEBUG_RAM_CONFIG >=2
Modified: trunk/coreboot-v2/src/northbridge/via/vt8601/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/via/vt8601/northbridge.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/via/vt8601/northbridge.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -115,7 +115,7 @@ unsigned char rambits; int i, idx;
- for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) { + for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { unsigned char reg; reg = pci_read_config8(mc_dev, ramregs[i]); /* these are ENDING addresses, not sizes.
Modified: trunk/coreboot-v2/src/northbridge/via/vt8623/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/via/vt8623/northbridge.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/northbridge/via/vt8623/northbridge.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -287,7 +287,7 @@ unsigned char rambits; int i, idx;
- for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) { + for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { unsigned char reg; reg = pci_read_config8(mc_dev, ramregs[i]); /* these are ENDING addresses, not sizes.
Modified: trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_lpc.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_lpc.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_lpc.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -10,6 +10,7 @@ #include <pc80/mc146818rtc.h> #include <pc80/isa-dma.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "amd8111.h"
#define NMI_OFF 0 @@ -77,7 +78,7 @@ ioapicregvalues[0].value_high = bsp_apicid<<(56-32); printk_debug("amd8111: ioapic bsp_apicid = %02x\n", bsp_apicid); - for (i = 0; i < sizeof(ioapicregvalues) / sizeof(ioapicregvalues[0]); + for (i = 0; i < ARRAY_SIZE(ioapicregvalues); i++, a++) { l[0] = (a->reg * 2) + 0x10; l[4] = a->value_low;
Modified: trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -29,6 +29,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/vr.h> #include <cpu/amd/geode_post_code.h> +#include <stdlib.h> #include "chip.h" #include "cs5536.h"
@@ -93,7 +94,7 @@ {FLASH_TYPE_NONE, 0, 0}, /* CS3, or Flash Device 3 */ };
-#define FlashInitTableLen (sizeof(FlashInitTable)/sizeof(FlashInitTable[0])) +#define FlashInitTableLen (ARRAY_SIZE(FlashInitTable))
uint32_t FlashPort[] = { MDD_LBAR_FLSH0,
Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sm.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sm.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sm.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -27,6 +27,7 @@ #include <bitops.h> #include <arch/io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "sb600.h" #include "sb600_smbus.c"
@@ -101,7 +102,7 @@
l = (unsigned long *)ioapic_base;
- for (i = 0; i < sizeof(ioapicregvalues) / sizeof(ioapicregvalues[0]); + for (i = 0; i < ARRAY_SIZE(ioapicregvalues); i++, a++) { l[0] = (a->reg * 2) + 0x10; l[4] = a->value_low;
Modified: trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_early_setup.c =================================================================== --- trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_early_setup.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_early_setup.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -102,7 +102,7 @@ #endif };
- setup_resource_map(ctrl_devport_conf, sizeof(ctrl_devport_conf)/sizeof(ctrl_devport_conf[0])); + setup_resource_map(ctrl_devport_conf, ARRAY_SIZE(ctrl_devport_conf));
}
@@ -121,7 +121,7 @@ #endif };
- setup_resource_map(ctrl_devport_conf_clear, sizeof(ctrl_devport_conf_clear)/sizeof(ctrl_devport_conf_clear[0])); + setup_resource_map(ctrl_devport_conf_clear, ARRAY_SIZE(ctrl_devport_conf_clear));
}
@@ -324,7 +324,7 @@
- setup_resource_map_x(ctrl_conf, sizeof(ctrl_conf)/sizeof(ctrl_conf[0])); + setup_resource_map_x(ctrl_conf, ARRAY_SIZE(ctrl_conf));
setup_ss_table(ANACTRL_IO_BASE+0x40, ANACTRL_IO_BASE+0x44, ANACTRL_IO_BASE+0x48, pcie_ss_tbl, 64); setup_ss_table(ANACTRL_IO_BASE+0xb0, ANACTRL_IO_BASE+0xb4, ANACTRL_IO_BASE+0xb8, sata_ss_tbl, 64);
Modified: trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_early_setup_car.c =================================================================== --- trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_early_setup_car.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_early_setup_car.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -105,12 +105,12 @@ for(j = 0; j < ck804_num; j++ ) { if(busn[j]==0) { //sb chain setup_resource_map_offset(ctrl_devport_conf, - sizeof(ctrl_devport_conf)/sizeof(ctrl_devport_conf[0]), + ARRAY_SIZE(ctrl_devport_conf), PCI_DEV(busn[j], 0, 0) , io_base[j]); continue; } setup_resource_map_offset(ctrl_devport_conf_b, - sizeof(ctrl_devport_conf_b)/sizeof(ctrl_devport_conf_b[0]), + ARRAY_SIZE(ctrl_devport_conf_b), PCI_DEV(busn[j], 0, 0) , io_base[j]); } } @@ -132,12 +132,12 @@ for(j = 0; j < ck804_num; j++ ) { if(busn[j]==0) { //sb chain setup_resource_map_offset(ctrl_devport_conf_clear, - sizeof(ctrl_devport_conf_clear)/sizeof(ctrl_devport_conf_clear[0]), + ARRAY_SIZE(ctrl_devport_conf_clear), PCI_DEV(busn[j], 0, 0) , io_base[j]); continue; } setup_resource_map_offset(ctrl_devport_conf_clear_b, - sizeof(ctrl_devport_conf_clear_b)/sizeof(ctrl_devport_conf_clear_b[0]), + ARRAY_SIZE(ctrl_devport_conf_clear_b), PCI_DEV(busn[j], 0, 0) , io_base[j]); }
@@ -327,13 +327,13 @@
for(j=0; j<ck804_num; j++) { if(busn[j] == 0) { - setup_resource_map_x_offset(ctrl_conf_master, sizeof(ctrl_conf_master)/sizeof(ctrl_conf_master[0]), + setup_resource_map_x_offset(ctrl_conf_master, ARRAY_SIZE(ctrl_conf_master), PCI_DEV(busn[0],0,0), io_base[0]); continue; }
- setup_resource_map_x_offset(ctrl_conf_slave, sizeof(ctrl_conf_slave)/sizeof(ctrl_conf_slave[0]), + setup_resource_map_x_offset(ctrl_conf_slave, ARRAY_SIZE(ctrl_conf_slave), PCI_DEV(busn[j],0,0), io_base[j]); }
Modified: trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_lpc.c =================================================================== --- trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_lpc.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_lpc.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -15,6 +15,7 @@ #include <bitops.h> #include <arch/io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "ck804.h"
#define CK804_CHIP_REV 2 @@ -82,7 +83,7 @@
l = (unsigned long *) ioapic_base;
- for (i = 0; i < sizeof(ioapicregvalues) / sizeof(ioapicregvalues[0]); + for (i = 0; i < ARRAY_SIZE(ioapicregvalues); i++, a++) { l[0] = (a->reg * 2) + 0x10; l[4] = a->value_low;
Modified: trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c =================================================================== --- trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -106,7 +106,7 @@ int j; for(j = 0; j < mcp55_num; j++ ) { setup_resource_map_offset(ctrl_devport_conf, - sizeof(ctrl_devport_conf)/sizeof(ctrl_devport_conf[0]), + ARRAY_SIZE(ctrl_devport_conf), PCI_DEV(busn[j], devn[j], 0) , io_base[j]); } } @@ -123,7 +123,7 @@ int j; for(j = 0; j < mcp55_num; j++ ) { setup_resource_map_offset(ctrl_devport_conf_clear, - sizeof(ctrl_devport_conf_clear)/sizeof(ctrl_devport_conf_clear[0]), + ARRAY_SIZE(ctrl_devport_conf_clear), PCI_DEV(busn[j], devn[j], 0) , io_base[j]); }
@@ -327,23 +327,23 @@ for(j=0; j<mcp55_num; j++) { mcp55_early_pcie_setup(busn[j], devn[j], io_base[j] + ANACTRL_IO_BASE, pci_e_x[j]);
- setup_resource_map_x_offset(ctrl_conf_1, sizeof(ctrl_conf_1)/sizeof(ctrl_conf_1[0]), + setup_resource_map_x_offset(ctrl_conf_1, ARRAY_SIZE(ctrl_conf_1), PCI_DEV(busn[j], devn[j], 0), io_base[j]); for(i=0; i<3; i++) { // three SATA - setup_resource_map_x_offset(ctrl_conf_1_1, sizeof(ctrl_conf_1_1)/sizeof(ctrl_conf_1_1[0]), + setup_resource_map_x_offset(ctrl_conf_1_1, ARRAY_SIZE(ctrl_conf_1_1), PCI_DEV(busn[j], devn[j], i), io_base[j]); } if(busn[j] == 0) { - setup_resource_map_x_offset(ctrl_conf_mcp55_only, sizeof(ctrl_conf_mcp55_only)/sizeof(ctrl_conf_mcp55_only[0]), + setup_resource_map_x_offset(ctrl_conf_mcp55_only, ARRAY_SIZE(ctrl_conf_mcp55_only), PCI_DEV(busn[j], devn[j], 0), io_base[j]); }
if( (busn[j] == 0) && (mcp55_num>1) ) { - setup_resource_map_x_offset(ctrl_conf_master_only, sizeof(ctrl_conf_master_only)/sizeof(ctrl_conf_master_only[0]), + setup_resource_map_x_offset(ctrl_conf_master_only, ARRAY_SIZE(ctrl_conf_master_only), PCI_DEV(busn[j], devn[j], 0), io_base[j]); }
- setup_resource_map_x_offset(ctrl_conf_2, sizeof(ctrl_conf_2)/sizeof(ctrl_conf_2[0]), + setup_resource_map_x_offset(ctrl_conf_2, ARRAY_SIZE(ctrl_conf_2), PCI_DEV(busn[j], devn[j], 0), io_base[j]);
}
Modified: trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_lpc.c =================================================================== --- trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_lpc.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_lpc.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -34,6 +34,7 @@ #include <bitops.h> #include <arch/io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "mcp55.h"
#define NMI_OFF 0 @@ -106,7 +107,7 @@
l = (unsigned long *) ioapic_base;
- for (i = 0; i < sizeof(ioapicregvalues) / sizeof(ioapicregvalues[0]); + for (i = 0; i < ARRAY_SIZE(ioapicregvalues); i++, a++) { l[0] = (a->reg * 2) + 0x10; l[4] = a->value_low;
Modified: trunk/coreboot-v2/src/southbridge/sis/sis966/sis966_lpc.c =================================================================== --- trunk/coreboot-v2/src/southbridge/sis/sis966/sis966_lpc.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/southbridge/sis/sis966/sis966_lpc.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -36,6 +36,7 @@ #include <bitops.h> #include <arch/io.h> #include <cpu/x86/lapic.h> +#include <stdlib.h> #include "sis966.h" #include <pc80/keyboard.h>
@@ -102,7 +103,7 @@
l = (unsigned long *) ioapic_base;
- for (i = 0; i < sizeof(ioapicregvalues) / sizeof(ioapicregvalues[0]); + for (i = 0; i < ARRAY_SIZE(ioapicregvalues); i++, a++) { l[0] = (a->reg * 2) + 0x10; l[4] = a->value_low;
Modified: trunk/coreboot-v2/src/stream/fs/vfs.c =================================================================== --- trunk/coreboot-v2/src/stream/fs/vfs.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/stream/fs/vfs.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -70,7 +70,7 @@ { int i;
- for (i = 0; i < sizeof(fsys_table)/sizeof(fsys_table[0]); i++) { + for (i = 0; i < ARRAY_SIZE(fsys_table); i++) { if (fsys_table[i].mount_func()) { fsys = &fsys_table[i]; printk_info("Mounted %s\n", fsys->name);
Modified: trunk/coreboot-v2/src/superio/ite/it8661f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/ite/it8661f/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/ite/it8661f/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -23,6 +23,7 @@ #include <device/device.h> #include <device/pnp.h> #include <uart8250.h> +#include <stdlib.h> #include "chip.h" #include "it8661f.h"
@@ -72,7 +73,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_ite_it8661f_ops = {
Modified: trunk/coreboot-v2/src/superio/ite/it8671f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/ite/it8671f/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/ite/it8671f/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -22,6 +22,7 @@ #include <device/pnp.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "it8671f.h"
@@ -77,7 +78,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_ite_it8671f_ops = {
Modified: trunk/coreboot-v2/src/superio/ite/it8673f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/ite/it8673f/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/ite/it8673f/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -22,6 +22,7 @@ #include <device/pnp.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "it8673f.h"
@@ -79,7 +80,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_ite_it8673f_ops = {
Modified: trunk/coreboot-v2/src/superio/ite/it8705f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/ite/it8705f/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/ite/it8705f/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -23,6 +23,7 @@ #include <device/device.h> #include <device/pnp.h> #include <uart8250.h> +#include <stdlib.h> #include "chip.h" #include "it8705f.h"
@@ -80,7 +81,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_ite_it8705f_ops = {
Modified: trunk/coreboot-v2/src/superio/ite/it8712f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/ite/it8712f/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/ite/it8712f/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -24,6 +24,7 @@ #include <uart8250.h> #include <pc80/keyboard.h> #include <arch/io.h> +#include <stdlib.h> #include "chip.h" #include "it8712f.h"
@@ -134,7 +135,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_ite_it8712f_ops = {
Modified: trunk/coreboot-v2/src/superio/ite/it8716f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/ite/it8716f/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/ite/it8716f/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -27,6 +27,7 @@ #include <uart8250.h> #include <pc80/keyboard.h> #include <arch/io.h> +#include <stdlib.h> #include "chip.h" #include "it8716f.h"
@@ -165,7 +166,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info) / sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_ite_it8716f_ops = {
Modified: trunk/coreboot-v2/src/superio/ite/it8718f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/ite/it8718f/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/ite/it8718f/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -22,6 +22,7 @@ #include <device/pnp.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "it8718f.h"
@@ -81,7 +82,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_ite_it8718f_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc8374/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc8374/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc8374/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -10,6 +10,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "pc8374.h"
@@ -64,7 +65,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc8374_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc87309/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc87309/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc87309/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -23,6 +23,7 @@ #include <device/pnp.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "pc87309.h"
@@ -73,7 +74,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info) / sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc87309_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc87351/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc87351/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc87351/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -16,6 +16,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "pc87351.h"
@@ -71,7 +72,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc87351_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc87360/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc87360/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc87360/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -10,6 +10,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "pc87360.h"
@@ -67,7 +68,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc87360_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc87366/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc87366/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc87366/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -10,6 +10,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "pc87366.h"
@@ -67,7 +68,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc87366_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc87417/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc87417/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc87417/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -12,6 +12,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "pc87417.h"
@@ -68,7 +69,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc87417_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc87427/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc87427/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc87427/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -8,6 +8,7 @@ #include <console/console.h> #include <string.h> #include <bitops.h> +#include <stdlib.h> #include "chip.h" #include "pc87427.h"
@@ -68,7 +69,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc87427_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc97307/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc97307/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc97307/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <stdlib.h> #include "chip.h" #include "pc97307.h"
@@ -79,7 +80,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc97307_ops = {
Modified: trunk/coreboot-v2/src/superio/nsc/pc97317/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/nsc/pc97317/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/nsc/pc97317/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -5,6 +5,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <stdlib.h> #include "chip.h" #include "pc97317.h"
@@ -81,7 +82,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_nsc_pc97317_ops = {
Modified: trunk/coreboot-v2/src/superio/smsc/fdc37m60x/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/smsc/fdc37m60x/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/smsc/fdc37m60x/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -22,6 +22,7 @@ #include <device/pnp.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "fdc37m60x.h"
@@ -77,7 +78,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_smsc_fdc37m60x_ops = {
Modified: trunk/coreboot-v2/src/superio/smsc/lpc47b272/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/smsc/lpc47b272/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/smsc/lpc47b272/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -32,6 +32,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "lpc47b272.h"
@@ -84,7 +85,7 @@ static void enable_dev(device_t dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
Modified: trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -14,6 +14,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "lpc47b397.h"
@@ -207,7 +208,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_smsc_lpc47b397_ops = {
Modified: trunk/coreboot-v2/src/superio/smsc/lpc47m10x/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/smsc/lpc47m10x/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/smsc/lpc47m10x/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -31,6 +31,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "lpc47m10x.h"
@@ -82,7 +83,7 @@ static void enable_dev(device_t dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
Modified: trunk/coreboot-v2/src/superio/smsc/lpc47n217/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/smsc/lpc47n217/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/smsc/lpc47n217/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -33,6 +33,7 @@ #include <bitops.h> #include <uart8250.h> #include <assert.h> +#include <stdlib.h> #include "chip.h" #include "lpc47n217.h"
@@ -86,7 +87,7 @@ static void enable_dev(device_t dev) { pnp_enable_devices(dev, &pnp_ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
Modified: trunk/coreboot-v2/src/superio/via/vt1211/vt1211.c =================================================================== --- trunk/coreboot-v2/src/superio/via/vt1211/vt1211.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/via/vt1211/vt1211.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <device/device.h> #include <device/pnp.h> #include <uart8250.h> +#include <stdlib.h>
#include "vt1211.h" #include "chip.h" @@ -212,7 +213,7 @@ printk_debug("vt1211 enabling PNP devices.\n"); pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info) / sizeof(pnp_dev_info[0]), + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
Modified: trunk/coreboot-v2/src/superio/winbond/w83627ehg/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/winbond/w83627ehg/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/winbond/w83627ehg/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -30,6 +30,7 @@ #include <uart8250.h> #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> +#include <stdlib.h> #include "chip.h" #include "w83627ehg.h"
@@ -93,7 +94,7 @@ 0x48, 0x7f, 0x2a, /* Set SMBus base to 0x54 >> 1. */ };
- for(i = 0; i < sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i += 3) { + for(i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) { reg = hwm_reg_values[i]; value = pnp_read_index(base, reg); value &= 0xff & (~(hwm_reg_values[i + 1])); @@ -200,7 +201,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_winbond_w83627ehg_ops = {
Modified: trunk/coreboot-v2/src/superio/winbond/w83627hf/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/winbond/w83627hf/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/winbond/w83627hf/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -13,6 +13,7 @@ #include <uart8250.h> #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> +#include <stdlib.h> #include "chip.h" #include "w83627hf.h"
@@ -83,7 +84,7 @@
};
- for(i = 0; i< sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i+=3 ) { + for(i = 0; i< ARRAY_SIZE(hwm_reg_values); i+=3 ) { reg = hwm_reg_values[i]; value = pnp_read_index(base, reg); value &= 0xff & hwm_reg_values[i+1]; @@ -189,7 +190,7 @@ static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_winbond_w83627hf_ops = {
Modified: trunk/coreboot-v2/src/superio/winbond/w83627thf/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/winbond/w83627thf/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/winbond/w83627thf/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -12,6 +12,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "w83627thf.h"
@@ -101,7 +102,7 @@ static void enable_dev(device_t dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_winbond_w83627thf_ops = {
Modified: trunk/coreboot-v2/src/superio/winbond/w83977f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/winbond/w83977f/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/winbond/w83977f/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -26,6 +26,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "w83977f.h"
@@ -109,7 +110,7 @@ static void enable_dev(device_t dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_winbond_w83977f_ops = {
Modified: trunk/coreboot-v2/src/superio/winbond/w83977tf/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/winbond/w83977tf/superio.c 2008-09-30 17:09:44 UTC (rev 3623) +++ trunk/coreboot-v2/src/superio/winbond/w83977tf/superio.c 2008-10-01 12:52:52 UTC (rev 3624) @@ -19,6 +19,7 @@ #include <bitops.h> #include <uart8250.h> #include <pc80/keyboard.h> +#include <stdlib.h> #include "chip.h" #include "w83977tf.h"
@@ -105,7 +106,7 @@ static void enable_dev(device_t dev) { pnp_enable_devices(dev, &ops, - sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
struct chip_operations superio_winbond_w83977tf_ops = {
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