Hi everyone,
I mentioned this during my presentation at the coreboot conference last week, and I was waiting for it to be merged before I announced it on the mailing list.
For those of you working on recent hardware (this was tested on skylake only, for broadwell to work, we need to add the spi controller to romstage and convert it to use CAR_GLOBAL, I don't know about other archs), if you don't have a debug header, or if you don't want to go through the trouble of soldering on UART pads or you just don't have any easy access to the debug console, then you can enable the "SPI Flash console output" option in the Console menu. It will automatically add an area to the FMAP which will contain your console log. After you turn on the machine, you can dump the SPI flash and use cbfstool to get the full console log : cbfstool coreboot.rom read -r CONSOLE -f console.log
The console log will contain all stages including the bootblock and romstage, so it's useful to debug memory init issues. Since most of us debugging coreboot on new mainboards will already have our external SPI flasher hooked up, we can just read the rom before writing a new one to it and get the log at the same time.
Note that the console log will not be reset on poweroff/reboot, it will continue to grow until the whole area is full, at which point it will stop writing anything to the flash. This is to avoid excessive SPI writes in case you forget to disable the option once you get the machine booting.
That's it, I hope it's useful to someone else!
Thanks to Matt DeVillier and Aaron Durbin for helping debug/test/review the implementation.
Youness.