[PATCH] simplify coreboot console.h

[Stefan Reinauer]

See patch.

[Patrick Georgi]

Acked-by: Patrick Georgi

gcc 4.6.0 and coreboot

[Scott Duplichan]

Is anyone using gcc 4.6.0 for coreboot builds yet? New with gcc 4.6.0
is warning -Wunused-but-set-variable. Borland compilers offered this
useful warning 25 years ago, but until now others generally do not.

My interest in gcc 4.6.0 is for using the improved link time optimization
to reduce code size and cut boot time. This is especially useful for
projects using the new AMD reference code, where many unused functions
and data can end up in the image. Here is a comaprision with and without
link time optimization:

AMD Persimmon image size, gcc 4.6.0

Standard    -flto
fallback/romstage        285072      161464
fallback/coreboot_ram    167885      114976

I built xgcc using svn://coreboot.org/coreboot/trunk/util/crossgcc/buildgcc
with these changes:
1) binutils-2.21.51.tar.bz2
2) gcc-core-4.6.0.tar.bz2
3) patches removed
4) --disable-libquadmath (to avoid a build problem)
5) --with-dwarf2 (makes debug output without modification to the makefiles)
6) --enable-frame-pointer (work around)

Change 6 is most interesting. Gcc 4.6.0 documents a change in default for
frame pointer omission. Building with only -Os (optimize for size) results
in bigger code because of missing frame pointer omission. Building with
'-Os -fomit-frame-pointer' results in a huge code size increase. Combining
-fomit-frame-pointer and -Os seems to disable -Os. Configuring with
--enable-frame-pointer restores the previous behavior and aviods the problem.

With this xgcc, the only changes needed to get through abuild are:
1) Disable -Wall. -Wall enables the new -Wunused-but-set-variable,
which causes a build fail when unused variables are found.

2) Change to crt0.s edit logic to avoid build fails when crt0.s ends up
with a line starting with ".section .section".
Index: src/arch/x86/Makefile.inc
===================================================================
--- src/arch/x86/Makefile.inc	(revision 6530)
+++ src/arch/x86/Makefile.inc	(working copy)
@@ -240,7 +240,7 @@

$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
    @printf "    POST       romstage.inc\n"
-	sed -e 's/.rodata/.rom.data/g' -e 's/.text/.section .rom.text/g' $^ > $@.tmp
+	sed -e 's/.rodata/.rom.data/g' -e 's/^[ \t]*.text/.section .rom.text/g' $^ > $@.tmp
    mv $@.tmp $@
 endif
===================================================================

To build with link time optimization enabled additional changes in the
attached patch were used. So far I have tested on AMD Persimmon only.

Thanks,
Scott