Thanks for the hint. I see the BC_XMAP registers touched in nsc/gx1/gx_setup.inc.
.long BC_XMAP_1, 0x60 .long BC_XMAP_2, 0 .long BC_XMAP_3, 0
And from the gx1 spec:
--- GX_BASE+800Ch-800Fh BC_XMAP_3 Register (R/W) Default Value = 00000000h 19:16 F0 F0 Region: Region control field for address range F0000h to F3FFFh.
Bit Position: Function 3 PCI Accessible: The PCI slave can access this memory if this bit is set high and if the appropriate Read or Write Enable bit is also set high. 2 Cache Enable1: Caching this region of memory is inhibited if this bit is cleared. 1 Write Enable1: Write operations to this region of memory are allowed if this bit is set high. If this bit is cleared, then write operations in this region are directed to the PCI master. 0 Read Enable: Read operations to this region of memory are allowed if this bit is set high. If this bit is cleared then read operations in this region are directed to the PCI master. ---
So 3 looks like the right value to set to enable read and write. So at first I tried with 0x33333333 just to see what would happen if I made all those regions read/write. (I'm still not sure how the gx1 processor knows what part of SDRAM those regions are mapped to.) In any case, that results in a hang immediately after boot. You see just: "LinuxBIOS starting..." Meaning, you don't see even raminit occur. Then I tried just 0x00030000 and that had the same effect. I then tried moving the 3 across one by one to see if any would avoid the hang. But nope, a 3 in any of those nibbles causes the hang. I then tried to set write only, that is, a value of 0x2. That does boot. But then one can't readback the table.
So, I'm stuck. I think I need to figure out how and where we tell the gx1 what address range maps to the SDRAM.
--- Ian Smith firstname.lastname@example.org wrote:
At 04:02 02/03/2005, ramesh bios wrote:
- Shadow RAM
I guess I would need to find a way to tell the northbridge to enable shadow RAM for some range
f0000. I looked through the CS5530A datasheet and
shadow registers but no mention of shadowing RAM.
in the GX1 datasheet either. I'm looking for some register in either the GX1 or the CS5530A that
enable this. I am looking for some register that
enable me to remap the C0000-F0000 address range to somewhere in sdram. Is that the right thing to be looking for?
I think you may need to look at your settings for the BC_XMAP_2 and BC_XMAP_3 registers on the GX1 - these control read and write access to the BIOS shadow ram regions.
- Uncompressed payload
I'm not sure I understand what this means. Right
my payload is filo. In the build, I see:
dd conv=sync bs=196608 if=/bios/filo-0.4.2/filo.elf of=payload.block cat payload.block > romimage
Oh, I guess you must mean this stuff:
objcopy -O binary linuxbios_c linuxbios_payload.bin ./nrv2b e linuxbios_payload.bin linuxbios_payload.nrv2b
So I guess there is some kind of compression going
Not sure if you're using Linuxbios V1 or V2 but in V1 there is an option in your build config file to turn off compression - you probably need something like:
If it's V2 then no doubt there is an equivalent there too.
Which method would be the right thing to do? I'll
at the shadow ram thing first then.
Nope this helps
--- "Ronald G. Minnich" email@example.com wrote:
On Tue, 1 Mar 2005, ramesh bios wrote:
Strike that. The issue is somewhere with copy_pirq_routing_table. IE: why does the copy
f0000 fail. I had assumed that the 500 address
alternate location that the table was copied
now, I'm looking at that f000 failure.
the copy to f0000 fails because shadow ram is
You can fix this one of two ways. One is to
out how to enable shadow ram. The second is to make the payload uncompressed. The copy will still fail but linux will find the PIRQ table anyway.
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for shadow ram, you need to enable writes to go to ram. Later on, when you are done with a region, you need to enable reads.
So the way you do this: figure out which one is for 0xf0000. Enable writes (2). At the end of the process, you need to set (3) for the area.
And, somebody will have to explain how this fits in with the new stuff, as I have not looked at shadow ram setup at all in V2!