I added names for the AMD registers and separated each .long onto it's own line to avoid any bugs of the type the caldani mentioned.
Comments? Acks? :)
Thanks, wt 8<------------------- Macros for the register addresses for the MTRR MSRs are already defined in include/cpu/x86/car.h. This patch uses those macros instead of creating a second instance of that same data.
I also combined common MTRR definitions into a macro. I also added a few macros to the amd mtrr.h to make the MSR naming more consistent.
Signed-off-by: Warren Turkal wt@penguintechs.org --- src/cpu/amd/car/cache_as_ram.inc | 24 ++++----------------- src/cpu/intel/car/cache_as_ram.inc | 17 +++------------ src/cpu/via/car/cache_as_ram.inc | 17 +++------------ src/include/cpu/amd/mtrr.h | 27 +++++++++++++++++++----- src/include/cpu/x86/mtrr.h | 39 ++++++++++++++++++++++++++++++++++++ 5 files changed, 73 insertions(+), 51 deletions(-)
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 5318272..a8c6972 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -155,7 +155,7 @@ enable_fixed_mtrr_dram_modify:
/* Clear all MTRRs. */ xorl %edx, %edx - movl $fixed_mtrr_msr, %esi + movl $all_mtrr_msrs, %esi
clear_fixed_var_mtrr: lodsl (%esi), %eax @@ -396,23 +396,9 @@ CAR_FAM10_ap_out:
post_code(0xaf) /* Should never see this POST code. */
-fixed_mtrr_msr: - .long 0x250, 0x258, 0x259 - .long 0x268, 0x269, 0x26A - .long 0x26B, 0x26C, 0x26D - .long 0x26E, 0x26F - -var_mtrr_msr: - .long 0x200, 0x201, 0x202, 0x203 - .long 0x204, 0x205, 0x206, 0x207 - .long 0x208, 0x209, 0x20A, 0x20B - .long 0x20C, 0x20D, 0x20E, 0x20F - -var_iorr_msr: - .long 0xC0010016, 0xC0010017, 0xC0010018, 0xC0010019 - -mem_top: - .long 0xC001001A, 0xC001001D - .long 0x000 /* NULL, end of table */ +all_mtrr_msrs: +X86_MTRR_MSRS_TABLE_ENTRIES_ASM +AMD_MTRR_MSRS_TABLE_ENTRIES_ASM +END_MTRR_MSRS_TABLE_ENTRY_ASM
cache_as_ram_setup_out: diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index d8465f4..84e2f2f 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -115,7 +115,7 @@ NotHtProcessor:
/* Clear all MTRRs. */ xorl %edx, %edx - movl $fixed_mtrr_msr, %esi + movl $all_mtrr_msrs, %esi
clear_fixed_var_mtrr: lodsl (%esi), %eax @@ -128,18 +128,9 @@ clear_fixed_var_mtrr:
jmp clear_fixed_var_mtrr
-fixed_mtrr_msr: - .long 0x250, 0x258, 0x259 - .long 0x268, 0x269, 0x26A - .long 0x26B, 0x26C, 0x26D - .long 0x26E, 0x26F - -var_mtrr_msr: - .long 0x200, 0x201, 0x202, 0x203 - .long 0x204, 0x205, 0x206, 0x207 - .long 0x208, 0x209, 0x20A, 0x20B - .long 0x20C, 0x20D, 0x20E, 0x20F - .long 0x000 /* NULL, end of table */ +all_mtrr_msrs: +X86_MTRR_MSRS_TABLE_ENTRIES_ASM +END_MTRR_MSRS_TABLE_ENTRY_ASM
clear_fixed_var_mtrr_out:
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc index d6df4a9..80f8c13 100644 --- a/src/cpu/via/car/cache_as_ram.inc +++ b/src/cpu/via/car/cache_as_ram.inc @@ -47,7 +47,7 @@ CacheAsRam:
/* Clear all MTRRs. */ xorl %edx, %edx - movl $fixed_mtrr_msr, %esi + movl $all_mtrr_msrs, %esi
clear_fixed_var_mtrr: lodsl (%esi), %eax @@ -60,18 +60,9 @@ clear_fixed_var_mtrr:
jmp clear_fixed_var_mtrr
-fixed_mtrr_msr: - .long 0x250, 0x258, 0x259 - .long 0x268, 0x269, 0x26A - .long 0x26B, 0x26C, 0x26D - .long 0x26E, 0x26F - -var_mtrr_msr: - .long 0x200, 0x201, 0x202, 0x203 - .long 0x204, 0x205, 0x206, 0x207 - .long 0x208, 0x209, 0x20A, 0x20B - .long 0x20C, 0x20D, 0x20E, 0x20F - .long 0x000 /* NULL, end of table */ +all_mtrr_msrs: +X86_MTRR_MSRS_TABLE_ENTRIES_ASM +END_MTRR_MSRS_TABLE_ENTRY_ASM
clear_fixed_var_mtrr_out: movl $MTRRphysBase_MSR(0), %ecx diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index c7b3fca..57a41a4 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -21,16 +21,31 @@ #define SYSCFG_MSR_SysVicLimitMask ((1 << 8) - (1 << 5)) #define SYSCFG_MSR_SysAckLimitMask ((1 << 5) - (1 << 0))
-#define IORR0_BASE 0xC0010016 -#define IORR0_MASK 0xC0010017 -#define IORR1_BASE 0xC0010018 -#define IORR1_MASK 0xC0010019 -#define TOP_MEM 0xC001001A -#define TOP_MEM2 0xC001001D +#define IORRBase_MSR(reg) (0xC0010016 + 2 * (reg)) +#define IORRMask_MSR(reg) (0xC0010016 + 2 * (reg) + 1) + +#define TOP_MEM_MSR 0xC001001A +#define TOP_MEM2_MSR 0xC001001D +#define TOP_MEM TOP_MEM_MSR +#define TOP_MEM2 TOP_MEM2_MSR
#define TOP_MEM_MASK 0x007fffff #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10)
+#if defined(ASSEMBLY) +.macro AMD_MTRR_MSRS_TABLE_ENTRIES_ASM + /* Variable IORR MTRR MSRs */ + .long IORRBase_MSR(0) + .long IORRMask_MSR(0) + .long IORRBase_MSR(1) + .long IORRMask_MSR(1) + + /* Top of memory MTRR MSRs */ + .long TOP_MEM_MSR + .long TOP_MEM2_MSR +.endm /* AMD_MTRR_MSRS_TABLE_ENTRIES_ASM */ +#endif /* defined(ASSEMBLY) */ + #if !defined(__PRE_RAM__) && !defined(ASSEMBLY) void amd_setup_mtrrs(void); #endif diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index e79c90e..dcb9c9a 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -34,6 +34,45 @@ #define MTRRfix4K_F0000_MSR 0x26e #define MTRRfix4K_F8000_MSR 0x26f
+#if defined (ASSEMBLY) +.macro X86_MTRR_MSRS_TABLE_ENTRIES_ASM + /* fixed mtrr MSRs */ + .long MTRRfix64K_00000_MSR + .long MTRRfix16K_80000_MSR + .long MTRRfix16K_A0000_MSR + .long MTRRfix4K_C0000_MSR + .long MTRRfix4K_C8000_MSR + .long MTRRfix4K_D0000_MSR + .long MTRRfix4K_D8000_MSR + .long MTRRfix4K_E0000_MSR + .long MTRRfix4K_E8000_MSR + .long MTRRfix4K_F0000_MSR + .long MTRRfix4K_F8000_MSR + + /* var mtrr MSRs */ + .long MTRRphysBase_MSR(0) + .long MTRRphysMask_MSR(0) + .long MTRRphysBase_MSR(1) + .long MTRRphysMask_MSR(1) + .long MTRRphysBase_MSR(2) + .long MTRRphysMask_MSR(2) + .long MTRRphysBase_MSR(3) + .long MTRRphysMask_MSR(3) + .long MTRRphysBase_MSR(4) + .long MTRRphysMask_MSR(4) + .long MTRRphysBase_MSR(5) + .long MTRRphysMask_MSR(5) + .long MTRRphysBase_MSR(6) + .long MTRRphysMask_MSR(6) + .long MTRRphysBase_MSR(7) + .long MTRRphysMask_MSR(7) +.endm /* X86_MTRR_MSRS_TABLE_ENTRIES_ASM */ + +.macro END_MTRR_MSRS_TABLE_ENTRY_ASM + .long 0x000 /* NULL, end of table */ +.endm /* END_MTRR_MSRS_TABLE_ASM */ +#endif /* defined (ASSEMBLY) */ + #if !defined (ASSEMBLY) && !defined(__PRE_RAM__) #include <device/device.h> void enable_fixed_mtrr(void);
Oops forgot to remove the _ASM on the macros. BRB with another. :)
wt
On Thu, Oct 7, 2010 at 4:30 AM, Warren Turkal wt@penguintechs.org wrote:
I added names for the AMD registers and separated each .long onto it's own line to avoid any bugs of the type the caldani mentioned.
Comments? Acks? :)
Thanks, wt 8<------------------- Macros for the register addresses for the MTRR MSRs are already defined in include/cpu/x86/car.h. This patch uses those macros instead of creating a second instance of that same data.
I also combined common MTRR definitions into a macro. I also added a few macros to the amd mtrr.h to make the MSR naming more consistent.
Signed-off-by: Warren Turkal wt@penguintechs.org
src/cpu/amd/car/cache_as_ram.inc | 24 ++++----------------- src/cpu/intel/car/cache_as_ram.inc | 17 +++------------ src/cpu/via/car/cache_as_ram.inc | 17 +++------------ src/include/cpu/amd/mtrr.h | 27 +++++++++++++++++++----- src/include/cpu/x86/mtrr.h | 39 ++++++++++++++++++++++++++++++++++++ 5 files changed, 73 insertions(+), 51 deletions(-)
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 5318272..a8c6972 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -155,7 +155,7 @@ enable_fixed_mtrr_dram_modify:
/* Clear all MTRRs. */ xorl %edx, %edx
- movl $fixed_mtrr_msr, %esi
- movl $all_mtrr_msrs, %esi
clear_fixed_var_mtrr: lodsl (%esi), %eax @@ -396,23 +396,9 @@ CAR_FAM10_ap_out:
post_code(0xaf) /* Should never see this POST code. */
-fixed_mtrr_msr:
- .long 0x250, 0x258, 0x259
- .long 0x268, 0x269, 0x26A
- .long 0x26B, 0x26C, 0x26D
- .long 0x26E, 0x26F
-var_mtrr_msr:
- .long 0x200, 0x201, 0x202, 0x203
- .long 0x204, 0x205, 0x206, 0x207
- .long 0x208, 0x209, 0x20A, 0x20B
- .long 0x20C, 0x20D, 0x20E, 0x20F
-var_iorr_msr:
- .long 0xC0010016, 0xC0010017, 0xC0010018, 0xC0010019
-mem_top:
- .long 0xC001001A, 0xC001001D
- .long 0x000 /* NULL, end of table */
+all_mtrr_msrs: +X86_MTRR_MSRS_TABLE_ENTRIES_ASM +AMD_MTRR_MSRS_TABLE_ENTRIES_ASM +END_MTRR_MSRS_TABLE_ENTRY_ASM
cache_as_ram_setup_out: diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index d8465f4..84e2f2f 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -115,7 +115,7 @@ NotHtProcessor:
/* Clear all MTRRs. */ xorl %edx, %edx
- movl $fixed_mtrr_msr, %esi
- movl $all_mtrr_msrs, %esi
clear_fixed_var_mtrr: lodsl (%esi), %eax @@ -128,18 +128,9 @@ clear_fixed_var_mtrr:
jmp clear_fixed_var_mtrr
-fixed_mtrr_msr:
- .long 0x250, 0x258, 0x259
- .long 0x268, 0x269, 0x26A
- .long 0x26B, 0x26C, 0x26D
- .long 0x26E, 0x26F
-var_mtrr_msr:
- .long 0x200, 0x201, 0x202, 0x203
- .long 0x204, 0x205, 0x206, 0x207
- .long 0x208, 0x209, 0x20A, 0x20B
- .long 0x20C, 0x20D, 0x20E, 0x20F
- .long 0x000 /* NULL, end of table */
+all_mtrr_msrs: +X86_MTRR_MSRS_TABLE_ENTRIES_ASM +END_MTRR_MSRS_TABLE_ENTRY_ASM
clear_fixed_var_mtrr_out:
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc index d6df4a9..80f8c13 100644 --- a/src/cpu/via/car/cache_as_ram.inc +++ b/src/cpu/via/car/cache_as_ram.inc @@ -47,7 +47,7 @@ CacheAsRam:
/* Clear all MTRRs. */ xorl %edx, %edx
- movl $fixed_mtrr_msr, %esi
- movl $all_mtrr_msrs, %esi
clear_fixed_var_mtrr: lodsl (%esi), %eax @@ -60,18 +60,9 @@ clear_fixed_var_mtrr:
jmp clear_fixed_var_mtrr
-fixed_mtrr_msr:
- .long 0x250, 0x258, 0x259
- .long 0x268, 0x269, 0x26A
- .long 0x26B, 0x26C, 0x26D
- .long 0x26E, 0x26F
-var_mtrr_msr:
- .long 0x200, 0x201, 0x202, 0x203
- .long 0x204, 0x205, 0x206, 0x207
- .long 0x208, 0x209, 0x20A, 0x20B
- .long 0x20C, 0x20D, 0x20E, 0x20F
- .long 0x000 /* NULL, end of table */
+all_mtrr_msrs: +X86_MTRR_MSRS_TABLE_ENTRIES_ASM +END_MTRR_MSRS_TABLE_ENTRY_ASM
clear_fixed_var_mtrr_out: movl $MTRRphysBase_MSR(0), %ecx diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index c7b3fca..57a41a4 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -21,16 +21,31 @@ #define SYSCFG_MSR_SysVicLimitMask ((1 << 8) - (1 << 5)) #define SYSCFG_MSR_SysAckLimitMask ((1 << 5) - (1 << 0))
-#define IORR0_BASE 0xC0010016 -#define IORR0_MASK 0xC0010017 -#define IORR1_BASE 0xC0010018 -#define IORR1_MASK 0xC0010019 -#define TOP_MEM 0xC001001A -#define TOP_MEM2 0xC001001D +#define IORRBase_MSR(reg) (0xC0010016 + 2 * (reg)) +#define IORRMask_MSR(reg) (0xC0010016 + 2 * (reg) + 1)
+#define TOP_MEM_MSR 0xC001001A +#define TOP_MEM2_MSR 0xC001001D +#define TOP_MEM TOP_MEM_MSR +#define TOP_MEM2 TOP_MEM2_MSR
#define TOP_MEM_MASK 0x007fffff #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10)
+#if defined(ASSEMBLY) +.macro AMD_MTRR_MSRS_TABLE_ENTRIES_ASM
- /* Variable IORR MTRR MSRs */
- .long IORRBase_MSR(0)
- .long IORRMask_MSR(0)
- .long IORRBase_MSR(1)
- .long IORRMask_MSR(1)
- /* Top of memory MTRR MSRs */
- .long TOP_MEM_MSR
- .long TOP_MEM2_MSR
+.endm /* AMD_MTRR_MSRS_TABLE_ENTRIES_ASM */ +#endif /* defined(ASSEMBLY) */
#if !defined(__PRE_RAM__) && !defined(ASSEMBLY) void amd_setup_mtrrs(void); #endif diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index e79c90e..dcb9c9a 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -34,6 +34,45 @@ #define MTRRfix4K_F0000_MSR 0x26e #define MTRRfix4K_F8000_MSR 0x26f
+#if defined (ASSEMBLY) +.macro X86_MTRR_MSRS_TABLE_ENTRIES_ASM
- /* fixed mtrr MSRs */
- .long MTRRfix64K_00000_MSR
- .long MTRRfix16K_80000_MSR
- .long MTRRfix16K_A0000_MSR
- .long MTRRfix4K_C0000_MSR
- .long MTRRfix4K_C8000_MSR
- .long MTRRfix4K_D0000_MSR
- .long MTRRfix4K_D8000_MSR
- .long MTRRfix4K_E0000_MSR
- .long MTRRfix4K_E8000_MSR
- .long MTRRfix4K_F0000_MSR
- .long MTRRfix4K_F8000_MSR
- /* var mtrr MSRs */
- .long MTRRphysBase_MSR(0)
- .long MTRRphysMask_MSR(0)
- .long MTRRphysBase_MSR(1)
- .long MTRRphysMask_MSR(1)
- .long MTRRphysBase_MSR(2)
- .long MTRRphysMask_MSR(2)
- .long MTRRphysBase_MSR(3)
- .long MTRRphysMask_MSR(3)
- .long MTRRphysBase_MSR(4)
- .long MTRRphysMask_MSR(4)
- .long MTRRphysBase_MSR(5)
- .long MTRRphysMask_MSR(5)
- .long MTRRphysBase_MSR(6)
- .long MTRRphysMask_MSR(6)
- .long MTRRphysBase_MSR(7)
- .long MTRRphysMask_MSR(7)
+.endm /* X86_MTRR_MSRS_TABLE_ENTRIES_ASM */
+.macro END_MTRR_MSRS_TABLE_ENTRY_ASM
- .long 0x000 /* NULL, end of table */
+.endm /* END_MTRR_MSRS_TABLE_ASM */ +#endif /* defined (ASSEMBLY) */
#if !defined (ASSEMBLY) && !defined(__PRE_RAM__) #include <device/device.h> void enable_fixed_mtrr(void); -- 1.7.1
-
Warren Turkal