Sorry, this may also help. Probably, you may also like to share the procedure of your etherboot for my case and also the share the config file. It would be good help for me..
Regards Deepak
agnew@cs.umd.edu wrote etherboot-5.0.9 is NOT supposed to work. you want etherboot-5.0.6 probably and the patch against it at http://www.missl.cs.umd.edu/~agnew/
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Hi,
I have tried etherboot on my machine which has Compact Flash IDE and FLASHROMS(256K/512K). Not successful.. The payload I got was from etherboot-5.0.9, which is rtl8139.ebi which is my ethernet chip.
Did an Compact flash.. fdisk /dev/hdc, created 2 partions hdc1 and hdc2, both of ext3 type. Then dd if=elfImage_of_kernel of=/dev/hdc bs=4096 skip=1
Set these parameters in my config file. option RAMTEST=1 option USE_GENERIC_ROM=1 option USE_ELF_BOOT=1 option ROM_SIZE=524288 option STD_FLASH=1
#payload ../elfImage.9load payload ../rtl8139.ebi option PAYLOAD_SIZE=196608
burned the romimage using the uniflash tool.
It seems to have found the elfimage, but just restarts all over again, could someone please spot what could be the problem and the solution to it. Any help on this would really nice. Please find the log below.
**********Error Log start**** LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 handle_superio start, nsuperio 1 handle_superio Pass 0, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 0, Superio w83627hf handle_superio port 0x0, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 0, done #0 handle_superio done Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/7124] PCI: 00:1e.0 [8086/2418] PCI: 00:1f.0 [8086/2410] PCI: 00:1f.1 [8086/2411] PCI: 00:1f.2 [8086/2412] PCI: 00:1f.3 [8086/2413] PCI: 00:1f.5 [8086/2415] PCI: 00:1f.6 [8086/2416] PCI: pci_scan_bus for bus 1 PCI: 01:04.0 [10ec/8139] PCI: 01:05.0 [10ec/8139] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:1e.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:1e.0 24 <- [0xfec00000 - 0xfebfffff] bus 1 prefmem PCI: 00:1e.0 20 <- [0xfeb00000 - 0xfebfffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:04.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:04.0 14 <- [0xfeb00000 - 0xfeb000ff] mem PCI: 01:05.0 10 <- [0x00001400 - 0x000014ff] io PCI: 01:05.0 14 <- [0xfeb01000 - 0xfeb010ff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:1f.1 20 <- [0x000028e0 - 0x000028ef] io PCI: 00:1f.2 20 <- [0x000028c0 - 0x000028df] io PCI: 00:1f.3 20 <- [0x000028f0 - 0x000028ff] io PCI: 00:1f.5 10 <- [0x00002000 - 0x000020ff] io PCI: 00:1f.5 14 <- [0x00002880 - 0x000028bf] io PCI: 00:1f.6 10 <- [0x00002400 - 0x000024ff] io PCI: 00:1f.6 14 <- [0x00002800 - 0x0000287f] io ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:1e.0 cmd <- 07 PCI: 00:1f.0 cmd <- 0f PCI: 00:1f.1 cmd <- 01 PCI: 00:1f.2 cmd <- 01 PCI: 00:1f.3 cmd <- 01 PCI: 00:1f.5 cmd <- 01 PCI: 00:1f.6 cmd <- 01 PCI: 01:04.0 cmd <- 03 PCI: 01:05.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized DRP0 = 0x9 DIMM0 - size = 64M DIMM1 - size = 0M DRP1 = 0x0 DIMM2 - size = 0M totalram: 64M Initializing CPU #0 Updating microcode microcode_info: sig = 0x00000678 pf=0x00000001 rev = 0x00000000 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done.
Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x00803035
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Configuring L2 cache...Not 'GenuineIntel' Processor Enable Cache done. Disabling local apic...done. CPU #0 Initialized ioapic southbridge enabled 180 RTC Init Invalid CMOS LB checksum set power on after power fail Please turn on nvram handle_superio start, nsuperio 1 handle_superio Pass 1, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 1, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Call init Enabling com device: 03 iobase = 0x02f8 irq=3 handle_superio Pass 1, done #0 handle_superio done handle_superio start, nsuperio 1 handle_superio Pass 2, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 2, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 2, done #0 handle_superio done Wrote linuxbios table at: 00000500 - 00000648 checksum 268b
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2
203:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000007f Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 3 init_bytes found 0 tags Initialized controller... Read completed... scanning elf header... Found ELF candiate at offset 0 scan complete... header_offset is 0 calling elf load... New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 (cleaned up) New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000008128 filesz: 0x00 000000000038d4 Clearing Segment: addr: 0x00000000000978d4 memsz: 0x0000000000004854 Jumping to boot code at 0x94000
LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 .... **********Error Log end****
Thanks and Regards
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
_______________________________________________ Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
What's in that patch is my config files. You can make a valid elf-boot image from that version of etherboot with "make bin32/sis900.ebi" and then use that as your payload. From what you're showing me below, it looks like you're not using a valid payload and the system is resetting. See how the very end looks like the very beginning? That's because your system rebooted itself.
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Sorry, this may also help. Probably, you may also like to share the procedure of your etherboot for my case and also the share the config file. It would be good help for me..
Regards Deepak
agnew@cs.umd.edu wrote etherboot-5.0.9 is NOT supposed to work. you want etherboot-5.0.6 probably and the patch against it at http://www.missl.cs.umd.edu/~agnew/
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Hi,
I have tried etherboot on my machine which has Compact Flash IDE and FLASHROMS(256K/512K). Not successful.. The payload I got was from etherboot-5.0.9, which is rtl8139.ebi which is my ethernet chip.
Did an Compact flash.. fdisk /dev/hdc, created 2 partions hdc1 and hdc2, both of ext3 type. Then dd if=elfImage_of_kernel of=/dev/hdc bs=4096 skip=1
Set these parameters in my config file. option RAMTEST=1 option USE_GENERIC_ROM=1 option USE_ELF_BOOT=1 option ROM_SIZE=524288 option STD_FLASH=1
#payload ../elfImage.9load payload ../rtl8139.ebi option PAYLOAD_SIZE=196608
burned the romimage using the uniflash tool.
It seems to have found the elfimage, but just restarts all over again, could someone please spot what could be the problem and the solution to it. Any help on this would really nice. Please find the log below.
**********Error Log start**** LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 handle_superio start, nsuperio 1 handle_superio Pass 0, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 0, Superio w83627hf handle_superio port 0x0, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 0, done #0 handle_superio done Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/7124] PCI: 00:1e.0 [8086/2418] PCI: 00:1f.0 [8086/2410] PCI: 00:1f.1 [8086/2411] PCI: 00:1f.2 [8086/2412] PCI: 00:1f.3 [8086/2413] PCI: 00:1f.5 [8086/2415] PCI: 00:1f.6 [8086/2416] PCI: pci_scan_bus for bus 1 PCI: 01:04.0 [10ec/8139] PCI: 01:05.0 [10ec/8139] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:1e.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:1e.0 24 <- [0xfec00000 - 0xfebfffff] bus 1 prefmem PCI: 00:1e.0 20 <- [0xfeb00000 - 0xfebfffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:04.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:04.0 14 <- [0xfeb00000 - 0xfeb000ff] mem PCI: 01:05.0 10 <- [0x00001400 - 0x000014ff] io PCI: 01:05.0 14 <- [0xfeb01000 - 0xfeb010ff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:1f.1 20 <- [0x000028e0 - 0x000028ef] io PCI: 00:1f.2 20 <- [0x000028c0 - 0x000028df] io PCI: 00:1f.3 20 <- [0x000028f0 - 0x000028ff] io PCI: 00:1f.5 10 <- [0x00002000 - 0x000020ff] io PCI: 00:1f.5 14 <- [0x00002880 - 0x000028bf] io PCI: 00:1f.6 10 <- [0x00002400 - 0x000024ff] io PCI: 00:1f.6 14 <- [0x00002800 - 0x0000287f] io ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:1e.0 cmd <- 07 PCI: 00:1f.0 cmd <- 0f PCI: 00:1f.1 cmd <- 01 PCI: 00:1f.2 cmd <- 01 PCI: 00:1f.3 cmd <- 01 PCI: 00:1f.5 cmd <- 01 PCI: 00:1f.6 cmd <- 01 PCI: 01:04.0 cmd <- 03 PCI: 01:05.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized DRP0 = 0x9 DIMM0 - size = 64M DIMM1 - size = 0M DRP1 = 0x0 DIMM2 - size = 0M totalram: 64M Initializing CPU #0 Updating microcode microcode_info: sig = 0x00000678 pf=0x00000001 rev = 0x00000000 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done.
Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x00803035
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Configuring L2 cache...Not 'GenuineIntel' Processor Enable Cache done. Disabling local apic...done. CPU #0 Initialized ioapic southbridge enabled 180 RTC Init Invalid CMOS LB checksum set power on after power fail Please turn on nvram handle_superio start, nsuperio 1 handle_superio Pass 1, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 1, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Call init Enabling com device: 03 iobase = 0x02f8 irq=3 handle_superio Pass 1, done #0 handle_superio done handle_superio start, nsuperio 1 handle_superio Pass 2, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 2, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 2, done #0 handle_superio done Wrote linuxbios table at: 00000500 - 00000648 checksum 268b
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2
203:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000007f Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 3 init_bytes found 0 tags Initialized controller... Read completed... scanning elf header... Found ELF candiate at offset 0 scan complete... header_offset is 0 calling elf load... New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 (cleaned up) New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000008128 filesz: 0x00 000000000038d4 Clearing Segment: addr: 0x00000000000978d4 memsz: 0x0000000000004854 Jumping to boot code at 0x94000
LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 .... **********Error Log end****
Thanks and Regards
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
I had done make bin32/rtl8139.ebi after applying the patch because this is the LAN chip I have, So, that is why I have kept this payload, correct me, If I am wrong .
I think sis900.ebi is specific for your motherboard. Could one Please elaborate more this..
----- Original Message ----- From: "Adam Agnew" agnew@cs.umd.edu To: dkotian3@vsnl.net Cc: linuxbios@clustermatic.org Sent: Thursday, May 01, 2003 8:54 PM Subject: Re: Etherboot boot problem after jumping to boot code it restarts
What's in that patch is my config files. You can make a valid elf-boot image from that version of etherboot with "make bin32/sis900.ebi" and then use that as your payload. From what you're showing me below, it looks like you're not using a valid payload and the system is resetting. See how the very end looks like the very beginning? That's because your system rebooted itself.
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Sorry, this may also help. Probably, you may also like to share the procedure of your etherboot for my case and also the share the config file. It would be good help for me..
Regards Deepak
agnew@cs.umd.edu wrote etherboot-5.0.9 is NOT supposed to work. you want etherboot-5.0.6 probably and the patch against it at http://www.missl.cs.umd.edu/~agnew/
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Hi,
I have tried etherboot on my machine which has Compact Flash IDE and FLASHROMS(256K/512K). Not successful.. The payload I got was from etherboot-5.0.9, which is rtl8139.ebi which is my ethernet chip.
Did an Compact flash.. fdisk /dev/hdc, created 2 partions hdc1 and hdc2, both of ext3 type. Then dd if=elfImage_of_kernel of=/dev/hdc bs=4096 skip=1
Set these parameters in my config file. option RAMTEST=1 option USE_GENERIC_ROM=1 option USE_ELF_BOOT=1 option ROM_SIZE=524288 option STD_FLASH=1
#payload ../elfImage.9load payload ../rtl8139.ebi option PAYLOAD_SIZE=196608
burned the romimage using the uniflash tool.
It seems to have found the elfimage, but just restarts all over again, could someone please spot what could be the problem and the solution to it. Any help on this would really nice. Please find the log below.
**********Error Log start**** LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 handle_superio start, nsuperio 1 handle_superio Pass 0, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 0, Superio w83627hf handle_superio port 0x0, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 0, done #0 handle_superio done Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/7124] PCI: 00:1e.0 [8086/2418] PCI: 00:1f.0 [8086/2410] PCI: 00:1f.1 [8086/2411] PCI: 00:1f.2 [8086/2412] PCI: 00:1f.3 [8086/2413] PCI: 00:1f.5 [8086/2415] PCI: 00:1f.6 [8086/2416] PCI: pci_scan_bus for bus 1 PCI: 01:04.0 [10ec/8139] PCI: 01:05.0 [10ec/8139] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:1e.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:1e.0 24 <- [0xfec00000 - 0xfebfffff] bus 1 prefmem PCI: 00:1e.0 20 <- [0xfeb00000 - 0xfebfffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:04.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:04.0 14 <- [0xfeb00000 - 0xfeb000ff] mem PCI: 01:05.0 10 <- [0x00001400 - 0x000014ff] io PCI: 01:05.0 14 <- [0xfeb01000 - 0xfeb010ff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:1f.1 20 <- [0x000028e0 - 0x000028ef] io PCI: 00:1f.2 20 <- [0x000028c0 - 0x000028df] io PCI: 00:1f.3 20 <- [0x000028f0 - 0x000028ff] io PCI: 00:1f.5 10 <- [0x00002000 - 0x000020ff] io PCI: 00:1f.5 14 <- [0x00002880 - 0x000028bf] io PCI: 00:1f.6 10 <- [0x00002400 - 0x000024ff] io PCI: 00:1f.6 14 <- [0x00002800 - 0x0000287f] io ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:1e.0 cmd <- 07 PCI: 00:1f.0 cmd <- 0f PCI: 00:1f.1 cmd <- 01 PCI: 00:1f.2 cmd <- 01 PCI: 00:1f.3 cmd <- 01 PCI: 00:1f.5 cmd <- 01 PCI: 00:1f.6 cmd <- 01 PCI: 01:04.0 cmd <- 03 PCI: 01:05.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized DRP0 = 0x9 DIMM0 - size = 64M DIMM1 - size = 0M DRP1 = 0x0 DIMM2 - size = 0M totalram: 64M Initializing CPU #0 Updating microcode microcode_info: sig = 0x00000678 pf=0x00000001 rev = 0x00000000 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done.
Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x00803035
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Configuring L2 cache...Not 'GenuineIntel' Processor Enable Cache done. Disabling local apic...done. CPU #0 Initialized ioapic southbridge enabled 180 RTC Init Invalid CMOS LB checksum set power on after power fail Please turn on nvram handle_superio start, nsuperio 1 handle_superio Pass 1, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 1, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Call init Enabling com device: 03 iobase = 0x02f8 irq=3 handle_superio Pass 1, done #0 handle_superio done handle_superio start, nsuperio 1 handle_superio Pass 2, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 2, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 2, done #0 handle_superio done Wrote linuxbios table at: 00000500 - 00000648 checksum 268b
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2
203:init_bytes() - zkernel_start:0xfffc0000
zkernel_mask:0x0000007f
Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 3 init_bytes found 0 tags Initialized controller... Read completed... scanning elf header... Found ELF candiate at offset 0 scan complete... header_offset is 0 calling elf load... New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 (cleaned up) New segment addr 0x94000 size 0x8128 offset 0x60 filesize
0x38d4
Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000008128
filesz: 0x00
000000000038d4 Clearing Segment: addr: 0x00000000000978d4 memsz: 0x0000000000004854 Jumping to boot code at 0x94000
LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 .... **********Error Log end****
Thanks and Regards
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
Yes, it is. Okay, you should be fine with rtl8139. More importantly, does your ethernet payload load now?
On Thu, 1 May 2003, Deepak Kotian wrote:
I had done make bin32/rtl8139.ebi after applying the patch because this is the LAN chip I have, So, that is why I have kept this payload, correct me, If I am wrong .
I think sis900.ebi is specific for your motherboard. Could one Please elaborate more this..
----- Original Message ----- From: "Adam Agnew" agnew@cs.umd.edu To: dkotian3@vsnl.net Cc: linuxbios@clustermatic.org Sent: Thursday, May 01, 2003 8:54 PM Subject: Re: Etherboot boot problem after jumping to boot code it restarts
What's in that patch is my config files. You can make a valid elf-boot image from that version of etherboot with "make bin32/sis900.ebi" and then use that as your payload. From what you're showing me below, it looks like you're not using a valid payload and the system is resetting. See how the very end looks like the very beginning? That's because your system rebooted itself.
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Sorry, this may also help. Probably, you may also like to share the procedure of your etherboot for my case and also the share the config file. It would be good help for me..
Regards Deepak
agnew@cs.umd.edu wrote etherboot-5.0.9 is NOT supposed to work. you want etherboot-5.0.6 probably and the patch against it at http://www.missl.cs.umd.edu/~agnew/
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Hi,
I have tried etherboot on my machine which has Compact Flash IDE and FLASHROMS(256K/512K). Not successful.. The payload I got was from etherboot-5.0.9, which is rtl8139.ebi which is my ethernet chip.
Did an Compact flash.. fdisk /dev/hdc, created 2 partions hdc1 and hdc2, both of ext3 type. Then dd if=elfImage_of_kernel of=/dev/hdc bs=4096 skip=1
Set these parameters in my config file. option RAMTEST=1 option USE_GENERIC_ROM=1 option USE_ELF_BOOT=1 option ROM_SIZE=524288 option STD_FLASH=1
#payload ../elfImage.9load payload ../rtl8139.ebi option PAYLOAD_SIZE=196608
burned the romimage using the uniflash tool.
It seems to have found the elfimage, but just restarts all over again, could someone please spot what could be the problem and the solution to it. Any help on this would really nice. Please find the log below.
**********Error Log start**** LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 handle_superio start, nsuperio 1 handle_superio Pass 0, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 0, Superio w83627hf handle_superio port 0x0, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 0, done #0 handle_superio done Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/7124] PCI: 00:1e.0 [8086/2418] PCI: 00:1f.0 [8086/2410] PCI: 00:1f.1 [8086/2411] PCI: 00:1f.2 [8086/2412] PCI: 00:1f.3 [8086/2413] PCI: 00:1f.5 [8086/2415] PCI: 00:1f.6 [8086/2416] PCI: pci_scan_bus for bus 1 PCI: 01:04.0 [10ec/8139] PCI: 01:05.0 [10ec/8139] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:1e.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:1e.0 24 <- [0xfec00000 - 0xfebfffff] bus 1 prefmem PCI: 00:1e.0 20 <- [0xfeb00000 - 0xfebfffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:04.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:04.0 14 <- [0xfeb00000 - 0xfeb000ff] mem PCI: 01:05.0 10 <- [0x00001400 - 0x000014ff] io PCI: 01:05.0 14 <- [0xfeb01000 - 0xfeb010ff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:1f.1 20 <- [0x000028e0 - 0x000028ef] io PCI: 00:1f.2 20 <- [0x000028c0 - 0x000028df] io PCI: 00:1f.3 20 <- [0x000028f0 - 0x000028ff] io PCI: 00:1f.5 10 <- [0x00002000 - 0x000020ff] io PCI: 00:1f.5 14 <- [0x00002880 - 0x000028bf] io PCI: 00:1f.6 10 <- [0x00002400 - 0x000024ff] io PCI: 00:1f.6 14 <- [0x00002800 - 0x0000287f] io ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:1e.0 cmd <- 07 PCI: 00:1f.0 cmd <- 0f PCI: 00:1f.1 cmd <- 01 PCI: 00:1f.2 cmd <- 01 PCI: 00:1f.3 cmd <- 01 PCI: 00:1f.5 cmd <- 01 PCI: 00:1f.6 cmd <- 01 PCI: 01:04.0 cmd <- 03 PCI: 01:05.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized DRP0 = 0x9 DIMM0 - size = 64M DIMM1 - size = 0M DRP1 = 0x0 DIMM2 - size = 0M totalram: 64M Initializing CPU #0 Updating microcode microcode_info: sig = 0x00000678 pf=0x00000001 rev = 0x00000000 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done.
Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x00803035
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Configuring L2 cache...Not 'GenuineIntel' Processor Enable Cache done. Disabling local apic...done. CPU #0 Initialized ioapic southbridge enabled 180 RTC Init Invalid CMOS LB checksum set power on after power fail Please turn on nvram handle_superio start, nsuperio 1 handle_superio Pass 1, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 1, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Call init Enabling com device: 03 iobase = 0x02f8 irq=3 handle_superio Pass 1, done #0 handle_superio done handle_superio start, nsuperio 1 handle_superio Pass 2, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 2, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 2, done #0 handle_superio done Wrote linuxbios table at: 00000500 - 00000648 checksum 268b
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2
203:init_bytes() - zkernel_start:0xfffc0000
zkernel_mask:0x0000007f
Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 3 init_bytes found 0 tags Initialized controller... Read completed... scanning elf header... Found ELF candiate at offset 0 scan complete... header_offset is 0 calling elf load... New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 (cleaned up) New segment addr 0x94000 size 0x8128 offset 0x60 filesize
0x38d4
Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000008128
filesz: 0x00
000000000038d4 Clearing Segment: addr: 0x00000000000978d4 memsz: 0x0000000000004854 Jumping to boot code at 0x94000
LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 .... **********Error Log end****
Thanks and Regards
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Nio, it did not ..
----- Original Message ----- From: "Adam Agnew" agnew@cs.umd.edu To: "Deepak Kotian" dkotian3@vsnl.net Cc: linuxbios@clustermatic.org Sent: Friday, May 02, 2003 12:27 AM Subject: Re: Etherboot boot problem after jumping to boot code it restarts
Yes, it is. Okay, you should be fine with rtl8139. More importantly, does your ethernet payload load now?
On Thu, 1 May 2003, Deepak Kotian wrote:
I had done make bin32/rtl8139.ebi after applying the patch because this is the LAN chip I have, So, that is why I have kept this payload, correct me, If I am wrong .
I think sis900.ebi is specific for your motherboard. Could one Please elaborate more this..
----- Original Message ----- From: "Adam Agnew" agnew@cs.umd.edu To: dkotian3@vsnl.net Cc: linuxbios@clustermatic.org Sent: Thursday, May 01, 2003 8:54 PM Subject: Re: Etherboot boot problem after jumping to boot code it
restarts
What's in that patch is my config files. You can make a valid elf-boot image from that version of etherboot
with
"make bin32/sis900.ebi" and then use that as your payload. From what you're showing me below, it looks like you're not using a valid
payload
and the system is resetting. See how the very end looks like the very beginning? That's because your system rebooted itself.
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Sorry, this may also help. Probably, you may also like to share the procedure of your etherboot for my case and also the share the config file. It would be good help for me..
Regards Deepak
agnew@cs.umd.edu wrote etherboot-5.0.9 is NOT supposed to work. you want etherboot-5.0.6 probably and the patch against it at
http://www.missl.cs.umd.edu/~agnew/
On Thu, 1 May 2003 dkotian3@vsnl.net wrote:
Hi,
I have tried etherboot on my machine which has Compact Flash IDE and FLASHROMS(256K/512K). Not successful.. The payload I got was from etherboot-5.0.9, which is rtl8139.ebi which is my ethernet chip.
Did an Compact flash.. fdisk /dev/hdc, created 2 partions hdc1 and hdc2, both of ext3 type. Then dd if=elfImage_of_kernel of=/dev/hdc bs=4096 skip=1
Set these parameters in my config file. option RAMTEST=1 option USE_GENERIC_ROM=1 option USE_ELF_BOOT=1 option ROM_SIZE=524288 option STD_FLASH=1
#payload ../elfImage.9load payload ../rtl8139.ebi option PAYLOAD_SIZE=196608
burned the romimage using the uniflash tool.
It seems to have found the elfimage, but just restarts all over again, could someone please spot what could be the problem and the solution to it. Any help on this would really nice. Please find the log below.
**********Error Log start**** LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 handle_superio start, nsuperio 1 handle_superio Pass 0, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 0, Superio w83627hf handle_superio port 0x0, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 0, done #0 handle_superio done Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/7124] PCI: 00:1e.0 [8086/2418] PCI: 00:1f.0 [8086/2410] PCI: 00:1f.1 [8086/2411] PCI: 00:1f.2 [8086/2412] PCI: 00:1f.3 [8086/2413] PCI: 00:1f.5 [8086/2415] PCI: 00:1f.6 [8086/2416] PCI: pci_scan_bus for bus 1 PCI: 01:04.0 [10ec/8139] PCI: 01:05.0 [10ec/8139] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:1e.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:1e.0 24 <- [0xfec00000 - 0xfebfffff] bus 1 prefmem PCI: 00:1e.0 20 <- [0xfeb00000 - 0xfebfffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:04.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:04.0 14 <- [0xfeb00000 - 0xfeb000ff] mem PCI: 01:05.0 10 <- [0x00001400 - 0x000014ff] io PCI: 01:05.0 14 <- [0xfeb01000 - 0xfeb010ff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:1f.1 20 <- [0x000028e0 - 0x000028ef] io PCI: 00:1f.2 20 <- [0x000028c0 - 0x000028df] io PCI: 00:1f.3 20 <- [0x000028f0 - 0x000028ff] io PCI: 00:1f.5 10 <- [0x00002000 - 0x000020ff] io PCI: 00:1f.5 14 <- [0x00002880 - 0x000028bf] io PCI: 00:1f.6 10 <- [0x00002400 - 0x000024ff] io PCI: 00:1f.6 14 <- [0x00002800 - 0x0000287f] io ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:1e.0 cmd <- 07 PCI: 00:1f.0 cmd <- 0f PCI: 00:1f.1 cmd <- 01 PCI: 00:1f.2 cmd <- 01 PCI: 00:1f.3 cmd <- 01 PCI: 00:1f.5 cmd <- 01 PCI: 00:1f.6 cmd <- 01 PCI: 01:04.0 cmd <- 03 PCI: 01:05.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized DRP0 = 0x9 DIMM0 - size = 64M DIMM1 - size = 0M DRP1 = 0x0 DIMM2 - size = 0M totalram: 64M Initializing CPU #0 Updating microcode microcode_info: sig = 0x00000678 pf=0x00000001 rev = 0x00000000 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done.
Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x00803035
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Configuring L2 cache...Not 'GenuineIntel' Processor Enable Cache done. Disabling local apic...done. CPU #0 Initialized ioapic southbridge enabled 180 RTC Init Invalid CMOS LB checksum set power on after power fail Please turn on nvram handle_superio start, nsuperio 1 handle_superio Pass 1, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 1, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Call init Enabling com device: 03 iobase = 0x02f8 irq=3 handle_superio Pass 1, done #0 handle_superio done handle_superio start, nsuperio 1 handle_superio Pass 2, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 2, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 2, done #0 handle_superio done Wrote linuxbios table at: 00000500 - 00000648 checksum 268b
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2
203:init_bytes() - zkernel_start:0xfffc0000
zkernel_mask:0x0000007f
Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 3 init_bytes found 0 tags Initialized controller... Read completed... scanning elf header... Found ELF candiate at offset 0 scan complete... header_offset is 0 calling elf load... New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 (cleaned up) New segment addr 0x94000 size 0x8128 offset 0x60
filesize
0x38d4
Loading Segment: addr: 0x0000000000094000 memsz:
0x0000000000008128
filesz: 0x00
000000000038d4 Clearing Segment: addr: 0x00000000000978d4 memsz:
0x0000000000004854
Jumping to boot code at 0x94000
LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 .... **********Error Log end****
Thanks and Regards
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
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-
Adam Agnew -
Deepak Kotian -
dkotian3＠vsnl.net