Ok I have some problems and I hope someone here can shed some light on them.
I have just downloaded the latest version from the repository to try out the ROMCC fix on the original EPIA code.
I am using the same options and the same filo payload. When filo runs I get the following error
FILO version 0.5 (root@localhost) Sun Nov 12 17:35:53 GMT 2006 boot: hda1:/kern root=/dev/hda3 console=ttyS0,115200 Detected floating bus No drive detected on IDE channel 0
Now this used to work and I said it is the same build of filo so I think it reasonable to assume the problem lies with linuxbios.
Logging the boot messages I can see a few differences when it comes to enumerating the PCI bus. I am assuming this is where things go wrong.
this is from the working boot
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:11.6 10 * [0x00000400 - 0x000004ff] io PCI: 00:12.0 10 * [0x00000800 - 0x000008ff] io PCI: 00:11.1 20 * [0x00000c00 - 0x00000c0f] io Root Device compute_allocate_io: base: 00000c10 size: 00000810 align: 8 gran: 0 done
and this from the non-working boot
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:11.6 10 * [0x00000400 - 0x000004ff] io PCI: 00:12.0 10 * [0x00000800 - 0x000008ff] io PCI: 00:11.1 20 * [0x00000c00 - 0x00000c0f] io PCI: 00:11.1 10 * [0x00000c10 - 0x00000c17] io PCI: 00:11.1 18 * [0x00000c20 - 0x00000c27] io PCI: 00:11.1 14 * [0x00000c30 - 0x00000c33] io PCI: 00:11.1 1c * [0x00000c40 - 0x00000c43] io Root Device compute_allocate_io: base: 00000c44 size: 00000844 align: 8 gran: 0 done
The non working version seems to see some different stuff and set the base to a different value. I get a similar situation again
working
Root Device read_resources bus 0 link: 0 done PCI: 00:11.6 10 * [0x00001000 - 0x000010ff] io PCI: 00:12.0 10 * [0x00001400 - 0x000014ff] io PCI: 00:11.1 20 * [0x00001800 - 0x0000180f] io Root Device compute_allocate_io: base: 00001810 size: 00000810 align: 8 gran: 0 done
non working
Root Device read_resources bus 0 link: 0 done PCI: 00:11.6 10 * [0x00001000 - 0x000010ff] io PCI: 00:12.0 10 * [0x00001400 - 0x000014ff] io PCI: 00:11.1 20 * [0x00001800 - 0x0000180f] io PCI: 00:11.1 10 * [0x00001810 - 0x00001817] io PCI: 00:11.1 18 * [0x00001820 - 0x00001827] io PCI: 00:11.1 14 * [0x00001830 - 0x00001833] io PCI: 00:11.1 1c * [0x00001840 - 0x00001843] io Root Device compute_allocate_io: base: 00001844 size: 00000844 align: 8 gran: 0 done
I am right in thinking this is setting base offsets for various function ? Further down when initialising hte IDE I get this working
ide_init: enabling compatibility IDE addresses enables in reg 0x42 0x0 enables in reg 0x42 read back as 0x0
non working
ide_init: enabling compatibility IDE addresses enables in reg 0x42 0xc9 enables in reg 0x42 read back as 0x9
From looking at the datasheet on the southbridge bits 5-0 should be all
0. Now if the base address is set wrongly that would explain why the ide enable is coming back with what appears to be invalid register values.
Anyone have any thoughts ?
many thanks Ben
Looks like the Geode LX line is well supported. How much work am I looking at in order to load LinuxBIOS on an iBase mb500? http://www.ibase.com.tw/mb500.htm -Adam Talbot
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Adam Talbot -
Ben Hewson