[PATCH] flahsrom: fix off-by-one error in erase

[Jody McIntyre]

There appears to be an off-by-one error when using flashrom's erase:

# flashrom -E
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel 631xESB/632xESB/3100", enabling flash write... OK.
Found chip "SST SST49LF008A" (1024 KB) at physical address 0xfff00000.
Erasing flash chip... FAILED!
ERROR at 0x00100000: Expected=0xff, Read=0x00

Index: flashrom.c
===================================================================
--- flashrom.c	(revision 3882)
+++ flashrom.c	(working copy)
@@ -592,7 +592,7 @@
    		memcpy(buf, (const char *)flash->virtual_memory, size);
    	else
    		flash->read(flash, buf);
-		for (erasedbytes = 0; erasedbytes <= size; erasedbytes++)
+		for (erasedbytes = 0; erasedbytes < size; erasedbytes++)
    		if (0xff != buf[erasedbytes]) {
    			printf("FAILED!\n");
    			fprintf(stderr, "ERROR at 0x%08x: Expected=0xff, Read=0x%02x\n",

[Peter Stuge]

Jody McIntyre wrote:
> There appears to be an off-by-one error when using flashrom's erase:

Yep. A remain from older code of mine. Good find!

I'd commit your patch immediately, but we have a signoff procedure at
the moment and I'd like your name to be in there because you found
it. Please send me a signed-off-by line according to
http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure
and I'll commit.

//Peter

[Peter Stuge]

Peter Stuge wrote:
> > There appears to be an off-by-one error when using flashrom's erase:
>
> I'd commit your patch immediately, but we have a signoff procedure at
> the moment and I'd like your name to be in there because you found
> it.

I committed the fix in r3894 and made sure to at least mention you in
the message. Thanks again for reporting this!

//Peter

[Carl-Daniel Hailfinger]

Hi Jody,

thank you for the patch! We'll commit it in the next few days.
To have a complete audit log, it would be great if you could add a
Signed-off-by tag to your patch (adding that in a reply to this thread
is OK) according to
http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure . Thanks.

On 22.01.2009 22:17, Jody McIntyre wrote:
> There appears to be an off-by-one error when using flashrom's erase:
>
> # flashrom -E
> Calibrating delay loop... OK.
> No coreboot table found.
> Found chipset "Intel 631xESB/632xESB/3100", enabling flash write... OK.
> Found chip "SST SST49LF008A" (1024 KB) at physical address 0xfff00000.
> Erasing flash chip... FAILED!
> ERROR at 0x00100000: Expected=0xff, Read=0x00

Regards,
Carl-Daniel

[PATCH] flashrom: fix off-by-one error in erase

[Jody McIntyre]

There appears to be an off-by-one error when using flashrom's erase:

# flashrom -E
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel 631xESB/632xESB/3100", enabling flash write... OK.
Found chip "SST SST49LF008A" (1024 KB) at physical address 0xfff00000.
Erasing flash chip... FAILED!
ERROR at 0x00100000: Expected=0xff, Read=0x00

Signed-off-by: Jody McIntyre 
---
This is the same patch with a Signed-off-by: line.

Index: flashrom.c
===================================================================
--- flashrom.c	(revision 3882)
+++ flashrom.c	(working copy)
@@ -592,7 +592,7 @@
    		memcpy(buf, (const char *)flash->virtual_memory, size);
    	else
    		flash->read(flash, buf);
-		for (erasedbytes = 0; erasedbytes <= size; erasedbytes++)
+		for (erasedbytes = 0; erasedbytes < size; erasedbytes++)
    		if (0xff != buf[erasedbytes]) {
    			printf("FAILED!\n");
    			fprintf(stderr, "ERROR at 0x%08x: Expected=0xff, Read=0x%02x\n",

[PATCH] flashrom: fix off-by-one error in erase

[Peter Stuge]

Jody McIntyre wrote:
> This is the same patch with a Signed-off-by: line.

Sorry I didn't wait for the patch! Please do keep them coming.

//Peter