Hi, I've flashed coreboot with seaBIOS and me_cleaner to my Thinkpad x230 and everything works fine except the network. Neither wifi nor ethernet works. Could this be a problem with the gbe.bin I've used (I extracted it with ifdtool -x from the factory bios and the first time I did this on another Thinkpad x230 it worked perfectly)?
Am 03.07.2017 17:23 schrieb Marcel Maci:
Hi, I've flashed coreboot with seaBIOS and me_cleaner to my Thinkpad x230 and everything works fine except the network. Neither wifi nor ethernet works. Could this be a problem with the gbe.bin I've used (I extracted it with ifdtool -x from the factory bios and the first time I did this on another Thinkpad x230 it worked perfectly)?
You don't need to extract gbe.bin, descriptor.bin or me.bin for the X230. I planned to update the wiki a little because I also found it to be not clear enough:
So you are talking about external SPI flashing. There are 2 flash chips and the gbe part is in the "second", 8MB one, together with the me and descriptor parts. You really "need" to access this chip only once. What you want to do is read it (obviously), run me_cleaner on it (you can use the whole image. me_cleaner will recognise it and write a new one for you), and run ifdtool -u on it in order to unlock internal writing from now on. That's it, so write that back. Until me_cleaner or the libreboot people find a way to *really* remove the ME, I guess you don't have to touch that 8MB chip anymore.
For the bios (coreboot with payload), you only need to access the "first", 4MB chip, and you don't need any extracted binary blob when building coreboot for this; they're part of the other one. (except for the video BIOS, if you want to). When flashing (writing) *externally*, of course you have to cut out the 4MB from the 12MB that the coreboot build creates for you, like seen in the wiki.
When flashing *internally*, you can use the 12MB image as is, and use flashrom's --layout feature, again using only the 4MB for flashing coreboot, leaving all the rest untouched. So again, you don't need any extracted binary when building coreboot.
hope that helps. Although I use an Atheros wifi chip on PCIe, it works just fine.
martin
Hello Marcel,
Which OS you are using on the top of Coreboot/SeaBIOS? I assume Linux. If Linux, could you, please, post your complete dmesg log of the current session after you are fully up and running user space?
Thank you, Zoran
On Mon, Jul 3, 2017 at 5:23 PM, Marcel Maci elpinguino@gmx.ch wrote:
Hi, I've flashed coreboot with seaBIOS and me_cleaner to my Thinkpad x230 and everything works fine except the network. Neither wifi nor ethernet works. Could this be a problem with the gbe.bin I've used (I extracted it with ifdtool -x from the factory bios and the first time I did this on another Thinkpad x230 it worked perfectly)?
-- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
On 04.07.2017 14:05, Martin Kepplinger wrote:
So you are talking about external SPI flashing. There are 2 flash chips and the gbe part is in the "second", 8MB one,
For the bios (coreboot with payload), you only need to access the "first", 4MB chip,
Please don't name the chips in that order. They are concatenated as one 12MiB part where the 8MiB is the lower (first) part and the 4MiB the upper (second) part.
Nico
Hi,
On 03.07.2017 17:23, Marcel Maci wrote:
Hi, I've flashed coreboot with seaBIOS and me_cleaner to my Thinkpad x230 and everything works fine except the network. Neither wifi nor ethernet works. Could this be a problem with the gbe.bin I've used (I extracted it with ifdtool -x from the factory bios and the first time I did this on another Thinkpad x230 it worked perfectly)?
I'd restore the backup of the vendor firmware, make sure that every- thing works as expected and then return to your current setup step by step.
The flash chips (concatenated together as one 12MiB part) are parti- tioned into
Descriptor (IFD) | GbE | ME | BIOS
where the BIOS region will contain the coreboot. You usually don't have to touch the GbE region, and the Descriptor and ME regions only for the ME cleaning. I'd start by flashing only coreboot into the BIOS region and test that first. (The BIOS region covers the end of the 8MiB chip and the complete 4MiB chip. To test coreboot, it would suffice to write it into the 4MiB chip as it's executed from top.)
Nico
Thx - so, if I understand correctly you mean that I can handle the to chips separately? Which means: - first step: read the 8MB chip, apply me_cleaner, unlock it and write it back - second step: build coreboot (optionally with video bios extracted from original bios) and flash it to the 4MB chip If this is true, it would mean that I could now flash back just the 8MB of the stock firmware (applying me_cleaner and unlocking it before flashing) and it should work fine with the upper 4MB (that contain coreboot). I haven't tried that but I'm a little bit sceptical that it will work... Just in order to be clear about what I did (and what worked perfectly on the another Thinkpad x230 to which I installed the same coreboot/seabios/me_cleaner-configuration): - I extracted both 8MB + 4MB stock firmware and concatenated them to one 12MB image - I applied me_cleaner, unlocked it, extracted gbe.bin, me.bin, descriptor.bin and vbios.bin - I built a 12MB coreboot-image adding those binary blobs - I separated the image into lower 8MB and upper 4MB and flashed them back separately. As I've said it worked perfectly for the other x230 I have and I don't understand what's different with this one.
Am Tue, 04 Jul 2017 14:05:07 +0200 schrieb Martin Kepplinger martink@posteo.de:
Am 03.07.2017 17:23 schrieb Marcel Maci:
Hi, I've flashed coreboot with seaBIOS and me_cleaner to my Thinkpad x230 and everything works fine except the network. Neither wifi nor ethernet works. Could this be a problem with the gbe.bin I've used (I extracted it with ifdtool -x from the factory bios and the first time I did this on another Thinkpad x230 it worked perfectly)?
You don't need to extract gbe.bin, descriptor.bin or me.bin for the X230. I planned to update the wiki a little because I also found it to be not clear enough:
So you are talking about external SPI flashing. There are 2 flash chips and the gbe part is in the "second", 8MB one, together with the me and descriptor parts. You really "need" to access this chip only once. What you want to do is read it (obviously), run me_cleaner on it (you can use the whole image. me_cleaner will recognise it and write a new one for you), and run ifdtool -u on it in order to unlock internal writing from now on. That's it, so write that back. Until me_cleaner or the libreboot people find a way to *really* remove the ME, I guess you don't have to touch that 8MB chip anymore.
For the bios (coreboot with payload), you only need to access the "first", 4MB chip, and you don't need any extracted binary blob when building coreboot for this; they're part of the other one. (except for the video BIOS, if you want to). When flashing (writing) *externally*, of course you have to cut out the 4MB from the 12MB that the coreboot build creates for you, like seen in the wiki.
When flashing *internally*, you can use the 12MB image as is, and use flashrom's --layout feature, again using only the 4MB for flashing coreboot, leaving all the rest untouched. So again, you don't need any extracted binary when building coreboot.
hope that helps. Although I use an Atheros wifi chip on PCIe, it works just fine.
martin
Am 04.07.2017 18:20 schrieb Marcel Maci:
Thx - so, if I understand correctly you mean that I can handle the to chips separately? Which means:
- first step: read the 8MB chip, apply me_cleaner, unlock it and write it back
- second step: build coreboot (optionally with video bios extracted from original bios) and flash it to the 4MB chip
If this is true, it would mean that I could now flash back just the 8MB of the stock firmware (applying me_cleaner and unlocking it before flashing) and it should work fine with the upper 4MB (that contain coreboot). I haven't tried that but I'm a little bit sceptical that it will work...
Sure you can handle the chips completely seperately. That's how did it when initially doing external SPI flashing.
Just in order to be clear about what I did (and what worked perfectly on the another Thinkpad x230 to which I installed the same coreboot/seabios/me_cleaner-configuration):
- I extracted both 8MB + 4MB stock firmware and concatenated them to one 12MB image
- I applied me_cleaner, unlocked it, extracted gbe.bin, me.bin, descriptor.bin and vbios.bin
- I built a 12MB coreboot-image adding those binary blobs
- I separated the image into lower 8MB and upper 4MB and flashed them back separately.
As I've said it worked perfectly for the other x230 I have and I don't understand what's different with this one.
I guess that should be the same. Your problem may be unrelated to flashing, as suggested by others here.
Am Tue, 04 Jul 2017 14:05:07 +0200 schrieb Martin Kepplinger martink@posteo.de:
Am 03.07.2017 17:23 schrieb Marcel Maci:
Hi, I've flashed coreboot with seaBIOS and me_cleaner to my Thinkpad x230 and everything works fine except the network. Neither wifi nor ethernet works. Could this be a problem with the gbe.bin I've used (I extracted it with ifdtool -x from the factory bios and the first time I did this on another Thinkpad x230 it worked perfectly)?
You don't need to extract gbe.bin, descriptor.bin or me.bin for the X230. I planned to update the wiki a little because I also found it to be not clear enough:
So you are talking about external SPI flashing. There are 2 flash chips and the gbe part is in the "second", 8MB one, together with the me and descriptor parts. You really "need" to access this chip only once. What you want to do is read it (obviously), run me_cleaner on it (you can use the whole image. me_cleaner will recognise it and write a new one for you), and run ifdtool -u on it in order to unlock internal writing from now on. That's it, so write that back. Until me_cleaner or the libreboot people find a way to *really* remove the ME, I guess you don't have to touch that 8MB chip anymore.
For the bios (coreboot with payload), you only need to access the "first", 4MB chip, and you don't need any extracted binary blob when building coreboot for this; they're part of the other one. (except for the video BIOS, if you want to). When flashing (writing) *externally*, of course you have to cut out the 4MB from the 12MB that the coreboot build creates for you, like seen in the wiki.
When flashing *internally*, you can use the 12MB image as is, and use flashrom's --layout feature, again using only the 4MB for flashing coreboot, leaving all the rest untouched. So again, you don't need any extracted binary when building coreboot.
hope that helps. Although I use an Atheros wifi chip on PCIe, it works just fine.
martin
To whom It May Concern,
Please, when you have such kind of problems, as Marcel, could you attach latest dmesg log? For saving lot of effort of other people on this list. :-)
Thank you, Zoran
On Wed, Jul 5, 2017 at 8:01 AM, Martin Kepplinger martink@posteo.de wrote:
Am 04.07.2017 18:20 schrieb Marcel Maci:
Thx - so, if I understand correctly you mean that I can handle the to chips separately? Which means:
- first step: read the 8MB chip, apply me_cleaner, unlock it and write it back
- second step: build coreboot (optionally with video bios extracted from original bios) and flash it to the 4MB chip
If this is true, it would mean that I could now flash back just the 8MB of the stock firmware (applying me_cleaner and unlocking it before flashing) and it should work fine with the upper 4MB (that contain coreboot). I haven't tried that but I'm a little bit sceptical that it will work...
Sure you can handle the chips completely seperately. That's how did it when initially doing external SPI flashing.
Just in order to be clear about what I did (and what worked perfectly
on the another Thinkpad x230 to which I installed the same coreboot/seabios/me_cleaner-configuration):
- I extracted both 8MB + 4MB stock firmware and concatenated them to one 12MB image
- I applied me_cleaner, unlocked it, extracted gbe.bin, me.bin, descriptor.bin and vbios.bin
- I built a 12MB coreboot-image adding those binary blobs
- I separated the image into lower 8MB and upper 4MB and flashed them back separately.
As I've said it worked perfectly for the other x230 I have and I don't understand what's different with this one.
I guess that should be the same. Your problem may be unrelated to flashing, as suggested by others here.
Am Tue, 04 Jul 2017 14:05:07 +0200 schrieb Martin Kepplinger martink@posteo.de:
Am 03.07.2017 17:23 schrieb Marcel Maci:
Hi, I've flashed coreboot with seaBIOS and me_cleaner to my Thinkpad x230 and everything works fine except the network. Neither wifi nor ethernet works. Could this be a problem with the gbe.bin I've used (I extracted it with ifdtool -x from the factory bios and the first time I did this on another Thinkpad x230 it worked perfectly)?
You don't need to extract gbe.bin, descriptor.bin or me.bin for the X230. I planned to update the wiki a little because I also found it to be not clear enough:
So you are talking about external SPI flashing. There are 2 flash chips and the gbe part is in the "second", 8MB one, together with the me and descriptor parts. You really "need" to access this chip only once. What you want to do is read it (obviously), run me_cleaner on it (you can use the whole image. me_cleaner will recognise it and write a new one for you), and run ifdtool -u on it in order to unlock internal writing from now on. That's it, so write that back. Until me_cleaner or the libreboot people find a way to *really* remove the ME, I guess you don't have to touch that 8MB chip anymore.
For the bios (coreboot with payload), you only need to access the "first", 4MB chip, and you don't need any extracted binary blob when building coreboot for this; they're part of the other one. (except for the video BIOS, if you want to). When flashing (writing) *externally*, of course you have to cut out the 4MB from the 12MB that the coreboot build creates for you, like seen in the wiki.
When flashing *internally*, you can use the 12MB image as is, and use flashrom's --layout feature, again using only the 4MB for flashing coreboot, leaving all the rest untouched. So again, you don't need any extracted binary when building coreboot.
hope that helps. Although I use an Atheros wifi chip on PCIe, it works just fine.
martin-- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
-
Marcel Maci -
Martin Kepplinger -
Nico Huber -
Zoran Stojsavljevic