Author: stepan Date: Mon Aug 30 18:16:01 2010 New Revision: 5750 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5750
Log: mPGA479M Sockets can take Intel Mobile Celeron. The 1.2GHz model has CPUID F29. This adds them to the list of CPUs for that socket.
Signed-off-by: Andreas Schultz aschultz@tpip.net Acked-by: Stefan Reinauer stepan@coresystems.de
This patch likely breaks the following two boards since it unconditionally activates CAR code for this socket:
* digitallogic/adl855pc * intel/mtarvon
stepan suggests moving those two boards over to CAR, too, so we don't have to worry.
--- src/cpu/intel/socket_mPGA479M/Kconfig | 1 + src/cpu/intel/socket_mPGA479M/Makefile.inc | 2 ++ 2 files changed, 3 insertions(+), 0 deletions(-)
Modified: trunk/src/cpu/intel/socket_mPGA479M/Kconfig trunk/src/cpu/intel/socket_mPGA479M/Makefile.inc
Modified: trunk/src/cpu/intel/socket_mPGA479M/Kconfig ============================================================================== --- trunk/src/cpu/intel/socket_mPGA479M/Kconfig Mon Aug 30 11:40:41 2010 (r5749) +++ trunk/src/cpu/intel/socket_mPGA479M/Kconfig Mon Aug 30 18:16:01 2010 (r5750) @@ -3,5 +3,6 @@ select CPU_INTEL_MODEL_69X select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6DX + select CPU_INTEL_MODEL_F2X select MMX select SSE
Modified: trunk/src/cpu/intel/socket_mPGA479M/Makefile.inc ============================================================================== --- trunk/src/cpu/intel/socket_mPGA479M/Makefile.inc Mon Aug 30 11:40:41 2010 (r5749) +++ trunk/src/cpu/intel/socket_mPGA479M/Makefile.inc Mon Aug 30 18:16:01 2010 (r5750) @@ -1,6 +1,7 @@ obj-y += socket_mPGA479M.o subdirs-y += ../model_69x subdirs-y += ../model_6dx +subdirs-y += ../model_f2x subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic @@ -9,3 +10,4 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading
+cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc \ No newline at end of file
-
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