[PATCH] New config option for 440BX northbridge

[Keith Hui]

Hi all,

This patch adds a Kconfig option for 440BX that enable compiling in the
proper value for the SDRAMPWR bit in SDRAMC register for 3 or 4 DIMM slots.
No more hard coding for 4 DIMM slots. Also sets it to be permanently enabled
for a few ASUS boards (P2B-LS/D/DS, P3B-F) that I know for sure have 4
slots.

This option only appears when Expert mode is selected in Kconfig.

The actual code in raminit.c is still being boot tested and would have to
wait until it boots all the way on my board. This just adds the config
option so it is there when the code is ready.

Cheers.

Signed-off-by: Keith Hui

[Myles Watson]

On Thu, Mar 11, 2010 at 9:02 PM, Keith Hui  wrote:
> Hi all,
>
> This patch adds a Kconfig option for 440BX that enable compiling in the
> proper value for the SDRAMPWR bit in SDRAMC register for 3 or 4 DIMM slots.
> No more hard coding for 4 DIMM slots. Also sets it to be permanently enabled
> for a few ASUS boards (P2B-LS/D/DS, P3B-F) that I know for sure have 4
> slots.
>
> This option only appears when Expert mode is selected in Kconfig.

I don't think the option should appear in the menu.  It should be set by
board developers in the Kconfig file for the board.

Thanks,
Myles

[ron minnich]

On Fri, Mar 12, 2010 at 7:50 AM, Myles Watson  wrote:
> I don't think the option should appear in the menu.  It should be set by
> board developers in the Kconfig file for the board.

Absolutely correct :-)

ron

[Keith Hui]

On Fri, Mar 12, 2010 at 5:40 PM, ron minnich  wrote:
> On Fri, Mar 12, 2010 at 7:50 AM, Myles Watson  wrote:
> > I don't think the option should appear in the menu.  It should be set by
> > board developers in the Kconfig file for the board.
>
> Absolutely correct :-)
>
> ron

If we go through all the Kconfigs for all 440BX boards and identify all that
have 4 slots, and enter this setting for all of them, done before my 440BX
ram init code is ready. ;-) There is a reason for expert mode, no?

The P2B-F picture shown on our wiki also shows 4 slots. ;-)

[ron minnich]

On Fri, Mar 12, 2010 at 2:55 PM, Keith Hui  wrote:
> If we go through all the Kconfigs for all 440BX boards and identify all that
> have 4 slots, and enter this setting for all of them, done before my 440BX
> ram init code is ready. ;-) There is a reason for expert mode, no?

I think this goes beyond expert mode. It seems to me it is a setting
that can render the machine unbootable if configured incorrectly. Even
for experts, I don't think it should be visible in Kconfig.

thanks

ron

[Myles Watson]

> > If we go through all the Kconfigs for all 440BX boards and identify all
>
> that
> > have 4 slots, and enter this setting for all of them, done before my
>
> 440BX
> > ram init code is ready. ;-) There is a reason for expert mode, no?
>
> I think this goes beyond expert mode. It seems to me it is a setting
> that can render the machine unbootable if configured incorrectly. Even
> for experts, I don't think it should be visible in Kconfig.

I agree.  Since the boards used to be hard coded, lets set all the boards to
match what they were hard coded to.  Then no one gets a broken board from
the change.  To make it easier, the default Kconfig option could match the
hard coded value.

Thanks,
Myles

[Joseph Smith]

On 03/12/2010 06:07 PM, ron minnich wrote:
> On Fri, Mar 12, 2010 at 2:55 PM, Keith Hui  wrote:
> > If we go through all the Kconfigs for all 440BX boards and identify all that
> > have 4 slots, and enter this setting for all of them, done before my 440BX
> > ram init code is ready. ;-) There is a reason for expert mode, no?
>
> I think this goes beyond expert mode. It seems to me it is a setting
> that can render the machine unbootable if configured incorrectly. Even
> for experts, I don't think it should be visible in Kconfig.

has anyone even tested this yet???
> > slot4_detect = (spd_read_byte((DIMM_SPD_BASE + 3), SPD_MEMORY_TYPE);
> >
> > if (slot4_detect != 0xff) {
> >  /* We have 4 slots */
> >  ----Set bit 4 in SDRAMPWR----
> >  #define DIMM_SOCKETS 4
> >
> > } else {
> >  /* We have 3 slots */
> >  ----Set bit 4 in SDRAMPWR----
> >  #define DIMM_SOCKETS 3
> >
> > }

[Keith Hui]

On Fri, Mar 12, 2010 at 7:08 PM, Joseph Smith  wrote:
> On 03/12/2010 06:07 PM, ron minnich wrote:
> > On Fri, Mar 12, 2010 at 2:55 PM, Keith Hui  wrote:
> >
> > If we go through all the Kconfigs for all 440BX boards and identify all
> > > that
> > > have 4 slots, and enter this setting for all of them, done before my
> > > 440BX
> > > ram init code is ready. ;-) There is a reason for expert mode, no?
> >
> > I think this goes beyond expert mode. It seems to me it is a setting
> > that can render the machine unbootable if configured incorrectly. Even
> > for experts, I don't think it should be visible in Kconfig.
> >
> > has anyone even tested this yet???
> > > slot4_detect = (spd_read_byte((DIMM_SPD_BASE + 3), SPD_MEMORY_TYPE);
> > >
> > > if (slot4_detect != 0xff) {
> > >  /* We have 4 slots */
> > >  ----Set bit 4 in SDRAMPWR----
> > >  #define DIMM_SOCKETS 4
> > >
> > > } else {
> > >  /* We have 3 slots */
> > >  ----Set bit 4 in SDRAMPWR----
> > >  #define DIMM_SOCKETS 3
> > >
> > > }
>
> You put a #define inside a actual code branch? I highly doubt if that would

work AT ALL. :-)

And this code will fail on any 4-DIMM boards without a stick installed in
slot 3.

There is a possibility that a board would have 3 DIMM slots, yet only wired
for GCKE. I doubt any manufacturer would actually do that, but still a
possibility. Dumping the BX configuration space with factory BIOS installed
still provides the most authoritative answer.

We currently have support for about 15 440BX mainboards. If someone can go
through them and get the correct SDRAMPWR setting for all of them that we
don't already know - especially those with 3 DIMM slots, I'll code this
setting for all of them and get it out of sight.

Thanks
Keith

[Rudolf Marek]

Hi,

check design guide 3.4.3 GCKE and DCLKRD/DCLKWR Connection

download.intel.com/design/chipsets/designex/29063401.pdf

Module Mode Configuration (MMCONFIG). This bit is set by an external 
strapping option. The
   combination of this bit and the SDRAMPWR bit (SDRAMC register) determine the 
functioning of
   the CKE signals as defined as follows:
   SDRAMPWR          MMCONFIG        CKE Operation
      0                 0            3 DIMM, CKE[5:0] driven, self-refresh entry 
staggered.
5                                   SDRAM dynamic power down available.
      X                 1            3 DIMM, CKE0 only, self-refresh entry not 
staggered. SDRAM
                                     dynamic power down unavailable.
      1                 0            4 DIMM, GCKE only, self-refresh entry 
staggered. SDRAM
                                     dynamic power down unavailable.
   NOTE: Under MMCONFIG mode, the AGP must be disabled.

download.intel.com/design/chipsets/datashts/29063301.pdf

If you just know this, please disregard this mail

Rudolf

[Uwe Hermann]

On Thu, Mar 11, 2010 at 11:02:05PM -0500, Keith Hui wrote:
> This patch adds a Kconfig option for 440BX that enable compiling in the
> proper value for the SDRAMPWR bit in SDRAMC register for 3 or 4 DIMM slots.
> No more hard coding for 4 DIMM slots. Also sets it to be permanently enabled
> for a few ASUS boards (P2B-LS/D/DS, P3B-F) that I know for sure have 4
> slots.

Thanks, committed a slighly modified patch in r5204.

As noted by others, this is a hardware-specific option which should be
set per-board but it doesn't make sense to make it visible in
"make menuconfig" (not even with EXPERT).

I also hooked up the variable in raminit.c (untested yet, though).

Uwe.