Add ICH5/i865 chipset detection, dumping support for model_f2x MSRs, ICH5 GPIOs and PM registers and add BAR reading support for i865

[Idwer Vollering]

Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
registers on ICH5.
Add ICH5 and i865 to the supported chips list.
Enable the dumping of BAR6 on i865.

Signed-off-by: Idwer Vollering

---

Disabling memory access:
$ sudo setpci -s 6.0 0x04.b=0x0

$ sudo ./inteltool -m | head -n 9
Intel CPU: Processor Type: 0, Family f, Model 2, Stepping 7
Intel Northbridge: 8086:2570 (i865)
Intel Southbridge: 8086:24d0 (ICH5)

============= MCHBAR ============

Access to BAR6 is currently disabled, attempting to enable.
Enabled successfully.
BAR6 = 0xfecf0000 (MEM)

Relevant lines from lspci -nnvvvxxx:

00:06.0 System peripheral [0880]: Intel Corporation 82865G/PE/P Processor to
I/O Memory Interface [8086:2576] (rev 02)
        Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Region 0: Memory at fecf0000 (32-bit, non-prefetchable) [size=4K]
00: 86 80 76 25 02 00 80 00 02 00 80 08 00 00 00 00
10: 00 00 cf fe 00 00 00 00 00 00 00 00 00 00 00 00
     ^^^^^^^^^^^^

[Joseph Smith]

On Sun, 28 Nov 2010 01:19:18 +0100, Idwer Vollering 
wrote:
> Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
> registers on ICH5.
> Add ICH5 and i865 to the supported chips list.
> Enable the dumping of BAR6 on i865.
>
> Signed-off-by: Idwer Vollering

Nice!
Acked-by: Joseph Smith

[Idwer Vollering]

2010/11/29 Joseph Smith
> On Sun, 28 Nov 2010 01:19:18 +0100, Idwer Vollering 
> wrote:
> > Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
> > registers on ICH5.
> > Add ICH5 and i865 to the supported chips list.
> > Enable the dumping of BAR6 on i865.

IIRC you own an/several i865 board(s) too, right ? Can you run "inteltool -m
| head -n 9" ?
Not that I expect this patch to fail.. just wanting to confirm the
versatility :)
> > Signed-off-by: Idwer Vollering
>
> Nice!
> Acked-by: Joseph Smith

Add ICH5/i865 chipset detection, dumping support for model_f2x MSRs, ICH5 GPIOs and PM registers and add BAR reading support for i865

[Peter Stuge]

Idwer Vollering wrote:
> Add support for dumping the MSRs on model_f2x and dumping GPIOs and
> PM registers on ICH5.

Feel free to add MSR definitions to msrtool. Though I admit it's tedious.
> Add ICH5 and i865 to the supported chips list.
> Enable the dumping of BAR6 on i865.
>
> Signed-off-by: Idwer Vollering

Acked-by: Peter Stuge

[Uwe Hermann]

On Sun, Nov 28, 2010 at 01:19:18AM +0100, Idwer Vollering wrote:
> Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
> registers on ICH5.
> Add ICH5 and i865 to the supported chips list.
> Enable the dumping of BAR6 on i865.
>
> Signed-off-by: Idwer Vollering

Thanks, r6197 with some small modifications and cosmetic fixes.
> Index: cpu.c
>
> --- cpu.c	(revision 6128)
> +++ cpu.c	(working copy)

[...]
> static const msr_entry_t modelf2x_global_msrs[] = {
> { 0x0000, "IA32_P5_MC_ADDR" },
> { 0x0001, "IA32_P5_MC_TYPE" },

I removed a few of the MSRs that are marked as non-available for model 2,
and added comments mentioning such MSRs.
> case PCI_DEVICE_ID_INTEL_ICH5:
> gpiobase = pci_read_word(sb, 0x58) & 0xfffc;

The 0xfffc here and in other places is not correct I think, will post a
fixup patch for this later.

Uwe.