CK804 interrupt steering - SATA fix

Hi,

I've reverse engineered some registers in the CK804. I believe with this
information all SATA ports can be enabled without any lost interrupts.

More on fixing the SATA issue later on, now what I've found.

----

LPC bridge PCI config registers:

0x7c:0x0000ffff
 - bitmap of masked pci irqs?
 - PIRQ[ABCD] possibly?

0x7c:0x00f00000
 - sata at f8 - port 1

0x7c:0x0f000000
 - sata at f7 - port 1

0x80:0xf0000000
 - sata at f7 - port 0

0x80:0x0f000000
 - sata at f8 - port 0

0x80:0x0000f000
 - EHCI

0x84:0x00000f00
 - NIC

0x84:0x0000000f
 - OHCI

known values of nibbles:

0 - unrouted?
1 - irq 23
8 - irq 20
c - irq 12
d - irq 21
e - irq 14
f - irq 15

-----

When the interrupts of both SATA ports on each controller are
routed the same, the regular drivers should work.  I've only
tested this with NetBSD's viaide(4), I have no idea if these
may also apply to the ADMA mode.

On many boards these registers are set in mptable.c.

I hope someone can make good use of this.

Jonathan Kollasch

[Torsten Duwe]

On Friday 01 February 2008, [e-mail] wrote:
> Hi,
>
> I've reverse engineered some registers in the CK804. I believe with this
> information all SATA ports can be enabled without any lost interrupts.

Great!
> known values of nibbles:
>
> 0 - unrouted?
> 1 - irq 23
> 8 - irq 20
> c - irq 12
> d - irq 21
> e - irq 14
> f - irq 15

These are the IO-APIC "pin numbers", not the interrupt routine taken on the 
CPU end?

Torsten

On Mon, Feb 04, 2008 at 09:56:06AM +0100, Torsten Duwe wrote:
> On Friday 01 February 2008, [e-mail] wrote:
> > Hi,
> >
> > I've reverse engineered some registers in the CK804. I believe with this
> > information all SATA ports can be enabled without any lost interrupts.
>
> Great!
> > known values of nibbles:
> >
> > 0 - unrouted?
> > 1 - irq 23
> > 8 - irq 20
> > c - irq 12
> > d - irq 21
> > e - irq 14
> > f - irq 15
>
> These are the IO-APIC "pin numbers", not the interrupt routine taken on the 
> CPU end?

Yes.

Jonathan Kollasch