RE: [LinuxBIOS] flash issue with AMD Ref board

[YhLu]

what is EEPROM in your BIOS socket?

How do you install your DIMM? 4x1G in CPU0?

What is your cpu version?

YH

_____

From: beneo [mailto:[e-mail]] 
Sent: Wednesday, May 11, 2005 6:57 PM
To: [e-mail]
Subject: [LinuxBIOS] flash issue with AMD Ref board

I'm playing with the AMD seranede board. The flash_and_burn utility can not
program linuxBIOS to the flash. but I can read the linuxbios and save to a
file correctly.

If I boot from AMI BIOS, using same utility, I can program a linuxBIOS into
the flash. That made me believe some setting by linuxBIOS on the AMD Ref
board is not right. I just don't know what.

I used gdb to trace the code, Flash_and_burn utility enables flash by
program two AMD Southbridge 8111 registers, One for enable 4MB window to
flash (DevB, 0x43), one for enable write to the flash (DevB, 0x40). I
checked the AMD datasheet, it seems all it need. But if I boot with
LinuxBIOS, the flash erase command has no effect. with AMI BIOS, I can
sucessfully erase a sector.

could anybody give me some pointer on what to check?

I should add, the linuxBIOS only reports 2GB memory when I really have 4GB
in the system. I don't know if this have something to do with my issue.

Thanks

Beneo

[LinuxBIOS] flash issue with AMD Ref board

[beneo]

EEPROM is SST 48LF004.

I install 2GB to CPU0 and 2GB to CPU1. I use 512MB DIMM, 4 DIMM per CPU, so total should be 4GB. But linux command cat /proc/meminfo report one 2 GB when using LinuxBIOS.

I have two opteron CPU, I'm not sure the version though.

thanks

beneo

----- Original Message ----- 
  From: YhLu 
  To: beneo ; [e-mail] 
  Sent: Wednesday, May 11, 2005 7:27 PM
  Subject: RE: [LinuxBIOS] flash issue with AMD Ref board

what is EEPROM in your BIOS socket?

How do you install your DIMM? 4x1G in CPU0?

What is your cpu version?

YH

----------------------------------------------------------------------------
    From: beneo [mailto:[e-mail]] 
    Sent: Wednesday, May 11, 2005 6:57 PM
    To: [e-mail]
    Subject: [LinuxBIOS] flash issue with AMD Ref board

I'm playing with the AMD seranede board. The flash_and_burn utility can not program linuxBIOS to the flash. but I can read the linuxbios and save to a file correctly.

If I boot from AMI BIOS, using same utility, I can program a linuxBIOS into the flash. That made me believe some setting by linuxBIOS on the AMD Ref board is not right. I just don't know what.

I used gdb to trace the code, Flash_and_burn utility enables flash by program two AMD Southbridge 8111 registers, One for enable 4MB window to flash (DevB, 0x43), one for enable write to the flash (DevB, 0x40). I checked the AMD datasheet, it seems all it need. But if I boot with LinuxBIOS, the flash erase command has no effect. with AMI BIOS, I can sucessfully erase a sector.

could anybody give me some pointer on what to check?

I should add, the linuxBIOS only reports 2GB memory when I really have 4GB in the system. I don't know if this have something to do with my issue.

Thanks

Beneo

------------------------------------------------------------------------------

_______________________________________________
  LinuxBIOS mailing list
  [e-mail]
  http://www.openbios.org/mailman/listinfo/linuxbios

[LinuxBIOS] flash issue with AMD Ref board

[beneo]

YhLu,

EEPOM should be SST 49LF004, sorry.

I also get the CPU version, it's a print out from cat /proc/cpuinfo. Total two CPU, I put the the second CPU here.

processor       : 1
vendor_id       : AuthenticAMD
cpu family      : 15
model           : 5
model name      : 02/05
stepping        : 8
cpu MHz         : 1395.089
cache size      : 1024 KB
physical id     : 0
siblings        : 1
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 1
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall mmxext l
m 3dnowext 3dnow
bogomips        : 2785.28

Thanks

Beneo

----- Original Message ----- 
  From: beneo 
  To: YhLu ; [e-mail] 
  Sent: Wednesday, May 11, 2005 7:14 PM
  Subject: Re: [LinuxBIOS] flash issue with AMD Ref board

EEPROM is SST 48LF004.

I install 2GB to CPU0 and 2GB to CPU1. I use 512MB DIMM, 4 DIMM per CPU, so total should be 4GB. But linux command cat /proc/meminfo report one 2 GB when using LinuxBIOS.

I have two opteron CPU, I'm not sure the version though.

thanks

beneo

----- Original Message ----- 
    From: YhLu 
    To: beneo ; [e-mail] 
    Sent: Wednesday, May 11, 2005 7:27 PM
    Subject: RE: [LinuxBIOS] flash issue with AMD Ref board

what is EEPROM in your BIOS socket?

How do you install your DIMM? 4x1G in CPU0?

What is your cpu version?

YH

--------------------------------------------------------------------------
      From: beneo [mailto:[e-mail]] 
      Sent: Wednesday, May 11, 2005 6:57 PM
      To: [e-mail]
      Subject: [LinuxBIOS] flash issue with AMD Ref board

I'm playing with the AMD seranede board. The flash_and_burn utility can not program linuxBIOS to the flash. but I can read the linuxbios and save to a file correctly.

If I boot from AMI BIOS, using same utility, I can program a linuxBIOS into the flash. That made me believe some setting by linuxBIOS on the AMD Ref board is not right. I just don't know what.

I used gdb to trace the code, Flash_and_burn utility enables flash by program two AMD Southbridge 8111 registers, One for enable 4MB window to flash (DevB, 0x43), one for enable write to the flash (DevB, 0x40). I checked the AMD datasheet, it seems all it need. But if I boot with LinuxBIOS, the flash erase command has no effect. with AMI BIOS, I can sucessfully erase a sector.

could anybody give me some pointer on what to check?

I should add, the linuxBIOS only reports 2GB memory when I really have 4GB in the system. I don't know if this have something to do with my issue.

Thanks

Beneo

----------------------------------------------------------------------------

_______________________________________________
    LinuxBIOS mailing list
    [e-mail]
    http://www.openbios.org/mailman/listinfo/linuxbios

------------------------------------------------------------------------------

_______________________________________________
  LinuxBIOS mailing list
  [e-mail]
  http://www.openbios.org/mailman/listinfo/linuxbios

[LinuxBIOS] flash issue with AMD Ref board

[Ronald G. Minnich]

the flash problem: this sounds more to me like an enable line that has 
been added for FLASHWR.

Beneo, do you have a scope? it is often useful to put a scope on the WR 
line and see if it is toggling.

ron

[LinuxBIOS] flash issue with AMD Ref board

[beneo]

Ron,

I was also thinking if the AMD senanade board has some special hardware to
protect eeprom write. but after I tried to boot with AMI BIOS into Linux and
use same flash_and_burn utility to flash LinuxBIOS into the EEPROM
sucessufully, I started to be convienced there are some setup issue within
LinuxBIOS caused this.

I spent sometime to check 8111 southbridge, but I couldn't find anything
there.

Is that possible some setting in the Opteron that prevent write access to
the EEPROM address be passed down southbridge?  I'm not farmilar with the
Opteron NB and CPU, if you guys can give me some pointers, that would help
me a lot.

I don't have a scope now, I will see if I can get one.

Thanks

beneo

----- Original Message ----- 
From: "Ronald G. Minnich" 
To: "beneo" 
Cc: ; "YhLu" 
Sent: Thursday, May 12, 2005 7:51 AM
Subject: Re: [LinuxBIOS] flash issue with AMD Ref board
> the flash problem: this sounds more to me like an enable line that has
> been added for FLASHWR.
>
> Beneo, do you have a scope? it is often useful to put a scope on the WR
> line and see if it is toggling.
>
> ron
>
> LinuxBIOS mailing list
> [e-mail]
> http://www.openbios.org/mailman/listinfo/linuxbios

[LinuxBIOS] flash issue with AMD Ref board

[Stefan Reinauer]

* beneo  [050512 19:56]:
> I spent sometime to check 8111 southbridge, but I couldn't find anything
> there.

It would not be part of the southbridge itself, but for example
connected to the smbus.
It might also very well be that AMIBIOS sets the switch correctly, which
is why flashing works in Linux with AB. but not with LB.
> Is that possible some setting in the Opteron that prevent write access to
> the EEPROM address be passed down southbridge? I'm not farmilar with the
> Opteron NB and CPU, if you guys can give me some pointers, that would help
> me a lot.

Not in the Opteron/NB itself, but it could very well be something
mainboard specifi, but it could very well be something mainboard
specific..

Stefan

[LinuxBIOS] flash issue with AMD Ref board

[beneo]

Thanks for all the help and ideas. YhLu, you are good. 040 works, but 004
doesn't. 040 has LPC interface, 004 has FWH interface.

thanks

beneo

----- Original Message ----- 
From: "Stefan Reinauer" 
To: "beneo" 
Cc: ; "YhLu" 
Sent: Thursday, May 12, 2005 1:02 PM
Subject: Re: [LinuxBIOS] flash issue with AMD Ref board
> beneo  [050512 19:56]:
> > I spent sometime to check 8111 southbridge, but I couldn't find anything
> > there.
>
> It would not be part of the southbridge itself, but for example
> connected to the smbus.
> It might also very well be that AMIBIOS sets the switch correctly, which
> is why flashing works in Linux with AB. but not with LB.
> > Is that possible some setting in the Opteron that prevent write access

to
> > the EEPROM address be passed down southbridge? I'm not farmilar with the
> > Opteron NB and CPU, if you guys can give me some pointers, that would

help
> > me a lot.
>
> Not in the Opteron/NB itself, but it could very well be something
> mainboard specifi, but it could very well be something mainboard
> specific..
>
> Stefan
>
> LinuxBIOS mailing list
> [e-mail]
> http://www.openbios.org/mailman/listinfo/linuxbios

[LinuxBIOS] flash issue with AMD Ref board

[Ronald G. Minnich]

On Thu, 12 May 2005, Stefan Reinauer wrote:
> It might also very well be that AMIBIOS sets the switch correctly, which
> is why flashing works in Linux with AB. but not with LB.

I am basically certain that this is a GPIO enabling flash write problem.

Simple test: under fuctory bios, dump the state of the GPIO lines. Then do 
same under linuxbios. Look for differences. This is how I find this sort 
of problem.

ron

[LinuxBIOS] buildtarget error

[Adam Talbot]

OK, so I am feeling about as bright as a door nob.
Working on the EPIA-MII, and I cant get it to "buildtarget".
The problem is there is only 29 lines in my Config.lb. So I am not sure 
where the error is coming from.
Any ideas?

# ./buildtarget via/epia-mii
build_dir=via/epia-mii/epia-mii
./buildtarget: line 46: [: via/epia-mii/epia-mii: binary operator expected
#

-Adam Talbot

[LinuxBIOS] buildtarget error

[Adam Talbot]

Well, i got past that error...
But the epia-m still does not compile, same error on the south bridge, any 
ideas?
-Adam
----- Original Message ----- 
From: "Adam Talbot" 
To: "Ronald G. Minnich" 
Cc: 
Sent: Thursday, May 12, 2005 7:59 PM
Subject: [LinuxBIOS] buildtarget error
> OK, so I am feeling about as bright as a door nob.
> Working on the EPIA-MII, and I cant get it to "buildtarget".
> The problem is there is only 29 lines in my Config.lb. So I am not sure 
> where the error is coming from.
> Any ideas?
>
> # ./buildtarget via/epia-mii
> build_dir=via/epia-mii/epia-mii
> ./buildtarget: line 46: [: via/epia-mii/epia-mii: binary operator expected
> #
>
> -Adam Talbot
>
> LinuxBIOS mailing list
> [e-mail]
> http://www.openbios.org/mailman/listinfo/linuxbios

[LinuxBIOS] buildtarget error

[Hamish Guthrie]

Adam,

I had a brief look at the epia-m code a few weeks ago and found the same
issues with the buildtarget and compile issues all over the place. The tree
that is there is very broken, and it took me a while just to get it to
compile. I found a number of run-time issues, then I fried my test board! I
am awaiting a replacement.

Hamish
> -----Original Message-----
> From: [e-mail]
> [mailto:[e-mail]]On Behalf Of Adam Talbot
> Sent: Freitag, 13. Mai 2005 05:42
> To: Adam Talbot
> Cc: [e-mail]
> Subject: Re: [LinuxBIOS] buildtarget error
>
> Well, i got past that error...
> But the epia-m still does not compile, same error on the south
> bridge, any
> ideas?
> -Adam
> ----- Original Message -----
> From: "Adam Talbot" 
> To: "Ronald G. Minnich" 
> Cc: 
> Sent: Thursday, May 12, 2005 7:59 PM
> Subject: [LinuxBIOS] buildtarget error
> > OK, so I am feeling about as bright as a door nob.
> > Working on the EPIA-MII, and I cant get it to "buildtarget".
> > The problem is there is only 29 lines in my Config.lb. So I am not sure
> > where the error is coming from.
> > Any ideas?
> >
> > # ./buildtarget via/epia-mii
> > build_dir=via/epia-mii/epia-mii
> > ./buildtarget: line 46: [: via/epia-mii/epia-mii: binary
>
> operator expected
> > #
> >
> > -Adam Talbot
> >
> > LinuxBIOS mailing list
> > [e-mail]
> > http://www.openbios.org/mailman/listinfo/linuxbios
>
> LinuxBIOS mailing list
> [e-mail]
> http://www.openbios.org/mailman/listinfo/linuxbios

[LinuxBIOS] Re: buildtarget error

[Ronald G. Minnich]

On Thu, 12 May 2005, Adam Talbot wrote:
> build_dir=via/epia-mii/epia-mii
> ./buildtarget: line 46: [: via/epia-mii/epia-mii: binary operator expected

what distro?

can you send output of sh -x ./buildtarget

ron

[LinuxBIOS] Re: buildtarget error

[Adam Talbot]

-Ron
Got it fixed...  But I looks like the south bridge is still messed up on the 
EPIA-M/MII
-Adam
gentoo linux

----- Original Message ----- 
From: "Ronald G. Minnich" 
To: "Adam Talbot" 
Cc: 
Sent: Friday, May 13, 2005 7:58 AM
Subject: Re: buildtarget error
> On Thu, 12 May 2005, Adam Talbot wrote:
> > build_dir=via/epia-mii/epia-mii
> > ./buildtarget: line 46: [: via/epia-mii/epia-mii: binary operator 
> > expected
>
> what distro?
>
> can you send output of sh -x ./buildtarget
>
> ron

[LinuxBIOS] buildtarget error

[Ronald G. Minnich]

On Thu, 12 May 2005, Adam Talbot wrote:
> Well, i got past that error...

tell me more. How did you get past it?

ron

[LinuxBIOS] Re: buildtarget error

[Ronald G. Minnich]

On Fri, 13 May 2005, Adam Talbot wrote:
> Got it fixed...  But I looks like the south bridge is still messed up on the
> EPIA-M/MII

what was the fix? what are the problems?

ron
>