[LinuxBIOS] How to enable VGA on Tyan S3992?

[Feng, Libo]

I have adapted LB of MSI ms9185 to Tyan S3992. It runs well and comes to the grub command line of Filo. Special thanks to Mr. Lu Yinghai.

The last task is how to enable VGA on Tyan S3992. I have gotten ATI ES1000 VGA BIOS from Tyan web site with Mr. Anton Borisov's tool. It is 36KB. I concatenate it with LB image, 512KB.

default CONFIG_CONSOLE_VGA=1
default CONFIG_PCI_ROM_RUN=1 in mainboard/msi/ms9185/Options.lb.

I am not sure about  the below: 
device pci 9.0 on  # PCI
        chip drivers/pci/onboard
                device pci 9.0 on end
                register "rom_address" = "0xfff80000" #512k image
                #register "rom_address" = "0xfff00000" #1M image
        end
end

I check device number on Windows, it is 12, but the broadcom spec says it is 13. I have tried both, it didn't work. What should be set here? And the device number is hex or decimal? What else variable should be set in config file? Do I need to switch the console from serial port to VGA? How? Thank you very much.

Best Regards

丰立波 Feng Libo @ AMD  Ext: 20906
Mobile Phone: [phone]
Office Phone: [phone]

[yhlu]

did you try
          chip drivers/pci/onboard
                  device pci a.0 on end
                  register "rom_address" = "0xfff80000" #512k image
          end

or
          chip drivers/pci/onboard
                  device pci b.0 on end
                  register "rom_address" = "0xfff80000" #512k image
          end

etc...

let me know your HT_CHAIN_END_UNITID_BASE and HT_CHAIN_UNITID_BASE in Option.lb.
also boot log in serial port.

YH

YH

[Feng, Libo]

In Option.lb,

default HT_CHAIN_UNITID_BASE=0x06
default HT_CHAIN_END_UNITID_BASE=0x01
default SB_HT_CHAIN_ON_BUS0=2
Just as Mr. Tom Sylla's setting.

I had tried the device numbers of 3, a and b respectively, it still didn't work. The attached is the boot log with the device number of b. There is totally no boot log if with the device number of a.

Best Regards

??? Feng Libo @ AMD  Ext: 20906
Mobile Phone: [phone]
Office Phone: [phone]

-----Original Message-----
From: yhlu [mailto:[e-mail]] 
Sent: Thursday, April 26, 2007 12:15 AM
To: Feng, Libo
Cc: [e-mail]
Subject: Re: How to enable VGA on Tyan S3992?

did you try
          chip drivers/pci/onboard
                  device pci a.0 on end
                  register "rom_address" = "0xfff80000" #512k image
          end

or
          chip drivers/pci/onboard
                  device pci b.0 on end
                  register "rom_address" = "0xfff80000" #512k image
          end

etc...

let me know your HT_CHAIN_END_UNITID_BASE and HT_CHAIN_UNITID_BASE in Option.lb.
also boot log in serial port.

YH

YH

[yhlu]

please try

chip southbridge/broadcom/bcm5780 # HT2000
                                        device pci 0.0 on end   # PXB 1 0x0130
                                        device pci 1.0 on       # PXB 2 0x0130
                                                device pci 4.0 on end
# GB E 0x1668 vid = 0x14e4
                                                device pci 4.1 on end
# GB E 0x1669 vid = 0x14e4
                                        end
                                        device pci 2.0 on end # PCI E 1  #0x0132
                                        device pci 3.0 on end # PCI E 2
                                        device pci 4.0 on end # PCI E 3
                                        device pci 5.0 on end # PCI E 4
                                        chip drivers/pci/onboard
                                              device pci 6.0 on end
                                              register "rom_address" =
"0xfff80000"
                                        end
                                end

YH

On 4/25/07, Feng, Libo  wrote:
> In Option.lb,
>
> default HT_CHAIN_UNITID_BASE=0x06
> default HT_CHAIN_END_UNITID_BASE=0x01
> default SB_HT_CHAIN_ON_BUS0=2
> Just as Mr. Tom Sylla's setting.
>
> I had tried the device numbers of 3, a and b respectively, it still didn't work. The attached is the boot log with the device number of b. There is totally no boot log if with the device number of a.
>
> Best Regards
>
> ??? Feng Libo @ AMD  Ext: 20906
> Mobile Phone: [phone]
> Office Phone: [phone]
>
> -----Original Message-----
> From: yhlu [mailto:[e-mail]]
> Sent: Thursday, April 26, 2007 12:15 AM
> To: Feng, Libo
> Cc: [e-mail]
> Subject: Re: How to enable VGA on Tyan S3992?
>
> did you try
>           chip drivers/pci/onboard
>                   device pci a.0 on end
>                   register "rom_address" = "0xfff80000" #512k image
>           end
>
> or
>           chip drivers/pci/onboard
>                   device pci b.0 on end
>                   register "rom_address" = "0xfff80000" #512k image
>           end
>
> etc...
>
> let me know your HT_CHAIN_END_UNITID_BASE and HT_CHAIN_UNITID_BASE in Option.lb.
> also boot log in serial port.
>
> YH
>
> YH

[Feng, Libo]

My colleagues are using the board, so I have to wait.

Mr. Lu, you mean ATI card is attached to PCIX of 5780? I am confused.

Best Regards

??? Feng Libo @ AMD  Ext: 20906
Mobile Phone: [phone]
Office Phone: [phone]

-----Original Message-----
From: yhlu [mailto:[e-mail]] 
Sent: Thursday, April 26, 2007 10:41 AM
To: Feng, Libo
Cc: [e-mail]; [e-mail]
Subject: Re: How to enable VGA on Tyan S3992?

please try

chip southbridge/broadcom/bcm5780 # HT2000
                                        device pci 0.0 on end   # PXB 1 0x0130
                                        device pci 1.0 on       # PXB 2 0x0130
                                                device pci 4.0 on end # GB E 0x1668 vid = 0x14e4
                                                device pci 4.1 on end # GB E 0x1669 vid = 0x14e4
                                        end
                                        device pci 2.0 on end # PCI E 1  #0x0132
                                        device pci 3.0 on end # PCI E 2
                                        device pci 4.0 on end # PCI E 3
                                        device pci 5.0 on end # PCI E 4
                                        chip drivers/pci/onboard
                                              device pci 6.0 on end
                                              register "rom_address" = "0xfff80000"
                                        end
                                end

YH

On 4/25/07, Feng, Libo  wrote:
> In Option.lb,
>
> default HT_CHAIN_UNITID_BASE=0x06
> default HT_CHAIN_END_UNITID_BASE=0x01
> default SB_HT_CHAIN_ON_BUS0=2
> Just as Mr. Tom Sylla's setting.
>
> I had tried the device numbers of 3, a and b respectively, it still didn't work. The attached is the boot log with the device number of b. There is totally no boot log if with the device number of a.
>
> Best Regards
>
> ??? Feng Libo @ AMD  Ext: 20906
> Mobile Phone: [phone]
> Office Phone: [phone]
>
> -----Original Message-----
> From: yhlu [mailto:[e-mail]]
> Sent: Thursday, April 26, 2007 12:15 AM
> To: Feng, Libo
> Cc: [e-mail]
> Subject: Re: How to enable VGA on Tyan S3992?
>
> did you try
>           chip drivers/pci/onboard
>                   device pci a.0 on end
>                   register "rom_address" = "0xfff80000" #512k image
>           end
>
> or
>           chip drivers/pci/onboard
>                   device pci b.0 on end
>                   register "rom_address" = "0xfff80000" #512k image
>           end
>
> etc...
>
> let me know your HT_CHAIN_END_UNITID_BASE and HT_CHAIN_UNITID_BASE in Option.lb.
> also boot log in serial port.
>
> YH
>
> YH

[yhlu]

devices under HT1000 pci bridge is not on secondary bus, instead they
will have fixed device num on primary bus.

so you NIC (intel) 0x4.0, and VGA (0xc.0) will be always there. even
HT 1000 will have different HT UnitID.

we have set HT2000 unitid to 6, so the devices from HT2000 will use
0x6, - 0x0b. will leave your VGA to use 0xc.

HT1000 unitid from 0x0d, then 0x01, your NIC on 0x04.0 will on the
gap, and still can be seen.

Let me know the result. ( boot log etc).

YH

[Feng, Libo]

I changed the mainboard Config.lb according to the below suggestion. It still can't work.

PCI: 00:0c.0 init
rom address for PCI: 00:0c.0 = fc220000
Incorrect Expansion ROM Header Signature 7070

The address is always wrong. However, from the boot log, elfboot seems find something at 0xfffc0000.

BTW, I always run buildtarget after changing Config.lb, is it OK?

Best Regards

??? Feng Libo @ AMD  Ext: 20906
Mobile Phone: [phone]
Office Phone: [phone]

-----Original Message-----
From: yhlu [mailto:[e-mail]] 
Sent: Thursday, April 26, 2007 10:41 AM
To: Feng, Libo
Cc: [e-mail]; [e-mail]
Subject: Re: How to enable VGA on Tyan S3992?

please try

chip southbridge/broadcom/bcm5780 # HT2000
                                        device pci 0.0 on end   # PXB 1 0x0130
                                        device pci 1.0 on       # PXB 2 0x0130
                                                device pci 4.0 on end # GB E 0x1668 vid = 0x14e4
                                                device pci 4.1 on end # GB E 0x1669 vid = 0x14e4
                                        end
                                        device pci 2.0 on end # PCI E 1  #0x0132
                                        device pci 3.0 on end # PCI E 2
                                        device pci 4.0 on end # PCI E 3
                                        device pci 5.0 on end # PCI E 4
                                        chip drivers/pci/onboard
                                              device pci 6.0 on end
                                              register "rom_address" = "0xfff80000"
                                        end
                                end

YH

On 4/25/07, Feng, Libo  wrote:
> In Option.lb,
>
> default HT_CHAIN_UNITID_BASE=0x06
> default HT_CHAIN_END_UNITID_BASE=0x01
> default SB_HT_CHAIN_ON_BUS0=2
> Just as Mr. Tom Sylla's setting.
>
> I had tried the device numbers of 3, a and b respectively, it still didn't work. The attached is the boot log with the device number of b. There is totally no boot log if with the device number of a.
>
> Best Regards
>
> ??? Feng Libo @ AMD  Ext: 20906
> Mobile Phone: [phone]
> Office Phone: [phone]
>
> -----Original Message-----
> From: yhlu [mailto:[e-mail]]
> Sent: Thursday, April 26, 2007 12:15 AM
> To: Feng, Libo
> Cc: [e-mail]
> Subject: Re: How to enable VGA on Tyan S3992?
>
> did you try
>           chip drivers/pci/onboard
>                   device pci a.0 on end
>                   register "rom_address" = "0xfff80000" #512k image
>           end
>
> or
>           chip drivers/pci/onboard
>                   device pci b.0 on end
>                   register "rom_address" = "0xfff80000" #512k image
>           end
>
> etc...
>
> let me know your HT_CHAIN_END_UNITID_BASE and HT_CHAIN_UNITID_BASE in Option.lb.
> also boot log in serial port.
>
> YH
>
> YH

[yhlu]

please try

default HT_CHAIN_UNITID_BASE=0x0d
default HT_CHAIN_END_UNITID_BASE=0x01
default SB_HT_CHAIN_ON_BUS0=2

and in ht1000
                   chip drivers/pci/onboard
                                  device pci b.0 on end
                                  register "rom_address" = "0xfff80000"
                   end

YH

[Feng, Libo]

Yes, it seems to find the VGA PCI ROM, but nothing shows on monitor. I will open more debug log.

LinuxBIOS-2.0.0_Fallback Fri Apr 27 22:25:17 CST 2007 starting...
*sysinfo range: [000cf000,000cf730)
bsp_apicid=00
01 nodes initialized.
core0 started:
SBLink=00
NC node|link=00
begin msr fid, vid 3106121206100202
set vid failed for apicid =00
end   msr fid, vid 3106120606100210
ht reset -

LinuxBIOS-2.0.0_Fallback Fri Apr 27 22:25:17 CST 2007 starting...
*sysinfo range: [000cf000,000cf730)
bsp_apicid=00
01 nodes initialized.
core0 started:
SBLink=00
NC node|link=00
begin msr fid, vid 3106120606100210
end   msr fid, vid 3106120606100210
SMBus controller enabled
Ram1.00
Ram2.00
device=00000650
SPD_MEM_TYPE=00000008
device=00000651
SPD_MEM_TYPE=fffffffd
device=00000652
SPD_MEM_TYPE=fffffffd
device=00000653
SPD_MEM_TYPE=fffffffd
device=00000654
SPD_MEM_TYPE=fffffffd
device=00000655
SPD_MEM_TYPE=fffffffd
device=00000656
SPD_MEM_TYPE=fffffffd
device=00000657
SPD_MEM_TYPE=fffffffd
Registered
333Mhz
Interleaved
RAM: 0x00100000 KB
Ram3
Initializing memory:  done
Setting variable MTRR 02, base: 0000MB, range: 0400MB, type WB
DQS Training:RcvrEn:Pass1: 00
train_DqsRcvrEn: begin ctrl 00000000

TrainRcvEn: 0 ctrl00000000
 CTLRMaxDelay=0b
train_DqsRcvrEn: end ctrl 00000000
 done
DQS Training:DQSPos: 00
train_DqsPos: begin ctrl 00000000

TrainDQSRdWrPos: 0 ctrl 00000000
TrainDQSRdWrPos: 00000005

train_DqsPos: end ctrl 00000000
 done
DQS Training:RcvrEn:Pass2: 00
train_DqsRcvrEn: begin ctrl 00000000

TrainRcvEn: 0 ctrl00000000
 CTLRMaxDelay=27
train_DqsRcvrEn: end ctrl 00000000
 done
DQS Training:tsc[00]=000000001c875a6b
DQS Training:tsc[01]=0000000020cb5a3b
DQS Training:tsc[02]=0000000020d71881
DQS Training:tsc[03]=000000015f3adf6d
DQS Training:tsc[04]=00000001647eed0f
Ram4
v_esp=000cefe4
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now
Clearing initial memory region: Done
Copying LinuxBIOS to RAM.
src=fffe0000
dst=00100000
linxbios_ram.nrv2b length = 0000d3d3
linxbios_ram.bin   length = 00022450
Jumping to LinuxBIOS.
LinuxBIOS-2.0.0_Fallback Fri Apr 27 22:25:17 CST 2007 booting...
Enumerating buses...
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
  PCI: 00:18.3 siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] enabled
PCI: 00:00.0 [1166/0130] enabled
PCI: 00:0d.0 [1166/0130] enabled next_unitid: 0013
PCI: 00:00.0 subbordinate bus PCI-X
PCI: 00:00.0 [1166/0036] enabled
PCI: 00:13.0 [1166/0036] enabled next_unitid: 0016
PCI: pci_scan_bus for bus 00
PCI: 00:01.0 [1166/0036] enabled
PCI: 00:02.0 [1166/0205] enabled
PCI: 00:02.1 [1166/0214] enabled
PCI: 00:02.2 [1166/0234] enabled
PCI: 00:02.3 [1166/0238] enabled
PCI: 00:02.4 [1166/0235] enabled
PCI: 00:02.5 [1166/0235] enabled
PCI: 00:02.6 [1166/0235] enabled
PCI: 00:03.0 [1166/0223] enabled
PCI: 00:03.1 [1166/0223] enabled
PCI: 00:03.2 [1166/0223] enabled
PCI: 00:04.0 [8086/1229] enabled
PCI: 00:0c.0 [1002/515e] enabled
PCI: 00:0d.0 [1166/0130] enabled
PCI: 00:0e.0 [1166/0130] enabled
PCI: 00:0f.0 [1166/0132] enabled
PCI: 00:10.0 [1166/0132] enabled
PCI: 00:11.0 [1166/0132] enabled
PCI: 00:12.0 [1166/0132] enabled
PCI: pci_scan_bus for bus 01
PCI: 01:0d.0 subbordinate bus PCI-X
PCI: 01:0d.0 [1166/0104] enabled
PCI: 01:0e.0 [1166/024a] enabled
PCI: 01:0e.1 [1166/024a] enabled
PCI: pci_scan_bus for bus 02
PCI: pci_scan_bus returning with max=002
PCI: 02: Conventional PCI
PCI: pci_scan_bus returning with max=002
PCI: 01: 133MHz PCI-X
PCI: pci_scan_bus for bus 03
PCI: pci_scan_bus returning with max=003
PCI: pci_scan_bus for bus 04
PCI: 04:04.0 [14e4/166a] enabled
PCI: 04:04.1 [14e4/166a] enabled
PCI: pci_scan_bus returning with max=004
PCI: pci_scan_bus for bus 05
PCI: pci_scan_bus returning with max=005
PCI: pci_scan_bus for bus 06
PCI: pci_scan_bus returning with max=006
PCI: pci_scan_bus for bus 07
PCI: pci_scan_bus returning with max=007
PCI: pci_scan_bus for bus 08
PCI: pci_scan_bus returning with max=008
PCI: pci_scan_bus returning with max=008
PCI: pci_scan_bus returning with max=008
done
Allocating resources...
Reading resources...
PCI: 01:0d.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 02 io
PCI: 01:0d.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 02 prefmem
PCI: 01:0d.0 20 <- [0x00fff00000 - 0x00ffefffff] bus 02 mem
PCI: 00:01.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 01 prefmem
PCI: 00:0d.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 03 io
PCI: 00:0d.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 03 prefmem
PCI: 00:0d.0 20 <- [0x00fff00000 - 0x00ffefffff] bus 03 mem
PCI: 00:0e.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 04 io
PCI: 00:0e.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 04 prefmem
PCI: 00:0f.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 05 io
PCI: 00:0f.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 05 prefmem
PCI: 00:0f.0 20 <- [0x00fff00000 - 0x00ffefffff] bus 05 mem
PCI: 00:10.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 06 io
PCI: 00:10.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 06 prefmem
PCI: 00:10.0 20 <- [0x00fff00000 - 0x00ffefffff] bus 06 mem
PCI: 00:11.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 07 io
PCI: 00:11.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 07 prefmem
PCI: 00:11.0 20 <- [0x00fff00000 - 0x00ffefffff] bus 07 mem
PCI: 00:12.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 08 io
PCI: 00:12.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 08 prefmem
PCI: 00:12.0 20 <- [0x00fff00000 - 0x00ffefffff] bus 08 mem
Done reading resources.
Allocating VGA resource PCI: 00:0c.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Setting resources...
VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device
VGA: Can not find free mmio reg for legacy VGA buffer
PCI: 00:18.0 1b8 <- [0x00f0000000 - 0x00f7ffffff] prefmem <node 0 link 0>
PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000003fff] io <node 0 link 0>
PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] bus 01 io
ERROR: PCI: 00:01.0 20 mem size: 0x0000100000 not assigned
PCI: 01:0e.0 10 <- [0x0000001030 - 0x0000001037] io
PCI: 01:0e.0 14 <- [0x0000001070 - 0x0000001073] io
PCI: 01:0e.0 18 <- [0x0000001040 - 0x0000001047] io
PCI: 01:0e.0 1c <- [0x0000001080 - 0x0000001083] io
PCI: 01:0e.0 20 <- [0x0000001000 - 0x000000101f] io
PCI: 01:0e.0 24 <- [0x0000020000 - 0x0000021fff] mem
PCI: 01:0e.0 30 <- [0x0000000000 - 0x000001ffff] romem
PCI: 01:0e.1 10 <- [0x0000001050 - 0x0000001057] io
PCI: 01:0e.1 14 <- [0x0000001090 - 0x0000001093] io
PCI: 01:0e.1 18 <- [0x0000001060 - 0x0000001067] io
PCI: 01:0e.1 1c <- [0x00000010a0 - 0x00000010a3] io
PCI: 01:0e.1 20 <- [0x0000001020 - 0x000000102f] io
PCI: 00:02.0 90 <- [0x0000003040 - 0x000000304f] io
PCI: 00:02.1 10 <- [0x0000003060 - 0x0000003067] io
PCI: 00:02.1 14 <- [0x0000003080 - 0x0000003083] io
PCI: 00:02.1 18 <- [0x0000003070 - 0x0000003077] io
PCI: 00:02.1 1c <- [0x0000003090 - 0x0000003093] io
PCI: 00:02.1 20 <- [0x0000003050 - 0x000000305f] io
PCI: 00:02.1 64 <- [0x00000030a0 - 0x00000030a3] io
ERROR: PCI: 00:02.3 10 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:02.4 10 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:02.5 10 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:02.6 10 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:03.0 10 mem size: 0x0000001000 not assigned
PCI: 00:03.0 14 <- [0x0000002000 - 0x00000020ff] io
ERROR: PCI: 00:03.1 10 mem size: 0x0000001000 not assigned
PCI: 00:03.1 14 <- [0x0000002400 - 0x00000024ff] io
ERROR: PCI: 00:03.2 10 mem size: 0x0000001000 not assigned
PCI: 00:03.2 14 <- [0x0000002800 - 0x00000028ff] io
ERROR: PCI: 00:04.0 10 mem size: 0x0000001000 not assigned
PCI: 00:04.0 14 <- [0x0000003000 - 0x000000303f] io
ERROR: PCI: 00:04.0 18 mem size: 0x0000020000 not assigned
PCI: 00:0c.0 10 <- [0x00f0000000 - 0x00f7ffffff] prefmem
PCI: 00:0c.0 14 <- [0x0000002c00 - 0x0000002cff] io
ERROR: PCI: 00:0c.0 18 mem size: 0x0000010000 not assigned
ERROR: PCI: 00:0c.0 30 romem size: 0x0000020000 not assigned
ERROR: PCI: 00:0e.0 20 mem size: 0x0000100000 not assigned
PCI: 04:04.0 10 <- [0x0000000000 - 0x000000ffff] mem64
PCI: 04:04.0 18 <- [0x0000010000 - 0x000001ffff] mem64
PCI: 04:04.1 10 <- [0x0000020000 - 0x000002ffff] mem64
PCI: 04:04.1 18 <- [0x0000030000 - 0x000003ffff] mem64
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart>
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:18.0 cmd <- 140
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 145
PCI: 01:0d.0 bridge ctrl <- 0003
PCI: 01:0d.0 cmd <- 140
PCI: 01:0e.0 cmd <- 143
PCI: 01:0e.1 cmd <- 141
PCI: 00:02.0 cmd <- 147
PCI: 00:02.1 cmd <- 141
PCI: 00:02.2 cmd <- 144
PCI: 00:02.3 cmd <- 144
PCI: 00:02.4 cmd <- 144
PCI: 00:02.5 cmd <- 144
PCI: 00:02.6 cmd <- 144
PCI: 00:03.0 cmd <- 141
PCI: 00:03.1 cmd <- 141
PCI: 00:03.2 cmd <- 141
PCI: 00:04.0 cmd <- 141
PCI: 00:0c.0 cmd <- 1c3
PCI: 00:0d.0 bridge ctrl <- 0003
PCI: 00:0d.0 cmd <- 140
PCI: 00:0e.0 bridge ctrl <- 0003
PCI: 00:0e.0 cmd <- 140
PCI: 04:04.0 cmd <- 142
PCI: 04:04.1 cmd <- 142
PCI: 00:0f.0 bridge ctrl <- 0003
PCI: 00:0f.0 cmd <- 140
PCI: 00:10.0 bridge ctrl <- 0003
PCI: 00:10.0 cmd <- 140
PCI: 00:11.0 bridge ctrl <- 0003
PCI: 00:11.0 cmd <- 140
PCI: 00:12.0 bridge ctrl <- 0003
PCI: 00:12.0 cmd <- 140
PCI: 00:00.0 missing enable_resources
PCI: 00:01.0 missing enable_resources
PCI: 00:02.0 missing enable_resources
PCI: 00:03.0 missing enable_resources
PCI: 00:04.0 missing enable_resources
PCI: 00:05.0 missing enable_resources
PCI: 00:00.0 missing enable_resources
PCI: 00:01.0 missing enable_resources
PCI: 00:01.1 missing enable_resources
PCI: 00:01.2 missing enable_resources
PCI: 00:01.3 missing enable_resources
PCI: 00:01.4 missing enable_resources
PCI: 00:01.5 missing enable_resources
PCI: 00:01.6 missing enable_resources
PCI: 00:02.0 missing enable_resources
PCI: 00:02.1 missing enable_resources
PCI: 00:02.2 missing enable_resources
PCI: 00:0b.0 missing enable_resources
PCI: 00:18.1 subsystem <- 1022/2b80
PCI: 00:18.1 cmd <- 140
PCI: 00:18.2 subsystem <- 1022/2b80
PCI: 00:18.2 cmd <- 140
PCI: 00:18.3 cmd <- 140
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
start_eip=0x00006000, offset=0x00110000, code_size=0x0000005b
Initializing CPU #1
Initializing CPU #0
CPU: vendor AMD device 40f12
CPU: vendor AMD device 40f12
CPU: family 0f, model 41, stepping 02
brandId=0351
CPU: family 0f, model 41, stepping 02
Enabling cache
brandId=0351

Setting fixed MTRRs(0-88) type: UC
Enabling cache
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM

Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
Setting variable MTRR 0, base:    0MB, range: 1024MB, type WB
DONE fixed MTRRs
DONE variable MTRRs
Clear out the extra MTRR's
Setting variable MTRR 0, base:    0MB, range: 1024MB, type WB

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

DONE variable MTRRs
Clear out the extra MTRR's
CPU model AMD Opteron(tm) Processor 172

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic...CPU model AMD Opteron(tm) Processor 172
 apic_id: 0x00 done.
Setting up local apic...Clearing memory 2048K - 1048576K:  apic_id: 0x01 done.
CPU #1 Initialized
--------------- done
CPU #0 Initialized
All AP CPUs stopped
PCI: 00:18.0 init
PCI: 00:18.1 init
PCI: 00:18.2 init
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
PCI: 00:02.0 init
PCI: 00:02.1 init
PCI: 00:02.2 init
RTC Init
Invalid CMOS LB checksum
PCI: 00:02.3 init
PCI: 00:02.4 init
PCI: 00:02.5 init
PCI: 00:02.6 init
PCI: 00:03.0 init
PCI: 00:03.1 init
PCI: 00:03.2 init
PCI: 00:04.0 init
PCI: 00:0c.0 init
PCI: 00:0f.0 init
PCI: 00:10.0 init
PCI: 00:11.0 init
PCI: 00:12.0 init
PCI: 01:0e.0 init
init PHY...
port 0 PHY status = 20
port 1 PHY status = 02
port 2 PHY status = 02
port 3 PHY status = 04
after reset port 3 PHY status = 04
PCI: 01:0e.1 init
PCI: 04:04.0 init
PCI: 04:04.1 init
Devices initialized
bus_isa=4
bus_isa=5
bus_isa=6
bus_isa=7
bus_isa=8
bus_isa=9
Writing IRQ routing tables to 0xf0000...done.
Wrote the mp table end at: 00000020 - 0000024c
Moving GDT to 0x500...ok
Wrote linuxbios table at: 00000530 - 00000de8  checksum 8ae6

Welcome to elfboot, the open sourced starter.
January 2002, Eric Biederman.
Version 1.3

FILO 0.5

[ Minimal BASH-like line editing is supported.  For the first word, TAB
   lists possible command completions.  Anywhere else TAB lists the possible
   completions of a device/filename.]

grub>

Best Regards

??? Feng Libo @ AMD  Ext: 20906
Mobile Phone: [phone]
Office Phone: [phone]

-----Original Message-----
From: yhlu [mailto:[e-mail]] 
Sent: Friday, April 27, 2007 12:13 PM
To: Feng, Libo
Cc: [e-mail]; [e-mail]
Subject: Re: How to enable VGA on Tyan S3992?

please try

default HT_CHAIN_UNITID_BASE=0x0d
default HT_CHAIN_END_UNITID_BASE=0x01
default SB_HT_CHAIN_ON_BUS0=2

and in ht1000
                   chip drivers/pci/onboard
                                  device pci b.0 on end
                                  register "rom_address" = "0xfff80000"
                   end

YH

[yhlu]

it looks familiar about mmio resource allocation is not right.

It seems i fixed it some time ago, but it is still in my tree.

Let me compare public tree with my own tree this weekend, or I will
send your my partial tree to you.

YH

[Feng, Libo]

I play some trick. Rom_address(src/devices/pci_rom.c) is manually set to 0xfff80000 if class is detected as 3 and subclass is detected as 0 (VGA device). The boot log shows on a monitor, too. The attached is the boot log. But it is against the purpose of PCI, hardware independence, I still need a complete solution. Thank you for your support these days, Mr Lu.

========================================================
PCI: 00:0c.0 init
rom address for PCI: 00:0c.0 = fc220000
BTDC: device class = 0
BTDC: device class = 3
BTDC: set rom_address manually
copying VGA ROM Image from 0xfff80000 to 0xc0000, 0x9000 bytes
entering emulator
un-inited int vector
halt_sys: file /home/fengl/LinuxBIOSv2-2584/src/devices/emulator/x86emu/ops.c, line 4387
=========================================================
Best Regards

??? Feng Libo @ AMD  Ext: 20906
Mobile Phone: [phone]
Office Phone: [phone]

-----Original Message-----
From: yhlu [mailto:[e-mail]] 
Sent: Friday, April 27, 2007 2:43 PM
To: Feng, Libo
Cc: [e-mail]; [e-mail]
Subject: Re: How to enable VGA on Tyan S3992?

it looks familiar about mmio resource allocation is not right.

It seems i fixed it some time ago, but it is still in my tree.

Let me compare public tree with my own tree this weekend, or I will send your my partial tree to you.

YH

[Stefan Reinauer]

* yhlu  [070427 08:43]:
> Let me compare public tree with my own tree this weekend, or I will
> send your my partial tree to you.

Can you please try to make a patch and send this around?

Sending half trees is making it extremely hard to ever get things right in the
official tree.

Stefan