Re: ramstage video display on Chromebook?

[James Feeney]

Down the rabbit hole...
> Geminilake devices use the FSP PEI GOP driver for display init

Hmm - "Pre-EFI Initialization Graphics Output Protocol"?  Is this something completely different from the coreboot gfxinit?

INTEL_GMA_ADD_VBT help says:
 The VBT describes the integrated GPU and connections, and is needed by the GOP driver integrated into FSP and the OS driver in order to initialize the display.

https://wiki.osdev.org/GOP tells me:
 GOP is an EFI Boot Time Service, meaning you can't access it after you call ExitBootServices(). However, the framebuffer provided by GOP persists, so you can continue to use it for graphics output in your OS.

How does the payload find this framebuffer?  Is that info in the VBT?  Or, the payload ignores this framebuffer, starts over and completely re-initializes the graphics?
> so the display backlight will come on during ramstage (when FSP-S runs)

That's very useful to know.
> but the platform does not currently support any output / proof of life prior to the payload, other than maybe an early boot splash screen (you'd have to look if GLK supports that)

Could be fun - eye candy.  Martin says "Intel better than others thanks to libgfxinit", so if GOP is not GFX, then maybe a splash screen will not work?  Or GFX also knows how to write to the GOP framebuffer?
> simply connecting the debug cable and flashing a serial output enabled build will tell you the same thing

Geminilake has serial output?  This bluebird chromebook has one USB-C and one USB-A.  Is the serial output going through the debug cable?  It's not just some buried header on the circuit board?
> coreboot saves the console output to memory and to any other output you have enabled in Kconfig.

"console output to memory" meaning RAM?  Or only to ROM?  Or either?
> The ROM does have a limited write capacity, but it's typically 100K erase/write cycles at this point, which should be enough for anyone.
> Worth to mention that the flash console driver never erases. When it's full, it's full, the user needs to erase it manually.

In my case, I don't like to be writing and erasing the system ROM.
> Would a live Q/A session help? I'd be happy to host something.

Thanks, but email is fine.  It gives me time to digest, and hopefully it may leave a useful trail for someone else.  Mostly, I'm being curious.  Sometimes I have to stumble around before I can ask a meaningful question, and everyone's patience is much appreciated.

ramstage video display on Chromebook?

[Martin Roth]

Dec 19, 2023, 18:58 by [e-mail]:
> Down the rabbit hole...
> > Geminilake devices use the FSP PEI GOP driver for display init
>
> Hmm - "Pre-EFI Initialization Graphics Output Protocol"?  Is this something completely different from the coreboot gfxinit?

Yes.
> INTEL_GMA_ADD_VBT help says:
>  The VBT describes the integrated GPU and connections, and is needed by the GOP driver integrated into FSP and the OS driver in order to initialize the display.
>
> https://wiki.osdev.org/GOP tells me:
>  GOP is an EFI Boot Time Service, meaning you can't access it after you call ExitBootServices(). However, the framebuffer provided by GOP persists, so you can continue to use it for graphics output in your OS.
>
> How does the payload find this framebuffer?  Is that info in the VBT?  Or, the payload ignores this framebuffer, starts over and completely re-initializes the graphics?
> > so the display backlight will come on during ramstage (when FSP-S runs)
>
> That's very useful to know.
> > but the platform does not currently support any output / proof of life prior to the payload, other than maybe an early boot splash screen (you'd have to look if GLK supports that)
>
> Could be fun - eye candy.  Martin says "Intel better than others thanks to libgfxinit", so if GOP is not GFX, then maybe a splash screen will not work?  Or GFX also knows how to write to the GOP framebuffer?

You'd use one or the other, depending on the chip.
> > simply connecting the debug cable and flashing a serial output enabled build will tell you the same thing
>
> Geminilake has serial output?  This bluebird chromebook has one USB-C and one USB-A.  Is the serial output going through the debug cable?  It's not just some buried header on the circuit board?

Yes, the serial output is going through the debug cable.
> > coreboot saves the console output to memory and to any other output you have enabled in Kconfig.
>
> "console output to memory" meaning RAM?  Or only to ROM?  Or either?

RAM. I talked about saving to ROM separately
> > The ROM does have a limited write capacity, but it's typically 100K erase/write cycles at this point, which should be enough for anyone.
> > Worth to mention that the flash console driver never erases. When it's full, it's full, the user needs to erase it manually.
>
> In my case, I don't like to be writing and erasing the system ROM.
> > Would a live Q/A session help? I'd be happy to host something.
>
> Thanks, but email is fine.  It gives me time to digest, and hopefully it may leave a useful trail for someone else.  Mostly, I'm being curious.  Sometimes I have to stumble around before I can ask a meaningful question, and everyone's patience is much appreciated.

Rats, I'd hoped I could just answer your questions in one go. Replying to all of the emails is very time consuming.