New to coreboot. Need pointer to startup sequence

I have a need to insert some experimental code (never to be checked in) just before the ECC RAM is initialized. The customer wants a specific test to be done before the ram is zeroed out. I'm new to coreboot and having trouble finding the start point coming from power on. Can someone give me a pointer to the documentation or give a quick summary please?
I have a coreboot dev kit provided by the hardware vendor. Intel Xeon cpu, ECC ram.
Thanks

[Ranga Rao]

Hi Edward,

Raminit code is in src\drivers\intel\fsp1_1\ Raminit.c

Function: 	fsp_memory_init(&fsp_memory_init_params);

Best Regards	
Ranga

-----Original Message-----
From: [e-mail]  
Sent: Thursday 1 August 2019 17:33
To: [e-mail]
Subject: [coreboot] New to coreboot. Need pointer to startup sequence

I have a need to insert some experimental code (never to be checked in) just before the ECC RAM is initialized. The customer wants a specific test to be done before the ram is zeroed out. I'm new to coreboot and having trouble finding the start point coming from power on. Can someone give me a pointer to the documentation or give a quick summary please?
I have a coreboot dev kit provided by the hardware vendor. Intel Xeon cpu, ECC ram.
Thanks
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[Nico Huber]

Hello Edward,

On 01.08.19 18:32, [e-mail] wrote:
> I have a need to insert some experimental code (never to be checked in) just before the ECC RAM is initialized. The customer wants a specific test to be done before the ram is zeroed out.

when you say "just before", do you need the RAM to be available already
for that test? If so, you'll have to look into Intel FSP source code,
not coreboot.

Generally, the startup sequence depends a lot on the specific platform
and version of FSP used.

Nico

[Williamson (US), Edward L]

Thanks for the help. I have a pointer in the right direction now.

-----Original Message-----
From: Williamson (US), Edward L 
Sent: Thursday, August 01, 2019 11:33 AM
To: [e-mail]
Subject: [coreboot] New to coreboot. Need pointer to startup sequence

I have a need to insert some experimental code (never to be checked in) just before the ECC RAM is initialized. The customer wants a specific test to be done before the ram is zeroed out. I'm new to coreboot and having trouble finding the start point coming from power on. Can someone give me a pointer to the documentation or give a quick summary please?
I have a coreboot dev kit provided by the hardware vendor. Intel Xeon cpu, ECC ram.
Thanks
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coreboot mailing list -- [e-mail] To unsubscribe send an email to [e-mail]