Re: [coreboot] [OpenBIOS] OpenBIOS SVN r416 breaks coreboot-v3

[Aurelien Jarno]

Mark Cave-Ayland a écrit :
> Hi everyone,
>
> Whilst playing around with openbios to try and understand how it works 
> on different platforms, I found that using coreboot-v3 with openbios SVN 
> causes openbios to panic on boot under qemu SVN. The trace can be found 
> here:
>
> http://pastebin.siriusit.co.uk/coreboot-v3-panic.txt
>
> With the help of some people on the coreboot mailing list, I've 
> performed an SVN bisection and found that the panic starts appearing at 
> r416 in openbios SVN for which the commit message can be found here:
>
> http://lists.openbios.org/pipermail/openbios/2009-January/003401.html
>
> However, I can't find any reference to the rationale behind the commit. 
> Can anyone explain further explain whether is commit is correct or not?

The rationale is available here:
http://lists.openbios.org/pipermail/openbios/2009-January/003391.html

This commit fixes two different problems encountered on SPARC64 and
PowerPC. First of all it makes sure that no PCI device get allocated
port 0, which doesn't exists.

Secondly it fixes problems with non-PCI devices that are using I/O ports
at fixed location. This includes the video card, i8259, rtc, serial
port, hard-disk controller, etc. Without this patch, the PCI cards are
getting allocated the I/O ports of those devices, thus causing crashes.

I wonder why it causes problem on x86. What is the initial value of
arch->io_base? I am unable to find that looking at the code.

[OpenBIOS] OpenBIOS SVN r416 breaks coreboot-v3

[Mark Cave-Ayland]

Aurelien Jarno wrote:
> The rationale is available here:
> http://lists.openbios.org/pipermail/openbios/2009-January/003391.html

Thanks for link - I must have missed that whilst scanning the archives :)
> This commit fixes two different problems encountered on SPARC64 and
> PowerPC. First of all it makes sure that no PCI device get allocated
> port 0, which doesn't exists.
>
> Secondly it fixes problems with non-PCI devices that are using I/O ports
> at fixed location. This includes the video card, i8259, rtc, serial
> port, hard-disk controller, etc. Without this patch, the PCI cards are
> getting allocated the I/O ports of those devices, thus causing crashes.
>
> I wonder why it causes problem on x86. What is the initial value of
> arch->io_base? I am unable to find that looking at the code.

Well, I just added the following diff to my OpenBIOS build (latest SVN):

Index: drivers/pci.c
===================================================================
--- drivers/pci.c       (revision 428)
+++ drivers/pci.c       (working copy)
@@ -762,6 +762,9 @@
         mem_base = arch->mem_base;
          /* I/O ports under 0x400 are used by devices mapped at fixed
             location. */
+
+       printk("### io_base: %x\n", arch->io_base);
+
          io_base = arch->io_base + 0x400;
         path = strdup("");
         for (bus = 0; bus<0x100; bus++) {

...and in my output I got this:

### io_base: 0

Hmmm. I guess that explains why it is crashing.

ATB,

Mark.

[OpenBIOS] OpenBIOS SVN r416 breaks coreboot-v3

[Myles Watson]

On Wed, Jan 28, 2009 at 8:42 AM, Mark Cave-Ayland
 wrote:
> Aurelien Jarno wrote:
> > The rationale is available here:
> > http://lists.openbios.org/pipermail/openbios/2009-January/003391.html
>
> Thanks for link - I must have missed that whilst scanning the archives :)
> > This commit fixes two different problems encountered on SPARC64 and
> > PowerPC. First of all it makes sure that no PCI device get allocated
> > port 0, which doesn't exists.
> >
> > Secondly it fixes problems with non-PCI devices that are using I/O ports
> > at fixed location. This includes the video card, i8259, rtc, serial
> > port, hard-disk controller, etc. Without this patch, the PCI cards are
> > getting allocated the I/O ports of those devices, thus causing crashes.
> >
> > I wonder why it causes problem on x86. What is the initial value of
> > arch->io_base? I am unable to find that looking at the code.
>
> Well, I just added the following diff to my OpenBIOS build (latest SVN):
> Index: drivers/pci.c
>
> --- drivers/pci.c       (revision 428)
> +++ drivers/pci.c       (working copy)
> @@ -762,6 +762,9 @@
>        mem_base = arch->mem_base;
>         /* I/O ports under 0x400 are used by devices mapped at fixed
>            location. */
>   printk("### io_base: %x\n", arch->io_base);
>   io_base = arch->io_base + 0x400;
>  path = strdup("");
>  for (bus = 0; bus<0x100; bus++) {
>
> ...and in my output I got this:
>
> ### io_base: 0

That's actually what I would have expected.  The IO address range is
only 16 bits from 0-64K.

I guess we'll have to get more information from qemu so we know which
port address is being accessed when it dies.

Myles

[OpenBIOS] OpenBIOS SVN r416 breaks coreboot-v3

[Mark Cave-Ayland]

Myles Watson wrote:
> That's actually what I would have expected.  The IO address range is
> only 16 bits from 0-64K.
>
> I guess we'll have to get more information from qemu so we know which
> port address is being accessed when it dies.
>
> Myles

Hi Myles,

Here's my quick patch to qemu to dump out the address where the write is 
failing:

Index: vl.c
===================================================================
--- vl.c        (revision 6426)
+++ vl.c        (working copy)
@@ -389,7 +389,7 @@
      for(i = start; i < start + length; i += size) {
          ioport_write_table[bsize][i] = func;
          if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
-            hw_error("register_ioport_write: invalid opaque");
+            hw_error("register_ioport_write: invalid opaque: (start 
0x%x, length 0x%x, address 0x%x)", start, length, i);
          ioport_opaque[i] = opaque;
      }
      return 0;

And here is the result output:

qemu: hardware error: register_ioport_write: invalid opaque: (start 
0x510, length 0x1, address 0x510)

HTH,

Mark.

[OpenBIOS] OpenBIOS SVN r416 breaks coreboot-v3

[Blue Swirl]

On 1/28/09, Aurelien Jarno  wrote:
> Mark Cave-Ayland a écrit :
> > Hi everyone,
> >
> > Whilst playing around with openbios to try and understand how it works
> > on different platforms, I found that using coreboot-v3 with openbios SVN
> > causes openbios to panic on boot under qemu SVN. The trace can be found
> > here:
> >
> > http://pastebin.siriusit.co.uk/coreboot-v3-panic.txt
> >
> > With the help of some people on the coreboot mailing list, I've
> > performed an SVN bisection and found that the panic starts appearing at
> > r416 in openbios SVN for which the commit message can be found here:
> >
> > http://lists.openbios.org/pipermail/openbios/2009-January/003401.html
> >
> > However, I can't find any reference to the rationale behind the commit.
> > Can anyone explain further explain whether is commit is correct or not?
>
> The rationale is available here:
>  http://lists.openbios.org/pipermail/openbios/2009-January/003391.html
>
> This commit fixes two different problems encountered on SPARC64 and
>  PowerPC. First of all it makes sure that no PCI device get allocated
>  port 0, which doesn't exists.
>
> Secondly it fixes problems with non-PCI devices that are using I/O ports
>  at fixed location. This includes the video card, i8259, rtc, serial
>  port, hard-disk controller, etc. Without this patch, the PCI cards are
>  getting allocated the I/O ports of those devices, thus causing crashes.
>
> I wonder why it causes problem on x86. What is the initial value of
>  arch->io_base? I am unable to find that looking at the code.

I think "arch" (a bit unfortunate name choice for grepping) does not
get initialized at all for x86.