Re: [coreboot] ASSERTION FAILED: file 'src/mainboard/amd/parmer/agesawrapper.c', line 431

[Paul Menzel]

Am Mittwoch, den 06.11.2013, 16:42 -0800 schrieb Prop 395:
> I am getting this AGESA error when booting Parmer with SeaBIOS.
>
> Contents of log:
> http://pastebin.com/xjANhWts
>
> Any help appreciated.

Thank you for reporting this issue. I’ll paste the log in the message as
it will expire on Pastebin.

USB
        POST: 0x39
        coreboot-4.0-4747-g6583a81 Mon Nov  4 16:56:17 PST 2013 booting...
        POST: 0x40
        BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
        BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 0 exit 0
        Enumerating buses...
        Show all devs...Before device enumeration.
        Root Device: enabled 1
        CPU_CLUSTER: 0: enabled 1
        APIC: 10: enabled 1
        DOMAIN: 0000: enabled 1
        PCI: 00:00.0: enabled 1
        PCI: 00:01.0: enabled 1
        PCI: 00:01.1: enabled 1
        PCI: 00:02.0: enabled 1
        PCI: 00:03.0: enabled 0
        PCI: 00:04.0: enabled 1
        PCI: 00:05.0: enabled 1
        PCI: 00:06.0: enabled 1
        PCI: 00:07.0: enabled 1
        PCI: 00:08.0: enabled 0
        PCI: 00:10.0: enabled 1
        PCI: 00:10.1: enabled 1
        PCI: 00:11.0: enabled 1
        PCI: 00:12.0: enabled 1
        PCI: 00:12.2: enabled 1
        PCI: 00:13.0: enabled 1
        PCI: 00:13.2: enabled 1
        PCI: 00:14.0: enabled 1
        I2C: 00:50: enabled 1
        I2C: 00:51: enabled 1
        PCI: 00:14.1: enabled 1
        PCI: 00:14.2: enabled 1
        PCI: 00:14.3: enabled 1
        PCI: 00:14.4: enabled 1
        PCI: 00:14.5: enabled 1
        PCI: 00:14.6: enabled 0
        PCI: 00:14.7: enabled 1
        PCI: 00:15.0: enabled 0
        PCI: 00:15.1: enabled 0
        PCI: 00:15.2: enabled 0
        PCI: 00:15.3: enabled 0
        PCI: 00:18.0: enabled 1
        PCI: 00:18.1: enabled 1
        PCI: 00:18.2: enabled 1
        PCI: 00:18.3: enabled 1
        PCI: 00:18.4: enabled 1
        PCI: 00:18.5: enabled 1
        Compare with tree...
        Root Device: enabled 1
         CPU_CLUSTER: 0: enabled 1
          APIC: 10: enabled 1
         DOMAIN: 0000: enabled 1
          PCI: 00:00.0: enabled 1
          PCI: 00:01.0: enabled 1
          PCI: 00:01.1: enabled 1
          PCI: 00:02.0: enabled 1
          PCI: 00:03.0: enabled 0
          PCI: 00:04.0: enabled 1
          PCI: 00:05.0: enabled 1
          PCI: 00:06.0: enabled 1
          PCI: 00:07.0: enabled 1
          PCI: 00:08.0: enabled 0
          PCI: 00:10.0: enabled 1
          PCI: 00:10.1: enabled 1
          PCI: 00:11.0: enabled 1
          PCI: 00:12.0: enabled 1
          PCI: 00:12.2: enabled 1
          PCI: 00:13.0: enabled 1
          PCI: 00:13.2: enabled 1
          PCI: 00:14.0: enabled 1
           I2C: 00:50: enabled 1
           I2C: 00:51: enabled 1
          PCI: 00:14.1: enabled 1
          PCI: 00:14.2: enabled 1
          PCI: 00:14.3: enabled 1
          PCI: 00:14.4: enabled 1
          PCI: 00:14.5: enabled 1
          PCI: 00:14.6: enabled 0
          PCI: 00:14.7: enabled 1
          PCI: 00:15.0: enabled 0
          PCI: 00:15.1: enabled 0
          PCI: 00:15.2: enabled 0
          PCI: 00:15.3: enabled 0
          PCI: 00:18.0: enabled 1
          PCI: 00:18.1: enabled 1
          PCI: 00:18.2: enabled 1
          PCI: 00:18.3: enabled 1
          PCI: 00:18.4: enabled 1
          PCI: 00:18.5: enabled 1
        Mainboard Parmer Enable.
        scan_static_bus for Root Device
        setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
        setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
        setup_uma_memory: uma size 0x20000000, memory start 0xc0000000
        CPU_CLUSTER: 0 enabled
        DOMAIN: 0000 enabled
        CPU_CLUSTER: 0 scanning...
        PCI: 00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x1
        lpaicid_start=0x10 node 0x0 core 0x0 apicid=0x10
        CPU: APIC: 10 enabled
        lpaicid_start=0x10 node 0x0 core 0x1 apicid=0x11
        CPU: APIC: 11 enabled
        DOMAIN: 0000 scanning...
        PCI: pci_scan_bus for bus 00
        POST: 0x24
        PCI: 00:00.0 [1022/1410] enabled
        PCI: 00:01.0 [1002/99a0] enabled
        PCI: 00:01.1 [1002/9902] enabled
        PCI: Static device PCI: 00:02.0 not found, disabling it.
        PCI: Static device PCI: 00:04.0 not found, disabling it.
        PCI: Static device PCI: 00:05.0 not found, disabling it.
        PCI: Static device PCI: 00:06.0 not found, disabling it.
        Capability: type 0x01 @ 0x50
        Capability: type 0x10 @ 0x58
        Capability: type 0x05 @ 0xa0
        Capability: type 0x0d @ 0xb0
        Capability: type 0x08 @ 0xb8
        Capability: type 0x01 @ 0x50
        Capability: type 0x10 @ 0x58
        PCI: 00:07.0 subordinate bus PCI Express
        PCI: 00:07.0 [1022/1417] enabled
        hudson_enable()
        PCI: 00:10.0 [1022/7812] enabled
        hudson_enable()
        PCI: Static device PCI: 00:10.1 not found, disabling it.
        hudson_enable()
        PCI: 00:11.0 [1022/7801] ops
        PCI: 00:11.0 [1022/7801] enabled
        hudson_enable()
        PCI: 00:12.0 [1022/7807] ops
        PCI: 00:12.0 [1022/7807] enabled
        hudson_enable()
        PCI: 00:12.2 [1022/7808] ops
        PCI: 00:12.2 [1022/7808] enabled
        hudson_enable()
        PCI: 00:13.0 [1022/7807] ops
        PCI: 00:13.0 [1022/7807] enabled
        hudson_enable()
        PCI: 00:13.2 [1022/7808] ops
        PCI: 00:13.2 [1022/7808] enabled
        hudson_enable()
        PCI: 00:14.0 [1022/780b] bus ops
        PCI: 00:14.0 [1022/780b] enabled
        hudson_enable()
        PCI: Static device PCI: 00:14.1 not found, disabling it.
        hudson_enable()
        PCI: 00:14.2 [1022/780d] ops
        PCI: 00:14.2 [1022/780d] enabled
        hudson_enable()
        PCI: 00:14.3 [1022/780e] bus ops
        PCI: 00:14.3 [1022/780e] enabled
        hudson_enable()
        PCI: 00:14.4 [1022/780f] bus ops
        PCI: 00:14.4 [1022/780f] enabled
        hudson_enable()
        PCI: 00:14.5 [1022/7809] ops
        PCI: 00:14.5 [1022/7809] enabled
        hudson_enable()
        hudson_enable()
        PCI: 00:14.7 [1022/7806] enabled
        hudson_enable()
        hudson_enable()
        hudson_enable()
        hudson_enable()
        PCI: 00:16.0 [1022/7807] ops
        PCI: 00:16.0 [1022/7807] enabled
        PCI: 00:16.2 [1022/7808] ops
        PCI: 00:16.2 [1022/7808] enabled
        PCI: 00:18.0 [1022/1400] ops
        PCI: 00:18.0 [1022/1400] enabled
        PCI: 00:18.1 [1022/1401] enabled
        PCI: 00:18.2 [1022/1402] enabled
        PCI: 00:18.3 [1022/1403] enabled
        PCI: 00:18.4 [1022/1404] enabled
        PCI: 00:18.5 [1022/1405] enabled
        POST: 0x25
        do_pci_scan_bridge for PCI: 00:07.0
        PCI: pci_scan_bus for bus 01
        POST: 0x24
        PCI: 01:00.0 [10ec/8168] enabled
        POST: 0x25
        PCI: pci_scan_bus returning with max=001
        POST: 0x55
        Capability: type 0x01 @ 0x40
        Capability: type 0x05 @ 0x50
        Capability: type 0x10 @ 0x70
        Capability: type 0x01 @ 0x50
        Capability: type 0x10 @ 0x58
        do_pci_scan_bridge returns max 1
        scan_static_bus for PCI: 00:14.0
        smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled
        smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled
        scan_static_bus for PCI: 00:14.0 done
        scan_static_bus for PCI: 00:14.3
        scan_static_bus for PCI: 00:14.3 done
        do_pci_scan_bridge for PCI: 00:14.4
        PCI: pci_scan_bus for bus 02
        POST: 0x24
        POST: 0x25
        PCI: pci_scan_bus returning with max=002
        POST: 0x55
        do_pci_scan_bridge returns max 2
        PCI: pci_scan_bus returning with max=002
        POST: 0x55
        scan_static_bus for Root Device done
        done
        POST: 0x66
        BS: BS_DEV_ENUMERATE times (us): entry 8 run 67538 exit 0
        found VGA at PCI: 00:01.0
        Setting up VGA for PCI: 00:01.0
        Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
        Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
        Allocating resources...
        Reading resources...
        Root Device read_resources bus 0 link: 0
        CPU_CLUSTER: 0 read_resources bus 0 link: 0
        APIC: 10 missing read_resources
        APIC: 11 missing read_resources
        CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
        fx_devs=0x1
        DOMAIN: 0000 read_resources bus 0 link: 0
        PCI: 00:07.0 read_resources bus 1 link: 0
        PCI: 00:07.0 read_resources bus 1 link: 0 done
        More than one caller of pci_ehci_read_resources from PCI: 00:12.0
        PCI: 00:12.2 EHCI BAR hook registered
        More than one caller of pci_ehci_read_resources from PCI: 00:13.0
        More than one caller of pci_ehci_read_resources from PCI: 00:13.2
        PCI: 00:14.0 read_resources bus 1 link: 0
        I2C: 01:50 missing read_resources
        I2C: 01:51 missing read_resources
        PCI: 00:14.0 read_resources bus 1 link: 0 done
        PCI: 00:14.4 read_resources bus 2 link: 0
        PCI: 00:14.4 read_resources bus 2 link: 0 done
        More than one caller of pci_ehci_read_resources from PCI: 00:14.5
        More than one caller of pci_ehci_read_resources from PCI: 00:16.0
        More than one caller of pci_ehci_read_resources from PCI: 00:16.2
        PCI: 00:18.0 read_resources bus 0 link: 0
        PCI: 00:18.0 read_resources bus 0 link: 0 done
        PCI: 00:18.0 read_resources bus 0 link: 1
        PCI: 00:18.0 read_resources bus 0 link: 1 done
        PCI: 00:18.0 read_resources bus 0 link: 2
        PCI: 00:18.0 read_resources bus 0 link: 2 done
        PCI: 00:18.0 read_resources bus 0 link: 3
        PCI: 00:18.0 read_resources bus 0 link: 3 done
        DOMAIN: 0000 read_resources bus 0 link: 0 done
        Root Device read_resources bus 0 link: 0 done
        Done reading resources.
        Show resources in subtree (Root Device)...After reading.
         Root Device child on link 0 CPU_CLUSTER: 0
          CPU_CLUSTER: 0 child on link 0 APIC: 10
           APIC: 10
           APIC: 11
          DOMAIN: 0000 child on link 0 PCI: 00:00.0
          DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
          DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
           PCI: 00:00.0
           PCI: 00:01.0
           PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
           PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
           PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
           PCI: 00:01.1
           PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
           PCI: 00:02.0
           PCI: 00:03.0
           PCI: 00:04.0
           PCI: 00:05.0
           PCI: 00:06.0
           PCI: 00:07.0 child on link 0 PCI: 01:00.0
           PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
           PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
           PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
            PCI: 01:00.0
            PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
            PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
            PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
           PCI: 00:08.0
           PCI: 00:10.0
           PCI: 00:10.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
           PCI: 00:10.1
           PCI: 00:11.0
           PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
           PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
           PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
           PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
           PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
           PCI: 00:11.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24
           PCI: 00:12.0
           PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
           PCI: 00:12.2
           PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
           PCI: 00:13.0
           PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
           PCI: 00:13.2
           PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
           PCI: 00:14.0 child on link 0 I2C: 01:50
            I2C: 01:50
            I2C: 01:51
           PCI: 00:14.1
           PCI: 00:14.2
           PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
           PCI: 00:14.3
           PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffef flags 200 index a0
           PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
           PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
           PCI: 00:14.4
           PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
           PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
           PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
           PCI: 00:14.5
           PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
           PCI: 00:14.6
           PCI: 00:14.7
           PCI: 00:14.7 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
           PCI: 00:15.0
           PCI: 00:15.1
           PCI: 00:15.2
           PCI: 00:15.3
           PCI: 00:16.0
           PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
           PCI: 00:16.2
           PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
           PCI: 00:18.0
           PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
           PCI: 00:18.1
           PCI: 00:18.2
           PCI: 00:18.3
           PCI: 00:18.4
           PCI: 00:18.5
        DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
        PCI: 00:07.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
        PCI: 01:00.0 10 *  [0x0 - 0xff] io
        PCI: 00:07.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
        PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
        PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
        PCI: 00:07.0 1c *  [0x0 - 0xfff] io
        PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
        PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
        PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
        PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
        PCI: 00:11.0 14 *  [0x1420 - 0x1423] io
        PCI: 00:11.0 1c *  [0x1424 - 0x1427] io
        DOMAIN: 0000 compute_resources_io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done
        DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
        PCI: 00:07.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
        PCI: 01:00.0 20 *  [0x0 - 0x3fff] prefmem
        PCI: 00:07.0 compute_resources_prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
        PCI: 00:07.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
        PCI: 01:00.0 18 *  [0x0 - 0xfff] mem
        PCI: 00:07.0 compute_resources_mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
        PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
        PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
        PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
        PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
        PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
        PCI: 00:07.0 24 *  [0x10000000 - 0x100fffff] prefmem
        PCI: 00:07.0 20 *  [0x10100000 - 0x101fffff] mem
        PCI: 00:01.0 18 *  [0x10200000 - 0x1023ffff] mem
        PCI: 00:01.1 10 *  [0x10240000 - 0x10243fff] mem
        PCI: 00:14.2 10 *  [0x10244000 - 0x10247fff] mem
        PCI: 00:10.0 10 *  [0x10248000 - 0x10249fff] mem
        PCI: 00:12.0 10 *  [0x1024a000 - 0x1024afff] mem
        PCI: 00:13.0 10 *  [0x1024b000 - 0x1024bfff] mem
        PCI: 00:14.5 10 *  [0x1024c000 - 0x1024cfff] mem
        PCI: 00:16.0 10 *  [0x1024d000 - 0x1024dfff] mem
        PCI: 00:11.0 24 *  [0x1024e000 - 0x1024e7ff] mem
        PCI: 00:12.2 10 *  [0x1024e800 - 0x1024e8ff] mem
        PCI: 00:13.2 10 *  [0x1024e900 - 0x1024e9ff] mem
        PCI: 00:14.7 10 *  [0x1024ea00 - 0x1024eaff] mem
        PCI: 00:16.2 10 *  [0x1024eb00 - 0x1024ebff] mem
        PCI: 00:14.3 a0 *  [0x1024ec00 - 0x1024ec00] mem
        DOMAIN: 0000 compute_resources_mem: base: 1024ec01 size: 1024ec01 align: 28 gran: 0 limit: ffffffef done
        avoid_fixed_resources: DOMAIN: 0000
        avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
        avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffef
        constrain_resources: DOMAIN: 0000
        constrain_resources: PCI: 00:00.0
        constrain_resources: PCI: 00:01.0
        constrain_resources: PCI: 00:01.1
        constrain_resources: PCI: 00:07.0
        constrain_resources: PCI: 01:00.0
        constrain_resources: PCI: 00:10.0
        constrain_resources: PCI: 00:11.0
        constrain_resources: PCI: 00:12.0
        constrain_resources: PCI: 00:12.2
        constrain_resources: PCI: 00:13.0
        constrain_resources: PCI: 00:13.2
        constrain_resources: PCI: 00:14.0
        constrain_resources: I2C: 01:50
        constrain_resources: I2C: 01:51
        constrain_resources: PCI: 00:14.2
        constrain_resources: PCI: 00:14.3
        constrain_resources: PCI: 00:14.4
        constrain_resources: PCI: 00:14.5
        constrain_resources: PCI: 00:14.7
        constrain_resources: PCI: 00:16.0
        constrain_resources: PCI: 00:16.2
        constrain_resources: PCI: 00:18.0
        constrain_resources: PCI: 00:18.1
        constrain_resources: PCI: 00:18.2
        constrain_resources: PCI: 00:18.3
        constrain_resources: PCI: 00:18.4
        constrain_resources: PCI: 00:18.5
        avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
        	lim->base 00001000 lim->limit 0000ffff
        avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffef
        	lim->base 00000000 lim->limit f7ffffff
        Setting resources...
        DOMAIN: 0000 allocate_resources_io: base:1000 size:1428 align:12 gran:0 limit:ffff
        Assigned: PCI: 00:07.0 1c *  [0x1000 - 0x1fff] io
        Assigned: PCI: 00:01.0 14 *  [0x2000 - 0x20ff] io
        Assigned: PCI: 00:11.0 20 *  [0x2400 - 0x240f] io
        Assigned: PCI: 00:11.0 10 *  [0x2410 - 0x2417] io
        Assigned: PCI: 00:11.0 18 *  [0x2418 - 0x241f] io
        Assigned: PCI: 00:11.0 14 *  [0x2420 - 0x2423] io
        Assigned: PCI: 00:11.0 1c *  [0x2424 - 0x2427] io
        DOMAIN: 0000 allocate_resources_io: next_base: 2428 size: 1428 align: 12 gran: 0 done
        PCI: 00:07.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
        Assigned: PCI: 01:00.0 10 *  [0x1000 - 0x10ff] io
        PCI: 00:07.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
        PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
        PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
        DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:1024ec01 align:28 gran:0 limit:f7ffffff
        Assigned: PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
        Assigned: PCI: 00:07.0 24 *  [0xf0000000 - 0xf00fffff] prefmem
        Assigned: PCI: 00:07.0 20 *  [0xf0100000 - 0xf01fffff] mem
        Assigned: PCI: 00:01.0 18 *  [0xf0200000 - 0xf023ffff] mem
        Assigned: PCI: 00:01.1 10 *  [0xf0240000 - 0xf0243fff] mem
        Assigned: PCI: 00:14.2 10 *  [0xf0244000 - 0xf0247fff] mem
        Assigned: PCI: 00:10.0 10 *  [0xf0248000 - 0xf0249fff] mem
        Assigned: PCI: 00:12.0 10 *  [0xf024a000 - 0xf024afff] mem
        Assigned: PCI: 00:13.0 10 *  [0xf024b000 - 0xf024bfff] mem
        Assigned: PCI: 00:14.5 10 *  [0xf024c000 - 0xf024cfff] mem
        Assigned: PCI: 00:16.0 10 *  [0xf024d000 - 0xf024dfff] mem
        Assigned: PCI: 00:11.0 24 *  [0xf024e000 - 0xf024e7ff] mem
        Assigned: PCI: 00:12.2 10 *  [0xf024e800 - 0xf024e8ff] mem
        Assigned: PCI: 00:13.2 10 *  [0xf024e900 - 0xf024e9ff] mem
        Assigned: PCI: 00:14.7 10 *  [0xf024ea00 - 0xf024eaff] mem
        Assigned: PCI: 00:16.2 10 *  [0xf024eb00 - 0xf024ebff] mem
        Assigned: PCI: 00:14.3 a0 *  [0xf024ec00 - 0xf024ec00] mem
        DOMAIN: 0000 allocate_resources_mem: next_base: f024ec01 size: 1024ec01 align: 28 gran: 0 done
        PCI: 00:07.0 allocate_resources_prefmem: base:f0000000 size:100000 align:20 gran:20 limit:f7ffffff
        Assigned: PCI: 01:00.0 20 *  [0xf0000000 - 0xf0003fff] prefmem
        PCI: 00:07.0 allocate_resources_prefmem: next_base: f0004000 size: 100000 align: 20 gran: 20 done
        PCI: 00:07.0 allocate_resources_mem: base:f0100000 size:100000 align:20 gran:20 limit:f7ffffff
        Assigned: PCI: 01:00.0 18 *  [0xf0100000 - 0xf0100fff] mem
        PCI: 00:07.0 allocate_resources_mem: next_base: f0101000 size: 100000 align: 20 gran: 20 done
        PCI: 00:14.4 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
        PCI: 00:14.4 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
        PCI: 00:14.4 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
        PCI: 00:14.4 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
        Root Device assign_resources, bus 0 link: 0
        node 0: mmio_basek=00380000, basek=00400000, limitk=00460000
        CBMEM region bf13f000-bfffffff (cbmem_late_set_table)
        DOMAIN: 0000 assign_resources, bus 0 link: 0
        PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
        PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
        PCI: 00:01.0 18 <- [0x00f0200000 - 0x00f023ffff] size 0x00040000 gran 0x12 mem
        PCI: 00:01.1 10 <- [0x00f0240000 - 0x00f0243fff] size 0x00004000 gran 0x0e mem
        PCI: 00:07.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
        PCI: 00:07.0 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 prefmem
        PCI: 00:07.0 20 <- [0x00f0100000 - 0x00f01fffff] size 0x00100000 gran 0x14 bus 01 mem
        PCI: 00:07.0 assign_resources, bus 1 link: 0
        PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
        PCI: 01:00.0 18 <- [0x00f0100000 - 0x00f0100fff] size 0x00001000 gran 0x0c mem64
        PCI: 01:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e prefmem64
        PCI: 00:07.0 assign_resources, bus 1 link: 0
        PCI: 00:10.0 10 <- [0x00f0248000 - 0x00f0249fff] size 0x00002000 gran 0x0d mem64
        PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io
        PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io
        PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io
        PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io
        PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
        PCI: 00:11.0 24 <- [0x00f024e000 - 0x00f024e7ff] size 0x00000800 gran 0x0b mem
        PCI: 00:12.0 10 <- [0x00f024a000 - 0x00f024afff] size 0x00001000 gran 0x0c mem
        PCI: 00:12.2 EHCI Debug Port hook triggered
        PCI: 00:12.2 10 <- [0x00f024e800 - 0x00f024e8ff] size 0x00000100 gran 0x08 mem
        PCI: 00:12.2 EHCI Debug Port relocated
        PCI: 00:13.0 10 <- [0x00f024b000 - 0x00f024bfff] size 0x00001000 gran 0x0c mem
        PCI: 00:13.2 10 <- [0x00f024e900 - 0x00f024e9ff] size 0x00000100 gran 0x08 mem
        PCI: 00:14.2 10 <- [0x00f0244000 - 0x00f0247fff] size 0x00004000 gran 0x0e mem64
        PCI: 00:14.3 a0 <- [0x00f024ec02 - 0x00f024ec02] size 0x00000001 gran 0x00 mem
        PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
        PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
        PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem
        PCI: 00:14.5 10 <- [0x00f024c000 - 0x00f024cfff] size 0x00001000 gran 0x0c mem
        PCI: 00:14.7 10 <- [0x00f024ea00 - 0x00f024eaff] size 0x00000100 gran 0x08 mem64
        PCI: 00:16.0 10 <- [0x00f024d000 - 0x00f024dfff] size 0x00001000 gran 0x0c mem
        PCI: 00:16.2 10 <- [0x00f024eb00 - 0x00f024ebff] size 0x00000100 gran 0x08 mem
        PCI: 00:18.0 c0010058 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x00 mem <mmconfig>
        DOMAIN: 0000 assign_resources, bus 0 link: 0
        Root Device assign_resources, bus 0 link: 0
        Done setting resources.
        Show resources in subtree (Root Device)...After assigning values.
         Root Device child on link 0 CPU_CLUSTER: 0
          CPU_CLUSTER: 0 child on link 0 APIC: 10
           APIC: 10
           APIC: 11
          DOMAIN: 0000 child on link 0 PCI: 00:00.0
          DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000
          DOMAIN: 0000 resource base e0000000 size 1024ec01 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
          DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
          DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
          DOMAIN: 0000 resource base 100000000 size 1f000000 align 0 gran 0 limit 0 flags e0004200 index 30
          DOMAIN: 0000 resource base c0000000 size 20000000 align 0 gran 0 limit 0 flags f0000200 index 7
           PCI: 00:00.0
           PCI: 00:01.0
           PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit f7ffffff flags 60001200 index 10
           PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14
           PCI: 00:01.0 resource base f0200000 size 40000 align 18 gran 18 limit f7ffffff flags 60000200 index 18
           PCI: 00:01.1
           PCI: 00:01.1 resource base f0240000 size 4000 align 14 gran 14 limit f7ffffff flags 60000200 index 10
           PCI: 00:02.0
           PCI: 00:03.0
           PCI: 00:04.0
           PCI: 00:05.0
           PCI: 00:06.0
           PCI: 00:07.0 child on link 0 PCI: 01:00.0
           PCI: 00:07.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
           PCI: 00:07.0 resource base f0000000 size 100000 align 20 gran 20 limit f7ffffff flags 60081202 index 24
           PCI: 00:07.0 resource base f0100000 size 100000 align 20 gran 20 limit f7ffffff flags 60080202 index 20
            PCI: 01:00.0
            PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
            PCI: 01:00.0 resource base f0100000 size 1000 align 12 gran 12 limit f7ffffff flags 60000201 index 18
            PCI: 01:00.0 resource base f0000000 size 4000 align 14 gran 14 limit f7ffffff flags 60001201 index 20
           PCI: 00:08.0
           PCI: 00:10.0
           PCI: 00:10.0 resource base f0248000 size 2000 align 13 gran 13 limit f7ffffff flags 60000201 index 10
           PCI: 00:10.1
           PCI: 00:11.0
           PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
           PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
           PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
           PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
           PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
           PCI: 00:11.0 resource base f024e000 size 800 align 11 gran 11 limit f7ffffff flags 60000200 index 24
           PCI: 00:12.0
           PCI: 00:12.0 resource base f024a000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
           PCI: 00:12.2
           PCI: 00:12.2 resource base f024e800 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10
           PCI: 00:13.0
           PCI: 00:13.0 resource base f024b000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
           PCI: 00:13.2
           PCI: 00:13.2 resource base f024e900 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10
           PCI: 00:14.0 child on link 0 I2C: 01:50
            I2C: 01:50
            I2C: 01:51
           PCI: 00:14.1
           PCI: 00:14.2
           PCI: 00:14.2 resource base f0244000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10
           PCI: 00:14.3
           PCI: 00:14.3 resource base f024ec02 size 1 align 0 gran 0 limit f7ffffff flags 60000200 index a0
           PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
           PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
           PCI: 00:14.4
           PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
           PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
           PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
           PCI: 00:14.5
           PCI: 00:14.5 resource base f024c000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
           PCI: 00:14.6
           PCI: 00:14.7
           PCI: 00:14.7 resource base f024ea00 size 100 align 8 gran 8 limit f7ffffff flags 60000201 index 10
           PCI: 00:15.0
           PCI: 00:15.1
           PCI: 00:15.2
           PCI: 00:15.3
           PCI: 00:16.0
           PCI: 00:16.0 resource base f024d000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
           PCI: 00:16.2
           PCI: 00:16.2 resource base f024eb00 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10
           PCI: 00:18.0
           PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
           PCI: 00:18.1
           PCI: 00:18.2
           PCI: 00:18.3
           PCI: 00:18.4
           PCI: 00:18.5
        Done allocating resources.
        POST: 0x88
        BS: BS_DEV_RESOURCES times (us): entry 0 run 206347 exit 0
        Enabling resources...

Fam15 - domain_enable_resources: AmdInitMid.
        agesawrapper_amdinitmid passed.
          ader - leaving domain_enable_resources.
        PCI: 00:00.0 subsystem <- 1022/1410
        PCI: 00:00.0 cmd <- 06
        PCI: 00:01.0 subsystem <- 1022/1410
        PCI: 00:01.0 cmd <- 07
        PCI: 00:01.1 subsystem <- 1022/1410
        PCI: 00:01.1 cmd <- 02
        PCI: 00:07.0 bridge ctrl <- 0003
        PCI: 00:07.0 cmd <- 07
        PCI: 00:10.0 subsystem <- 1022/1410
        PCI: 00:10.0 cmd <- 02
        PCI: 00:11.0 cmd <- 03
        PCI: 00:12.0 subsystem <- 1022/1410
        PCI: 00:12.0 cmd <- 02
        PCI: 00:12.2 subsystem <- 1022/1410
        PCI: 00:12.2 cmd <- 02
        PCI: 00:13.0 subsystem <- 1022/1410
        PCI: 00:13.0 cmd <- 02
        PCI: 00:13.2 subsystem <- 1022/1410
        PCI: 00:13.2 cmd <- 02
        PCI: 00:14.0 subsystem <- 1022/1410
        PCI: 00:14.0 cmd <- 403
        PCI: 00:14.2 subsystem <- 1022/1410
        PCI: 00:14.2 cmd <- 02
        PCI: 00:14.3 subsystem <- 1022/1410
        PCI: 00:14.3 cmd <- 0f
        hudson_lpc_enable_childrens_resources
        PCI: 00:14.4 bridge ctrl <- 0003
        PCI: 00:14.4 cmd <- 00
        PCI: 00:14.5 subsystem <- 1022/1410
        PCI: 00:14.5 cmd <- 02
        PCI: 00:14.7 subsystem <- 1022/1410
        PCI: 00:14.7 cmd <- 06
        PCI: 00:16.0 cmd <- 02
        PCI: 00:16.2 cmd <- 02
        PCI: 00:18.0 cmd <- 00
        PCI: 00:18.1 subsystem <- 1022/1410
        PCI: 00:18.1 cmd <- 00
        PCI: 00:18.2 subsystem <- 1022/1410
        PCI: 00:18.2 cmd <- 00
        PCI: 00:18.3 subsystem <- 1022/1410
        PCI: 00:18.3 cmd <- 00
        PCI: 00:18.4 subsystem <- 1022/1410
        PCI: 00:18.4 cmd <- 00
        PCI: 00:18.5 subsystem <- 1022/1410
        PCI: 00:18.5 cmd <- 00
        PCI: 01:00.0 cmd <- 03
        done.
        POST: 0x89
        BS: BS_DEV_ENABLE times (us): entry 0 run 22642 exit 0
        Initializing devices...
        Root Device init
        Root Device init 247 usecs
        CPU_CLUSTER: 0 init
        start_eip=0x00001000, code_size=0x00000031
        Initializing CPU #0
        CPU: vendor AMD device 610f01
        CPU: family 15, model 10, stepping 01
        Using generic cpu ops (good)
        Model 15 Init.

MTRR check
        Fixed MTRRs   : Enabled
        Variable MTRRs: Enabled

POST: 0x93
        POST: 0x60
        Enabling cache
        Setting up local apic... apic_id: 0x10 done.
        POST: 0x9b
        siblings = 01, CPU #0 initialized
        CPU1: stack_base 002bc000, stack_end 002bcff8
        Asserting INIT.
        Waiting for send to finish...
        +Deasserting INIT.
        Waiting for send to finish...
        +#startup loops: 2.
        Sending STARTUP #1 to 17.
        After apic_write.
        Startup point 1.
        Waiting for send to finish...
        +Sending STARTUP #2 to 17.
        After apic_write.
        Startup point 1.
        Waiting for send to finish...
        +After Startup.
        Initializing CPU #1
        Waiting for 1 CPUS to stop
        CPU: vendor AMD device 610f01
        CPU: family 15, model 10, stepping 01
        Using generic cpu ops (good)
        Model 15 Init.

MTRR check
        Fixed MTRRs   : Enabled
        Variable MTRRs: Enabled

POST: 0x93
        POST: 0x60
        Enabling cache
        Setting up local apic... apic_id: 0x11 done.
        POST: 0x9b
        siblings = 01, CPU #1 initialized
        All AP CPUs stopped (447 loops)
        CPU1: stack: 002bc000 - 002bd000, lowest used address 002bcd98, stack used: 616 bytes
        CPU_CLUSTER: 0 init 28382 usecs
        PCI: 00:00.0 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1022,1410.rom' not found.
        CBFS: Could not find file 'pci1022,1410.rom'.
        PCI: 00:00.0 init 2745 usecs
        PCI: 00:01.0 init
        In CBFS, ROM address for PCI: 00:01.0 = ffc00778
        PCI expansion ROM, signature 0xaa55, INIT size 0xfa00, data ptr 0x01c0
        PCI ROM image, vendor ID 1002, device ID 9901,
        PCI ROM image, Class Code 030000, Code Type 00
        Copying VGA ROM Image from ffc00778 to 0xc0000, 0xfa00 bytes
        Real mode stub @00000600: 867 bytes
        Calling Option ROM...
        ... Option ROM returned.
        VBE: Getting information about VESA mode 4117
        VBE: resolution:  1024x768@16
        VBE: framebuffer: e0000000
        VBE: Setting VESA mode 4117
        PCI: 00:01.0 init 131845 usecs
        PCI: 00:01.1 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1002,9902.rom' not found.
        CBFS: Could not find file 'pci1002,9902.rom'.
        PCI: 00:01.1 init 2744 usecs
        PCI: 00:10.0 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1022,7812.rom' not found.
        CBFS: Could not find file 'pci1022,7812.rom'.
        PCI: 00:10.0 init 2745 usecs
        PCI: 00:11.0 init
        PCI: 00:11.0 init 249 usecs
        PCI: 00:12.0 init
        PCI: 00:12.0 init 249 usecs
        PCI: 00:12.2 init
        PCI: 00:12.2 init 249 usecs
        PCI: 00:13.0 init
        PCI: 00:13.0 init 249 usecs
        PCI: 00:13.2 init
        PCI: 00:13.2 init 249 usecs
        PCI: 00:14.0 init
        IOAPIC: Initializing IOAPIC at 0xfec00000
        IOAPIC: Bootstrap Processor Local APIC = 0x10
        IOAPIC: ID = 0x04
        IOAPIC: Dumping registers
          reg 0x0000: 0x04000000
          reg 0x0001: 0x00178021
          reg 0x0002: 0x04000000
        IOAPIC: 24 interrupts
        IOAPIC: Enabling interrupts on FSB
        IOAPIC: reg 0x00000000 value 0x10000000 0x00000700
        IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
        IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
        IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
        IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
        IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
        IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
        IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
        IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
        IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
        PCI: 00:14.0 init 15220 usecs
        PCI: 00:14.2 init
        PCI: 00:14.2 init 249 usecs
        PCI: 00:14.3 init
        RTC Init
        PCI: 00:14.3 init 445 usecs
        PCI: 00:14.4 init
        PCI: 00:14.4 init 249 usecs
        PCI: 00:14.5 init
        PCI: 00:14.5 init 249 usecs
        PCI: 00:14.7 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1022,7806.rom' not found.
        CBFS: Could not find file 'pci1022,7806.rom'.
        PCI: 00:14.7 init 2682 usecs
        PCI: 00:16.0 init
        PCI: 00:16.0 init 249 usecs
        PCI: 00:16.2 init
        PCI: 00:16.2 init 249 usecs
        PCI: 00:18.0 init
        PCI: 00:18.0 init 249 usecs
        PCI: 00:18.1 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1022,1401.rom' not found.
        CBFS: Could not find file 'pci1022,1401.rom'.
        PCI: 00:18.1 init 2682 usecs
        PCI: 00:18.2 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1022,1402.rom' not found.
        CBFS: Could not find file 'pci1022,1402.rom'.
        PCI: 00:18.2 init 2682 usecs
        PCI: 00:18.3 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1022,1403.rom' not found.
        CBFS: Could not find file 'pci1022,1403.rom'.
        PCI: 00:18.3 init 2682 usecs
        PCI: 00:18.4 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1022,1404.rom' not found.
        CBFS: Could not find file 'pci1022,1404.rom'.
        PCI: 00:18.4 init 2682 usecs
        PCI: 00:18.5 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci1022,1405.rom' not found.
        CBFS: Could not find file 'pci1022,1405.rom'.
        PCI: 00:18.5 init 2682 usecs
        PCI: 01:00.0 init
        CBFS: ERROR: No file header found at 0x3ffc80 - try next aligned address: 0x3ffcc0.
        CBFS: ERROR: No file header found at 0x3ffcc0 - try next aligned address: 0x3ffd00.
        CBFS: WARNING: 'pci10ec,8168.rom' not found.
        CBFS: Could not find file 'pci10ec,8168.rom'.
        PCI: 01:00.0 init 2683 usecs
        Devices initialized
        Show all devs...After init.
        Root Device: enabled 1
        CPU_CLUSTER: 0: enabled 1
        APIC: 10: enabled 1
        DOMAIN: 0000: enabled 1
        PCI: 00:00.0: enabled 1
        PCI: 00:01.0: enabled 1
        PCI: 00:01.1: enabled 1
        PCI: 00:02.0: enabled 0
        PCI: 00:03.0: enabled 0
        PCI: 00:04.0: enabled 0
        PCI: 00:05.0: enabled 0
        PCI: 00:06.0: enabled 0
        PCI: 00:07.0: enabled 1
        PCI: 00:08.0: enabled 0
        PCI: 00:10.0: enabled 1
        PCI: 00:10.1: enabled 0
        PCI: 00:11.0: enabled 1
        PCI: 00:12.0: enabled 1
        PCI: 00:12.2: enabled 1
        PCI: 00:13.0: enabled 1
        PCI: 00:13.2: enabled 1
        PCI: 00:14.0: enabled 1
        I2C: 01:50: enabled 1
        I2C: 01:51: enabled 1
        PCI: 00:14.1: enabled 0
        PCI: 00:14.2: enabled 1
        PCI: 00:14.3: enabled 1
        PCI: 00:14.4: enabled 1
        PCI: 00:14.5: enabled 1
        PCI: 00:14.6: enabled 0
        PCI: 00:14.7: enabled 1
        PCI: 00:15.0: enabled 0
        PCI: 00:15.1: enabled 0
        PCI: 00:15.2: enabled 0
        PCI: 00:15.3: enabled 0
        PCI: 00:18.0: enabled 1
        PCI: 00:18.1: enabled 1
        PCI: 00:18.2: enabled 1
        PCI: 00:18.3: enabled 1
        PCI: 00:18.4: enabled 1
        PCI: 00:18.5: enabled 1
        APIC: 11: enabled 1
        PCI: 00:16.0: enabled 1
        PCI: 00:16.2: enabled 1
        PCI: 01:00.0: enabled 1
        POST: 0x8a
        BS: BS_DEV_INIT times (us): entry 0 run 228843 exit 0
        CBMEM region bf13f000-bfffffff (cbmem_reinit)
        CBMEM region bf13f000-bfffffff (cbmem_init)
        Adding CBMEM entry as no. 1
        Moving GDT to bf13f200...ok
        BS: BS_POST_DEVICE times (us): entry 1621 run 0 exit 0
        POST: 0x8a
        BS: BS_OS_RESUME_CHECK times (us): entry 0 run 312 exit 0
        CBMEM Base is bf13f000.
        POST: 0x9a

EventLog:  EventClass = 2, EventInfo = 8040100.
          Param1 = 1180000, Param2 = 0.
          Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
          Param1 = 1080000, Param2 = 0.
          Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
          Param1 = 1040000, Param2 = 0.
          Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
          Param1 = a008, Param2 = 0.
          Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
          Param1 = a00f, Param2 = 0.
          Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
          Param1 = a00e, Param2 = 0.
          Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
          Param1 = a010, Param2 = 0.
          Param3 = 0, Param4 = 0.
        ASSERTION FAILED: file 'src/mainboard/amd/parmer/agesawrapper.c',  line 431
        DmiTable:100123c3, AcpiPstatein: 10010126, AcpiSrat:0,AcpiSlit:0, Mce:10010988, Cmc:10010a4a,Alib:1001ccd4, AcpiIvrs:0 in agesawrapper_amdinitlate
        agesawrapper_amdinitlate failed: 5 
        NvStorageSize=43a, NvStorage=1001ebb4
        SF: Detected MX25L3205D with page size 1000, total 400000
        SF: Successfully erased 4096 bytes @ 0xffff7000
        VolatileStorageSize=5a26, VolatileStorage=1001efee
        SF: Unsupported Macronix ID 20c2
        SF: Unsupported manufacturer c2
        Could not find SPI device
        SF: Detected MX25L3205D with page size 1000, total 400000
        SF: Successfully erased 4096 bytes @ 0xffff6000
        Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
        Adding CBMEM entry as no. 2
        Writing IRQ routing tables to 0xbf13f400...write_pirq_routing_table done.
        PIRQ table: 48 bytes.
        POST: 0x9b
        Wrote the mp table end at: 000f0410 - 000f0614
        Adding CBMEM entry as no. 3
        Wrote the mp table end at: bf140410 - bf140614
        MP table: 532 bytes.
        POST: 0x9c
        Adding CBMEM entry as no. 4
        ACPI: Writing ACPI tables at bf141400...
        ACPI:    * DSDT at bf1414c8
        ACPI:    * DSDT @ bf1414c8 Length 1af2
        ACPI: * FACS at bf142fc0
        ACPI:  * FADT at bf143000
        pm_base: 0x0800
        ACPI: added table 1/32, length now 40
        ACPI:  * HPET at bf1430f8
        ACPI: added table 2/32, length now 44
        ACPI:  * MADT at bf143130
        ACPI: added table 3/32, length now 48
        ACPI: added table 4/32, length now 52
        ACPI:    * IVRS at bf143368
          AGESA IVRS table NULL. Skipping.
        ACPI:    * SRAT at bf143368
          AGESA SRAT table NULL. Skipping.
        ACPI:   * SLIT at bf143368
          AGESA SLIT table NULL. Skipping.
        ACPI:  * AGESA ALIB SSDT at bf143370
        ACPI: added table 5/32, length now 56
        ACPI:    * SSDT at bf145250
        ACPI: added table 6/32, length now 60
        ACPI:    * SSDT for PState at bf145830
        ACPI:    * SSDT
        ACPI: added table 7/32, length now 64
        ACPI: done.
        ACPI tables: 17525 bytes.
        Adding CBMEM entry as no. 5
        smbios_write_tables: bf14c800
        Root Device (AMD Parmer)
        CPU_CLUSTER: 0 (AMD FAM15 Root Complex)
        APIC: 10 (AMD CPU Family 15h)
        DOMAIN: 0000 (AMD FAM15 Root Complex)
        PCI: 00:00.0 (AMD FAM15 Northbridge)
        PCI: 00:01.0 (AMD FAM15 Northbridge)
        PCI: 00:01.1 (AMD FAM15 Northbridge)
        PCI: 00:02.0 (AMD FAM15 Northbridge)
        PCI: 00:03.0 (AMD FAM15 Northbridge)
        PCI: 00:04.0 (AMD FAM15 Northbridge)
        PCI: 00:05.0 (AMD FAM15 Northbridge)
        PCI: 00:06.0 (AMD FAM15 Northbridge)
        PCI: 00:07.0 (AMD FAM15 Northbridge)
        PCI: 00:08.0 (AMD FAM15 Northbridge)
        PCI: 00:10.0 (ATI HUDSON)
        PCI: 00:10.1 (ATI HUDSON)
        PCI: 00:11.0 (ATI HUDSON)
        PCI: 00:12.0 (ATI HUDSON)
        PCI: 00:12.2 (ATI HUDSON)
        PCI: 00:13.0 (ATI HUDSON)
        PCI: 00:13.2 (ATI HUDSON)
        PCI: 00:14.0 (ATI HUDSON)
        I2C: 01:50 (unknown)
        I2C: 01:51 (unknown)
        PCI: 00:14.1 (ATI HUDSON)
        PCI: 00:14.2 (ATI HUDSON)
        PCI: 00:14.3 (ATI HUDSON)
        PCI: 00:14.4 (ATI HUDSON)
        PCI: 00:14.5 (ATI HUDSON)
        PCI: 00:14.6 (ATI HUDSON)
        PCI: 00:14.7 (ATI HUDSON)
        PCI: 00:15.0 (ATI HUDSON)
        PCI: 00:15.1 (ATI HUDSON)
        PCI: 00:15.2 (ATI HUDSON)
        PCI: 00:15.3 (ATI HUDSON)
        PCI: 00:18.0 (AMD FAM15 Northbridge)
        PCI: 00:18.1 (AMD FAM15 Northbridge)
        PCI: 00:18.2 (AMD FAM15 Northbridge)
        PCI: 00:18.3 (AMD FAM15 Northbridge)
        PCI: 00:18.4 (AMD FAM15 Northbridge)
        PCI: 00:18.5 (AMD FAM15 Northbridge)
        APIC: 11 (unknown)
        PCI: 00:16.0 (unknown)
        PCI: 00:16.2 (unknown)
        PCI: 01:00.0 (unknown)
        SMBIOS tables: 297 bytes.
        POST: 0x9e
        Adding CBMEM entry as no. 6
        Adding CBMEM entry as no. 7
        POST: 0x9d
        Adding CBMEM entry as no. 8
        Writing table forward entry at 0x00000500
        Wrote coreboot table at: 00000500, 0x10 bytes, checksum 5fdf
        Table forward entry ends at 0x00000528.
        ... aligned to 0x00001000
        Writing coreboot table at 0xbffee000
        rom_table_end = 0xbffee000
        ... aligned to 0xbfff0000
         0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
         1. 0000000000001000-000000000009ffff: RAM
         2. 00000000000c0000-00000000bf13efff: RAM
         3. 00000000bf13f000-00000000bfffffff: CONFIGURATION TABLES
         4. 00000000c0000000-00000000dfffffff: RESERVED
         5. 00000000f8000000-00000000fbffffff: RESERVED
         6. 0000000100000000-000000011effffff: RAM
        Wrote coreboot table at: bffee000, 0x228 bytes, checksum f02
        coreboot table: 576 bytes.
        POST: 0x9d
        Multiboot Information structure has been written.
        FREE SPACE  0. bfff6000 0000a000
        GDT         1. bf13f200 00000200
        IRQ TABLE   2. bf13f400 00001000
        SMP TABLE   3. bf140400 00001000
        ACPI        4. bf141400 0000b400
        SMBIOS      5. bf14c800 00000800
        ACPI RESUME 6. bf14d000 00e00000
        ACPISCRATCH 7. bff4d000 000a1000
        COREBOOT    8. bffee000 00008000
        BS: BS_WRITE_TABLES times (us): entry 0 run 274214 exit 0
        Loading segment from rom address 0xffd06038
          parameter section (skipped)
        Loading segment from rom address 0xffd06054
          code (compression=1)
          New segment dstaddr 0x100000 memsize 0x15d600 srcaddr 0xffd060d8 filesize 0x15d9a
          (cleaned up) New segment addr 0x100000 size 0x15d600 offset 0xffd060d8 filesize 0x15d9a
        Loading segment from rom address 0xffd06070
          data (compression=1)
          New segment dstaddr 0x25d600 memsize 0x48 srcaddr 0xffd1be72 filesize 0x2f
          (cleaned up) New segment addr 0x25d600 size 0x48 offset 0xffd1be72 filesize 0x2f
        Loading segment from rom address 0xffd0608c
          Entry Point 0x00101000
        Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000015d600 filesz: 0x0000000000015d9a
        lb: [0x0000000000200000, 0x000000000037e034)
        segment: [0x0000000000100000, 0x0000000000115d9a, 0x000000000025d600)
         bounce: [0x00000000bed42f98, 0x00000000bed58d32, 0x00000000beea0598)
        Post relocation: addr: 0x00000000bed42f98 memsz: 0x000000000015d600 filesz: 0x0000000000015d9a
        using LZMA
        [ 0xbed42f98, bed73d5c, 0xbeea0598) <- ffd060d8
        Clearing Segment: addr: 0x00000000bed73d5c memsz: 0x000000000012c83c
        dest bed42f98, end beea0598, bouncebuffer bee42f98
        move prefix around: from bed42f98, to 00100000, amount: 100000
        Loading Segment: addr: 0x000000000025d600 memsz: 0x0000000000000048 filesz: 0x000000000000002f
        lb: [0x0000000000200000, 0x000000000037e034)
        segment: [0x000000000025d600, 0x000000000025d62f, 0x000000000025d648)
         bounce: [0x00000000beea0598, 0x00000000beea05c7, 0x00000000beea05e0)
        Post relocation: addr: 0x00000000beea0598 memsz: 0x0000000000000048 filesz: 0x000000000000002f
        using LZMA
        [ 0xbeea0598, beea05e0, 0xbeea05e0) <- ffd1be72
        dest beea0598, end beea05e0, bouncebuffer bee42f98
        Loaded segments
        BS: BS_PAYLOAD_LOAD times (us): entry 0 run 34807 exit 0
        Jumping to boot code at 00101000
        POST: 0xf8
        CPU0: stack: 002bd000 - 002be000, lowest used address 002bd5e0, stack used: 2592 bytes
        entry    = 0x00101000
        lb_start = 0x00200000
        lb_size  = 0x0017e034
        buffer   = 0xbee42f98

Thanks,

Paul

PS: Prop 395, please just send plain text messages to mailing lists.