NEWBIE Question

[Bruce Q. Simmons]

I am new at the LINUX Bios idea and need to figure out how I can tell if
there is a solution for my system.  Can someone point me in the right
direction please?

-Bruce Simmons

[Richard Smith]

Bruce Q. Simmons wrote:
> I am new at the LINUX Bios idea and need to figure out how I can tell if
> there is a solution for my system.  Can someone point me in the right
> direction please?

Boot linux on your ststem and send the output of lspci to the list so we 
know what chipset is on the system.

[David Aubin]

1.  Check out http://cvs.sourceforge.net/viewcvs.py/freebios/
    A.  Look at the freebios2 target's area and see if your chipset is
supported
    B.  If your system is older check out the freebios/linuxbios area

I'm having good luck with Tyan, so I personally might recommend them.

Dave

On Mon, 2004-07-19 at 16:16, Bruce Q. Simmons wrote:
> I am new at the LINUX Bios idea and need to figure out how I can tell
> if there is a solution for my system.  Can someone point me in the
> right direction please?
>
> -Bruce Simmons

[Bruce Q. Simmons]

LSPCI results:

Host bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 01)
PCI bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 01)
ISA bridge: Intel Corp. 82371AB/EB/MB PIII4 ISA (rev 08)
IDE interface: Intel Corp. 82371AB/EB/MB PIII4 IDE (rev 01)
USB Controller: Intel Corp. 82371AB/EB/MB PIII4 USB
Bridge: Intel Corp. 82371AB/EB/MB PIII4 ACPI (rev 08)

How do I map this to the list of supported BIOS mainboards?

-Bruce

-----Original Message-----
From: Richard Smith [mailto:[e-mail]] 
Sent: Monday, July 19, 2004 4:29 PM
To: [e-mail]
Cc: [e-mail]
Subject: Re: NEWBIE Question

Bruce Q. Simmons wrote:
> I am new at the LINUX Bios idea and need to figure out how I can tell if
> there is a solution for my system.  Can someone point me in the right
> direction please?

Boot linux on your ststem and send the output of lspci to the list so we 
know what chipset is on the system.

[David Aubin]

I think you have this:
http://cvs.sourceforge.net/viewcvs.py/freebios/freebios/src/mainboard/intel/...

On Mon, 2004-07-19 at 16:47, Bruce Q. Simmons wrote:
> LSPCI results:
>
> Host bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 01)
> PCI bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 01)
> ISA bridge: Intel Corp. 82371AB/EB/MB PIII4 ISA (rev 08)
> IDE interface: Intel Corp. 82371AB/EB/MB PIII4 IDE (rev 01)
> USB Controller: Intel Corp. 82371AB/EB/MB PIII4 USB
> Bridge: Intel Corp. 82371AB/EB/MB PIII4 ACPI (rev 08)
>
> How do I map this to the list of supported BIOS mainboards?
>
> -Bruce
>
> -----Original Message-----
> From: Richard Smith [mailto:[e-mail]] 
> Sent: Monday, July 19, 2004 4:29 PM
> To: [e-mail]
> Cc: [e-mail]
> Subject: Re: NEWBIE Question
>
> Bruce Q. Simmons wrote:
> > I am new at the LINUX Bios idea and need to figure out how I can tell if
> > there is a solution for my system.  Can someone point me in the right
> > direction please?
>
> Boot linux on your ststem and send the output of lspci to the list so we 
> know what chipset is on the system.
>
> Linuxbios mailing list
> [e-mail]
> http://www.clustermatic.org/mailman/listinfo/linuxbios

[Richard Smith]

Bruce Q. Simmons wrote:
> LSPCI results:
>
> Host bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 01)
> PCI bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 01)
> ISA bridge: Intel Corp. 82371AB/EB/MB PIII4 ISA (rev 08)
> IDE interface: Intel Corp. 82371AB/EB/MB PIII4 IDE (rev 01)
> USB Controller: Intel Corp. 82371AB/EB/MB PIII4 USB
> Bridge: Intel Corp. 82371AB/EB/MB PIII4 ACPI (rev 08)

Looks like your are golden.  Intel 440 is supported and I'm the 
maintianer. Yay! another 440?x user.  I though I would be the only one. 
  Do you know which ?X flavor you have.  Whats the partnumber off the 
Northbridge?   Who makes your board?

The only testing all my code changes have had is with my 440BX but If 
the ZX and DX shouldn't be that much different.

I tried to keep all my bitworks board specific changes out of the CVS 
setup but there may be a few that I couldn't abstract out without lots 
of changes but they all should wrapped with option BLAH=[10] enables

[Richard Smith]

David Aubin wrote:
> I think you have this:
> http://cvs.sourceforge.net/viewcvs.py/freebios/freebios/src/mainboard/intel/...

Yes but he should start with mainboard/bitworks/ims as I've made lots of 
upgrades/fixes.

[Richard Smith]

David Aubin wrote:
> I think you have this:
> http://cvs.sourceforge.net/viewcvs.py/freebios/freebios/src/mainboard/intel/...

Yes but he should start with mainboard/bitworks/ims as I've made lots of
upgrades/fixes.

[Gregg C Levine]

Hello (again) from Gregg C Levine
Nice discovery Bruce. I hope your project works out.
Now my display of witt.
Richard, Bruce, everyone go ahead and laugh, but the 440 chipset is one of
my favorites. In fact the Del that I'm writing this on, happens to be a 440.
Someday I'll swap the commercial thing for LinuxBIOS, never mind its really
a Dell.
Gregg C Levine drwho8 atsign worldnet dot att dot net
"Oh my!" The Second Doctor's nearly favorite phrase.
----- Original Message ----- 
From: "Richard Smith" 
To: 
Cc: "Bruce Q. Simmons" ; 
Sent: Monday, July 19, 2004 5:40 PM
Subject: Re: NEWBIE Question
> David Aubin wrote:
> > I think you have this:

http://cvs.sourceforge.net/viewcvs.py/freebios/freebios/src/mainboard/intel/...
> Yes but he should start with mainboard/bitworks/ims as I've made lots of
> upgrades/fixes.
>
> Linuxbios mailing list
> [e-mail]
> http://www.clustermatic.org/mailman/listinfo/linuxbios

440bx possible RAM problems

[Richard Smith]

I just realized a potential problem for you guys that are going to try 
LB on 440bx systems.

The Bitworks IMS board useses a 66Mhz front side bus but the chipset can 
do 100Mhz.  I suspect that most of these commercial mainboards will be 
useing 100Mhz.

Pretty much all the memory settings in the northbridge are the default 
which I think are the 66Mhz settings.  Only the stuff that is read out 
of the SPD is configured.

At 100Mhz the settings for the Memory strength buffers are much toucher. 
  (According to an Intel rep) so if your board runs with a FSB of 100Mhz 
RAM may not be reliable for you or may not work at all.  Be sure to give 
it a good test with memtest.

I don't know a lot about the memory strength settings but I'll try to 
help.  I debugged the original memory setup by comparing config space 
dumps of a Comercial BIOS Northbridge settings vs what LB was doing.

Before you flash in LB get a lspci -xxx of the north bridge settings 
with 'lspci -s 0 -xxx' so you can compare.

Also the smbus controller is in the southbridge and thats what reads the 
  SPD settings out of the RAM.
So far all the lspci listings I have seen have the southbridge at Dev 07 
which should work but if your southbridge shows up somewhere else then 
you will have to set the PIIX4_DEVFN option for memory SPD reading to work.

This also assumes your mainboard Mfg hasn't done something flaky with 
the SMbus.