Re: [coreboot] tiny bootblock problem

[Nils]

Patrick Georgi:
> > Is that a caching problem introduced by tiny bootblock?
> > What is needed to get it right?
>
> Probably MTRRs. With tinybootblock, these are set at slightly
> different times.
> GX2 uses Cache-As-RAM, right? That affects MTRRs, too (as CAR is a 
> "special" MTRR setup)

Correct me if i'm wrong but Geode GX2/LX doesn't have MTRRs.
Cache is setup via MSR registers.
So all that MTRR stuf in tiny bootblok/coreboot is useless to Geode.
Which regions are used for tiny bootblock that need caching?
If no one beets me i will investigate this further after SeaBIOS Geode
VGA is ready.

Philip Prindeville wrote:
> Also, the Alix 6F2 doesn't have a keyboard controller... is there a way
> to turn off the i8042 stuff?

Those i8042 warning at the beginning before warm reset comes from
SeaBIOS.
There is a SeaBIOS kconfig option to turn off the ps2 controller.

Greetings, Nils.

tiny bootblock problem

[Peter Stuge]

Nils wrote:
> > > Is that a caching problem introduced by tiny bootblock?
> > > What is needed to get it right?
> >
> > Probably MTRRs. With tinybootblock, these are set at slightly
> > different times.
> > GX2 uses Cache-As-RAM, right? That affects MTRRs, too (as CAR is a 
> > "special" MTRR setup)
>
> Correct me if i'm wrong but Geode GX2/LX doesn't have MTRRs.
> Cache is setup via MSR registers.
> So all that MTRR stuf in tiny bootblok/coreboot is useless to Geode.
> Which regions are used for tiny bootblock that need caching?

The flash chip, most importantly.

//Peter

tiny bootblock problem

[Patrick Georgi]

Am 06.01.2012 19:43, schrieb Nils:
> Correct me if i'm wrong but Geode GX2/LX doesn't have MTRRs.
> Cache is setup via MSR registers.

MTRR is usually configured via MSR (0x200 to 0x210, specifically). Not 
sure if Geode does it the same way, but MSR doesn't mean "no MTRR".

Patrick

tiny bootblock problem

[Philip Prindeville]

On 1/6/12 1:31 PM, Patrick Georgi wrote:
> Am 06.01.2012 19:43, schrieb Nils:
> > Correct me if i'm wrong but Geode GX2/LX doesn't have MTRRs.
> > Cache is setup via MSR registers.
>
> MTRR is usually configured via MSR (0x200 to 0x210, specifically). Not 
> sure if Geode does it the same way, but MSR doesn't mean "no MTRR".
>
> Patrick

Caching is bits 30:29 of CR0.

-Philip