Hello All,
How does a chipset know the size of the SPI BIOS ROM on board? I am thinking specifically the AMD RS780+SB7x0 chipset.
It could be that the chipset reads the SPI ROM size from the ROM chip itself at boot. In such case it should be possible to upgrade a 1 MByte chip to 2M or 4M just by plugging in another chip. Has anyone tried this?
Best regards, Juhana Helovuo
chip to 2M or 4M just by plugging in another chip. Has anyone tried this?
Yes the chipset support 16MB chip. But I think we dont have tinybootblock yet and one must setup the decodes early. Check regs 48 annd 6c 6a.
I just use 1MB.
Thanks, Rudolf
On 05.12.2010 12:26, Juhana Helovuo wrote:
How does a chipset know the size of the SPI BIOS ROM on board
Chipsets do not know the size of the flash ROM chip.
It could be that the chipset reads the SPI ROM size from the ROM chip itself at boot.
That is not possible because the flash chip does not have any command which returns the chip size.
Chipsets and flash chips cooperate with a trick: The chipset sends the full mapped address (e.g. 0xfff00000) to the flash chip, and the flash chip simply ignores the upper address bits. This ensures that all flash chips are automatically aligned to the top of the 4 GB address space regardless of flash chip size.
Note: Sometimes the chipset strips the upper address bits (e.g. strip 8 upper bits, keep lower 24 bits) if it knows that no compatible flash chip is larger than any stripped address. You don't have to care about that, the chipset and the flash chip will just work right automatically with their ignore-upper-address-bits trick.
Regards, Carl-Daniel
Carl-Daniel Hailfinger wrote:
On 05.12.2010 12:26, Juhana Helovuo wrote:
How does a chipset know the size of the SPI BIOS ROM on board
Chipsets do not know the size of the flash ROM chip.
Ok. Thanks for the explanation, Carl-Daniel and Rudolf.
I tried substituting a bigger SPI ROM chip on my test mainboard and it worked very well. Flashrom and Coreboot co-operate very nicely. The only change needed was configuring Coreboot to use a bigger ROM size in menuconfig.
The original chip was MX25L8005 (1 MByte) and the substitute is MX25L1605 (2MByte). The ROM is connected to AMD SB700 southbridge.
Best regards, Juhana Helovuo
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Carl-Daniel Hailfinger -
Juhana Helovuo -
Rudolf Marek