[PATCH] XIP for low address (0xf0000) support - coreboot

31 May 2003

Ron, please apply this patch.
It should not break anything, and significantly speeds up booting of
certain boards like EPIA.
This patch does two things:
- Add write-through cache for 0xf0000-0xfffff before uncompressing
  linuxbios_c, if option XIP_LOW is defined.
- Changes existing XIP (execute in place) code to use write-through
  cache instead of write-protect cache. (as Eric suggested)
-- 
Takeshi


Index: earlymtrr.inc
===================================================================
RCS file: /cvsroot/freebios/freebios/src/cpu/p6/earlymtrr.inc,v
retrieving revision 1.4
diff -u -r1.4 earlymtrr.inc

--- earlymtrr.inc	8 Aug 2001 02:45:09 -0000	1.4
+++ earlymtrr.inc	31 May 2003 14:59:56 -0000
@@ -35,6 +35,22 @@
    movl	$0x06060606, %edx
    movl	$0x06060606, %eax
    wrmsr
+
+#ifdef XIP_LOW
+	/* enable write through cache for 0xf0000-0xfffff*/
+	movl	$MTRRfix4K_F0000_MSR, %ecx
+	rdmsr
+	movl	$0x04040404, %edx
+	movl	$0x04040404, %eax
+	wrmsr
+
+	movl	$MTRRfix4K_F8000_MSR, %ecx
+	rdmsr
+	movl	$0x04040404, %edx
+	movl	$0x04040404, %eax
+	wrmsr
+#endif /* XIP_LOW */
+
 #endif /* MEMORY_HOLE */

 set_var_mtrr:
@@ -56,12 +72,12 @@
    wrmsr

 #if defined(XIP_ROM_SIZE) && defined(XIP_ROM_BASE)
-	/* enable write protect caching so we can do execute in place
+	/* enable write through caching so we can do execute in place
     * on the flash rom.
     */
    movl	$0x202, %ecx
    xorl	%edx, %edx
-	movl	$(XIP_ROM_BASE | 0x005), %eax
+	movl	$(XIP_ROM_BASE | 0x004), %eax
    wrmsr	

    movl	$0x203, %ecx

    