Patch merged into coreboot/master: c593fc8 Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26 - coreboot

7 Nov 2011


      the following patch was just integrated into master:
commit c593fc823a5a2bc3de327fea5f1d44cfec8aec15
Author: Florian Zumbiehl florz@florz.de
Date:   Tue Nov 1 20:17:12 2011 +0100
Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26
Change-Id: Ic77854130ad43715daa7c0eb462291db48df9f84
    Signed-off-by: Florian Zumbiehl florz@florz.de
Reviewed-By: Patrick Georgi patrick@georgi-clan.de at Mon Nov  7 11:40:55 2011, giving +2
See http://review.coreboot.org/370 for details.
-gerrit