On Thu, Jun 18, 2009 at 01:05:40PM +0100, Harrison, Jon (SELEX GALILEO, UK) wrote:
I didn't mean to suggest that there is anything wroung with flashrom itself, there is either some issue with reading the coreboot tables from the coreboot flash after booting from the stock flash (which I have to do all of the time at the moment) or my coreboot image is broken in some way ... I've not had the hex editor out (yet) as I'm working more on getting the initial CN400 work done and personally I am quite happy with having to -m at this stage of development.
I was keener to get the flashrom functionality that does work out there, so that there is a minimum level of functionality available for anyone else out there that wants to start contributing to the development effort on this MB.
Of course this may all turn to be linked ..........
On Thu, Jun 18, 2009 at 11:36:49AM +0100, Harrison, Jon (SELEX GALILEO, UK) wrote:
Auto detection doesn't seem to be working properly and at this stage
I'm
breaking things so much that the -m switch is necessary for reliable operation.
Why doesn't it seem to work properly?
Luc Verhaegen.
Ok. communication error here.
You will only have the coreboot tables when coreboot has succesfully booted and your config has USE_OPTION_TABLE.
But... like with many of the other epia boards, you will never disable rom access from coreboot and therefor flashrom does not need to enable specifically for this board.
So:
* original bios has an extra write disable, but also has subsystem ids. here flashrom should use the subsystem ids to autodetect this board. * coreboot, from reset, should not touch set the board specific disable. So flashrom doesn't need to know or touch this. * when coreboot is ran after the normal bios, the subsystem ids usually still are there, and so is the write protection (if you're plugging chips). Flashrom then should still autodetect through subsystem ids still.
So, do you really need flashrom to run the board specific enable when you've booted coreboot? If not, remove the coreboot ids, and also make it impossible for people to randomly try board enables (through the command line) and accidentally hit this code.
I am quite happy with the rest of the code though.
Luc Verhaegen.
Received and understood, then the basic issue is that at this point my coreboot build is still broken and will not boot, so there are no tables. (I had not realised the tables were read from RAM rather than the ROM image)
The upshot is that the flashrom ids are required to allow development from the original bios.... for the time being.
Once the build is booting properly and flashrom can autodetect I will remove the ids. In the mean time I'm hoping that having this early flashrom support will help others to help in the effort for the CN400/epia-n(l)/Luke.
If this is still all to immature for general release then fair enough, it can wait until things are working better.
Thanks, Jon -----Original Message----- From: Luc Verhaegen [mailto:libv@skynet.be] Sent: 19 June 2009 11:32 To: Harrison, Jon (SELEX GALILEO, UK) Cc: coreboot@coreboot.org Subject: Re: [coreboot] Flashrom support for EPIA-N(L) - patch for review
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On Thu, Jun 18, 2009 at 01:05:40PM +0100, Harrison, Jon (SELEX GALILEO, UK) wrote:
I didn't mean to suggest that there is anything wroung with flashrom itself, there is either some issue with reading the coreboot tables
from
the coreboot flash after booting from the stock flash (which I have to do all of the time at the moment) or my coreboot image is broken in
some
way ... I've not had the hex editor out (yet) as I'm working more on getting the initial CN400 work done and personally I am quite happy
with
having to -m at this stage of development.
I was keener to get the flashrom functionality that does work out
there,
so that there is a minimum level of functionality available for anyone else out there that wants to start contributing to the development effort on this MB.
Of course this may all turn to be linked ..........
On Thu, Jun 18, 2009 at 11:36:49AM +0100, Harrison, Jon (SELEX
GALILEO,
UK) wrote:
Auto detection doesn't seem to be working properly and at this stage
I'm
breaking things so much that the -m switch is necessary for reliable operation.
Why doesn't it seem to work properly?
Luc Verhaegen.
Ok. communication error here.
You will only have the coreboot tables when coreboot has succesfully booted and your config has USE_OPTION_TABLE.
But... like with many of the other epia boards, you will never disable rom access from coreboot and therefor flashrom does not need to enable specifically for this board.
So:
* original bios has an extra write disable, but also has subsystem ids. here flashrom should use the subsystem ids to autodetect this board. * coreboot, from reset, should not touch set the board specific disable. So flashrom doesn't need to know or touch this. * when coreboot is ran after the normal bios, the subsystem ids usually still are there, and so is the write protection (if you're plugging chips). Flashrom then should still autodetect through subsystem ids still.
So, do you really need flashrom to run the board specific enable when you've booted coreboot? If not, remove the coreboot ids, and also make it impossible for people to randomly try board enables (through the command line) and accidentally hit this code.
I am quite happy with the rest of the code though.
Luc Verhaegen.
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Harrison, Jon (SELEX GALILEO, UK) -
Luc Verhaegen