Patch set updated for coreboot: 4bc5005 samsung/exynos5: add resource functions for the display port

[Ronald G. Minnich]

Ronald G. Minnich ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2615

-gerrit

commit 4bc5005618d0cd05a82d7f74464b34ba2dc87201
Author: Ronald G. Minnich 
Date:   Mon Mar 18 09:49:54 2013 -0700

samsung/exynos5: add resource functions for the display port

Not working, seemingly, but we need to add a 4M resource for
    memory, and it seems it needs to be fixed at the address shown.
    This address was chosen from current hardware.

The pnp device in the displayport is really hokey. We're going to
    have to create a new kind of device, maybe called 'hardwired', or
    something, to allow us to wire down devices we know are there without
    probing. Discussion on IRC implies this is the direction we need to go.

Change-Id: Ied65a554f833566be817540702f79a02e7b6cb6e
    Signed-off-by: Ronald G. Minnich 
---
 .../exynos5-common/displayport/displayport.c       | 41 +++++++++++++++++---
 src/mainboard/google/snow/devicetree.cb            | 45 ++++++++++++----------
 2 files changed, 60 insertions(+), 26 deletions(-)

diff --git a/src/cpu/samsung/exynos5-common/displayport/displayport.c b/src/cpu/samsung/exynos5-common/displayport/displayport.c
index 1c08bc7..1da339b 100644
--- a/src/cpu/samsung/exynos5-common/displayport/displayport.c
+++ b/src/cpu/samsung/exynos5-common/displayport/displayport.c
@@ -19,6 +19,7 @@

#include <stdlib.h>
 #include <string.h>
+#include <stddef.h>
 #include <delay.h>
 #include <arch/io.h>
 #include <device/device.h>
@@ -83,22 +84,52 @@ static void exynos_displayport_init(void)
 #endif
 }

-static void exynos_displayport_noop(device_t dummy)
+static void exynos_displayport_read_resources(device_t dev)
 {
+	struct cpu_samsung_exynos5_common_displayport_config *conf = dev->chip_info;
+        struct resource *resource;
+	printk(BIOS_SPEW, "%s: dev %p\n", __func__, dev);
+	/* claim a resource for the UMA graphics.
+	 * Follow the current convention of starting at 24M
+	 * from the start.
+	 */
+	resource = new_resource(dev, 0);
+	/* this is a hardcode for now. There's some real confusion about what it
+	 * needs to be, docs are not helping, and hardware on real systems
+	 * has settings we don't understand. FIXME.
+	 */
+	resource->base = 0x20000000 + 24*MiB;
+	resource->size = conf->xres * conf->yres * 4; /* 4 bytes per pixel for RGB */
+	resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+	printk(BIOS_DEBUG, "Adding graphics at %p, size %08lx\n", (void *)resource->base, resource->size);
+}
+
+static void exynos_displayport_set_resources(device_t dev)
+{
+	printk(BIOS_SPEW, "%s: dev %p\n", __function__, dev);
+}
+
+static void exynos_displayport_enable_resources(device_t dev)
+{
+	printk(BIOS_SPEW, "%s: dev %p\n", __function__, dev);
 }

static struct device_operations exynos_displayport_operations  = {
-	.read_resources   = exynos_displayport_noop,
-	.set_resources    = exynos_displayport_noop,
-	.enable_resources = exynos_displayport_noop,
+	.read_resources   = exynos_displayport_read_resources,
+	.set_resources    = exynos_displayport_set_resources,
+	.enable_resources = exynos_displayport_enable_resources,
    .init		  = exynos_displayport_init,
    .scan_bus	  = exynos_displayport_noop,
 };

static void exynos_displayport_enable(struct device *dev)
 {
-	if (dev->link_list != NULL)
+	printk(BIOS_SPEW, "%s: ", __function__);
+	if (dev->link_list != NULL){
+		printk(BIOS_SPEW, "set ops");
    	dev->ops = &exynos_displayport_operations;
+	}
+	printk(BIOS_SPEW, "\n");
 }

struct chip_operations drivers_i2c_exynos_displayport_ops = {
diff --git a/src/mainboard/google/snow/devicetree.cb b/src/mainboard/google/snow/devicetree.cb
index 5ad786e..b48ae97 100644
--- a/src/mainboard/google/snow/devicetree.cb
+++ b/src/mainboard/google/snow/devicetree.cb
@@ -20,27 +20,30 @@
 # FIXME: this is just a stub for now
 chip cpu/samsung/exynos5250

-device cpu_cluster 0 on
-end
+	device cpu_cluster 0 on
+
+		device domain 0 on
+			chip drivers/generic/generic # I2C0 controller
+				device i2c 6 on end # ?
+				device i2c 9 on end # ?
+			end
+			chip cpu/samsung/exynos5-common/displayport
+				device pnp 0 on end
+				register "xres" = "1366"
+				register "yres" = "768"
+				register "bpp" = "16"
+				# complex magic timing!
+				register "clkval_f" = "2"
+				register "upper_margin" = "14"
+				register "lower_margin" = "3"
+				register "vsync" = "5"
+				register "left_margin" = "80"
+				register "right_margin" = "48"
+				register "hsync" = "32"
+				register "lcdbase" = "0x10000000"
+			end
+		end

-device domain 0 on
-	chip drivers/generic/generic # I2C0 controller
-		device i2c 6 on end # ?
-		device i2c 9 on end # ?
-	end
-	chip cpu/samsung/exynos5-common/displayport
-		register "xres" = "1366"
-		register "yres" = "768"
-		register "bpp" = "16"
-		# complex magic timing!
-		register "clkval_f" = "2"
-		register "upper_margin" = "14"
-		register "lower_margin" = "3"
-		register "vsync" = "5"
-		register "left_margin" = "80"
-		register "right_margin" = "48"
-		register "hsync" = "32"
-		register "lcdbase" = "0x10000000"
    end
-end
+
 end