Attached is a patch that implements coreboot on the above motherboard, this board has variants NF550-M2/G and NF570 SLI-M2/G. This board uses an identical chip set as the Gigabyte M57SLI, so this patch is trivial technically, as all the work has been done by the Gigabyte team. Other than changing strings gigabyte to dfi, and m57sli to nf570, all I have done is swap two interrupts in mptable.c.
The motherboard has a socketed BIOS chip so it needs no modification,
Comments have been added to the files explaining what has been done.
Signed-off-by: Chris Lingard chris@stockwith.co.uk Build and tested on a DFI NF570-M2/G
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I am continuing looking at coreboot on this machine, but have a lot of catching up to do,
Should this be acceptable, I would like to set up the documentation and tutorial for this; because it is almost a foolproof way for new people to get involved.
Chris Lingard
Index: src/mainboard/dfi/nf570/Config.lb =================================================================== --- src/mainboard/dfi/nf570/Config.lb (revision 0) +++ src/mainboard/dfi/nf570/Config.lb (revision 0) @@ -0,0 +1,433 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@amd.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +if USE_FAILOVER_IMAGE + default ROM_SECTION_SIZE = FAILOVER_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) +else + if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + default ROM_SECTION_OFFSET = 0 + end +end + +## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + +## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) + +## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE=65536 + +if USE_FAILOVER_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) +else + if USE_FALLBACK_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) + else + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) + end +end + +arch i386 end + +## +## Build the objects we have code for in this directory. +## + +driver mainboard.o +#needed by irq_tables and mptable and acpi_tables +object get_bus_conf.o + +if HAVE_MP_TABLE object mptable.o end +if HAVE_PIRQ_TABLE object irq_tables.o end +#object reset.o +if USE_DCACHE_RAM + + if CONFIG_USE_INIT + makerule ./cache_as_ram_auto.o + depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h" + action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@" + end + else + makerule ./cache_as_ram_auto.inc + depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h" + action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@" + action "perl -e 's/.rodata/.rom.data/g' -pi $@" + action "perl -e 's/.text/.section .rom.text/g' -pi $@" + end + end + +end + +if USE_FAILOVER_IMAGE +else + if CONFIG_AP_CODE_IN_CAR + makerule ./apc_auto.o + depends "$(MAINBOARD)/apc_auto.c option_table.h" + action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/apc_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@" + end + ldscript /arch/i386/init/ldscript_apc.lb + end +end + + +## +## Build our 16 bit and 32 bit coreboot entry code +## +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + mainboardinit cpu/x86/16bit/entry16.inc + ldscript /cpu/x86/16bit/entry16.lds + end +else + if USE_FALLBACK_IMAGE + mainboardinit cpu/x86/16bit/entry16.inc + ldscript /cpu/x86/16bit/entry16.lds + end +end + +mainboardinit cpu/x86/32bit/entry32.inc + +if USE_DCACHE_RAM + if CONFIG_USE_INIT + ldscript /cpu/x86/32bit/entry32.lds + end + + if CONFIG_USE_INIT + ldscript /cpu/amd/car/cache_as_ram.lds + end +end + + +## +## Build our reset vector (This is where coreboot is entered) +## +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds + else + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds + end +else + if USE_FALLBACK_IMAGE + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds + else + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds + end +end + +## +## Include an id string (For safe flashing) +## +mainboardinit southbridge/nvidia/mcp55/id.inc +ldscript /southbridge/nvidia/mcp55/id.lds + +## +## ROMSTRAP table for MCP55 +## +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + mainboardinit southbridge/nvidia/mcp55/romstrap.inc + ldscript /southbridge/nvidia/mcp55/romstrap.lds + end +else + if USE_FALLBACK_IMAGE + mainboardinit southbridge/nvidia/mcp55/romstrap.inc + ldscript /southbridge/nvidia/mcp55/romstrap.lds + end +end + +if USE_DCACHE_RAM + ## + ## Setup Cache-As-Ram + ## + mainboardinit cpu/amd/car/cache_as_ram.inc +end + +### +### This is the early phase of coreboot startup +### Things are delicate and we test to see if we should +### failover to another image. +### +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + if USE_DCACHE_RAM + ldscript /arch/i386/lib/failover_failover.lds + end + end +else + if USE_FALLBACK_IMAGE + if USE_DCACHE_RAM + ldscript /arch/i386/lib/failover.lds + end + end +end + +if HAVE_FANCTL + object fanctl.o +end + +## +## Setup RAM +## +if USE_DCACHE_RAM + + if CONFIG_USE_INIT + initobject cache_as_ram_auto.o + else + mainboardinit ./cache_as_ram_auto.inc + end +end + +## +## Include the secondary Configuration files +## +if CONFIG_CHIP_NAME + config chip.h +end + +chip northbridge/amd/amdk8/root_complex + device apic_cluster 0 on + chip cpu/amd/socket_AM2 + device apic 0 on end + end + end + device pci_domain 0 on + chip northbridge/amd/amdk8 #mc0 + device pci 18.0 on + # devices on link 0, link 0 == LDT 0 + chip southbridge/nvidia/mcp55 + device pci 0.0 on end # HT + device pci 1.0 on # LPC + chip superio/ite/it8716f + # Floppy and any LDN + device pnp 2e.0 off + # Watchdog from CLKIN, CLKIN = 24 MHz + irq 0x23 = 0x11 + # Serial Flash (SPI only) + #0x24 = 0x1a + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.2 off # Com2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.3 off # Parallel Port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.4 on # EC + io 0x60 = 0x290 + io 0x62 = 0x230 + irq 0x70 = 9 + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + end + device pnp 2e.6 on # Mouse + irq 0x70 = 12 + end + device pnp 2e.7 on # GPIO, SPI flash + # pin 84 is not GP10 + irq 0x25 = 0x0 + # pin 21 is GP26, pin 26 is GP21, pin 27 is GP20 + irq 0x26 = 0x43 + # pin 13 is GP35 + irq 0x27 = 0x20 + # pin 70 is not GP46 + #irq 0x28 = 0x0 + # pin 6,3,128,127,126 is GP63,64,65,66,67 + irq 0x29 = 0x81 + # Enable FAN_CTL/FAN_TAC set to 5 (pin 21,23), enable FAN_CTL/FAN_TAC set to 4 (pin 20,22), pin 48 is PCIRST5#, pin91 is PCIRSTIN#, VIN7 is internal voltage divider for VCCH5V, pin 95 is ATXPG, VIN3 is internal voltage divider for VCC5V + #irq 0x2c = 0x1f + # Simple I/O base + io 0x62 = 0x800 + # Serial Flash I/O (SPI only) + io 0x64 = 0x820 + # watch dog force timeout (parallel flash only) + #irq 0x71 = 0x1 + # No WDT interrupt + irq 0x72 = 0x0 + # GPIO pin set 1 disable internal pullup + irq 0xb8 = 0x0 + # GPIO pin set 5 enable internal pullup + irq 0xbc = 0x01 + # SIO pin set 1 alternate function + #irq 0xc0 = 0x0 + # SIO pin set 2 mixed function + irq 0xc1 = 0x43 + # SIO pin set 3 mixed function + irq 0xc2 = 0x20 + # SIO pin set 4 alternate function + #irq 0xc3 = 0x0 + # SIO pin set 1 input mode + #irq 0xc8 = 0x0 + # SIO pin set 2 input mode + irq 0xc9 = 0x0 + # SIO pin set 4 input mode + #irq 0xcb = 0x0 + # Generate SMI# on EC IRQ + #irq 0xf0 = 0x10 + # SMI# level trigger + #irq 0xf1 = 0x40 + # HWMON alert beep pin location + irq 0xf6 = 0x28 + end + device pnp 2e.8 off # MIDI + io 0x60 = 0x300 + irq 0x70 = 10 + end + device pnp 2e.9 off # GAME + io 0x60 = 0x220 + end + device pnp 2e.a off end # CIR + end + end + device pci 1.1 on # SM 0 + chip drivers/generic/generic #dimm 0-0-0 + device i2c 50 on end + end + chip drivers/generic/generic #dimm 0-0-1 + device i2c 51 on end + end + chip drivers/generic/generic #dimm 0-1-0 + device i2c 52 on end + end + chip drivers/generic/generic #dimm 0-1-1 + device i2c 53 on end + end + chip drivers/generic/generic #dimm 1-0-0 + device i2c 54 on end + end + chip drivers/generic/generic #dimm 1-0-1 + device i2c 55 on end + end + chip drivers/generic/generic #dimm 1-1-0 + device i2c 56 on end + end + chip drivers/generic/generic #dimm 1-1-1 + device i2c 57 on end + end + end # SM +#WTF?!? We already have device pci 1.1 in the section above + device pci 1.1 on # SM 1 +#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? +# chip drivers/generic/generic #PCIXA Slot1 +# device i2c 50 on end +# end +# chip drivers/generic/generic #PCIXB Slot1 +# device i2c 51 on end +# end +# chip drivers/generic/generic #PCIXB Slot2 +# device i2c 52 on end +# end +# chip drivers/generic/generic #PCI Slot1 +# device i2c 53 on end +# end +# chip drivers/generic/generic #Master MCP55 PCI-E +# device i2c 54 on end +# end +# chip drivers/generic/generic #Slave MCP55 PCI-E +# device i2c 55 on end +# end + chip drivers/generic/generic #MAC EEPROM + device i2c 51 on end + end + + end # SM + device pci 2.0 on end # USB 1.1 + device pci 2.1 on end # USB 2 + device pci 4.0 on end # IDE + device pci 5.0 on end # SATA 0 + device pci 5.1 on end # SATA 1 + device pci 5.2 on end # SATA 2 + device pci 6.0 on end # PCI + device pci 6.1 on end # AZA + device pci 8.0 on end # NIC + device pci 9.0 off end # NIC + device pci a.0 on end # PCI E 5 + device pci b.0 on end # PCI E 4 + device pci c.0 on end # PCI E 3 + device pci d.0 on end # PCI E 2 + device pci e.0 on end # PCI E 1 + device pci f.0 on end # PCI E 0 + register "ide0_enable" = "1" + register "sata0_enable" = "1" + register "sata1_enable" = "1" + register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 + register "mac_eeprom_addr" = "0x51" + end + end # device pci 18.0 + device pci 18.0 on end # Link 1 + device pci 18.0 on end + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + end # mc0 + + end # PCI domain + +# chip drivers/generic/debug +# device pnp 0.0 off end # chip name +# device pnp 0.1 on end # pci_regs_all +# device pnp 0.2 on end # mem +# device pnp 0.3 off end # cpuid +# device pnp 0.4 on end # smbus_regs_all +# device pnp 0.5 off end # dual core msr +# device pnp 0.6 off end # cache size +# device pnp 0.7 off end # tsc +# device pnp 0.8 off end # io +# device pnp 0.9 off end # io +# end +end #root_complex Index: src/mainboard/dfi/nf570/mptable.c =================================================================== --- src/mainboard/dfi/nf570/mptable.c (revision 0) +++ src/mainboard/dfi/nf570/mptable.c (revision 0) @@ -0,0 +1,182 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#include <console/console.h> +#include <arch/smp/mpspec.h> +#include <device/pci.h> +#include <string.h> +#include <stdint.h> + +#include <cpu/amd/amdk8_sysconf.h> +extern unsigned char bus_isa; +extern unsigned char bus_mcp55[8]; //1 + +extern unsigned apicid_mcp55; + +extern unsigned bus_type[256]; + +void *smp_write_config_table(void *v) +{ + static const char sig[4] = "PCMP"; + static const char oem[8] = "DFI"; + static const char productid[12] = "NF570 "; + struct mp_config_table *mc; + unsigned sbdn; + + int i,j; + + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + memset(mc, 0, sizeof(*mc)); + + memcpy(mc->mpc_signature, sig, sizeof(sig)); + mc->mpc_length = sizeof(*mc); /* initially just the header */ + mc->mpc_spec = 0x04; + mc->mpc_checksum = 0; /* not yet computed */ + memcpy(mc->mpc_oem, oem, sizeof(oem)); + memcpy(mc->mpc_productid, productid, sizeof(productid)); + mc->mpc_oemptr = 0; + mc->mpc_oemsize = 0; + mc->mpc_entry_count = 0; /* No entries yet... */ + mc->mpc_lapic = LAPIC_ADDR; + mc->mpe_length = 0; + mc->mpe_checksum = 0; + mc->reserved = 0; + + smp_write_processors(mc); + + get_bus_conf(); + sbdn = sysconf.sbdn; + +/*Bus: Bus ID Type*/ + /* define bus and isa numbers */ + for(j= 0; j < 256 ; j++) { + if(bus_type[j]) + smp_write_bus(mc, j, "PCI "); + } + smp_write_bus(mc, bus_isa, "ISA "); + +/*I/O APICs: APIC ID Version State Address*/ + { + device_t dev; + struct resource *res; + uint32_t dword; + + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_1); + if (res) { + smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base); + } + + dword = 0x43c6c643; + pci_write_config32(dev, 0x7c, dword); + + dword = 0x81001a00; + pci_write_config32(dev, 0x80, dword); + + dword = 0xd0001202; + pci_write_config32(dev, 0x84, dword); + + } + } + + /*I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ + smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0); + +/* ISA ints are edge-triggered, and usually originate from the ISA bus, + * or its remainings. + */ +#define ISA_INT(intr, pin)\ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, (intr), apicid_mcp55, (pin)) + + ISA_INT(1,1); + ISA_INT(0,2); + ISA_INT(3,3); + ISA_INT(4,4); + ISA_INT(6,6); + ISA_INT(7,7); + ISA_INT(8,8); + ISA_INT(12,12); + ISA_INT(13,13); + ISA_INT(14,14); + ISA_INT(15,15); + +/* PCI interrupts are level triggered, and are + * associated with a specific bus/device/function tuple. + */ +#define PCI_INT(bus, dev, fn, pin) \ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\ + bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin)) + + PCI_INT(0,sbdn+1,1, 10); /* SMBus */ + PCI_INT(0,sbdn+2,0, 22); /* USB */ + PCI_INT(0,sbdn+2,1, 23); /* USB */ + PCI_INT(0,sbdn+6,1, 23); /* HD Audio */ + PCI_INT(0,sbdn+5,0, 20); /* SATA */ + PCI_INT(0,sbdn+5,1, 23); /* SATA */ + PCI_INT(0,sbdn+5,2, 22); /* SATA, was 21 in M57SLI */ + + PCI_INT(0,sbdn+8,0, 21); /* GBit Ether, was 22 in M57SLI */ + + /* The PCIe slots, each on its own bus */ + for(j=7; j>=2; j--) { + if(!bus_mcp55[j]) continue; + for(i=0;i<4;i++) { /* map all functions */ + PCI_INT(j,0,i, 16+(1+j+i)%4); + } + } + + /* On bus 1: the physical PCI bus slots... */ + for(j=0; j<2; j++) /* on a Rev 1.x board, they are devs 7 and 8 */ + for(i=0;i<4;i++) { /* map all functions */ + PCI_INT(1,7+j,i, 16+(3+i+j)%4); + } + /* ... and OB FireWire */ + PCI_INT(1,0x0a,0, 18); + +/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ + smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0); + smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1); + /* There is no extension information... */ + + /* Compute the checksums */ + mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); + mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); + printk_debug("Wrote the mp table end at: %p - %p\n", + mc, smp_next_mpe_entry(mc)); + return smp_next_mpe_entry(mc); +} + +unsigned long write_smp_table(unsigned long addr) +{ + void *v; + v = smp_write_floating_table(addr); + return (unsigned long)smp_write_config_table(v); +} Index: src/mainboard/dfi/nf570/irq_tables.c =================================================================== --- src/mainboard/dfi/nf570/irq_tables.c (revision 0) +++ src/mainboard/dfi/nf570/irq_tables.c (revision 0) @@ -0,0 +1,117 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This file was generated by getpir.c, do not modify! + (but if you do, please run checkpir on it to verify) + Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up + + Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM +*/ +#include <console/console.h> +#include <device/pci.h> +#include <string.h> +#include <stdint.h> +#include <arch/pirq_routing.h> + +#include <cpu/amd/amdk8_sysconf.h> + +static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, + uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3, + uint8_t slot, uint8_t rfu) +{ + pirq_info->bus = bus; + pirq_info->devfn = devfn; + pirq_info->irq[0].link = link0; + pirq_info->irq[0].bitmap = bitmap0; + pirq_info->irq[1].link = link1; + pirq_info->irq[1].bitmap = bitmap1; + pirq_info->irq[2].link = link2; + pirq_info->irq[2].bitmap = bitmap2; + pirq_info->irq[3].link = link3; + pirq_info->irq[3].bitmap = bitmap3; + pirq_info->slot = slot; + pirq_info->rfu = rfu; +} +extern unsigned char bus_isa; +extern unsigned char bus_mcp55[8]; //1 + +unsigned long write_pirq_routing_table(unsigned long addr) +{ + + struct irq_routing_table *pirq; + struct irq_info *pirq_info; + unsigned slot_num; + uint8_t *v; + unsigned sbdn; + + uint8_t sum=0; + int i; + + get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c + sbdn = sysconf.sbdn; + + /* Align the table to be 16 byte aligned. */ + addr += 15; + addr &= ~15; + + /* This table must be betweeen 0xf0000 & 0x100000 */ + printk_info("Writing IRQ routing tables to 0x%x...", addr); + + pirq = (void *)(addr); + v = (uint8_t *)(addr); + + pirq->signature = PIRQ_SIGNATURE; + pirq->version = PIRQ_VERSION; + + pirq->rtr_bus = bus_mcp55[0]; + pirq->rtr_devfn = ((sbdn+6)<<3)|0; + + pirq->exclusive_irqs = 0; + + pirq->rtr_vendor = 0x10de; + pirq->rtr_device = 0x0370; + + pirq->miniport_data = 0; + + memset(pirq->rfu, 0, sizeof(pirq->rfu)); + + pirq_info = (void *) ( &pirq->checksum + 1); + slot_num = 0; +//pci bridge + write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); + pirq_info++; slot_num++; + + pirq->size = 32 + 16 * slot_num; + + for (i = 0; i < pirq->size; i++) + sum += v[i]; + + sum = pirq->checksum - sum; + + if (sum != pirq->checksum) { + pirq->checksum = sum; + } + + printk_info("done.\n"); + + return (unsigned long) pirq_info; + +} Index: src/mainboard/dfi/nf570/resourcemap.c =================================================================== --- src/mainboard/dfi/nf570/resourcemap.c (revision 0) +++ src/mainboard/dfi/nf570/resourcemap.c (revision 0) @@ -0,0 +1,292 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +static void setup_mb_resource_map(void) +{ + static const unsigned int register_values[] = { + /* Careful set limit registers before base registers which contain the enables */ + /* DRAM Limit i Registers + * F1:0x44 i = 0 + * F1:0x4C i = 1 + * F1:0x54 i = 2 + * F1:0x5C i = 3 + * F1:0x64 i = 4 + * F1:0x6C i = 5 + * F1:0x74 i = 6 + * F1:0x7C i = 7 + * [ 2: 0] Destination Node ID + * 000 = Node 0 + * 001 = Node 1 + * 010 = Node 2 + * 011 = Node 3 + * 100 = Node 4 + * 101 = Node 5 + * 110 = Node 6 + * 111 = Node 7 + * [ 7: 3] Reserved + * [10: 8] Interleave select + * specifies the values of A[14:12] to use with interleave enable. + * [15:11] Reserved + * [31:16] DRAM Limit Address i Bits 39-24 + * This field defines the upper address bits of a 40 bit address + * that define the end of the DRAM region. + */ + PCI_ADDR(0, 0x18, 1, 0x44), 0x0000f8f8, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x4C), 0x0000f8f8, 0x00000001, + PCI_ADDR(0, 0x18, 1, 0x54), 0x0000f8f8, 0x00000002, + PCI_ADDR(0, 0x18, 1, 0x5C), 0x0000f8f8, 0x00000003, + PCI_ADDR(0, 0x18, 1, 0x64), 0x0000f8f8, 0x00000004, + PCI_ADDR(0, 0x18, 1, 0x6C), 0x0000f8f8, 0x00000005, + PCI_ADDR(0, 0x18, 1, 0x74), 0x0000f8f8, 0x00000006, + PCI_ADDR(0, 0x18, 1, 0x7C), 0x0000f8f8, 0x00000007, + + /* DRAM Base i Registers + * F1:0x40 i = 0 + * F1:0x48 i = 1 + * F1:0x50 i = 2 + * F1:0x58 i = 3 + * F1:0x60 i = 4 + * F1:0x68 i = 5 + * F1:0x70 i = 6 + * F1:0x78 i = 7 + * [ 0: 0] Read Enable + * 0 = Reads Disabled + * 1 = Reads Enabled + * [ 1: 1] Write Enable + * 0 = Writes Disabled + * 1 = Writes Enabled + * [ 7: 2] Reserved + * [10: 8] Interleave Enable + * 000 = No interleave + * 001 = Interleave on A[12] (2 nodes) + * 010 = reserved + * 011 = Interleave on A[12] and A[14] (4 nodes) + * 100 = reserved + * 101 = reserved + * 110 = reserved + * 111 = Interleve on A[12] and A[13] and A[14] (8 nodes) + * [15:11] Reserved + * [13:16] DRAM Base Address i Bits 39-24 + * This field defines the upper address bits of a 40-bit address + * that define the start of the DRAM region. + */ + PCI_ADDR(0, 0x18, 1, 0x40), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x48), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x50), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x58), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x60), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x68), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x70), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x78), 0x0000f8fc, 0x00000000, + + /* Memory-Mapped I/O Limit i Registers + * F1:0x84 i = 0 + * F1:0x8C i = 1 + * F1:0x94 i = 2 + * F1:0x9C i = 3 + * F1:0xA4 i = 4 + * F1:0xAC i = 5 + * F1:0xB4 i = 6 + * F1:0xBC i = 7 + * [ 2: 0] Destination Node ID + * 000 = Node 0 + * 001 = Node 1 + * 010 = Node 2 + * 011 = Node 3 + * 100 = Node 4 + * 101 = Node 5 + * 110 = Node 6 + * 111 = Node 7 + * [ 3: 3] Reserved + * [ 5: 4] Destination Link ID + * 00 = Link 0 + * 01 = Link 1 + * 10 = Link 2 + * 11 = Reserved + * [ 6: 6] Reserved + * [ 7: 7] Non-Posted + * 0 = CPU writes may be posted + * 1 = CPU writes must be non-posted + * [31: 8] Memory-Mapped I/O Limit Address i (39-16) + * This field defines the upp adddress bits of a 40-bit address that + * defines the end of a memory-mapped I/O region n + */ + PCI_ADDR(0, 0x18, 1, 0x84), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x8C), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x94), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x9C), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000, +// PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00, + + /* Memory-Mapped I/O Base i Registers + * F1:0x80 i = 0 + * F1:0x88 i = 1 + * F1:0x90 i = 2 + * F1:0x98 i = 3 + * F1:0xA0 i = 4 + * F1:0xA8 i = 5 + * F1:0xB0 i = 6 + * F1:0xB8 i = 7 + * [ 0: 0] Read Enable + * 0 = Reads disabled + * 1 = Reads Enabled + * [ 1: 1] Write Enable + * 0 = Writes disabled + * 1 = Writes Enabled + * [ 2: 2] Cpu Disable + * 0 = Cpu can use this I/O range + * 1 = Cpu requests do not use this I/O range + * [ 3: 3] Lock + * 0 = base/limit registers i are read/write + * 1 = base/limit registers i are read-only + * [ 7: 4] Reserved + * [31: 8] Memory-Mapped I/O Base Address i (39-16) + * This field defines the upper address bits of a 40bit address + * that defines the start of memory-mapped I/O region i + */ + PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x88), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x90), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x98), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xA0), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xA8), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xB0), 0x000000f0, 0x00000000, +// PCI_ADDR(0, 0x18, 1, 0xB8), 0x000000f0, 0x00fc0003, + + /* PCI I/O Limit i Registers + * F1:0xC4 i = 0 + * F1:0xCC i = 1 + * F1:0xD4 i = 2 + * F1:0xDC i = 3 + * [ 2: 0] Destination Node ID + * 000 = Node 0 + * 001 = Node 1 + * 010 = Node 2 + * 011 = Node 3 + * 100 = Node 4 + * 101 = Node 5 + * 110 = Node 6 + * 111 = Node 7 + * [ 3: 3] Reserved + * [ 5: 4] Destination Link ID + * 00 = Link 0 + * 01 = Link 1 + * 10 = Link 2 + * 11 = reserved + * [11: 6] Reserved + * [24:12] PCI I/O Limit Address i + * This field defines the end of PCI I/O region n + * [31:25] Reserved + */ +// PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000, + PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000, + + /* PCI I/O Base i Registers + * F1:0xC0 i = 0 + * F1:0xC8 i = 1 + * F1:0xD0 i = 2 + * F1:0xD8 i = 3 + * [ 0: 0] Read Enable + * 0 = Reads Disabled + * 1 = Reads Enabled + * [ 1: 1] Write Enable + * 0 = Writes Disabled + * 1 = Writes Enabled + * [ 3: 2] Reserved + * [ 4: 4] VGA Enable + * 0 = VGA matches Disabled + * 1 = matches all address < 64K and where A[9:0] is in the + * range 3B0-3BB or 3C0-3DF independen of the base & limit registers + * [ 5: 5] ISA Enable + * 0 = ISA matches Disabled + * 1 = Blocks address < 64K and in the last 768 bytes of eack 1K block + * from matching agains this base/limit pair + * [11: 6] Reserved + * [24:12] PCI I/O Base i + * This field defines the start of PCI I/O region n + * [31:25] Reserved + */ +// PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033, + PCI_ADDR(0, 0x18, 1, 0xC8), 0xFE000FCC, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xD0), 0xFE000FCC, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xD8), 0xFE000FCC, 0x00000000, + + /* Config Base and Limit i Registers + * F1:0xE0 i = 0 + * F1:0xE4 i = 1 + * F1:0xE8 i = 2 + * F1:0xEC i = 3 + * [ 0: 0] Read Enable + * 0 = Reads Disabled + * 1 = Reads Enabled + * [ 1: 1] Write Enable + * 0 = Writes Disabled + * 1 = Writes Enabled + * [ 2: 2] Device Number Compare Enable + * 0 = The ranges are based on bus number + * 1 = The ranges are ranges of devices on bus 0 + * [ 3: 3] Reserved + * [ 6: 4] Destination Node + * 000 = Node 0 + * 001 = Node 1 + * 010 = Node 2 + * 011 = Node 3 + * 100 = Node 4 + * 101 = Node 5 + * 110 = Node 6 + * 111 = Node 7 + * [ 7: 7] Reserved + * [ 9: 8] Destination Link + * 00 = Link 0 + * 01 = Link 1 + * 10 = Link 2 + * 11 - Reserved + * [15:10] Reserved + * [23:16] Bus Number Base i + * This field defines the lowest bus number in configuration region i + * [31:24] Bus Number Limit i + * This field defines the highest bus number in configuration region i + */ +// PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */ + PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, + + }; + + int max; + max = ARRAY_SIZE(register_values); + setup_resource_map(register_values, max); +} + Index: src/mainboard/dfi/nf570/Options.lb =================================================================== --- src/mainboard/dfi/nf570/Options.lb (revision 0) +++ src/mainboard/dfi/nf570/Options.lb (revision 0) @@ -0,0 +1,362 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@amd.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +uses HAVE_MP_TABLE +uses HAVE_PIRQ_TABLE +uses HAVE_ACPI_TABLES +uses ACPI_SSDTX_NUM +uses USE_FALLBACK_IMAGE +uses USE_FAILOVER_IMAGE +uses HAVE_FALLBACK_BOOT +uses HAVE_FAILOVER_BOOT +uses HAVE_HARD_RESET +uses IRQ_SLOT_COUNT +uses HAVE_OPTION_TABLE +uses CONFIG_MAX_CPUS +uses CONFIG_MAX_PHYSICAL_CPUS +uses CONFIG_LOGICAL_CPUS +uses CONFIG_IOAPIC +uses CONFIG_SMP +uses FALLBACK_SIZE +uses FAILOVER_SIZE +uses ROM_SIZE +uses ROM_SECTION_SIZE +uses ROM_IMAGE_SIZE +uses ROM_SECTION_SIZE +uses ROM_SECTION_OFFSET +uses CONFIG_ROM_PAYLOAD +uses CONFIG_ROM_PAYLOAD_START +uses CONFIG_COMPRESSED_PAYLOAD_NRV2B +uses CONFIG_COMPRESSED_PAYLOAD_LZMA +uses CONFIG_PRECOMPRESSED_PAYLOAD +uses PAYLOAD_SIZE +uses _ROMBASE +uses XIP_ROM_SIZE +uses XIP_ROM_BASE +uses STACK_SIZE +uses HEAP_SIZE +uses USE_OPTION_TABLE +uses LB_CKS_RANGE_START +uses LB_CKS_RANGE_END +uses LB_CKS_LOC +uses MAINBOARD_PART_NUMBER +uses MAINBOARD_VENDOR +uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +uses COREBOOT_EXTRA_VERSION +uses _RAMBASE +uses TTYS0_BAUD +uses TTYS0_BASE +uses TTYS0_LCS +uses DEFAULT_CONSOLE_LOGLEVEL +uses MAXIMUM_CONSOLE_LOGLEVEL +uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL +uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB +uses CONFIG_GDB_STUB +uses CROSS_COMPILE +uses CC +uses HOSTCC +uses OBJCOPY +uses CONFIG_CHIP_NAME +uses CONFIG_CONSOLE_VGA +uses CONFIG_USBDEBUG_DIRECT +uses CONFIG_PCI_ROM_RUN +uses HW_MEM_HOLE_SIZEK +uses HW_MEM_HOLE_SIZE_AUTO_INC +uses K8_HT_FREQ_1G_SUPPORT + +uses HT_CHAIN_UNITID_BASE +uses HT_CHAIN_END_UNITID_BASE +uses SB_HT_CHAIN_ON_BUS0 +uses SB_HT_CHAIN_UNITID_OFFSET_ONLY + +uses USE_DCACHE_RAM +uses DCACHE_RAM_BASE +uses DCACHE_RAM_SIZE +uses DCACHE_RAM_GLOBAL_VAR_SIZE +uses CONFIG_USE_INIT + +uses SERIAL_CPU_INIT + +uses ENABLE_APIC_EXT_ID +uses APIC_ID_OFFSET +uses LIFT_BSP_APIC_ID + +uses CONFIG_PCI_64BIT_PREF_MEM + +uses CONFIG_LB_MEM_TOPK + +uses CONFIG_AP_CODE_IN_CAR + +uses MEM_TRAIN_SEQ + +uses WAIT_BEFORE_CPUS_INIT + +uses CONFIG_USE_PRINTK_IN_CAR + +uses HAVE_FANCTL +### +### Build options +### + +## +## ROM_SIZE is the size of boot ROM that this board will use. +## +default ROM_SIZE=524288 +#default ROM_SIZE=0x100000 + +## +## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use +## +#default FALLBACK_SIZE=131072 +#default FALLBACK_SIZE=0x40000 + +#FALLBACK: 256K-4K +default FALLBACK_SIZE=0x3f000 +#FAILOVER: 4K +default FAILOVER_SIZE=0x01000 + +#more 1M for pgtbl +default CONFIG_LB_MEM_TOPK=2048 + +## +## Set-up automatic fan control +## +default HAVE_FANCTL=1 + +## +## Build code for the fallback boot +## +default HAVE_FALLBACK_BOOT=1 +default HAVE_FAILOVER_BOOT=1 + +## +## Build code to reset the motherboard from coreboot +## +default HAVE_HARD_RESET=1 + +## +## Build code to export a programmable irq routing table +## +default HAVE_PIRQ_TABLE=1 +default IRQ_SLOT_COUNT=11 + +## +## Build code to export an x86 MP table +## Useful for specifying IRQ routing values +## +default HAVE_MP_TABLE=1 + +## ACPI tables will be included +default HAVE_ACPI_TABLES=0 + +## +## Build code to export a CMOS option table +## +default HAVE_OPTION_TABLE=1 + +## +## Move the default coreboot cmos range off of AMD RTC registers +## +default LB_CKS_RANGE_START=49 +default LB_CKS_RANGE_END=122 +default LB_CKS_LOC=123 + +## +## Build code for SMP support +## Only worry about 2 micro processors +## +default CONFIG_SMP=1 +default CONFIG_MAX_CPUS=2 +default CONFIG_MAX_PHYSICAL_CPUS=1 +default CONFIG_LOGICAL_CPUS=1 + +#default SERIAL_CPU_INIT=0 + +default ENABLE_APIC_EXT_ID=0 +default APIC_ID_OFFSET=0x10 +default LIFT_BSP_APIC_ID=1 + +#CHIP_NAME ? +default CONFIG_CHIP_NAME=1 + +#memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. +#2G +#default HW_MEM_HOLE_SIZEK=0x200000 +#1G +default HW_MEM_HOLE_SIZEK=0x100000 +#512M +#default HW_MEM_HOLE_SIZEK=0x80000 + +#make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy +#default HW_MEM_HOLE_SIZE_AUTO_INC=1 + +#Opteron K8 1G HT Support +default K8_HT_FREQ_1G_SUPPORT=1 + +#VGA Console +default CONFIG_CONSOLE_VGA=1 +default CONFIG_PCI_ROM_RUN=1 + +#default CONFIG_USBDEBUG_DIRECT=1 + +#HT Unit ID offset, default is 1, the typical one, 0 mean only one HT device +default HT_CHAIN_UNITID_BASE=0 + +#real SB Unit ID, default is 0x20, mean dont touch it at last +#default HT_CHAIN_END_UNITID_BASE=0x6 + +#make the SB HT chain on bus 0, default is not (0) +default SB_HT_CHAIN_ON_BUS0=2 + +#only offset for SB chain?, default is yes(1) +default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0 + +#allow capable device use that above 4G +#default CONFIG_PCI_64BIT_PREF_MEM=1 + +## +## enable CACHE_AS_RAM specifics +## +default USE_DCACHE_RAM=1 +default DCACHE_RAM_BASE=0xc8000 +default DCACHE_RAM_SIZE=0x08000 +default DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000 +default CONFIG_USE_INIT=0 + +default CONFIG_AP_CODE_IN_CAR=0 +default MEM_TRAIN_SEQ=2 +default WAIT_BEFORE_CPUS_INIT=0 + +## +## Build code to setup a generic IOAPIC +## +default CONFIG_IOAPIC=1 + +## +## Clean up the motherboard id strings +## +default MAINBOARD_PART_NUMBER="nf570" +default MAINBOARD_VENDOR="DFI" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80 + +### +### coreboot layout values +### + +## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. +default ROM_IMAGE_SIZE = 65536 + +## +## Use a small 8K stack +## +default STACK_SIZE=0x2000 + +## +## Use a small 32K heap +## +default HEAP_SIZE=0x8000 + +## +## Only use the option table in a normal image +## +default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE ) + +## +## Coreboot C code runs at this location in RAM +## +default _RAMBASE=0x00100000 + +## +## Load the payload from the ROM +## +default CONFIG_ROM_PAYLOAD = 1 + +#default CONFIG_COMPRESSED_PAYLOAD_NRV2B = 1 + +### +### Defaults of options that you may want to override in the target config file +### + +## +## The default compiler +## +default CC="$(CROSS_COMPILE)gcc -m32" +default HOSTCC="gcc" + +## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## +## The Serial Console +## +default CONFIG_USE_PRINTK_IN_CAR=1 + +# To Enable the Serial Console +default CONFIG_CONSOLE_SERIAL8250=1 + +## Select the serial console baud rate +default TTYS0_BAUD=115200 +#default TTYS0_BAUD=57600 +#default TTYS0_BAUD=38400 +#default TTYS0_BAUD=19200 +#default TTYS0_BAUD=9600 +#default TTYS0_BAUD=4800 +#default TTYS0_BAUD=2400 +#default TTYS0_BAUD=1200 + +# Select the serial console base port +default TTYS0_BASE=0x3f8 + +# Select the serial protocol +# This defaults to 8 data bits, 1 stop bit, and no parity +default TTYS0_LCS=0x3 + +## +### Select the coreboot loglevel +## +## EMERG 1 system is unusable +## ALERT 2 action must be taken immediately +## CRIT 3 critical conditions +## ERR 4 error conditions +## WARNING 5 warning conditions +## NOTICE 6 normal but significant condition +## INFO 7 informational +## DEBUG 8 debug-level messages +## SPEW 9 Way too many details + +## Request this level of debugging output +default DEFAULT_CONSOLE_LOGLEVEL=8 +## At a maximum only compile in this level of debugging +default MAXIMUM_CONSOLE_LOGLEVEL=8 + +## +## Select power on after power fail setting +default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" + +### End Options.lb +end Index: src/mainboard/dfi/nf570/fanctl.c =================================================================== --- src/mainboard/dfi/nf570/fanctl.c (revision 0) +++ src/mainboard/dfi/nf570/fanctl.c (revision 0) @@ -0,0 +1,91 @@ + + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#include <arch/io.h> +#include <stdlib.h> + +static void write_index(uint16_t port_base, uint8_t reg, uint8_t value) +{ + outb(reg, port_base); + outb(value, port_base + 1); +} + +static const struct { + uint8_t index, value; +} sequence[]= { + /* Make sure we can monitor, and enable SMI# interrupt output */ + { 0x00, 0x13}, + /* Disable fan interrupt status bits for SMI# */ + { 0x04, 0x37}, + /* Disable VIN interrupt status bits for SMI# */ + { 0x05, 0xff}, + /* Disable fan interrupt status bits for IRQ */ + { 0x07, 0x37}, + /* Disable VIN interrupt status bits for IRQ */ + { 0x08, 0xff}, + /* Disable external sensor interrupt */ + { 0x09, 0x87}, + /* Enable 16 bit counter divisors */ + { 0x0c, 0x07}, + /* Set FAN_CTL control register (0x14) polarity to high, and + activate fans 1, 2 and 3. */ + { 0x14, 0xd7}, + /* set the correct sensor types 1,2 thermistor; 3 diode */ + { 0x51, 0x1c}, + /* set the 'zero' voltage for diode type sensor 3 */ + { 0x5c, 0x80}, +// { 0x56, 0xe5}, +// { 0x57, 0xe5}, + { 0x59, 0xec}, + { 0x5c, 0x00}, + /* fan1 (controlled by temp3) control parameters */ + /* fan off limit */ + { 0x60, 0xff}, + /* fan start limit */ + { 0x61, 0x14}, + /* ???? */ +// { 0x62, 0x00}, + /* start PWM */ + { 0x63, 0x27}, + /* smooth and slope PWM */ + { 0x64, 0x90}, + /* direct-down and interval */ + { 0x65, 0x03}, + /* temperature limit of fan stop for fan3 (automatic) */ + { 0x70, 0xff}, + /* temperature limit of fan start for fan3 (automatic) */ + { 0x71, 0x14}, + /* Set PWM start & slope for fan3 */ + { 0x73, 0x20}, + /* Initialize PWM automatic mode slope values for fan3 */ + { 0x74, 0x90}, + /* set smartguardian temperature interval for fan3 */ + { 0x75, 0x03}, + /* fan1 auto controlled by temp3 */ + { 0x15, 0x82}, + /* fan2 auto controlled by temp3 */ + { 0x16, 0x82}, + /* fan3 auto controlled by temp3 */ + { 0x17, 0x82}, + /* all fans enable, fan1 ctl smart */ + { 0x13, 0x77} +}; + +/* + * Called from superio.c + */ +void init_ec(uint16_t base) +{ + int i; + for (i=0; i<ARRAY_SIZE(sequence); i++) { + write_index(base, sequence[i].index, sequence[i].value); + } +} Index: src/mainboard/dfi/nf570/chip.h =================================================================== --- src/mainboard/dfi/nf570/chip.h (revision 0) +++ src/mainboard/dfi/nf570/chip.h (revision 0) @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +extern struct chip_operations mainboard_dfi_nf570_ops; + +struct mainboard_dfi_nf570_config { +// int fixup_scsi; +// int fixup_vga; +}; Index: src/mainboard/dfi/nf570/apc_auto.c =================================================================== --- src/mainboard/dfi/nf570/apc_auto.c (revision 0) +++ src/mainboard/dfi/nf570/apc_auto.c (revision 0) @@ -0,0 +1,139 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#define ASSEMBLY 1 +#define __ROMCC__ + +#define RAMINIT_SYSINFO 1 +#define CACHE_AS_RAM_ADDRESS_DEBUG 0 + +#define SET_NB_CFG_54 1 + +//used by raminit +#define QRANK_DIMM_SUPPORT 1 + +#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 + +#include <stdint.h> +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <arch/io.h> +#include <device/pnp_def.h> +#include <arch/romcc_io.h> +#include <cpu/x86/lapic.h> +#include "option_table.h" +#include "pc80/mc146818rtc_early.c" +#include "pc80/serial.c" + +#if CONFIG_USE_INIT == 0 + #include "lib/memcpy.c" +#endif + +#include "arch/i386/lib/console.c" + +#if 0 +static void post_code(uint8_t value) { +#if 1 + int i; + for(i=0;i<0x80000;i++) { + outb(value, 0x80); + } +#endif +} +#endif + +#include <cpu/amd/model_fxx_rev.h> +#include "northbridge/amd/amdk8/raminit.h" +#include "cpu/amd/model_fxx/apic_timer.c" + +#include "lib/delay.c" + +//#include "cpu/x86/lapic/boot_cpu.c" +#include "northbridge/amd/amdk8/reset_test.c" + +#include "northbridge/amd/amdk8/debug.c" + +#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" + +#include "northbridge/amd/amdk8/amdk8_f.h" + +#include "cpu/x86/mtrr.h" +#include "cpu/amd/mtrr.h" +#include "cpu/x86/tsc.h" + +#include "northbridge/amd/amdk8/amdk8_f_pci.c" +#include "northbridge/amd/amdk8/raminit_f_dqs.c" + +#include "cpu/amd/dualcore/dualcore.c" + +void hardwaremain(int ret_addr) +{ + struct sys_info *sysinfo = (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE + struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM + + struct node_core_id id; + + id = get_node_core_id_x(); + + //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + + train_ram(id.nodeid, sysinfo, sysinfox); + + /* + go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp + */ + + __asm__ volatile ( + "movl %0, %%edi\n\t" + "jmp *%%edi\n\t" + :: "a"(ret_addr) + ); + + + +} +struct eregs { + uint32_t eax, ecx, edx, ebx, esp, ebp, esi, edi; + uint32_t vector; + uint32_t error_code; + uint32_t eip; + uint32_t cs; + uint32_t eflags; +}; + +void x86_exception(struct eregs *info) +{ + do { + hlt(); + } while(1); +} + + Index: src/mainboard/dfi/nf570/cmos.layout =================================================================== --- src/mainboard/dfi/nf570/cmos.layout (revision 0) +++ src/mainboard/dfi/nf570/cmos.layout (revision 0) @@ -0,0 +1,119 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@amd.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +entries + +#start-bit length config config-ID name +#0 8 r 0 seconds +#8 8 r 0 alarm_seconds +#16 8 r 0 minutes +#24 8 r 0 alarm_minutes +#32 8 r 0 hours +#40 8 r 0 alarm_hours +#48 8 r 0 day_of_week +#56 8 r 0 day_of_month +#64 8 r 0 month +#72 8 r 0 year +#80 4 r 0 rate_select +#84 3 r 0 REF_Clock +#87 1 r 0 UIP +#88 1 r 0 auto_switch_DST +#89 1 r 0 24_hour_mode +#90 1 r 0 binary_values_enable +#91 1 r 0 square-wave_out_enable +#92 1 r 0 update_finished_enable +#93 1 r 0 alarm_interrupt_enable +#94 1 r 0 periodic_interrupt_enable +#95 1 r 0 disable_clock_updates +#96 288 r 0 temporary_filler +0 384 r 0 reserved_memory +384 1 e 4 boot_option +385 1 e 4 last_boot +386 1 e 1 ECC_memory +388 4 r 0 reboot_bits +392 3 e 5 baud_rate +395 1 e 1 hw_scrubber +396 1 e 1 interleave_chip_selects +397 2 e 8 max_mem_clock +399 1 e 2 dual_core +400 1 e 1 power_on_after_fail +412 4 e 6 debug_level +416 4 e 7 boot_first +420 4 e 7 boot_second +424 4 e 7 boot_third +428 4 h 0 boot_index +432 8 h 0 boot_countdown +440 4 e 9 slow_cpu +444 1 e 1 nmi +445 1 e 1 iommu +728 256 h 0 user_data +984 16 h 0 check_sum +# Reserve the extended AMD configuration registers +1000 24 r 0 reserved_memory + + + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +5 0 115200 +5 1 57600 +5 2 38400 +5 3 19200 +5 4 9600 +5 5 4800 +5 6 2400 +5 7 1200 +6 6 Notice +6 7 Info +6 8 Debug +6 9 Spew +7 0 Network +7 1 HDD +7 2 Floppy +7 8 Fallback_Network +7 9 Fallback_HDD +7 10 Fallback_Floppy +#7 3 ROM +8 0 200Mhz +8 1 166Mhz +8 2 133Mhz +8 3 100Mhz +9 0 off +9 1 87.5% +9 2 75.0% +9 3 62.5% +9 4 50.0% +9 5 37.5% +9 6 25.0% +9 7 12.5% + +checksums + +checksum 392 983 984 + + Index: src/mainboard/dfi/nf570/mainboard.c =================================================================== --- src/mainboard/dfi/nf570/mainboard.c (revision 0) +++ src/mainboard/dfi/nf570/mainboard.c (revision 0) @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include "chip.h" + +#if CONFIG_CHIP_NAME == 1 +struct chip_operations mainboard_dfi_nf570_ops = { + CHIP_NAME("DFI NF570 Mainboard") +}; +#endif Index: src/mainboard/dfi/nf570/cache_as_ram_auto.c =================================================================== --- src/mainboard/dfi/nf570/cache_as_ram_auto.c (revision 0) +++ src/mainboard/dfi/nf570/cache_as_ram_auto.c (revision 0) @@ -0,0 +1,382 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#define ASSEMBLY 1 +#define __ROMCC__ + +#define RAMINIT_SYSINFO 1 + +#define K8_ALLOCATE_IO_RANGE 1 +//#define K8_SCAN_PCI_BUS 1 + + +#define QRANK_DIMM_SUPPORT 1 + +#if CONFIG_LOGICAL_CPUS==1 +#define SET_NB_CFG_54 1 +#endif + +//used by init_cpus and fidvid +#define K8_SET_FIDVID 1 +//if we want to wait for core1 done before DQS training, set it to 0 +#define K8_SET_FIDVID_CORE0_ONLY 1 + +#if K8_REV_F_SUPPORT == 1 +#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 +#endif + +#define DBGP_DEFAULT 7 + +#include <stdint.h> +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <arch/io.h> +#include <device/pnp_def.h> +#include <arch/romcc_io.h> +#include <cpu/x86/lapic.h> +#include "option_table.h" +#include "pc80/mc146818rtc_early.c" + +#if USE_FAILOVER_IMAGE==0 +#include "pc80/serial.c" +#include "arch/i386/lib/console.c" +#if CONFIG_USBDEBUG_DIRECT +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" +#include "pc80/usbdebug_direct_serial.c" +#endif +#include "ram/ramtest.c" + +#include <cpu/amd/model_fxx_rev.h> + +#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" +#include "northbridge/amd/amdk8/raminit.h" +#include "cpu/amd/model_fxx/apic_timer.c" +#include "lib/delay.c" + +#endif + +#include "cpu/x86/lapic/boot_cpu.c" +#include "northbridge/amd/amdk8/reset_test.c" +#include "superio/ite/it8716f/it8716f_early_serial.c" +#include "superio/ite/it8716f/it8716f_early_init.c" + +#if USE_FAILOVER_IMAGE==0 + +#include "cpu/x86/bist.h" + +#if CONFIG_USE_INIT == 0 + #include "lib/memcpy.c" +#endif + +#include "northbridge/amd/amdk8/debug.c" + +#include "cpu/amd/mtrr/amd_earlymtrr.c" + +#include "northbridge/amd/amdk8/setup_resource_map.c" + +#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1) +#define GPIO_DEV PNP_DEV(0x2e, IT8716F_GPIO) + +#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" + +static void memreset_setup(void) +{ +} + +static void memreset(int controllers, const struct mem_controller *ctrl) +{ +} + +static inline void activate_spd_rom(const struct mem_controller *ctrl) +{ + /* nothing to do */ +} + +static inline int spd_read_byte(unsigned device, unsigned address) +{ + return smbus_read_byte(device, address); +} + +#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/coherent_ht.c" + +#include "northbridge/amd/amdk8/incoherent_ht.c" + +#include "northbridge/amd/amdk8/raminit_f.c" + +#include "sdram/generic_sdram.c" + +#include "resourcemap.c" + +#include "cpu/amd/dualcore/dualcore.c" + +#define MCP55_NUM 1 +#define MCP55_USE_NIC 1 +#define MCP55_USE_AZA 1 + +#define MCP55_PCI_E_X_0 0 + +#define MCP55_MB_SETUP \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+37, 0x00, 0x68,/* GPIO38 PCI_REQ3 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+38, 0x00, 0x68,/* GPIO39 PCI_GNT3 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+39, 0x00, 0x68,/* GPIO40 PCI_GNT2 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+40, 0x00, 0x68,/* GPIO41 PCI_REQ2 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */ + +#include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" +#include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c" + +#include "cpu/amd/car/copy_and_run.c" + +#include "cpu/amd/car/post_cache_as_ram.c" + +#include "cpu/amd/model_fxx/init_cpus.c" + +#include "cpu/amd/model_fxx/fidvid.c" + +#endif + +#if ((HAVE_FAILOVER_BOOT==1) && (USE_FAILOVER_IMAGE == 1)) || ((HAVE_FAILOVER_BOOT==0) && (USE_FALLBACK_IMAGE == 1)) + +#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" +#include "northbridge/amd/amdk8/early_ht.c" + + +static void sio_setup(void) +{ + + unsigned value; + uint32_t dword; + uint8_t byte; + + byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b); + byte |= 0x20; + pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte); + + dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0); + dword |= (1<<0); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword); + + dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4); + dword |= (1<<16); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword); +} + +void failover_process(unsigned long bist, unsigned long cpu_init_detectedx) +{ + unsigned last_boot_normal_x = last_boot_normal(); + + /* Is this a cpu only reset? or Is this a secondary cpu? */ + if ((cpu_init_detectedx) || (!boot_cpu())) { + if (last_boot_normal_x) { + goto normal_image; + } else { + goto fallback_image; + } + } + + /* Nothing special needs to be done to find bus 0 */ + /* Allow the HT devices to be found */ + + enumerate_ht_chain(); + + sio_setup(); + + /* Setup the mcp55 */ + mcp55_enable_rom(); + + /* Is this a deliberate reset by the bios */ + if (bios_reset_detected() && last_boot_normal_x) { + goto normal_image; + } + /* This is the primary cpu how should I boot? */ + else if (do_normal_boot()) { + goto normal_image; + } + else { + goto fallback_image; + } + normal_image: + __asm__ volatile ("jmp __normal_image" + : /* outputs */ + : "a" (bist), "b" (cpu_init_detectedx) /* inputs */ + ); + + fallback_image: +#if HAVE_FAILOVER_BOOT==1 + __asm__ volatile ("jmp __fallback_image" + : /* outputs */ + : "a" (bist), "b" (cpu_init_detectedx) /* inputs */ + ) +#endif + ; +} +#endif +void real_main(unsigned long bist, unsigned long cpu_init_detectedx); + +void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) +{ +#if HAVE_FAILOVER_BOOT==1 + #if USE_FAILOVER_IMAGE==1 + failover_process(bist, cpu_init_detectedx); + #else + real_main(bist, cpu_init_detectedx); + #endif +#else + #if USE_FALLBACK_IMAGE == 1 + failover_process(bist, cpu_init_detectedx); + #endif + real_main(bist, cpu_init_detectedx); +#endif +} + +#if USE_FAILOVER_IMAGE==0 + +void real_main(unsigned long bist, unsigned long cpu_init_detectedx) +{ + static const uint16_t spd_addr [] = { + (0xa<<3)|0, (0xa<<3)|2, 0, 0, + (0xa<<3)|1, (0xa<<3)|3, 0, 0, +#if CONFIG_MAX_PHYSICAL_CPUS > 1 + (0xa<<3)|4, (0xa<<3)|6, 0, 0, + (0xa<<3)|5, (0xa<<3)|7, 0, 0, +#endif + }; + + struct sys_info *sysinfo = (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); + + int needs_reset = 0; + unsigned bsp_apicid = 0; + uint8_t tmp = 0; + + if (bist == 0) { + bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); + } + + pnp_enter_ext_func_mode(SERIAL_DEV); + /* The following line will set CLKIN to 24 MHz, external */ + pnp_write_config(SERIAL_DEV, IT8716F_CONFIG_REG_CLOCKSEL, 0x11); + tmp = pnp_read_config(SERIAL_DEV, IT8716F_CONFIG_REG_SWSUSP); + /* Is serial flash enabled? Then enable writing to serial flash. */ + if (tmp & 0x0e) { + pnp_write_config(SERIAL_DEV, IT8716F_CONFIG_REG_SWSUSP, tmp | 0x10); + pnp_set_logical_device(GPIO_DEV); + /* Set Serial Flash interface to 0x0820 */ + pnp_write_config(GPIO_DEV, 0x64, 0x08); + pnp_write_config(GPIO_DEV, 0x65, 0x20); + /* We can get away with not resetting the logical device because + * it8716f_enable_dev(SERIAL_DEV, TTYS0_BASE) will do that. + */ + } + it8716f_enable_dev(SERIAL_DEV, TTYS0_BASE); + pnp_exit_ext_func_mode(SERIAL_DEV); + + setup_mb_resource_map(); + + uart_init(); + + /* Halt if there was a built in self test failure */ + report_bist_failure(bist); + + +#if CONFIG_USBDEBUG_DIRECT + mcp55_enable_usbdebug_direct(DBGP_DEFAULT); + early_usbdebug_direct_init(); +#endif + console_init(); + print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n"); + + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + +#if MEM_TRAIN_SEQ == 1 + set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram +#endif + setup_coherent_ht_domain(); // routing table and start other core0 + + wait_all_core0_started(); +#if CONFIG_LOGICAL_CPUS==1 + // It is said that we should start core1 after all core0 launched + /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, + * So here need to make sure last core0 is started, esp for two way system, + * (there may be apic id conflicts in that case) + */ + start_other_cores(); + wait_all_other_cores_started(bsp_apicid); +#endif + + /* it will set up chains and store link pair for optimization later */ + ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn + +#if K8_SET_FIDVID == 1 + + { + msr_t msr; + msr=rdmsr(0xc0010042); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + + } + + enable_fid_change(); + + enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); + + init_fidvid_bsp(bsp_apicid); + + // show final fid and vid + { + msr_t msr; + msr=rdmsr(0xc0010042); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + + } +#endif + + needs_reset |= optimize_link_coherent_ht(); + needs_reset |= optimize_link_incoherent_ht(sysinfo); + needs_reset |= mcp55_early_setup_x(); + + // fidvid change will issue one LDTSTOP and the HT change will be effective too + if (needs_reset) { + print_info("ht reset -\r\n"); + soft_reset(); + } + allow_all_aps_stop(bsp_apicid); + + //It's the time to set ctrl in sysinfo now; + fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); + + enable_smbus(); + + memreset_setup(); + + //do we need apci timer, tsc...., only debug need it for better output + /* all ap stopped? */ +// init_timer(); // Need to use TMICT to synconize FID/VID + + sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); + + post_cache_as_ram(); // bsp swtich stack to ram and copy sysinfo ram now + +} + + +#endif Index: src/mainboard/dfi/nf570/get_bus_conf.c =================================================================== --- src/mainboard/dfi/nf570/get_bus_conf.c (revision 0) +++ src/mainboard/dfi/nf570/get_bus_conf.c (revision 0) @@ -0,0 +1,157 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#include <console/console.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <string.h> +#include <stdint.h> +#if CONFIG_LOGICAL_CPUS==1 +#include <cpu/amd/dualcore.h> +#endif + +#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h> + + +// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables +//busnum is default + unsigned char bus_isa; + unsigned char bus_mcp55[8]; //1 + unsigned apicid_mcp55; + + +unsigned pci1234x[] = +{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not + //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail + 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0 +}; +unsigned hcdnx[] = +{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most + 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +}; +unsigned bus_type[256]; + +extern void get_sblk_pci1234(void); + +static unsigned get_bus_conf_done = 0; + +void get_bus_conf(void) +{ + + unsigned apicid_base; + unsigned sbdn; + + device_t dev; + int i, j; + + if(get_bus_conf_done==1) return; //do it only once + + get_bus_conf_done = 1; + + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); + for(i=0;i<sysconf.hc_possible_num; i++) { + sysconf.pci1234[i] = pci1234x[i]; + sysconf.hcdn[i] = hcdnx[i]; + } + + get_sblk_pci1234(); + + sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain + sbdn = sysconf.sbdn; + + for(i=0; i<8; i++) { + bus_mcp55[i] = 0; + } + + for(i=0;i<256; i++) { + bus_type[i] = 0; + } + + bus_type[0] = 1; //pci + + bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff; + + bus_type[bus_mcp55[0]] = 1; + + /* MCP55 */ + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0)); + if (dev) { + bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); + bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_mcp55[2]++; + for(j=bus_mcp55[1];j<bus_mcp55[2]; j++) bus_type[j] = 1; + } + else { + printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06); + + bus_mcp55[1] = 2; + bus_mcp55[2] = 3; + } + + for(i=2; i<8;i++) { + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0)); + if (dev) { + bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); + bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_isa++; + for(j=bus_mcp55[i];j<bus_isa; j++) bus_type[j] = 1; + } + else { + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 ); + bus_isa = bus_mcp55[i-1]+1; + } + } + + +/*I/O APICs: APIC ID Version State Address*/ +#if CONFIG_LOGICAL_CPUS==1 + apicid_base = get_apicid_base(1); +#else + apicid_base = CONFIG_MAX_PHYSICAL_CPUS; +#endif + apicid_mcp55 = apicid_base+0; + +} Index: targets/dfi/nf570/Config-abuild.lb =================================================================== --- targets/dfi/nf570/Config-abuild.lb (revision 0) +++ targets/dfi/nf570/Config-abuild.lb (revision 0) @@ -0,0 +1,42 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 Uwe Hermann uwe@hermann-uwe.de +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +target dfi_nf570 +mainboard dfi/nf570 + +__COMPRESSION__ + +romimage "normal" + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION=".0-Normal" + payload __PAYLOAD__ +end + +romimage "fallback" + option USE_FALLBACK_IMAGE=1 + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION=".0-Fallback" + payload __PAYLOAD__ +end + +buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Index: targets/dfi/nf570/nf570/fallback/ldscript.ld =================================================================== --- targets/dfi/nf570/nf570/fallback/ldscript.ld (revision 0) +++ targets/dfi/nf570/nf570/fallback/ldscript.ld (revision 0) @@ -0,0 +1,242 @@ +/*ldoptions*/ +HAVE_MOVNTI = 1; +CONFIG_USE_INIT = 0; +HAVE_FALLBACK_BOOT = 1; +HAVE_FAILOVER_BOOT = 1; +ROM_IMAGE_SIZE = 0x20000; +PAYLOAD_SIZE = 0x1f000; +_ROMBASE = 0xfffdf000; +_RESET = 0xfffdf000; +_EXCEPTION_VECTORS = 0xfffdf100; +STACK_SIZE = 0x2000; +HEAP_SIZE = 0x8000; +_RAMBASE = 0x100000; +USE_DCACHE_RAM = 1; +CAR_FAM10 = 0; +DCACHE_RAM_BASE = 0xc8000; +DCACHE_RAM_SIZE = 0x8000; +DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000; +CONFIG_AP_CODE_IN_CAR = 0; +MEM_TRAIN_SEQ = 2; +WAIT_BEFORE_CPUS_INIT = 0; +CONFIG_COMPRESS = 1; +CONFIG_UNCOMPRESSED = 0; +CONFIG_LB_MEM_TOPK = 2048; +HAVE_OPTION_TABLE = 1; +USE_OPTION_TABLE = 0; +LB_CKS_RANGE_START = 49; +LB_CKS_RANGE_END = 122; +LB_CKS_LOC = 123; +DEBUG = 1; +CONFIG_CONSOLE_VGA = 1; +CONFIG_CONSOLE_VGA_MULTI = 0; +CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST = 0; +CONFIG_CONSOLE_BTEXT = 0; +CONFIG_CONSOLE_LOGBUF = 0; +CONFIG_CONSOLE_SROM = 0; +CONFIG_CONSOLE_SERIAL8250 = 1; +CONFIG_USBDEBUG_DIRECT = 0; +DEFAULT_CONSOLE_LOGLEVEL = 8; +MAXIMUM_CONSOLE_LOGLEVEL = 8; +CONFIG_SERIAL_POST = 0; +TTYS0_BASE = 0x3f8; +TTYS0_BAUD = 115200; +TTYS0_LCS = 0x3; +CONFIG_USE_PRINTK_IN_CAR = 1; +MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130; +MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x2b80; +CONFIG_MAX_PCI_BUSES = 255; +CONFIG_SMP = 1; +CONFIG_MAX_CPUS = 2; +CONFIG_MAX_PHYSICAL_CPUS = 1; +CONFIG_LOGICAL_CPUS = 1; +CONFIG_AP_IN_SIPI_WAIT = 0; +SERIAL_CPU_INIT = 1; +APIC_ID_OFFSET = 16; +ENABLE_APIC_EXT_ID = 0; +LIFT_BSP_APIC_ID = 1; +CONFIG_IDE_PAYLOAD = 0; +CONFIG_ROM_PAYLOAD = 1; +CONFIG_ROM_PAYLOAD_START = 0xfffc0000; +CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0; +CONFIG_COMPRESSED_PAYLOAD_LZMA = 0; +CONFIG_PRECOMPRESSED_PAYLOAD = 0; +CONFIG_SERIAL_PAYLOAD = 0; +CONFIG_FS_PAYLOAD = 0; +CONFIG_FS_EXT2 = 0; +CONFIG_FS_ISO9660 = 0; +CONFIG_FS_FAT = 0; +AUTOBOOT_DELAY = 2; +USE_WATCHDOG_ON_BOOT = 0; +CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1; +CONFIG_AGP_PLUGIN_SUPPORT = 1; +CONFIG_CARDBUS_PLUGIN_SUPPORT = 1; +CONFIG_PCIX_PLUGIN_SUPPORT = 1; +CONFIG_PCIEXP_PLUGIN_SUPPORT = 1; +CONFIG_IDE = 0; +IDE_BOOT_DRIVE = 0; +IDE_OFFSET = 0; +PCI_IO_CFG_EXT = 0; +CONFIG_CHIP_NAME = 1; +HAVE_INIT_TIMER = 1; +MAX_REBOOT_CNT = 3; +FAKE_SPDROM = 0; +HAVE_ACPI_TABLES = 0; +ACPI_SSDTX_NUM = 0; +HT_CHAIN_UNITID_BASE = 0; +HT_CHAIN_END_UNITID_BASE = 32; +SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0; +SB_HT_CHAIN_ON_BUS0 = 2; +PCI_BUS_SEGN_BITS = 0; +MMCONF_SUPPORT = 0; +MMCONF_SUPPORT_DEFAULT = 0; +HW_MEM_HOLE_SIZEK = 1048576; +HW_MEM_HOLE_SIZE_AUTO_INC = 0; +CONFIG_VAR_MTRR_HOLE = 1; +K8_HT_FREQ_1G_SUPPORT = 1; +K8_REV_F_SUPPORT = 1; +CBB = 0; +CDB = 24; +HT3_SUPPORT = 0; +EXT_RT_TBL_SUPPORT = 0; +EXT_CONF_SUPPORT = 0; +DIMM_SUPPORT = 0x4; +CPU_SOCKET_TYPE = 17; +CPU_ADDR_BITS = 40; +CONFIG_VGA_ROM_RUN = 0; +CONFIG_PCI_ROM_RUN = 1; +CONFIG_PCI_64BIT_PREF_MEM = 0; +CONFIG_AMDMCT = 0; +K8_MEM_BANK_B_ONLY = 0; +CONFIG_PCIE_CONFIGSPACE_HOLE = 0; +HAVE_MP_TABLE = 1; +HAVE_PIRQ_TABLE = 1; +USE_FALLBACK_IMAGE = 1; +USE_FAILOVER_IMAGE = 0; +HAVE_HARD_RESET = 1; +IRQ_SLOT_COUNT = 11; +CONFIG_IOAPIC = 1; +FALLBACK_SIZE = 0x3f000; +FAILOVER_SIZE = 0x1000; +ROM_SIZE = 0x80000; +ROM_SECTION_SIZE = 0x3f000; +ROM_SECTION_OFFSET = 0x40000; +XIP_ROM_SIZE = 0x40000; +XIP_ROM_BASE = 0xfffc0000; +CONFIG_GDB_STUB = 0; +HAVE_FANCTL = 1; +CONFIG_UDELAY_IO = 0; +CONFIG_UDELAY_TSC = 0; +CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0; +AGP_APERTURE_SIZE = 0x4000000; +/* /home/chris/coreboot-v2/src/arch/i386/init/ldscript.lb */ +/* + * Memory map: + * + * _RAMBASE + * : data segment + * : bss segment + * : heap + * : stack + * _ROMBASE + * : coreboot text + * : readonly text + */ +/* + * Bootstrap code for the STPC Consumer + * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. + * + */ + +/* + * Written by Johan Rydberg, based on work by Daniel Kahlin. + * Rewritten by Eric Biederman + */ +/* + * We use ELF as output format. So that we can + * debug the code in some form. + */ +OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") +OUTPUT_ARCH(i386) + +/* +ENTRY(_start) +*/ + +TARGET(binary) +INPUT(coreboot_ram.rom) +SECTIONS +{ + . = _ROMBASE; + + .ram . : { + _ram = . ; + coreboot_ram.rom(*) + _eram = . ; + } + + /* This section might be better named .setup */ + .rom . : { + _rom = .; + *(.rom.text); + *(.rom.data); + *(.rom.data.*); + . = ALIGN(16); + _erom = .; + } + + _lrom = LOADADDR(.rom); + _elrom = LOADADDR(.rom) + SIZEOF(.rom); + _iseg = _RAMBASE; + _eiseg = _iseg + SIZEOF(.ram); + _liseg = _ram; + _eliseg = _eram; + + /DISCARD/ : { + *(.comment) + *(.note) + } +} +/* /home/chris/coreboot-v2/src//cpu/x86/32bit/reset32.lds */ +/* + * _ROMTOP : The top of the rom used where we + * need to put the reset vector. + */ + +SECTIONS { + _ROMTOP = _ROMBASE + ROM_IMAGE_SIZE - 0x10; + . = _ROMTOP; + .reset (.): { + *(.reset) + . = 15 ; + BYTE(0x00); + } +} +/* /home/chris/coreboot-v2/src//southbridge/nvidia/mcp55/id.lds */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghai.lu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +SECTIONS { + . = (_ROMBASE + ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start); + .id (.): { + *(.id) + } +} Index: targets/dfi/nf570/nf570/fallback/coreboot_ram.bin =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/coreboot_ram.bin ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/build_opt_tbl =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/build_opt_tbl ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/crt0_includes.h =================================================================== --- targets/dfi/nf570/nf570/fallback/crt0_includes.h (revision 0) +++ targets/dfi/nf570/nf570/fallback/crt0_includes.h (revision 0) @@ -0,0 +1,5 @@ +#include <cpu/x86/32bit/entry32.inc> +#include <cpu/x86/32bit/reset32.inc> +#include <southbridge/nvidia/mcp55/id.inc> +#include <cpu/amd/car/cache_as_ram.inc> +#include <./cache_as_ram_auto.inc> Index: targets/dfi/nf570/nf570/fallback/cache_as_ram_auto.inc =================================================================== --- targets/dfi/nf570/nf570/fallback/cache_as_ram_auto.inc (revision 0) +++ targets/dfi/nf570/nf570/fallback/cache_as_ram_auto.inc (revision 0) @@ -0,0 +1,13201 @@ + .file "cache_as_ram_auto.c" + .section .rom.text +.globl uart8250_tx_byte + .type uart8250_tx_byte, @function +uart8250_tx_byte: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + movb 12(%ebp), %bl +.L2: + movl %esi, %edi + leal 5(%edi), %ecx + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + testb $32, %al + je .L2 + movzbl %bl, %eax + movzwl %si, %edx +#APP + outb %al, %dx +#NO_APP +.L4: + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + testb $64, %al + je .L4 + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size uart8250_tx_byte, .-uart8250_tx_byte +.globl uart8250_can_rx_byte + .type uart8250_can_rx_byte, @function +uart8250_can_rx_byte: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + addl $5, %edx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + popl %ebp + andl $1, %eax + ret + .size uart8250_can_rx_byte, .-uart8250_can_rx_byte +.globl uart8250_init + .type uart8250_init, @function +uart8250_init: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + movzwl 8(%ebp), %ecx + pushl %edi + pushl %esi + pushl %ebx + leal 1(%ecx), %ebx + movl %ebx, %edx +#APP + outb %al, %dx +#NO_APP + leal 2(%ecx), %edx + movb $1, %al + movzwl %dx, %edx +#APP + outb %al, %dx +#NO_APP + leal 4(%ecx), %edx + movb $3, %al + movzwl %dx, %edx +#APP + outb %al, %dx +#NO_APP + movb 16(%ebp), %al + leal 3(%ecx), %edi + movl %edi, %edx + andl $127, %eax + movl %eax, %esi + orl $-128, %eax + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + movzbl 12(%ebp), %eax + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl 12(%ebp), %edx + movzbl %dh, %eax + movl %ebx, %edx +#APP + outb %al, %dx +#NO_APP + movl %esi, %edx + movzbl %dl, %eax + movl %edi, %edx +#APP + outb %al, %dx +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size uart8250_init, .-uart8250_init +.globl init_uart8250 + .type init_uart8250, @function +init_uart8250: + pushl %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + pushl %ebx + movl 8(%ebp), %ecx + movl (%eax), %edx + movl $115200, %eax + testl %edx, %edx + je .L18 + movl %edx, %ebx + xorl %edx, %edx + divl %ebx +.L18: + cmpl $1016, %ecx + je .L21 + pushl $3 + pushl %eax + pushl %ecx + call uart8250_init + addl $12, %esp +.L21: + movl -4(%ebp), %ebx + leave + ret + .size init_uart8250, .-init_uart8250 + .type skip_atoi, @function +skip_atoi: + pushl %ebp + xorl %ecx, %ecx + movl %esp, %ebp + pushl %esi + movl %eax, %esi + pushl %ebx + jmp .L23 +.L24: + imull $10, %ecx, %eax + movsbl %dl,%edx + leal -48(%eax,%edx), %ecx + leal 1(%ebx), %eax + movl %eax, (%esi) +.L23: + movl (%esi), %ebx + movb (%ebx), %dl + leal -48(%edx), %eax + cmpb $9, %al + jbe .L24 + popl %ebx + movl %ecx, %eax + popl %esi + popl %ebp + ret + .size skip_atoi, .-skip_atoi + .section .rom.data.str1.1,"aMS",@progbits,1 +.LC0: + .string "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ" +.LC1: + .string "0123456789abcdefghijklmnopqrstuvwxyz" + .section .rom.text + .type number, @function +number: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $188, %esp + movl 20(%ebp), %edi + movl %edx, %ecx + movl %eax, -160(%ebp) + movl 12(%ebp), %esi + movl $.LC0, -120(%ebp) + testl $64, %edi + jne .L30 + movl $.LC1, -120(%ebp) +.L30: + testl $16, %edi + je .L31 + andl $-2, %edi +.L31: + movl 8(%ebp), %eax + movl $0, -112(%ebp) + subl $2, %eax + cmpl $34, %eax + ja .L35 + movl %edi, %eax + andl $1, %eax + cmpl $1, %eax + sbbl %eax, %eax + andl $-16, %eax + addl $48, %eax + testl $2, %edi + movb %al, -152(%ebp) + je .L39 + testl %ebx, %ebx + jns .L41 + negl %ecx + adcl $0, %ebx + decl %esi + negl %ebx + movb $45, -121(%ebp) + jmp .L43 +.L41: + testl $4, %edi + je .L44 + decl %esi + movb $43, -121(%ebp) + jmp .L43 +.L44: + testl $8, %edi + je .L39 + decl %esi + movb $32, -121(%ebp) + jmp .L43 +.L39: + movb $0, -121(%ebp) +.L43: + movl %edi, %edx + andl $32, %edx + movl %edx, -156(%ebp) + je .L47 + cmpl $16, 8(%ebp) + jne .L49 + subl $2, %esi + jmp .L47 +.L49: + xorl %eax, %eax + cmpl $8, 8(%ebp) + sete %al + subl %eax, %esi +.L47: + movl %ebx, %eax + orl %ecx, %eax + movl $0, -116(%ebp) + jne .L55 + movb $48, -90(%ebp) + movl $1, -116(%ebp) + jmp .L54 +.L55: + movl %ecx, %eax + movl %ebx, %edx + movl %edx, %ecx + xorl %edx, %edx + testl %ecx, %ecx + movl %eax, -176(%ebp) + je .L58 + movl %ecx, %eax + xorl %edx, %edx + divl 8(%ebp) + movl %eax, %ecx +.L58: + movl -176(%ebp), %eax +#APP + divl 8(%ebp) +#NO_APP + movl %edx, -172(%ebp) + movl %ecx, %edx + movl %eax, %ecx + movl %edx, %ebx + movl -172(%ebp), %eax + movl -120(%ebp), %edx + movb (%edx,%eax), %dl + movl -116(%ebp), %eax + movb %dl, -90(%ebp,%eax) + movl %ebx, %edx + incl %eax + orl %ecx, %edx + movl %eax, -116(%ebp) + jne .L55 +.L54: + movl -116(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -108(%ebp) + cmpl %edx, %eax + jge .L59 + movl %edx, -108(%ebp) +.L59: + subl -108(%ebp), %esi + testl $17, %edi + movl $0, -112(%ebp) + movl %esi, %eax + je .L63 + jmp .L62 +.L64: + subl $12, %esp + pushl $32 + call *-160(%ebp) + movl %ebx, %eax + addl $16, %esp +.L63: + testl %eax, %eax + leal -1(%eax), %ebx + jg .L64 + subl %eax, %esi + movl %esi, -112(%ebp) + movl %ebx, %esi +.L62: + cmpb $0, -121(%ebp) + je .L66 + movzbl -121(%ebp), %eax + subl $12, %esp + pushl %eax + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L66: + cmpl $0, -156(%ebp) + je .L68 + cmpl $8, 8(%ebp) + jne .L70 + subl $12, %esp + pushl $48 + call *-160(%ebp) + incl -112(%ebp) + jmp .L88 +.L70: + cmpl $16, 8(%ebp) + jne .L68 + subl $12, %esp + pushl $48 + call *-160(%ebp) + movl -120(%ebp), %edx + movzbl 33(%edx), %eax + movl %eax, (%esp) + call *-160(%ebp) + addl $2, -112(%ebp) +.L88: + addl $16, %esp +.L68: + andl $16, %edi + movl %esi, %eax + je .L75 + jmp .L73 +.L76: + movzbl -152(%ebp), %eax + subl $12, %esp + pushl %eax + call *-160(%ebp) + movl %ebx, %eax + addl $16, %esp + incl -112(%ebp) +.L75: + testl %eax, %eax + leal -1(%eax), %ebx + jg .L76 + movl %ebx, %esi +.L73: + movl -108(%ebp), %ebx + jmp .L78 +.L79: + subl $12, %esp + decl %ebx + pushl $48 + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L78: + cmpl %ebx, -116(%ebp) + jl .L79 + jmp .L87 +.L81: + decl -116(%ebp) + subl $12, %esp + movl -116(%ebp), %edx + movzbl -90(%ebp,%edx), %eax + pushl %eax + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L87: + cmpl $0, -116(%ebp) + jg .L81 + movl %esi, %ebx + jmp .L83 +.L84: + subl $12, %esp + decl %ebx + pushl $32 + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L83: + testl %ebx, %ebx + jg .L84 +.L35: + movl -112(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size number, .-number + .section .rom.data.str1.1 +.LC2: + .string "<NULL>" + .section .rom.text +.globl vtxprintf + .type vtxprintf, @function +vtxprintf: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl 16(%ebp), %esi + movl $0, -20(%ebp) + jmp .L90 +.L91: + cmpb $37, %al + movl $0, -28(%ebp) + je .L198 + subl $12, %esp + movzbl %al, %eax + jmp .L194 +.L198: + movl 12(%ebp), %ecx + incl %ecx + movl %ecx, 12(%ebp) + movb (%ecx), %dl + cmpb $43, %dl + je .L99 + jg .L102 + cmpb $32, %dl + je .L97 + cmpb $35, %dl + jne .L96 + jmp .L98 +.L102: + cmpb $45, %dl + je .L100 + cmpb $48, %dl + jne .L96 + jmp .L101 +.L100: + orl $16, -28(%ebp) + jmp .L198 +.L99: + orl $4, -28(%ebp) + jmp .L198 +.L97: + orl $8, -28(%ebp) + jmp .L198 +.L98: + orl $32, -28(%ebp) + jmp .L198 +.L101: + orl $1, -28(%ebp) + jmp .L198 +.L96: + leal -48(%edx), %eax + cmpb $9, %al + ja .L103 + leal 12(%ebp), %eax + call skip_atoi + movl %eax, %edi + jmp .L105 +.L103: + orl $-1, %edi + cmpb $42, %dl + jne .L105 + movl (%esi), %edi + leal 1(%ecx), %eax + movl %eax, 12(%ebp) + leal 4(%esi), %eax + movl %eax, %esi + testl %edi, %edi + jns .L105 + orl $16, -28(%ebp) + negl %edi +.L105: + movl 12(%ebp), %edx + movl $-1, -24(%ebp) + cmpb $46, (%edx) + jne .L112 + leal 1(%edx), %eax + movl %eax, 12(%ebp) + movb 1(%edx), %cl + leal -48(%ecx), %eax + cmpb $9, %al + ja .L113 + leal 12(%ebp), %eax + call skip_atoi + movl %eax, -24(%ebp) + jmp .L115 +.L113: + cmpb $42, %cl + jne .L116 + leal 2(%edx), %eax + movl %eax, 12(%ebp) + movl (%esi), %eax + addl $4, %esi + movl %eax, -24(%ebp) +.L115: + cmpl $0, -24(%ebp) + jns .L112 +.L116: + movl $0, -24(%ebp) +.L112: + movl 12(%ebp), %ecx + movb (%ecx), %dl + cmpb $104, %dl + je .L118 + cmpb $108, %dl + je .L118 + orl $-1, %ebx + cmpb $76, %dl + jne .L121 +.L118: + leal 1(%ecx), %eax + movl %eax, 12(%ebp) + cmpb $108, 1(%ecx) + je .L122 + movsbl %dl,%ebx + jmp .L121 +.L122: + leal 2(%ecx), %eax + movl $76, %ebx + movl %eax, 12(%ebp) +.L121: + movl 12(%ebp), %eax + movb (%eax), %al + cmpb $110, %al + je .L129 + jg .L135 + cmpb $99, %al + je .L127 + jg .L136 + cmpb $37, %al + je .L125 + cmpb $88, %al + jne .L124 + jmp .L126 +.L136: + cmpb $100, %al + je .L128 + cmpb $105, %al + jne .L124 + jmp .L128 +.L135: + cmpb $115, %al + je .L132 + jg .L137 + cmpb $111, %al + je .L130 + cmpb $112, %al + jne .L124 + jmp .L131 +.L137: + cmpb $117, %al + je .L133 + cmpb $120, %al + movl $16, -36(%ebp) + je .L138 + jmp .L124 +.L127: + testb $16, -28(%ebp) + movl %edi, %ebx + je .L141 + jmp .L139 +.L142: + subl $12, %esp + pushl $32 + call *8(%ebp) + addl $16, %esp +.L141: + decl %ebx + testl %ebx, %ebx + jg .L142 + movl -20(%ebp), %eax + addl %edi, %eax + movl %ebx, %edi + subl %ebx, %eax + decl %eax + movl %eax, -20(%ebp) +.L139: + movzbl (%esi), %eax + subl $12, %esp + pushl %eax + call *8(%ebp) + movl -20(%ebp), %ebx + jmp .L189 +.L145: + subl $12, %esp + pushl $32 + call *8(%ebp) +.L189: + decl %edi + addl $16, %esp + incl %ebx + testl %edi, %edi + jg .L145 + movl %ebx, -20(%ebp) + jmp .L197 +.L132: + movl (%esi), %edx + testl %edx, %edx + movl %edx, -32(%ebp) + jne .L147 + movl $.LC2, -32(%ebp) +.L147: + movl $0, -16(%ebp) + jmp .L149 +.L150: + incl -16(%ebp) +.L149: + movl -16(%ebp), %ecx + movl -32(%ebp), %eax + cmpb $0, (%ecx,%eax) + je .L151 + movl -24(%ebp), %edx + cmpl %edx, %ecx + jne .L150 +.L151: + testb $16, -28(%ebp) + movl %edi, %eax + je .L155 + jmp .L153 +.L156: + subl $12, %esp + pushl $32 + call *8(%ebp) + movl %ebx, %eax + addl $16, %esp + incl -20(%ebp) +.L155: + cmpl %eax, -16(%ebp) + leal -1(%eax), %ebx + jl .L156 + movl %ebx, %edi +.L153: + xorl %ebx, %ebx + jmp .L158 +.L159: + movl -32(%ebp), %ecx + subl $12, %esp + movzbl (%ebx,%ecx), %eax + incl %ebx + pushl %eax + call *8(%ebp) + addl $16, %esp + incl -20(%ebp) +.L158: + cmpl -16(%ebp), %ebx + jl .L159 + movl %edi, %ebx + jmp .L161 +.L162: + subl $12, %esp + decl %ebx + pushl $32 + call *8(%ebp) + addl $16, %esp + incl -20(%ebp) +.L161: + cmpl %ebx, -16(%ebp) + jl .L162 + jmp .L197 +.L131: + cmpl $-1, %edi + jne .L164 + orl $1, -28(%ebp) + movl $8, %edi +.L164: + movl (%esi), %edx + leal 4(%esi), %ebx + xorl %ecx, %ecx + pushl -28(%ebp) + pushl -24(%ebp) + pushl %edi + pushl $16 + jmp .L195 +.L129: + cmpl $76, %ebx + jne .L166 + movl -20(%ebp), %eax + movl (%esi), %ecx + cltd + movl %eax, (%ecx) + movl %edx, 4(%ecx) +.L197: + addl $4, %esi + jmp .L95 +.L166: + movl (%esi), %eax + leal 4(%esi), %edx + movl -20(%ebp), %ecx + movl %edx, %esi + movl %ecx, (%eax) + jmp .L95 +.L125: + subl $12, %esp + pushl $37 + jmp .L196 +.L130: + movl $8, -36(%ebp) + jmp .L138 +.L126: + orl $64, -28(%ebp) + movl $16, -36(%ebp) + jmp .L138 +.L128: + orl $2, -28(%ebp) + jmp .L133 +.L124: + subl $12, %esp + pushl $37 + call *8(%ebp) + movl 12(%ebp), %eax + addl $16, %esp + incl -20(%ebp) + movb (%eax), %dl + testb %dl, %dl + je .L170 + subl $12, %esp + movzbl %dl, %eax +.L194: + pushl %eax +.L196: + call *8(%ebp) + incl -20(%ebp) + jmp .L192 +.L170: + decl %eax + movl %eax, 12(%ebp) + jmp .L95 +.L133: + movl $10, -36(%ebp) +.L138: + cmpl $76, %ebx + jne .L172 + movl (%esi), %edx + leal 8(%esi), %ebx + movl 4(%esi), %ecx + jmp .L174 +.L172: + cmpl $108, %ebx + jne .L175 + leal 4(%esi), %ebx + jmp .L190 +.L175: + cmpl $104, %ebx + jne .L177 + xorl %ecx, %ecx + movzwl (%esi), %edx + testb $2, -28(%ebp) + leal 4(%esi), %ebx + je .L174 + movswl %dx,%edx + movl %edx, %ecx + jmp .L191 +.L177: + testb $2, -28(%ebp) + leal 4(%esi), %edx + je .L180 + movl (%esi), %eax + movl %edx, %ebx + movl %eax, %ecx + movl %eax, %edx +.L191: + sarl $31, %ecx + jmp .L174 +.L180: + movl %edx, %ebx +.L190: + movl (%esi), %edx + xorl %ecx, %ecx +.L174: + pushl -28(%ebp) + pushl -24(%ebp) + pushl %edi + pushl -36(%ebp) +.L195: + movl 8(%ebp), %eax + movl %ebx, %esi + call number + addl %eax, -20(%ebp) +.L192: + addl $16, %esp +.L95: + incl 12(%ebp) +.L90: + movl 12(%ebp), %eax + movb (%eax), %al + testb %al, %al + jne .L91 + movl -20(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size vtxprintf, .-vtxprintf +.globl console_tx_byte + .type console_tx_byte, @function +console_tx_byte: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movb 8(%ebp), %bl + cmpb $10, %bl + jne .L200 + pushl $13 + pushl $1016 + call uart8250_tx_byte + popl %ecx + popl %eax +.L200: + movzbl %bl, %eax + pushl %eax + pushl $1016 + call uart8250_tx_byte + movl -4(%ebp), %ebx + popl %eax + popl %edx + leave + ret + .size console_tx_byte, .-console_tx_byte +.globl udelay + .type udelay, @function +udelay: + pushl %ebp + movl %esp, %ebp + imull $200, 8(%ebp), %ecx + pushl %ebx + movl -18873456, %edx +.L204: + movl -18873456, %eax + movl %edx, %ebx + subl %eax, %ebx + cmpl %ecx, %ebx + jb .L204 + popl %ebx + popl %ebp + ret + .size udelay, .-udelay +.globl mdelay + .type mdelay, @function +mdelay: + pushl %ebp + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + xorl %ebx, %ebx + jmp .L210 +.L211: + pushl $1000 + incl %ebx + call udelay + popl %eax +.L210: + cmpl %esi, %ebx + jne .L211 + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size mdelay, .-mdelay +.globl delay + .type delay, @function +delay: + pushl %ebp + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + xorl %ebx, %ebx + jmp .L215 +.L216: + pushl $1000 + incl %ebx + call mdelay + popl %eax +.L215: + cmpl %esi, %ebx + jne .L216 + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size delay, .-delay +.globl memcpy + .type memcpy, @function +memcpy: + pushl %ebp + xorl %edx, %edx + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %ecx + pushl %ebx + movl 12(%ebp), %esi + movl 16(%ebp), %ebx + jmp .L220 +.L221: + movb (%edx,%esi), %al + movb %al, (%edx,%ecx) + incl %edx +.L220: + cmpl %ebx, %edx + jne .L221 + popl %ebx + movl %ecx, %eax + popl %esi + popl %ebp + ret + .size memcpy, .-memcpy + .type setup_resource_map_offset, @function +setup_resource_map_offset: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + subl $16, %esp + movl %edx, -16(%ebp) + movl %ecx, -20(%ebp) + jmp .L225 +.L226: + movl (%esi,%edi,4), %edx + movl $3320, %ecx + movl %edx, %eax + andl $4095, %edx + andl $-4096, %eax + addl -20(%ebp), %eax + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -28(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl 4(%esi,%edi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -24(%ebp) + movl -28(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl 8(%ebp), %eax + movl %ebx, %edx + addl 8(%esi,%edi,4), %eax + orl %eax, -24(%ebp) + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %edi +.L225: + cmpl -16(%ebp), %edi + jl .L226 + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size setup_resource_map_offset, .-setup_resource_map_offset + .type setup_resource_map_x_offset, @function +setup_resource_map_x_offset: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + subl $16, %esp + movl %edx, -16(%ebp) + movl %ecx, -20(%ebp) + jmp .L230 +.L231: + movl (%esi,%edi,4), %eax + cmpl $32, %eax + je .L234 + cmpl $34, %eax + je .L235 + cmpl $16, %eax + jne .L232 + movl 4(%esi,%edi,4), %edx + movl $3320, %ecx + movl %edx, %eax + andl $4095, %edx + andl $-4096, %eax + addl -20(%ebp), %eax + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -28(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl 8(%esi,%edi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -24(%ebp) + movl -28(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl 12(%esi,%edi,4), %eax + movl %ebx, %edx + orl %eax, -24(%ebp) + movl -24(%ebp), %eax + jmp .L238 +.L235: + movl 8(%ebp), %edx + addl 4(%esi,%edi,4), %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax + andl 8(%esi,%edi,4), %eax + orl 12(%esi,%edi,4), %eax + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + jmp .L232 +.L234: + movl 8(%ebp), %edx + addl 4(%esi,%edi,4), %edx +#APP + inl %dx, %eax +#NO_APP + andl 8(%esi,%edi,4), %eax + orl 12(%esi,%edi,4), %eax +.L238: +#APP + outl %eax, %dx +#NO_APP +.L232: + addl $4, %edi +.L230: + cmpl -16(%ebp), %edi + jl .L231 + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size setup_resource_map_x_offset, .-setup_resource_map_x_offset + .type soft_reset, @function +soft_reset: + pushl %ebp + movl $-2147434388, %eax + movl %esp, %ebp + movl $3320, %edx + pushl %ebx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl $-2147434388, %ecx + movl %eax, %ebx + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-33, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $2, %al + movb $-7, %dl +#APP + outb %al, %dx +#NO_APP + movb $6, %al +#APP + outb %al, %dx +#NO_APP + popl %ebx + popl %ebp + ret + .size soft_reset, .-soft_reset + .type spd_read_byte, @function +spd_read_byte: + pushl %ebp + addl %eax, %eax + movl %esp, %ebp + orl $1, %eax + pushl %esi + movl $4098, %ecx + pushl %ebx + movzbl %al, %eax + movl %edx, %ebx + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl $-128, %esi + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movzbl %bl, %ecx + movb $3, %dl + movb %cl, %al +#APP + outb %al, %dx +#NO_APP + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movb $7, %cl + xorb %dl, %dl + movb %cl, %al +#APP + outb %al, %dx +#NO_APP + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movl $1000000, %ecx +.L242: + movb $-128, %al +#APP + outb %al, $128 +#NO_APP + movl $4097, %edx +#APP + inb %dx, %al +#NO_APP + testb %al, %al + jne .L243 + decl %ecx + jne .L242 + movl $-3, %edx + jmp .L246 +.L243: +#APP + inb %dx, %al +#NO_APP + movl $4100, %edx + movb %al, %bl +#APP + inb %dx, %al +#NO_APP + andl $-128, %ebx + orl $-1, %edx + cmpb $-128, %bl + jne .L246 + movzbl %al, %edx +.L246: + popl %ebx + movl %edx, %eax + popl %esi + popl %ebp + ret + .size spd_read_byte, .-spd_read_byte + .type get_nodes, @function +get_nodes: + pushl %ebp + movl $-2147434400, %eax + movl %esp, %ebp + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $4, %eax + popl %ebp + andl $7, %eax + incl %eax + ret + .size get_nodes, .-get_nodes + .type ht_lookup_slave_capability, @function +ht_lookup_slave_capability: + pushl %ebp + movl $3320, %ecx + movl %esp, %ebp + movl %ecx, %edx + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + shrl $4, %ebx + subl $4, %esp + movl %ebx, %esi + orl $14, %esi + movl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + andl $127, %eax + xorl %edi, %edi + cmpb $1, %al + ja .L263 + jmp .L255 +.L258: + movl %edi, %eax + movl %ebx, %edx + movzbl %al, %esi + movl $3320, %ecx + orl %esi, %edx + movl %edx, %eax + andl $2147483644, %eax + movl %edx, -16(%ebp) + orl $-2147483648, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -16(%ebp), %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + cmpb $8, %al + jne .L259 + leal 2(%esi), %eax + movl %ecx, %edx + orl %ebx, %eax + movl %eax, -16(%ebp) + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -16(%ebp), %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + shrw $13, %ax + je .L261 +.L259: + incl %esi + orl %ebx, %esi +.L264: + movl %esi, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + movl %eax, %edi +.L263: + movl %edi, %edx + testb %dl, %dl + jne .L258 + jmp .L261 +.L255: + movl %ebx, %esi + orl $52, %esi + jmp .L264 +.L261: + movl %edi, %edx + movzbl %dl, %eax + popl %edx + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size ht_lookup_slave_capability, .-ht_lookup_slave_capability + .type ht_read_freq_cap, @function +ht_read_freq_cap: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movzbl %dl, %esi + shrl $4, %edi + orl %edi, %esi + movl %esi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + andl $2147483644, %edi + movl %eax, %esi + orl $-2147483648, %edi + movl %eax, %ecx + andw $32767, %si + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $1951404066, %eax + je .L272 + cmpl $1951666210, %eax + jne .L269 +.L272: + movl %ecx, %eax + andl $32735, %eax + jmp .L268 +.L269: + movzwl %si, %eax +.L268: + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size ht_read_freq_cap, .-ht_read_freq_cap + .type ht_read_width_cap, @function +ht_read_width_cap: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movzbl %dl, %esi + shrl $4, %edi + orl %edi, %esi + movl %esi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + andl $2147483644, %edi + movb %al, %cl + orl $-2147483648, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $71758, %eax + jne .L274 + movl %ecx, %eax + andl $119, %eax + cmpl $17, %eax + jne .L274 + andl $-120, %ecx +.L274: + popl %ebx + movzbl %cl, %eax + popl %esi + popl %edi + popl %ebp + ret + .size ht_read_width_cap, .-ht_read_width_cap + .type pci_read_config32_index_wait, @function +pci_read_config32_index_wait: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %edx, %edi + pushl %esi + movl %ecx, %esi + pushl %ebx + movl %eax, %ebx + shrl $4, %ebx + movl %ebx, %ecx + orl %edx, %ecx + movl $3320, %edx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1073741825, %esi + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L279: + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testl %eax, %eax + jns .L279 + leal 4(%edi), %eax + movb $-8, %dl + orl %eax, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size pci_read_config32_index_wait, .-pci_read_config32_index_wait + .type pci_write_config32_index_wait, @function +pci_write_config32_index_wait: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl %ecx, %esi + movl %edx, %ecx + shrl $4, %edi + addl $4, %ecx + orl %edi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + subl $4, %esp + movl %ecx, %eax + movl %edx, -16(%ebp) + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl 8(%ebp), %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + orl -16(%ebp), %edi + movl %ebx, %edx + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1073741824, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L285: + movl $3320, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testl %eax, %eax + jns .L285 + popl %ecx + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size pci_write_config32_index_wait, .-pci_write_config32_index_wait +.globl memory_end_k + .type memory_end_k, @function +memory_end_k: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + xorl %esi, %esi + pushl %ebx + subl $4, %esp + movl $0, -16(%ebp) + jmp .L291 +.L292: + movl 8(%ebp), %eax + movl $3320, %edx + movl -16(%ebp), %edi + movl 8(%eax), %ecx + sall $3, %edi + leal 64(%edi), %eax + shrl $4, %ecx + orl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $3, %eax + cmpl $3, %eax + jne .L293 + leal 68(%edi), %eax + movb $-8, %dl + orl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + leal 65536(%eax), %esi + xorw %si, %si + shrl $2, %esi +.L293: + incl -16(%ebp) +.L291: + movl 12(%ebp), %eax + cmpl %eax, -16(%ebp) + jne .L292 + popl %ebx + movl %esi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size memory_end_k, .-memory_end_k + .type convert_to_linear, @function +convert_to_linear: + movl %eax, %edx + andl $15, %edx + pushl %ebp + cmpl $9, %edx + movl %esp, %ebp + ja .L298 + sall $4, %eax + jmp .L300 +.L298: + andl $240, %eax + sall $4, %eax + orl fraction.4275-40(,%edx,4), %eax +.L300: + popl %ebp + ret + .size convert_to_linear, .-convert_to_linear + .type update_dimm_TT_1_4, @function +update_dimm_TT_1_4: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $12, %esp + movl 8(%ebp), %edi + movl %edx, -20(%ebp) + movl $1, %edx + movzwl 20(%eax,%ecx,2), %esi + movl %eax, -16(%ebp) + movl %edx, %eax + sall %cl, %eax + testl %eax, %edi + jne .L303 + leal 4(%ebx), %ecx + sall %cl, %edx + testl %edx, %edi + je .L303 + movl -16(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L303: + movl 16(%ebp), %edx + movl %esi, %eax + orl $-1, %edi + call spd_read_byte + testl %eax, %eax + js .L308 + movl -20(%ebp), %ecx + imull $10, %eax, %edx + movl 32(%ebp), %esi + movzbl 2(%ecx), %ebx + leal -1(%edx,%ebx), %edx + movl %edx, %eax + cltd + idivl %ebx + cmpl %eax, %esi + jae .L309 + movl %eax, %esi +.L309: + xorl %edi, %edi + cmpl 36(%ebp), %esi + ja .L308 + movl -16(%ebp), %ecx + movl $3320, %edx + movl 12(%ebp), %eax + movl 12(%ecx), %ecx + shrl $4, %ecx + orl %eax, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, -24(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movb 20(%ebp), %cl + movl %eax, %ebx + movw $1, %di + shrl %cl, %eax + andl 24(%ebp), %eax + addl 28(%ebp), %eax + cmpl %esi, %eax + jae .L308 + sall %cl, 24(%ebp) + movb $-8, %dl + notl 24(%ebp) + andl 24(%ebp), %ebx + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + subl 28(%ebp), %esi + movb $-4, %dl + sall %cl, %esi + orl %esi, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L308: + addl $12, %esp + movl %edi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size update_dimm_TT_1_4, .-update_dimm_TT_1_4 + .type Get_MCTSysAddr, @function +Get_MCTSysAddr: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl (%eax), %ebx + leal (%edx,%ebx,8), %eax + movl 728(%ecx,%eax,4), %edx + movl 696(%ecx,%ebx,4), %eax + andl $-16, %edx + xorw %ax, %ax + addl %eax, %edx + movl 984(%ecx,%ebx,4), %eax + testb $1, %al + je .L316 + movl %eax, %ecx + andl $-16777216, %ecx + shrl $10, %ecx + leal 0(,%ecx,4), %eax + cmpl %eax, %edx + jb .L316 + cmpl $16777215, %edx + ja .L316 + movl $4194304, %eax + subl %ecx, %eax + leal (%edx,%eax,4), %edx +.L316: + popl %ebx + popl %ebp + leal 4096(%edx), %eax + ret + .size Get_MCTSysAddr, .-Get_MCTSysAddr + .type Get_RcvrSysAddr, @function +Get_RcvrSysAddr: + pushl %ebp + movl %ecx, %edx + movl %esp, %ebp + movl 8(%ebp), %ecx + popl %ebp + jmp Get_MCTSysAddr + .size Get_RcvrSysAddr, .-Get_RcvrSysAddr + .type set_wrap32dis, @function +set_wrap32dis: + pushl %ebp + movl $-1073676267, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + orl $131072, %eax +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size set_wrap32dis, .-set_wrap32dis + .type clear_wrap32dis, @function +clear_wrap32dis: + pushl %ebp + movl $-1073676267, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + andl $-131073, %eax +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size clear_wrap32dis, .-clear_wrap32dis + .type Write1LTestPattern, @function +Write1LTestPattern: + pushl %ebp + decl %edx + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + je .L329 + movl %ecx, %esi +.L329: + movl %edi, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + sall $8, %edi + movl $16, %edx + movl $4, %ecx + movl %edi, %eax + movl %esi, %ebx +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size Write1LTestPattern, .-Write1LTestPattern + .type Read1LTestPattern, @function +Read1LTestPattern: + pushl %ebp + movl %eax, %edx + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + movl $-1073741568, %ebx + shrl $24, %edx + movl %ebx, %ecx + movl %edi, %eax +#APP + wrmsr +#NO_APP + sall $8, %esi + movl %esi, %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size Read1LTestPattern, .-Read1LTestPattern + .type CompareTestPatternQW0, @function +CompareTestPatternQW0: + pushl %ebp + movl %esp, %ebp + cmpl $1, 20(%ebp) + pushl %edi + movl %eax, %edi + pushl %esi + movl 16(%ebp), %esi + pushl %ebx + movl %edx, %ebx + jne .L338 + decl %ecx + movl 12(%ebp), %esi + je .L338 + movl 8(%ebp), %esi +.L338: + movl %ebx, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + movl %ebx, %eax + sall $8, %eax + cmpl $0, 24(%ebp) + je .L339 + decl %edi + jne .L339 + addl $8, %eax + addl $8, %esi +.L339: +#APP + movl %fs:(%eax), %ebx + +#NO_APP + cmpl (%esi), %ebx + movl $1, %edx + jne .L343 + addl $4, %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + xorl %edx, %edx + cmpl 4(%esi), %ebx + setne %dl +.L343: + cmpl $2, 20(%ebp) + jne .L344 + testl %edx, %edx + sete %al + movzbl %al, %edx +.L344: + popl %ebx + movl %edx, %eax + popl %esi + popl %edi + popl %ebp + ret + .size CompareTestPatternQW0, .-CompareTestPatternQW0 + .type SetMaxAL_RcvrDly, @function +SetMaxAL_RcvrDly: + pushl %ebp + movl %esp, %ebp + leal 19(%edx), %ecx + movl $20, %edx + pushl %edi + movl %eax, %edi + pushl %esi + movl %ecx, %eax + movl %edx, %esi + xorl %edx, %edx + divl %esi + movl 12(%edi), %esi + movl $3320, %edx + pushl %ebx + orl $2368, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %eax, %ebx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + andb $15, %cl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 6(%ebx), %eax + movb $-4, %dl + sall $4, %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size SetMaxAL_RcvrDly, .-SetMaxAL_RcvrDly + .type SetTargetWTIO, @function +SetTargetWTIO: + pushl %ebp + movl %eax, %edx + movl %esp, %ebp + movl $-1073676266, %ecx + sall $8, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + movl $-67106816, %eax + movb $23, %cl + movl $255, %edx +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size SetTargetWTIO, .-SetTargetWTIO + .type proc_IOCLFLUSH, @function +proc_IOCLFLUSH: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %eax, %ebx + call SetTargetWTIO + movl %ebx, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + sall $8, %ebx + movl %ebx, %eax +#APP + clflush %fs:(%eax) + +#NO_APP + movl $-1073676265, %ecx + xorl %eax, %eax + xorl %edx, %edx +#APP + wrmsr +#NO_APP + popl %ebx + popl %ebp + ret + .size proc_IOCLFLUSH, .-proc_IOCLFLUSH + .type ResetDCTWrPtr, @function +ResetDCTWrPtr: + pushl %ebp + movl $16, %ecx + movl %esp, %ebp + movl $152, %edx + pushl %esi + pushl %ebx + movl %eax, %ebx + movl 12(%eax), %eax + call pci_read_config32_index_wait + movl 12(%ebx), %esi + movl $16, %ecx + movl $152, %edx + pushl %eax + movl %esi, %eax + call pci_write_config32_index_wait + movl 12(%ebx), %eax + movl $48, %ecx + movl $152, %edx + call pci_read_config32_index_wait + movl 12(%ebx), %ebx + movl $48, %ecx + movl $152, %edx + pushl %eax + movl %ebx, %eax + call pci_write_config32_index_wait + popl %esi + popl %eax + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size ResetDCTWrPtr, .-ResetDCTWrPtr + .type SetDQSDelayCSR, @function +SetDQSDelayCSR: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $8, %esp + movl 12(%ebp), %eax + sall $5, %edx + movl %eax, -16(%ebp) + movl %ecx, %eax + shrl $2, %eax + leal 1(%eax,%edx), %eax + movl 8(%ebp), %edx + leal (%eax,%edx,4), %esi + jmp .L356 +.L357: + subl $4, %ebx +.L356: + cmpl $3, %ebx + ja .L357 + movl 12(%edi), %eax + movl %esi, %ecx + movl $152, %edx + sall $3, %ebx + call pci_read_config32_index_wait + movzbl -16(%ebp),%edx + movb %bl, %cl + movl $63, -20(%ebp) + sall %cl, -20(%ebp) + notl -20(%ebp) + andl %eax, -20(%ebp) + sall %cl, %edx + movl 12(%edi), %eax + movl %esi, %ecx + orl -20(%ebp), %edx + movl %edx, 8(%ebp) + movl $152, %edx + popl %ebx + popl %esi + popl %ebx + popl %esi + popl %edi + popl %ebp + jmp pci_write_config32_index_wait + .size SetDQSDelayCSR, .-SetDQSDelayCSR + .type SetDQSDelayAllCSR, @function +SetDQSDelayAllCSR: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl $1, %esi + pushl %ebx + subl $4, %esp + movl %eax, -16(%ebp) + movzbl 8(%ebp),%eax + leal (%ecx,%edx,8), %edx + leal 0(,%edx,4), %edi + movl %eax, %ebx + sall $8, %ebx + orl %eax, %ebx + sall $16, %eax + orl %eax, %ebx + sall $8, %eax + orl %eax, %ebx +.L361: + movl -16(%ebp), %edx + leal (%edi,%esi), %ecx + incl %esi + movl 12(%edx), %eax + movl $152, %edx + pushl %ebx + call pci_write_config32_index_wait + cmpl $3, %esi + popl %eax + jne .L361 + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size SetDQSDelayAllCSR, .-SetDQSDelayAllCSR + .type save_dqs_delay, @function +save_dqs_delay: + imull $18, %eax, %eax + pushl %ebp + movl %esp, %ebp + leal (%ecx,%ecx,8), %ecx + addl %eax, %ecx + movl 12(%ebp), %eax + addl 8(%ebp), %ecx + movb %al, (%ecx,%edx) + popl %ebp + ret + .size save_dqs_delay, .-save_dqs_delay + .type FlushDQSTestPattern_L18, @function +FlushDQSTestPattern_L18: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + leal 896(%eax), %edx + pushl %ebx + leal 640(%eax), %esi + subl $12, %esp + leal 1152(%eax), %ecx + leal 128(%eax), %ebx + movl %ecx, -20(%ebp) + leal 384(%eax), %edi + movl %edx, %ecx + movl %ebx, -24(%ebp) + movl %esi, %ebx + movl -24(%ebp), %eax + movl %edx, -16(%ebp) + movl -20(%ebp), %edx +#APP + clflush %fs:-128(%eax) + clflush %fs:-64(%eax) + clflush %fs:(%eax) + clflush %fs:64(%eax) + clflush %fs:-128(%edi) + clflush %fs:-64(%edi) + clflush %fs:(%edi) + clflush %fs:64(%edi) + clflush %fs:-128(%ebx) + clflush %fs:-64(%ebx) + clflush %fs:(%ebx) + clflush %fs:64(%ebx) + clflush %fs:-128(%ecx) + clflush %fs:-64(%ecx) + clflush %fs:(%ecx) + clflush %fs:64(%ecx) + clflush %fs:-128(%edx) + clflush %fs:-64(%edx) + +#NO_APP + addl $12, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size FlushDQSTestPattern_L18, .-FlushDQSTestPattern_L18 + .type TrainDQSPos, @function +TrainDQSPos: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $268, %esp + movl %eax, -264(%ebp) + xorl %eax, %eax + movl %edx, -268(%ebp) + movl %ecx, -272(%ebp) +.L371: + movl $255, -204(%ebp,%eax,4) + incl %eax + cmpl $48, %eax + jne .L371 + imull $9, 8(%ebp), %eax + xorl %edx, %edx + movl $0, -252(%ebp) + leal 36(,%eax,4), %eax + movl %eax, -236(%ebp) +.L373: + movl -264(%ebp), %ecx + movl -252(%ebp), %ebx + movl (%ecx), %eax + movl 20(%ebp), %ecx + leal (%ebx,%eax,8), %eax + testb $1, 728(%ecx,%eax,4) + je .L374 + movl -264(%ebp), %eax + movl %ebx, %edx + call Get_MCTSysAddr + movl $-1073741568, %ecx + movl %eax, -248(%ebp) + movl -248(%ebp), %edx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + cmpl $1, -272(%ebp) + movl $0, -216(%ebp) + jne .L424 + movl -248(%ebp), %eax + movl $16, %edx + movl -236(%ebp), %ecx + movl 12(%ebp), %ebx + sall $8, %eax +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP +.L424: + movl -216(%ebp), %eax + movl -204(%ebp,%eax,4), %eax + testl %eax, %eax + movl %eax, -208(%ebp) + je .L379 + pushl -216(%ebp) + movl -264(%ebp), %eax + movl -272(%ebp), %ecx + movl -268(%ebp), %edx + call SetDQSDelayAllCSR + cmpl $0, -272(%ebp) + popl %eax + jne .L381 + movl -248(%ebp), %eax + movl $16, %edx + movl -236(%ebp), %ecx + movl 12(%ebp), %ebx + sall $8, %eax +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP +.L381: + movl -248(%ebp), %eax + sall $8, %eax + cmpl $0, 8(%ebp) + movl %eax, -212(%ebp) + leal 640(%eax), %ebx + leal 128(%eax), %esi + leal 384(%eax), %edi + jne .L383 + xorl %eax, %eax + movl %esi, %ecx + movl %edi, %edx +#APP + movl %fs:-128(%ecx), %eax + movl %fs:-64(%ecx), %eax + movl %fs:(%ecx), %eax + movl %fs:64(%ecx), %eax + movl %fs:-128(%edx), %eax + movl %fs:-64(%edx), %eax + movl %fs:(%edx), %eax + movl %fs:64(%edx), %eax + movl %fs:-128(%ebx), %eax + +#NO_APP + movl 12(%ebp), %ebx + movl -212(%ebp), %eax + movl %ebx, -280(%ebp) + movl %eax, -276(%ebp) + jmp .L385 +.L383: + movl -212(%ebp), %ecx + xorl %eax, %eax + movl -212(%ebp), %edx + addl $896, %ecx + addl $1152, %edx +#APP + movl %fs:-128(%esi), %eax + movl %fs:-64(%esi), %eax + movl %fs:(%esi), %eax + movl %fs:64(%esi), %eax + movl %fs:-128(%edi), %eax + movl %fs:-64(%edi), %eax + movl %fs:(%edi), %eax + movl %fs:64(%edi), %eax + movl %fs:-128(%ebx), %eax + movl %fs:-64(%ebx), %eax + movl %fs:(%ebx), %eax + movl %fs:64(%ebx), %eax + movl %fs:-128(%ecx), %eax + movl %fs:-64(%ecx), %eax + movl %fs:(%ecx), %eax + movl %fs:64(%ecx), %eax + movl %fs:-128(%edx), %eax + movl %fs:-64(%edx), %eax + +#NO_APP + movl 12(%ebp), %edx + movl -212(%ebp), %ecx + cmpl $0, -268(%ebp) + movl %edx, -280(%ebp) + movl %ecx, -276(%ebp) + je .L385 + movl %ecx, %ebx + addl $8, %edx + addl $8, %ebx + movl %ebx, -276(%ebp) + movl %edx, -280(%ebp) +.L385: + movl $0, -224(%ebp) + xorl %edi, %edi + movl $255, -220(%ebp) +.L388: + movl -276(%ebp), %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + movl -280(%ebp), %eax + xorl %esi, %esi + movl %ebx, -232(%ebp) + movl (%eax), %eax + movl %eax, -228(%ebp) +.L389: + movl -232(%ebp), %edx + movl %esi, %ecx + movl -228(%ebp), %eax + shrl %cl, %edx + shrl %cl, %eax + cmpb %dl, %al + je .L390 + movl $-2, %eax + movl %edi, %ecx + roll %cl, %eax + andl %eax, -220(%ebp) +.L390: + incl %edi + addl $8, %esi + andl $7, %edi + cmpl $32, %esi + jne .L389 + testl %edi, %edi + jne .L393 + cmpl $1, 8(%ebp) + jne .L393 + addl $8, -276(%ebp) + addl $8, -280(%ebp) +.L393: + incl -224(%ebp) + cmpl $144, -224(%ebp) + je .L396 + addl $4, -276(%ebp) + addl $4, -280(%ebp) + jmp .L388 +.L396: + movl -248(%ebp), %eax + call SetTargetWTIO + cmpl $0, 8(%ebp) + jne .L398 + movl -212(%ebp), %ebx + movl -212(%ebp), %ecx + movl -212(%ebp), %eax + addl $640, %ebx + subl $-128, %ecx + addl $384, %eax +#APP + clflush %fs:-128(%ecx) + clflush %fs:-64(%ecx) + clflush %fs:(%ecx) + clflush %fs:64(%ecx) + clflush %fs:-128(%eax) + clflush %fs:-64(%eax) + clflush %fs:(%eax) + clflush %fs:64(%eax) + clflush %fs:-128(%ebx) + +#NO_APP + jmp .L400 +.L398: + movl -212(%ebp), %eax + call FlushDQSTestPattern_L18 +.L400: + movl -220(%ebp), %ebx + movl $-1073676265, %ecx + andl %ebx, -208(%ebp) + movl -208(%ebp), %edx + movl -216(%ebp), %eax + movl %edx, -204(%ebp,%eax,4) + xorl %eax, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP +.L379: + incl -216(%ebp) + cmpl $48, -216(%ebp) + jne .L424 + movl $1, %edx +.L374: + incl -252(%ebp) + cmpl $8, -252(%ebp) + jne .L373 + testl %edx, %edx + movl $0, -256(%ebp) + je .L405 + jmp .L403 +.L406: + movb -260(%ebp), %cl + movl $1, %eax + movl -276(%ebp), %edx + sall %cl, %eax + testl %eax, -204(%ebp,%edx,4) + jne .L407 + movl $1, -244(%ebp) + jmp .L409 +.L407: + cmpl $1, -244(%ebp) + jne .L410 + movl -276(%ebp), %esi + movl $0, -244(%ebp) + movl %esi, -240(%ebp) + jmp .L409 +.L410: + movl -276(%ebp), %edx + movl %edi, %eax + subl -240(%ebp), %edx + subl %ebx, %eax + movl -276(%ebp), %esi + movl $0, -244(%ebp) + cmpl %eax, %edx + jbe .L409 + movl -240(%ebp), %ebx + movl %esi, %edi +.L409: + incl -276(%ebp) + cmpl $48, -276(%ebp) + jne .L406 + testl %esi, %esi + jne .L415 + orl $14, -256(%ebp) + jmp .L417 +.L415: + movl %edi, %edx + subl %ebx, %edx + cmpl $2, %edx + ja .L418 + orl $15, -256(%ebp) + jmp .L417 +.L418: + movl %edx, %eax + movl -260(%ebp), %ecx + andl $1, %eax + cmpl $1, %eax + movl -264(%ebp), %eax + sbbl $-1, %ebx + shrl %edx + addl %edx, %ebx + movl -268(%ebp), %edx + pushl %ebx + movzbl %bl, %ebx + pushl -272(%ebp) + call SetDQSDelayCSR + movl -272(%ebp), %ecx + pushl %ebx + movl -260(%ebp), %edx + pushl 16(%ebp) + movl -268(%ebp), %eax + call save_dqs_delay + addl $16, %esp +.L417: + incl -260(%ebp) + cmpl $8, -260(%ebp) + je .L405 + jmp .L422 +.L403: + movl $0, -240(%ebp) + movl $0, -260(%ebp) + movl $0, -256(%ebp) +.L422: + xorl %edi, %edi + xorl %ebx, %ebx + xorl %esi, %esi + movl $0, -276(%ebp) + movl $1, -244(%ebp) + jmp .L406 +.L405: + movl -256(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size TrainDQSPos, .-TrainDQSPos + .type get_dqs_delay, @function +get_dqs_delay: + imull $18, %eax, %eax + pushl %ebp + movl %esp, %ebp + leal (%ecx,%ecx,8), %ecx + addl %eax, %ecx + addl 8(%ebp), %ecx + popl %ebp + movzbl (%ecx,%edx), %eax + ret + .size get_dqs_delay, .-get_dqs_delay +.globl read_nb_cfg_54 + .type read_nb_cfg_54, @function +read_nb_cfg_54: + pushl %ebp + movl $-1073676257, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + shrl $22, %edx + popl %ebp + andl $1, %edx + movl %edx, %eax + ret + .size read_nb_cfg_54, .-read_nb_cfg_54 +.globl get_node_core_id + .type get_node_core_id, @function +get_node_core_id: + pushl %ebp + movl %esp, %ebp + cmpl $0, 12(%ebp) + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + je .L441 + movl $1, %eax +#APP + cpuid +#NO_APP + shrl $24, %ebx + movl %ebx, %edx + movl %ebx, %eax + andl $15, %edx + andl $1, %eax + shrl %edx + jmp .L443 +.L441: + movl $1, %eax +#APP + cpuid +#NO_APP + shrl $24, %ebx + movl %ebx, %eax + movl %ebx, %edx + andl $15, %eax + andl $7, %edx + shrl $3, %eax +.L443: + movl %eax, 4(%esi) + movl %esi, %eax + movl %edx, (%esi) + popl %ebx + popl %esi + popl %ebp + ret $4 + .size get_node_core_id, .-get_node_core_id + .type clear_init_ram, @function +clear_init_ram: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + movl $516096, %ecx + pushl %edi + xorl %edi, %edi +#APP + cld + rep; stosl + +#NO_APP + popl %edi + popl %ebp + ret + .size clear_init_ram, .-clear_init_ram + .type set_init_ram_access, @function +set_init_ram_access: + pushl %ebp + movl $512, %ecx + movl %esp, %ebp + movl $6, %eax + xorl %edx, %edx +#APP + wrmsr +#NO_APP + movl $-2095104, %eax + movb $1, %cl + movb $-1, %dl +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size set_init_ram_access, .-set_init_ram_access + .type for_each_ap, @function +for_each_ap: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl %edx, -32(%ebp) + movl %ecx, -36(%ebp) + movl %eax, -28(%ebp) + call get_nodes + movl %eax, -24(%ebp) + call read_nb_cfg_54 + movl %eax, -20(%ebp) + jmp .L450 +.L451: + leal 24(%edi), %ecx + movl $3320, %edx + andl $31, %ecx + sall $11, %ecx + orb $3, %ch + movl %ecx, %eax + orl $-2147483416, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $12, %ebx + andl $3, %ebx + cmpl $0, -20(%ebp) + je .L452 + testl %ebx, %ebx + jne .L452 + orl $-2147483396, %ecx + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + andl $1048320, %eax + cmpl $265984, %eax + jne .L452 + movb $1, %bl + jmp .L457 +.L452: + cmpl $1, -32(%ebp) + movl %ebx, -16(%ebp) + jne .L459 +.L457: + movl $0, -16(%ebp) +.L459: + cmpl $2, -32(%ebp) + sete %al + movzbl %al, %esi + leal 1(%ebx), %eax + movl %edi, %ebx + imull %eax, %ebx + jmp .L460 +.L461: + cmpl $0, -20(%ebp) + movl %edi, %edx + movl $8, %eax + je .L464 + movl %ebx, %edx + movb $1, %al +.L464: + imull %esi, %eax + leal (%edx,%eax), %eax + cmpl -28(%ebp), %eax + je .L465 + pushl %edx + pushl %edx + pushl 8(%ebp) + pushl %eax + call *-36(%ebp) + addl $16, %esp +.L465: + incl %esi +.L460: + cmpl -16(%ebp), %esi + jbe .L461 + incl %edi +.L450: + cmpl -24(%ebp), %edi + jne .L451 + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size for_each_ap, .-for_each_ap + .type lapic_remote_read, @function +lapic_remote_read: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %eax, %ebx +.L473: + movl -18873600, %eax + testb $16, %ah + jne .L473 + sarl $4, %edx + orb $3, %dh + sall $24, %ebx + movl %ebx, -18873584 + movl %edx, -18873600 + xorl %edx, %edx +.L475: + movl -18873600, %eax + testb $16, %ah + je .L476 + cmpl $1000, %edx + je .L476 + incl %edx + jmp .L475 +.L476: + xorl %edx, %edx +.L479: + movl -18873600, %eax + andl $196608, %eax + cmpl $65536, %eax + jne .L480 + cmpl $1000, %edx + je .L482 + incl %edx + jmp .L479 +.L480: + cmpl $131072, %eax + jne .L482 + movl -18874176, %eax + movl %eax, (%ecx) + xorl %eax, %eax + jmp .L485 +.L482: + orl $-1, %eax +.L485: + popl %ebx + popl %ebp + ret + .size lapic_remote_read, .-lapic_remote_read + .type wait_cpu_state, @function +wait_cpu_state: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl %edx, %esi + pushl %ebx + movl $1999999, %ebx + subl $16, %esp + movl $0, -16(%ebp) +.L490: + leal -16(%ebp), %ecx + movl $896, %edx + movl %edi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L491 + movzbl -16(%ebp),%eax + cmpl %esi, %eax + jne .L491 + xorl %eax, %eax + jmp .L494 +.L491: + decl %ebx + jne .L490 + movl -16(%ebp), %eax + testl %eax, %eax + jne .L494 + movb $1, %al +.L494: + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size wait_cpu_state, .-wait_cpu_state + .type store_ap_apicid, @function +store_ap_apicid: + pushl %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + movl 8(%ebp), %ecx + movl (%eax), %edx + movl %ecx, 4(%eax,%edx,4) + incl %edx + movl %edx, (%eax) + popl %ebp + ret + .size store_ap_apicid, .-store_ap_apicid +.globl do_printk + .type do_printk, @function +do_printk: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + subl $24, %esp + cmpl $7, 8(%ebp) + jg .L505 + leal 16(%ebp), %eax + pushl %ecx + pushl %eax + pushl 12(%ebp) + movl %eax, -4(%ebp) + pushl $console_tx_byte + call vtxprintf + addl $16, %esp +.L505: + leave + ret + .size do_printk, .-do_printk + .section .rom.data.str1.1 +.LC3: + .string "wrong apicid, we want change %x, but it is %x\r\n" +.LC4: + .string "set vid failed for apicid =" +.LC5: + .string "%s" +.LC6: + .string "%02x" +.LC7: + .string "\r\n" +.LC8: + .string "set fid failed for apicid =" + .section .rom.text + .type set_fidvid, @function +set_fidvid: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %edx, %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl %eax, -32(%ebp) + movl -18874336, %eax + movl %ecx, -36(%ebp) + shrl $24, %eax + cmpl %eax, -32(%ebp) + je .L508 + pushl %eax + pushl -32(%ebp) + pushl $.LC3 + jmp .L544 +.L508: + movl %edx, %eax + movl $-1073676222, %ecx + shrl $8, %eax + shrl $16, %edx + andl $63, %eax + andl $63, %edx + movl %eax, -24(%ebp) + movl %edx, -28(%ebp) +#APP + rdmsr +#NO_APP + movl %eax, %esi + movl %eax, %ecx + movl %edx, %eax + andl $63, %esi + andl $63, %eax + movl %edx, %ebx + cmpl -28(%ebp), %eax + jne .L512 + cmpl -24(%ebp), %esi + je .L510 +.L512: + movl %ecx, %edi + shrl $16, %edi + andl $63, %edi + cmpl $41, %edi + jbe .L513 + shrl $8, %ecx + andl $63, %ecx + leal 10(%ecx), %edi + cmpl $41, %edi + jbe .L513 + movl $12, %edi +.L513: + shrl $8, %ebx + movl %esi, %eax + orl $65536, %eax + andl $16128, %ebx + orl %eax, %ebx + movl $-1073676223, %ecx + movl $1, %edx + movl %ebx, %eax +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L516: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + movl %edx, %ecx + jns .L517 + incl %ebx + cmpl $100000, %ebx + jne .L516 +.L517: + andl $63, %ecx + movl %ecx, -16(%ebp) + movl $8, -20(%ebp) + jmp .L519 +.L520: + cmpl $8, %esi + jbe .L521 + cmpl $8, -24(%ebp) + jbe .L521 + cmpl -24(%ebp), %esi + leal 2(%esi), %edx + jb .L525 + leal -2(%esi), %edx + jmp .L525 +.L521: + movl %esi, %eax + movl -24(%ebp), %edx + shrl %eax + imull $12, %eax, %eax + shrl %edx + movzbl next_fid_a.6702(%eax,%edx), %eax + testl %eax, %eax + jle .L526 + leal -8(%eax,%eax), %edx +.L525: + cmpl %edi, %edx + ja .L526 + movl -16(%ebp), %eax + orl $65536, %edx + movl $-1073676223, %ecx + sall $8, %eax + orl %edx, %eax + movl $20000, %edx +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L529: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + jns .L530 + incl %ebx + cmpl $100000, %ebx + jne .L529 +.L530: + decl -20(%ebp) + movl %eax, %esi + andl $63, %esi +.L519: + cmpl -24(%ebp), %esi + je .L526 + cmpl $0, -20(%ebp) + jne .L520 +.L526: + movl -28(%ebp), %eax + movl $-1073676223, %ecx + movl $1, %edx + sall $8, %eax + orl $65536, %eax + orl %esi, %eax +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L533: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + movl %edx, %ecx + jns .L534 + incl %ebx + cmpl $100000, %ebx + jne .L533 +.L534: + movl %ecx, %edx + movl %esi, %eax + andl $63, %edx + movl %edx, %edi + sall $16, %edi + sall $8, %eax + orl %eax, %edi + cmpl $0, -36(%ebp) + je .L510 + cmpl %edx, -28(%ebp) + je .L537 + pushl %eax + pushl $.LC4 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -32(%ebp) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L537: + cmpl %esi, -24(%ebp) + je .L510 + pushl %ebx + pushl $.LC8 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -32(%ebp) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 +.L544: + pushl $3 + call do_printk + addl $16, %esp +.L510: + leal -12(%ebp), %esp + movl %edi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size set_fidvid, .-set_fidvid + .section .rom.data.str1.1 +.LC9: + .string "%s%02x" + .section .rom.text + .type print_initcpu8_nocr, @function +print_initcpu8_nocr: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC9 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_initcpu8_nocr, .-print_initcpu8_nocr + .section .rom.data.str1.1 +.LC10: + .string "*" +.LC11: + .string "%s%08x\r\n" +.LC12: + .string " " + .section .rom.text + .type wait_ap_started, @function +wait_ap_started: + pushl %ebp + movl $51, %edx + movl %esp, %ebp + pushl %esi + pushl %ebx + movl 8(%ebp), %ebx + movl %ebx, %eax + call wait_cpu_state + testl %eax, %eax + movl %eax, %esi + je .L548 + movl %ebx, %edx + movl $.LC10, %eax + call print_initcpu8_nocr + pushl %esi + pushl $.LC10 + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret +.L548: + leal -8(%ebp), %esp + movl %ebx, %edx + popl %ebx + movl $.LC12, %eax + popl %esi + popl %ebp + jmp print_initcpu8_nocr + .size wait_ap_started, .-wait_ap_started + .section .rom.data.str1.1 +.LC13: + .string "%s%02x\r\n" + .section .rom.text + .type print_initcpu8, @function +print_initcpu8: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC13 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_initcpu8, .-print_initcpu8 + .type print_debug_pcar, @function +print_debug_pcar: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_debug_pcar, .-print_debug_pcar + .type print_debug_cp_run, @function +print_debug_cp_run: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_debug_cp_run, .-print_debug_cp_run + .section .rom.data.str1.1 +.LC14: + .string "mcp55_num:" + .section .rom.text + .type mcp55_early_setup_x, @function +mcp55_early_setup_x: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + xorl %esi, %esi + pushl %ebx + xorl %ebx, %ebx + subl $112, %esp + pushl $16 + pushl $C.178.6378 + leal -76(%ebp), %eax + pushl %eax + call memcpy + addl $16, %esp +.L559: + xorl %ecx, %ecx +.L560: + movl %ebx, %eax + movl $3320, %edx + sall $20, %eax + movl %eax, -112(%ebp) + movl %ecx, %eax + andl $31, %eax + sall $15, %eax + orl %eax, -112(%ebp) + shrl $4, -112(%ebp) + orl $-2147483648, -112(%ebp) + movl -112(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57217246, %eax + jne .L561 + movl %ebx, -28(%ebp) + movl %ecx, -44(%ebp) + movl %edi, -60(%ebp) + movl $1, -108(%ebp) + jmp .L563 +.L561: + incl %ecx + cmpl $32, %ecx + jne .L560 + incl %esi + addl $64, %ebx + addl $16384, %edi + cmpl $4, %esi + jne .L559 + movl $0, -108(%ebp) +.L563: + pushl %ebx + xorl %ebx, %ebx + pushl $.LC14 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl -108(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L566 +.L567: + movl -28(%ebp,%ebx,4), %ecx + movl $9, %edx + movl -44(%ebp,%ebx,4), %eax + pushl -60(%ebp,%ebx,4) + incl %ebx + andl $4095, %ecx + andl $31, %eax + sall $15, %eax + sall $20, %ecx + orl %eax, %ecx + movl $ctrl_devport_conf.6223, %eax + call setup_resource_map_offset + popl %ecx +.L566: + cmpl -108(%ebp), %ebx + jne .L567 + movl $0, -104(%ebp) + jmp .L569 +.L570: + movl -104(%ebp), %eax + movl -60(%ebp,%eax,4), %edx + movl -76(%ebp,%eax,4), %esi + movl -44(%ebp,%eax,4), %eax + movl %edx, -100(%ebp) + addl $10240, %edx + movl %edx, -88(%ebp) + movl -104(%ebp), %edx + movl %eax, %ebx + incl %ebx + movl %eax, -84(%ebp) + andl $31, %ebx + movl -28(%ebp,%edx,4), %edx + sall $15, %ebx + movl %edx, -80(%ebp) + sall $20, %edx + movl %edx, %eax + orb $16, %ah + orl %eax, %ebx + shrl $4, %ebx + orl $-2147483420, %ebx + movl %edx, -92(%ebp) + movl %ebx, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1008, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edi, %edi + movl $0, -96(%ebp) +.L571: + movl -88(%ebp), %ecx + leal 204(%ecx), %edx +#APP + inl %dx, %eax +#NO_APP + andb $249, %ah + orl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 48(%ecx), %edx +#APP + inl %dx, %eax +#NO_APP + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP +.L572: +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L572 + incl -96(%ebp) + addl $512, %edi + cmpl $3, -96(%ebp) + jne .L571 + movl -88(%ebp), %edx + addw $204, %dx +#APP + inl %dx, %eax +#NO_APP + andl $-369, %eax + orb $1, %ah + sall $4, %esi + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edx, %edx +.L575: + movb $1, %al +#APP + outb %al, $128 +#NO_APP + incl %edx + cmpl $32768, %edx + jne .L575 + movl $3320, %edi + movl %ebx, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1009, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edx, %edx +.L577: + movb $-24, %al +#APP + outb %al, $128 +#NO_APP + incl %edx + cmpl $32768, %edx + jne .L577 + movl -84(%ebp), %ebx + movw $160, %dx + movl $ctrl_conf_1.6320, %eax + pushl -100(%ebp) + xorl %esi, %esi + andl $31, %ebx + sall $15, %ebx + orl -92(%ebp), %ebx + movl %ebx, %ecx + call setup_resource_map_x_offset + popl %edx +.L579: + movl %esi, %ecx + movl $ctrl_conf_1_1.6321, %eax + pushl -100(%ebp) + andl $7, %ecx + sall $12, %ecx + movl $36, %edx + orl %ebx, %ecx + incl %esi + call setup_resource_map_x_offset + cmpl $3, %esi + popl %eax + jne .L579 + cmpl $0, -80(%ebp) + jne .L581 + pushl -100(%ebp) + movl $ctrl_conf_mcp55_only.6322, %eax + movl %ebx, %ecx + movl $132, %edx + call setup_resource_map_x_offset + cmpl $1, -108(%ebp) + popl %eax + jbe .L581 + pushl -100(%ebp) + movl $ctrl_conf_master_only.6323, %eax + movl %ebx, %ecx + movl $8, %edx + call setup_resource_map_x_offset + popl %eax +.L581: + pushl -100(%ebp) + movl $ctrl_conf_2.6324, %eax + movl %ebx, %ecx + movl $28, %edx + call setup_resource_map_x_offset + incl -104(%ebp) + popl %eax +.L569: + movl -108(%ebp), %eax + cmpl %eax, -104(%ebp) + jne .L570 + xorl %ebx, %ebx + jmp .L585 +.L586: + movl -28(%ebp,%ebx,4), %ecx + movl $9, %edx + movl -44(%ebp,%ebx,4), %eax + pushl -60(%ebp,%ebx,4) + incl %ebx + andl $4095, %ecx + andl $31, %eax + sall $15, %eax + sall $20, %ecx + orl %eax, %ecx + movl $ctrl_devport_conf_clear.6248, %eax + call setup_resource_map_offset + popl %eax +.L585: + cmpl -108(%ebp), %ebx + jne .L586 + leal -12(%ebp), %esp + xorl %eax, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size mcp55_early_setup_x, .-mcp55_early_setup_x + .section .rom.data.str1.1 +.LC15: + .string "No memory!!\r\n" + .section .rom.text +.globl sdram_no_memory + .type sdram_no_memory, @function +sdram_no_memory: + pushl %ebp + movl %esp, %ebp + subl $12, %esp + pushl $.LC15 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L604: +#APP + hlt +#NO_APP + jmp .L604 + .size sdram_no_memory, .-sdram_no_memory + .type print_debug_sdram_8, @function +print_debug_sdram_8: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %edx, %ebx + subl $8, %esp + pushl %eax + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + movl -4(%ebp), %ebx + leave + ret + .size print_debug_sdram_8, .-print_debug_sdram_8 + .section .rom.data.str1.1 +.LC16: + .string " CTLRMaxDelay=%02x" + .section .rom.text + .type train_DqsRcvrEn, @function +train_DqsRcvrEn: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + pushl %ebx + subl $380, %esp + movl (%eax), %eax + movl %edx, -380(%ebp) + movl %ecx, -384(%ebp) + movl %eax, %edx + imull $48, %eax, %eax + sall $4, %edx + leal 1304(%ecx,%edx), %edx + movl %edx, -320(%ebp) + movb 51(%eax,%ecx), %al + cmpl $1, -380(%ebp) + movb %al, -305(%ebp) + movzbl %al, %eax + movl %eax, -376(%ebp) + jne .L609 + movl $1, %ebx +.L611: + movl 12(%edi), %eax + movl %ebx, %ecx + movl $152, %edx + pushl $0 + call pci_write_config32_index_wait + movl 12(%edi), %eax + leal 32(%ebx), %ecx + pushl $0 + movl $152, %edx + incl %ebx + call pci_write_config32_index_wait + cmpl $4, %ebx + popl %eax + popl %edx + jne .L611 + movb $5, %bl +.L613: + movl 12(%edi), %eax + movl %ebx, %ecx + movl $152, %edx + pushl $791621423 + call pci_write_config32_index_wait + movl 12(%edi), %eax + leal 32(%ebx), %ecx + pushl $791621423 + movl $152, %edx + incl %ebx + call pci_write_config32_index_wait + cmpl $8, %ebx + popl %esi + popl %eax + jne .L613 +.L609: +#APP + movl %cr4, %eax +#NO_APP + orb $2, %ah +#APP + movl %eax, %cr4 +#NO_APP + call set_wrap32dis + movl 12(%edi), %esi + movl $3320, %edx + shrl $4, %esi + movl %esi, %ecx + andl $268435452, %ecx + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -296(%ebp) + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -296(%ebp), %eax + movl %ebx, %edx + andl $-524289, %eax +#APP + outl %eax, %dx +#NO_APP + cmpl $1, -380(%ebp) + jne .L614 + movl %esi, %ecx + movb $-8, %dl + andl $268435452, %ecx + orl $-2147483528, %ecx + movl %ecx, -388(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + movl -388(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $262144, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP +.L614: + movl %esi, %eax + movl $3320, %edx + andl $268435452, %eax + orl $-2147483500, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl $-1073676222, %ecx + andl $7, %ebx +#APP + rdmsr +#NO_APP + andl $63, %eax + shrl %eax + cmpl $12, %eax + jle .L616 + movzwl T1000_a.5177(%ebx,%ebx), %eax + jmp .L618 +.L616: + leal (%ebx,%eax,4), %eax + movzwl TT_a.5178(%eax,%eax), %eax +.L618: + leal -268(%ebp), %ecx + xorl %edx, %edx + andl $-16, %ecx + movzwl %ax, %eax + movl %ecx, -312(%ebp) + subl $-128, %ecx + cmpl $1, -380(%ebp) + movl %eax, -336(%ebp) + movl %ecx, -316(%ebp) + jne .L623 +.L621: + movl TestPattern0.5212(,%edx,4), %eax + movl -312(%ebp), %ecx + movl %eax, (%ecx,%edx,4) + movl TestPattern1.5213(,%edx,4), %eax + movl %eax, 128(%ecx,%edx,4) + incl %edx + cmpl $16, %edx + je .L622 + jmp .L621 +.L623: + movl TestPattern2.5214(,%edx,4), %eax + movl -312(%ebp), %ecx + movl %eax, (%ecx,%edx,4) + movl %eax, 128(%ecx,%edx,4) + incl %edx + cmpl $16, %edx + jne .L623 +.L622: + imull $48, (%edi), %eax + movl -384(%ebp), %edx + movl $0, -372(%ebp) + movl 8(%eax,%edx), %eax + testb $15, %al + jne .L626 + testb $-16, %al + setne %al + movzbl %al, %eax + movl %eax, -372(%ebp) +.L626: + movl -372(%ebp), %ecx + movl $0, -328(%ebp) + movl $0, -332(%ebp) + movl $0, -292(%ebp) + sall $3, %ecx + movl %ecx, -300(%ebp) + movl $0, -364(%ebp) + jmp .L627 +.L628: + movl -324(%ebp), %eax + shrl %eax + cmpb $0, -305(%ebp) + leal (%eax,%eax,2), %eax + leal 16(%eax), %edx + movl %edx, -368(%ebp) + je .L629 + cmpl $0, -372(%ebp) + je .L631 + movl 12(%edi), %eax + movl %edx, %ecx + movl $152, %edx + call pci_read_config32_index_wait + andl $255, %eax + movl %eax, -364(%ebp) + jmp .L631 +.L629: + cmpl $0, -372(%ebp) + je .L631 + addl $48, %eax + movl %eax, -368(%ebp) +.L631: + movl (%edi), %eax + movl -324(%ebp), %ecx + movl -384(%ebp), %edx + leal 0(,%eax,8), %ebx + leal (%ebx,%ecx), %eax + testb $1, 728(%edx,%eax,4) + je .L634 + pushl %edx + movl -372(%ebp), %edx + movl %edi, %eax + call Get_RcvrSysAddr + movl -384(%ebp), %edx + popl %ecx + movl -304(%ebp), %ecx + movl %eax, -356(%ebp) + addl $16384, %eax + movl %eax, -288(%ebp) + leal (%ebx,%ecx), %eax + testb $1, 728(%edx,%eax,4) + je .L636 + pushl %edx + movl -372(%ebp), %edx + movl %edi, %eax + call Get_RcvrSysAddr + movl -312(%ebp), %ecx + popl %edx + xorl %edx, %edx + pushl -316(%ebp) + movl %eax, -360(%ebp) + addl $16384, %eax + movl %eax, -292(%ebp) + movl -356(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + movl $1, %edx + pushl -316(%ebp) + movl -288(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + xorl %edx, %edx + pushl -316(%ebp) + movl -360(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + movl $1, %edx + pushl -316(%ebp) + movl -292(%ebp), %eax + call Write1LTestPattern + addl $16, %esp + movl $1, -344(%ebp) +.L638: + xorl %esi, %esi + cmpl $1, -380(%ebp) + je .L641 + movl -320(%ebp), %eax + movl -300(%ebp), %ecx + addl -304(%ebp), %eax + movzbl -1(%ecx,%eax), %esi +.L641: + movl $1, -340(%ebp) + jmp .L642 +.L643: + testl $1, %esi + movl $1, -348(%ebp) + movl $0, -352(%ebp) + jne .L646 + movl $0, -348(%ebp) + movl $1, -352(%ebp) +.L646: + movl 12(%edi), %eax + movl $152, %edx + movl -368(%ebp), %ecx + pushl %esi + call pci_write_config32_index_wait + cmpb $0, -305(%ebp) + popl %eax + je .L647 + movl -368(%ebp), %ecx + movl $152, %edx + movl 12(%edi), %eax + pushl %esi + addl $32, %ecx + call pci_write_config32_index_wait + popl %eax +.L647: + movl %esi, %edx + movl %edi, %eax + call SetMaxAL_RcvrDly + movl -356(%ebp), %eax + call Read1LTestPattern + movl -348(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -356(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5214 + pushl $TestPattern1.5213 + pushl $TestPattern0.5212 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -356(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + movl -288(%ebp), %eax + call Read1LTestPattern + movl -352(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -288(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5214 + pushl $TestPattern1.5213 + pushl $TestPattern0.5212 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -288(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + cmpl $0, -344(%ebp) + je .L652 + movl -360(%ebp), %eax + call Read1LTestPattern + movl -348(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -360(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5214 + pushl $TestPattern1.5213 + pushl $TestPattern0.5212 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -360(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + movl -292(%ebp), %eax + call Read1LTestPattern + movl -352(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -292(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5214 + pushl $TestPattern1.5213 + pushl $TestPattern0.5212 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -292(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + je .L652 +.L649: + movl $1, -340(%ebp) +.L655: + movl -288(%ebp), %eax + incl %esi + movl -356(%ebp), %edx + movl -360(%ebp), %ecx + movl %eax, -356(%ebp) + movl -292(%ebp), %eax + movl %edx, -288(%ebp) + movl %ecx, -292(%ebp) + movl %eax, -360(%ebp) +.L642: + cmpl $174, %esi + jbe .L643 + jmp .L684 +.L657: + cmpl $174, %esi + jbe .L658 +.L659: + orl $13, -328(%ebp) + movl $174, %esi +.L658: + cmpl $2, -380(%ebp) + jne .L660 + movl -320(%ebp), %eax + movl -300(%ebp), %edx + addl -304(%ebp), %eax + movzbl -1(%edx,%eax), %eax + addl %eax, %esi + shrl %esi +.L660: + movl -320(%ebp), %eax + movl %esi, %ecx + movl -300(%ebp), %edx + addl -304(%ebp), %eax + movb %cl, -1(%edx,%eax) + movl 12(%edi), %eax + movl $152, %edx + movl -368(%ebp), %ecx + pushl %esi + call pci_write_config32_index_wait + cmpb $0, -305(%ebp) + popl %eax + je .L662 + movl -368(%ebp), %ecx + movl $152, %edx + movl 12(%edi), %eax + pushl %esi + addl $32, %ecx + call pci_write_config32_index_wait + cmpl $0, -372(%ebp) + popl %ebx + je .L662 + movl 12(%edi), %eax + movl $152, %edx + pushl -364(%ebp) + movl -368(%ebp), %ecx + call pci_write_config32_index_wait + cmpl -364(%ebp), %esi + popl %ecx + jbe .L665 + movl %esi, %eax + subl -364(%ebp), %eax + jmp .L667 +.L665: + movl -364(%ebp), %eax + subl %esi, %eax +.L667: + imull $50, %eax, %eax + cmpl -336(%ebp), %eax + jbe .L662 + orl $12, -328(%ebp) +.L662: + cmpl -332(%ebp), %esi + jbe .L634 + movl %esi, -332(%ebp) +.L634: + addl $2, -324(%ebp) + addl $2, -304(%ebp) +.L670: + cmpl $7, -324(%ebp) + ja .L672 + cmpl $0, -328(%ebp) + je .L628 +.L672: + incl -372(%ebp) + addl $8, -300(%ebp) +.L627: + cmpl $1, -372(%ebp) + ja .L673 + cmpl $0, -328(%ebp) + jne .L673 + movl $0, -324(%ebp) + movl $1, -304(%ebp) + jmp .L670 +.L673: + movl -332(%ebp), %edx + movl %edi, %eax + call SetMaxAL_RcvrDly + movl %edi, %eax + call ResetDCTWrPtr + movl 12(%edi), %ebx + movl $3320, %edx + shrl $4, %ebx + movl %ebx, %ecx + andl $268435452, %ecx + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $524288, -296(%ebp) + andl $-524289, %edi + orl -296(%ebp), %edi + movl %esi, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + cmpl $1, -380(%ebp) + jne .L675 + andl $268435452, %ebx + movl $3320, %edi + orl $-2147483528, %ebx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-262145, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L675 +.L636: + pushl -316(%ebp) + xorl %edx, %edx + movl -312(%ebp), %ecx + movl -356(%ebp), %eax + call Write1LTestPattern + movl -288(%ebp), %eax + movl $1, %edx + pushl -316(%ebp) + movl -312(%ebp), %ecx + call Write1LTestPattern + popl %eax + popl %edx + movl $0, -344(%ebp) + jmp .L638 +.L652: + cmpl $1, -340(%ebp) + je .L657 + movl $0, -340(%ebp) + jmp .L655 +.L684: + movl $11, -328(%ebp) + jmp .L659 +.L675: + call clear_wrap32dis +#APP + movl %cr4, %eax +#NO_APP + andb $253, %ah +#APP + movl %eax, %cr4 +#NO_APP + pushl %esi + pushl -332(%ebp) + pushl $.LC16 + pushl $7 + call do_printk + addl $16, %esp + xorl %eax, %eax + cmpl $174, -332(%ebp) + sete %al + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size train_DqsRcvrEn, .-train_DqsRcvrEn + .section .rom.data.str1.1 +.LC17: + .string "disabling dimm" + .section .rom.text + .type disable_dimm, @function +disable_dimm: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + subl $16, %esp + pushl $.LC17 + pushl $.LC5 + pushl $7 + movl %edx, -20(%ebp) + movl %ecx, -24(%ebp) + call do_printk + addl $12, %esp + pushl -20(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl -24(%ebp), %eax + addl $16, %esp + movl (%eax), %eax + testb $15, %al + movl %eax, -16(%ebp) + jne .L686 + testb $-16, %al + je .L686 + movl -20(%ebp), %esi + movl 12(%ebx), %edi + movl $3320, %ebx + movl %ebx, %edx + addl %esi, %esi + shrl $4, %edi + leal 80(,%esi,4), %eax + orl %edi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal 84(,%esi,4), %esi + orl %esi, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax + jmp .L692 +.L686: + movl 12(%ebx), %esi + movl $3320, %ebx + movl -20(%ebp), %ecx + movl %ebx, %edx + shrl $4, %esi + leal 64(,%ecx,8), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -20(%ebp), %edi + movl %ebx, %edx + addl %edi, %edi + leal 68(,%edi,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + imull $5, -20(%ebp), %eax + movl -24(%ebp), %ecx + cmpb $4, 8(%eax,%ecx) + jne .L689 + leal 80(,%edi,4), %eax + movl %ebx, %edx + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal 84(,%edi,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +.L692: + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP +.L689: + movb -20(%ebp), %cl + movl $-2, %eax + movl -24(%ebp), %edx + roll %cl, %eax + andl -16(%ebp), %eax + movl %eax, (%edx) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size disable_dimm, .-disable_dimm + .type print_raminit, @function +print_raminit: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_raminit, .-print_raminit + .type print_linkn_in, @function +print_linkn_in: + pushl %ebp + movzbl %dl, %edx + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC13 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_linkn_in, .-print_linkn_in + .section .rom.data.str1.1 +.LC18: + .string "SBLink=" +.LC19: + .string "NC node|link=" +.LC20: + .string "\tbusn=" +.LC21: + .string "Detected error on Hypertransport Link\n" +.LC22: + .string "udev=" +.LC23: + .string "%08x" +.LC24: + .string "\tupos=" +.LC25: + .string "\tuoffs=" +.LC26: + .string "\tHT link capability not found\r\n" + .section .rom.text + .type ht_setup_chains_x, @function +ht_setup_chains_x: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl $3320, %esi + pushl %ebx + subl $188, %esp + movl %eax, -176(%ebp) + call get_nodes + movl %esi, %edx + movb %al, -137(%ebp) + movl $-2147434396, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl $.LC18, %eax + shrl $8, %ebx + movl %ebx, %edx + andl $3, %ebx + andl $3, %edx + call print_linkn_in + movl -176(%ebp), %eax + movzbl -137(%ebp), %edx + movl %ebx, 1832(%eax) + movl %edx, 1432(%eax) + movl $0, 1836(%eax) + movl $-2147434016, %eax + movl %edx, -172(%ebp) + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + movl %edi, %edx + sall $8, %eax + orl $1056964611, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434044, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + sall $4, %ebx + movl %edi, %edx + orb $48, %bh + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434048, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $51, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $228, %edi + movl $204, %esi +.L698: + movl %edi, %eax + movl $3320, %ebx + andl $2147483644, %eax + movl %ebx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ebx, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + leal -4(%esi), %eax + movl %ebx, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $4, %edi + addl $8, %esi + cmpl $240, %edi + jne .L698 + movb $64, -138(%ebp) + movl $4, -136(%ebp) + movl $0, -48(%ebp) + jmp .L700 +.L701: + movzbl %al, %eax + movl %eax, -32(%ebp) + addl $24, %eax + andl $31, %eax + sall $15, %eax + movl %eax, -128(%ebp) + movl -136(%ebp), %eax + movl $0, -56(%ebp) + movl $152, -52(%ebp) + sall $12, %eax + addl $12288, %eax + movl %eax, -184(%ebp) +.L702: + movl -128(%ebp), %eax + movl $3320, %edx + shrl $4, %eax + orl -52(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $23, %eax + cmpl $7, %eax + jne .L703 + movb -32(%ebp), %dl + xorl %edi, %edi + movl $224, %ebx + movb -56(%ebp), %al + sall $4, %edx + andl $15, %eax + orl %eax, %edx + movl $.LC19, %eax + movzbl %dl, %edx + call print_linkn_in + movl -56(%ebp), %eax + movl -32(%ebp), %esi + sall $8, %eax + sall $4, %esi + orl $3, %eax + orl %eax, %esi +.L705: + movl %ebx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movzwl %ax,%ecx + movl %eax, %edx + movl %esi, %eax + andl $65535, %eax + cmpl %eax, %ecx + je .L706 + testl %ecx, %ecx + je .L706 + incl %edi + addl $4, %ebx + movl %edi, %edx + cmpb $4, %dl + jne .L705 + jmp .L710 +.L706: + andl $15, %edx + cmpl $3, %edx + je .L703 + movzbl -138(%ebp), %ebx + movl $.LC20, %eax + andl $255, %edi + movl %ebx, %edx + call print_linkn_in + leal 224(,%edi,4), %eax + movl $3320, %ecx + orl $-2147434240, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + addl $63, %ebx + sall $16, %eax + movb $-4, %dl + sall $24, %ebx + orl %ebx, %eax + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 0(,%edi,8), %ebx + movl %ecx, %edx + leal 196(%ebx), %eax + addb $64, -138(%ebp) + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl -56(%ebp), %eax + movb $-4, %dl + sall $4, %eax + orl -32(%ebp), %eax + orl -184(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + leal 192(%ebx), %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl -136(%ebp), %eax + movb $-4, %dl + sall $12, %eax + orl $3, %eax +#APP + outl %eax, %dx +#NO_APP + addl $4, -136(%ebp) + addl $16384, -184(%ebp) +.L703: + incl -56(%ebp) + addl $32, -52(%ebp) + cmpl $3, -56(%ebp) + jne .L702 +.L710: + incl -48(%ebp) +.L700: + movl -172(%ebp), %ebx + cmpl %ebx, -48(%ebp) + movb -48(%ebp), %al + jne .L701 + movb $1, -168(%ebp) + jmp .L713 +.L714: + movb -168(%ebp), %al + movl $224, %esi + leal 24(%eax), %ebx + andl $31, %ebx + sall $15, %ebx + orb $16, %bh +.L715: + movl %esi, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %ebx, %edi + movl %ecx, %edx + shrl $4, %edi + movl %eax, -36(%ebp) + movl %edi, %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -36(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $4, %esi + cmpl $240, %esi + jne .L715 + movl $196, %ebx +.L717: + movl %ebx, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -40(%ebp) + movl %edi, %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -40(%ebp), %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + addl $8, %ebx + cmpl $228, %ebx + jne .L717 + movb $-64, %bl +.L719: + movl %ebx, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -44(%ebp) + movl %edi, %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -44(%ebp), %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + addl $8, %ebx + cmpl $224, %ebx + jne .L719 + incb -168(%ebp) +.L713: + movb -137(%ebp), %bl + cmpb %bl, -168(%ebp) + jb .L714 + movb $0, -129(%ebp) + movl $224, %ecx +.L722: + movl %ecx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $15, %eax + cmpl $1, %eax + sbbb $-1, -129(%ebp) + addl $4, %ecx + cmpl $240, %ecx + jne .L722 + movl -176(%ebp), %edx + movzbl -129(%ebp), %eax + movb $0, -121(%ebp) + movl $0, 1820(%edx) + movl %eax, 1824(%edx) + jmp .L726 +.L727: + movzbl -121(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + leal 224(,%eax,4), %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %eax, %edi + andl $240, %eax + andl $3840, %edi + shrl $4, %eax + addl $24, %eax + movl %eax, %edx + andl $31, %edx + sall $15, %edx + shrl $3, %edi + movl %edx, -96(%ebp) + shrl $4, %edx + movl %edx, -196(%ebp) + leal 148(%edi), %edx + orl %edx, -196(%ebp) + movl %ecx, %edx + orl $-2147483648, -196(%ebp) + movl -196(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -192(%ebp) + movl %ecx, %edx + movl -196(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ebx, %edx + andl $-16776961, -192(%ebp) + xorw %ax, %ax + shrl $8, %eax + orl %eax, -192(%ebp) + movl -192(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $16711680, %esi + movl %esi, %ebx + shrl $16, %ebx + leal -128(%edi), %esi + movb %bl, -120(%ebp) + movb $0, -88(%ebp) + movl $67504394, -92(%ebp) + jmp .L768 +.L729: + movzbl -25(%ebp), %esi + movl %edi, %eax + movl %ecx, -96(%ebp) + movb %al, -88(%ebp) +.L768: + movl %esi, %edx + movl -96(%ebp), %ebx + movzbl %dl, %edx + movl %edx, -60(%ebp) + movl -92(%ebp), %edx + shrl $4, %ebx + shrl $24, %edx + addl -60(%ebp), %edx + orl %edx, %ebx + movl $3320, %edx + movl %ebx, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + andl $2, %eax + leal 3324(%eax), %ebx + movl %ebx, %edx +#APP + inw %dx, %ax +#NO_APP + movzwl %ax, %edx + movl %eax, %edi + testb $64, %dl + jne .L730 + andl $272, %edx + je .L732 + movl %ecx, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + orw $272, %di + movl %ebx, %edx + movzwl %di, %eax +#APP + outw %ax, %dx +#NO_APP + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + testl $272, %edi + je .L732 + pushl %ebx + pushl $.LC21 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp + jmp .L735 +.L732: + testw $32, %di + je .L768 +.L735: + movzbl -120(%ebp), %ebx + movl $3320, %edx + sall $20, %ebx + movl %ebx, -64(%ebp) + shrl $4, %ebx + movl %ebx, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edx + leal -1(%eax), %eax + cmpl $-3, %eax + ja .L730 + cmpl $65535, %edx + je .L730 + cmpl $-65536, %edx + je .L730 + movl -64(%ebp), %eax + call ht_lookup_slave_capability + testb %al, %al + movb %al, -25(%ebp) + jne .L738 + pushl %ecx + pushl $.LC22 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -96(%ebp) + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC24 + pushl $.LC5 + pushl $3 + call do_printk + movl %esi, %edx + addl $12, %esp + movzbl %dl, %eax + pushl %eax + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC25 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -92(%ebp) + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC26 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp + jmp .L730 +.L738: + movzbl -25(%ebp), %eax + movl %ebx, %edi + movl $3320, %ebx + movl %ebx, %edx + movl %eax, %esi + addl $2, %esi + orl %esi, %edi + movl %edi, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %eax, -180(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx + andl $2, %edx + addw $3324, %dx + movw %dx, -186(%ebp) +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + movb -88(%ebp), %al + movl %ebx, %edx + andl $-32, %edi + andl $31, %eax + orl %eax, %edi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movzwl %di, %eax + movw -186(%ebp), %dx +#APP + outw %ax, %dx +#NO_APP + movb -88(%ebp), %cl + shrw $5, %di + movb -88(%ebp), %dl + movl %edi, %eax + andl $31, %eax + andl $31, %ecx + sall $15, %ecx + orl -64(%ebp), %ecx + leal (%edx,%eax), %edi + movl %ebx, %edx + movl %ecx, %eax + shrl $4, %eax + orl %esi, %eax + movl %eax, -192(%ebp) + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -192(%ebp), %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + movl -176(%ebp), %ebx + testb $4, %ah + movl 1820(%ebx), %eax + je .L740 + imull $24, %eax, %eax + leal 1424(%eax,%ebx), %eax + movl -96(%ebp), %ebx + leal 12(%eax), %edx + movl %ecx, 12(%edx) + movl $134877458, 20(%edx) + movl %ebx, 12(%eax) + movl -60(%ebp), %eax + movl -92(%ebp), %ebx + movl $67505422, -92(%ebp) + movl %eax, 4(%edx) + movl -180(%ebp), %eax + movl %ebx, 8(%edx) + movl %eax, 16(%edx) + movl -176(%ebp), %edx + incl 1820(%edx) +.L742: + movl %edi, %ebx + cmpb %bl, -88(%ebp) + jne .L729 +.L730: + incb -121(%ebp) +.L726: + movb -129(%ebp), %al + cmpb %al, -121(%ebp) + jne .L727 + movl -176(%ebp), %edx + movl 1836(%edx), %ecx + andl $4095, %ecx + sall $20, %ecx + movl %ecx, %ebx + orl $1044480, %ebx + jmp .L744 +.L745: + movl %ecx, %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57217246, %eax + je .L746 + addl $4096, %ecx +.L744: + cmpl %ebx, %ecx + jbe .L745 + orl $-1, %ecx +.L746: + movl -176(%ebp), %ebx + shrl $15, %ecx + andl $31, %ecx + movl %ecx, 1828(%ebx) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L740: + movl -176(%ebp), %edx + imull $24, %eax, %eax + movl -96(%ebp), %ebx + leal 1424(%eax,%edx), %eax + leal 12(%eax), %edx + movl %ebx, 12(%eax) + movl -60(%ebp), %eax + movl -92(%ebp), %ebx + movl %ecx, 12(%edx) + movl $67505422, 20(%edx) + movl %eax, 4(%edx) + movl -180(%ebp), %eax + movl %ebx, 8(%edx) + movl $134877458, -92(%ebp) + movl %eax, 16(%edx) + movl -176(%ebp), %edx + incl 1820(%edx) + jmp .L742 + .size ht_setup_chains_x, .-ht_setup_chains_x + .type die, @function +die: + pushl %ebp + movl %esp, %ebp + subl $12, %esp + pushl %eax + pushl $.LC5 + pushl $0 + call do_printk + addl $16, %esp +.L770: +#APP + hlt +#NO_APP + jmp .L770 + .size die, .-die + .section .rom.data.str1.1 +.LC27: + .string " Unknown\r\n" + .section .rom.text + .type set_TT, @function +set_TT: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + subl $12, %esp + movl 28(%ebp), %esi + cmpl 20(%ebp), %esi + movl %ecx, -16(%ebp) + movl 12(%ebp), %edi + jb .L775 + cmpl 24(%ebp), %esi + jbe .L773 +.L775: + pushl %eax + pushl 32(%ebp) + pushl $.LC5 + pushl $3 + call do_printk + movl $.LC27, %eax + call die + addl $16, %esp +.L773: + movl 12(%ebx), %ebx + movl $3320, %edx + movl -16(%ebp), %eax + movl %ebx, -20(%ebp) + shrl $4, -20(%ebp) + orl %eax, -20(%ebp) + andl $2147483644, -20(%ebp) + orl $-2147483648, -20(%ebp) + movl -20(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movb 8(%ebp), %cl + movb $-8, %dl + sall %cl, %edi + notl %edi + andl %edi, %eax + movl %eax, -24(%ebp) + movl -20(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + subl 16(%ebp), %esi + movl %ebx, %edx + sall %cl, %esi + orl %esi, -24(%ebp) + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size set_TT, .-set_TT + .section .rom.data.str1.1 +.LC28: + .string "No memory?" +.LC29: + .string "RAM: 0x" +.LC30: + .string " KB\r\n" + .section .rom.text + .type set_top_mem, @function +set_top_mem: + pushl %ebp + testl %eax, %eax + movl %esp, %ebp + pushl %esi + movl %edx, %esi + pushl %ebx + movl %eax, %ebx + jne .L778 + movl $.LC28, %eax + call die + pushl %eax + pushl $.LC29 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $0 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC30 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L780 +.L778: + pushl %eax + pushl $.LC29 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC30 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + cmpl $4194304, %ebx + jbe .L781 + movl %ebx, %eax + movl $-1073676259, %ecx + shrl $22, %ebx + sall $10, %eax + movl %ebx, %edx +#APP + wrmsr +#NO_APP + jmp .L783 +.L781: + cmpl $4128767, %ebx + jbe .L780 +.L783: + testl %esi, %esi + movl %esi, %ebx + jne .L780 + movl $4128768, %ebx +.L780: + movl %ebx, %eax + movl $-1073676262, %ecx + shrl $22, %ebx + sall $10, %eax + movl %ebx, %edx +#APP + wrmsr +#NO_APP + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size set_top_mem, .-set_top_mem + .section .rom.data.str1.1 +.LC31: + .string "No memory for this cpu\r\n" +.LC32: + .string "Bad RANK Size --\r\n" +.LC33: + .string "Bad SPD value\r\n" +.LC34: + .string "Registered\r\n" +.LC35: + .string "Unbuffered\r\n" +.LC36: + .string "min_cycle_time to low" +.LC37: + .string "spd_set_dram_timing dimm_err!\n" +.LC38: + .string "TrwtTO" +.LC39: + .string "Twrrd" +.LC40: + .string "Twrwr" +.LC41: + .string "Trdrd" +.LC42: + .string "FourActWindow" +.LC43: + .string "DcqBypassMax" +.LC44: + .string "set_ecc spd_device: 0x%x\n" +.LC45: + .string "RdWrQByp" +.LC46: + .string "Interleaved\r\n" +.LC47: + .string "Unrecoverable error reading SPD data. No qualified DIMMs?" + .section .rom.text + .type sdram_set_spd_registers, @function +sdram_set_spd_registers: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $236, %esp + movl %eax, -200(%ebp) + movl (%eax), %eax + cmpb $0, (%edx,%eax) + je .L1078 + imull $48, %eax, %eax + xorl %ebx, %ebx + xorl %esi, %esi + leal 8(%edx,%eax), %eax + movl %eax, -196(%ebp) +.L790: + movl -200(%ebp), %edx + movw 20(%edx,%esi,2), %ax + testw %ax, %ax + je .L791 + movzwl %ax, %eax + movl $2, %edx + call spd_read_byte + cmpl $8, %eax + jne .L791 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, %ebx +.L791: + movl -200(%ebp), %edx + movw 28(%edx,%esi,2), %ax + testw %ax, %ax + je .L794 + movzwl %ax, %eax + movl $2, %edx + call spd_read_byte + cmpl $8, %eax + jne .L794 + leal 4(%esi), %ecx + movb $1, %al + sall %cl, %eax + orl %eax, %ebx +.L794: + incl %esi + cmpl $4, %esi + jne .L790 + movl -196(%ebp), %ecx + testb %bl, %bl + movl %ebx, (%ecx) + jne .L798 + pushl %eax + pushl $.LC31 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1078 +.L798: + movl %ebx, %eax + shrl $4, %ebx + andl $15, %eax + andl $15, %ebx + cmpl %ebx, %eax + jne .L800 + movl -200(%ebp), %ebx + movl $3320, %edx + movl 16(%ebx), %eax + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + movl $0, -184(%ebp) + jne .L803 + jmp .L800 +.L804: + movb -184(%ebp), %cl + movl $1, %eax + movl -196(%ebp), %ebx + sall %cl, %eax + testl %eax, (%ebx) + je .L805 + movzwl %dx, %edx + movl -184(%ebp), %eax + xorl %edi, %edi + movl %edx, -188(%ebp) + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %eax + movl %eax, -192(%ebp) +.L807: + movzbl addresses.4189(%edi), %ebx + movl -188(%ebp), %eax + movl %ebx, %edx + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + js .L808 + movl -192(%ebp), %eax + movl %ebx, %edx + call spd_read_byte + testl %eax, %eax + js .L808 + cmpl %eax, %esi + jne .L800 + incl %edi + cmpl $24, %edi + jne .L807 +.L805: + incl -184(%ebp) + cmpl $4, -184(%ebp) + je .L812 +.L803: + movl -184(%ebp), %ecx + movl -200(%ebp), %ebx + movw 20(%ebx,%ecx,2), %dx + testw %dx, %dx + jne .L804 +.L812: + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %edi + orl $2304, %edi + shrl $4, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1025, %esi + movl %ebx, %edx + orl $2048, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + movl (%ecx), %eax + movb $1, 43(%ecx) + jmp .L813 +.L800: + movl -196(%ebp), %ebx + movl (%ebx), %ecx + movb $0, 43(%ebx) + movb $0, 44(%ebx) + movl %ecx, %edx + movl %ecx, %eax + shrl $4, %edx + andl $15, %eax + andl $15, %edx + cmpl %edx, %eax + je .L814 + testl %edx, %edx + je .L816 + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %esi + shrl $4, %esi + movl %esi, %ebx + andl $268435452, %ebx + orl $-2147483488, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $16, %edi + movb $-4, %dl + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %ebx + movl %ecx, %edx + andl $268435452, %ebx + orl $-2147483504, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, -248(%ebp) + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -248(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + movb $1, 44(%ecx) + jmp .L816 +.L814: + movl -196(%ebp), %ebx + andb $15, %cl + movl %ecx, (%ebx) +.L816: + movl -196(%ebp), %edx + movl (%edx), %eax +.L813: + movl -196(%ebp), %ecx + movl %eax, (%ecx) + incl %eax + je .L818 + movl $0, -180(%ebp) + movl $2, -48(%ebp) + movl $84, -216(%ebp) + movl $80, -220(%ebp) + movl $68, -224(%ebp) + movl $84, -228(%ebp) + movl $80, -232(%ebp) + movl %ecx, -236(%ebp) +.L820: + movl -180(%ebp), %ebx + movl -200(%ebp), %eax + movl -196(%ebp), %edx + movb -180(%ebp), %cl + movw 20(%eax,%ebx,2), %si + movl (%edx), %ebx + movl $1, %edx + movl %edx, %eax + sall %cl, %eax + testl %eax, %ebx + je .L821 + movzwl %si, %ebx + jmp .L823 +.L821: + movl -180(%ebp), %ecx + addl $4, %ecx + sall %cl, %edx + testl %edx, %ebx + je .L824 + movl -180(%ebp), %eax + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx +.L823: + movl -236(%ebp), %eax + movl -180(%ebp), %ecx + movl -236(%ebp), %edx + addl $4, %eax + movl %eax, -152(%ebp) + movl %ecx, -156(%ebp) + movb $0, 4(%edx) + movl $3, %edx + movb $0, 1(%eax) + movb $0, 2(%eax) + movb $0, 4(%eax) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + testb %al, %al + je .L828 + movl -152(%ebp), %ecx + movl $4, %edx + addb %al, (%ecx) + movb %al, 1(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + testb %al, %al + je .L828 + movl -152(%ebp), %ecx + movl $17, %edx + addb %al, (%ecx) + movb %al, 2(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax + je .L828 +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -152(%ebp), %edx + addb %al, (%edx) + movb %al, 3(%edx) + movl $6, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax + cmpl $72, %eax + je .L836 + cmpl $64, %eax + jne .L828 +.L836: +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -236(%ebp), %ecx + movl $5, %edx + addb 4(%ecx), %al + subl $3, %eax + movb %al, 4(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $7, %eax + cmpl $1, %eax + leal 1(%eax), %edx + jbe .L839 + cmpl $4, %edx + jne .L828 +.L839: + movl -152(%ebp), %eax + movb %dl, 4(%eax) + movl $31, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + cmpl $4, %eax + jg .L841 + addl $8, %eax +.L841: + movl -236(%ebp), %ecx + leal 22(%eax), %edx + movzbl 4(%ecx), %eax + cmpl %eax, %edx + je .L843 + pushl %eax + pushl $.LC32 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L828: + movl $.LC33, %eax + call die +.L826: + movl -152(%ebp), %ebx + movb $0, (%ebx) + movb $0, 1(%ebx) + movb $0, 2(%ebx) + movb $0, 3(%ebx) + movb $0, 4(%ebx) +.L843: + movl -152(%ebp), %eax + movb (%eax), %al + testb %al, %al + movb %al, -173(%ebp) + je .L845 + xorl %ebx, %ebx + cmpb $26, %al + jbe .L849 + movzbl %al, %ecx + movb $1, %bl + subl $8, %ecx + sall %cl, %ebx + orl $1, %ebx +.L849: + movl -152(%ebp), %edx + movb 4(%edx), %dl + movb %dl, -157(%ebp) + xorl %edx, %edx + cmpb $1, -157(%ebp) + jbe .L852 + movzbl -173(%ebp), %ecx + movb $1, %dl + subl $8, %ecx + sall %cl, %edx + orl $1, %edx +.L852: + movl -196(%ebp), %ecx + movb 43(%ecx), %cl + testb %cl, %cl + movb %cl, -158(%ebp) + je .L853 + leal (%ebx,%ebx), %eax + andl $1, %ebx + orl %eax, %ebx + leal (%edx,%edx), %eax + andl $1, %edx + orl %eax, %edx +.L853: + movl %ebx, %esi + movl -196(%ebp), %ebx + movl %edx, %edi + andl $536346625, %esi + andl $536346625, %edi + movl (%ebx), %ebx + movl %ebx, -164(%ebp) + andl $15, %ebx + movl %ebx, -168(%ebp) + jne .L855 + testb $-16, -164(%ebp) + je .L855 + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %ebx + movl -232(%ebp), %eax + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + orl -228(%ebp), %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, %eax + jmp .L1113 +.L855: + movl -200(%ebp), %ecx + movl -180(%ebp), %edx + movl 12(%ecx), %ebx + movl $3320, %ecx + leal 64(,%edx,8), %eax + movl %ecx, %edx + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -224(%ebp), %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + cmpb $4, -157(%ebp) + jne .L858 + movl -220(%ebp), %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + orl -216(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +.L1113: + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP +.L858: + testl %esi, %esi + je .L860 + cmpl $0, -168(%ebp) + jne .L862 + testb $-16, -164(%ebp) + je .L862 + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %edi + orl $2560, %edi + shrl $4, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movb $-8, %dl + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb -180(%ebp), %cl + movl $-1577058304, %eax + movl %ebx, %edx + shrl %cl, %eax + notl %eax + andl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L865 +.L862: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %ecx + shrl $4, %ecx + movl %ecx, %ebx + andl $268435452, %ebx + orl $-2147483512, %ebx + movl %ecx, -172(%ebp) + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movb -180(%ebp), %cl + movl $-1577058304, %edi + movl %edi, %esi + shrl %cl, %esi + notl %esi + andl %esi, %eax + cmpb $4, -157(%ebp) + movl %eax, -240(%ebp) + jne .L866 + movb -48(%ebp), %cl + movl %edi, %eax + shrl %cl, %eax + notl %eax + andl %eax, -240(%ebp) +.L866: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + cmpb $0, -158(%ebp) + je .L860 + movl -172(%ebp), %ebx + movb $-8, %dl + andl $268435452, %ebx + orl $-2147483488, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl %esi, %eax + cmpb $4, -157(%ebp) + movl %eax, -240(%ebp) + jne .L869 + movb -48(%ebp), %cl + shrl %cl, %edi + notl %edi + andl %edi, %eax + movl %eax, -240(%ebp) +.L869: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP +.L860: + cmpl $0, -168(%ebp) + jne .L871 + testb $-16, -164(%ebp) + je .L871 +.L865: + movl -48(%ebp), %edx + movl %edx, -156(%ebp) +.L871: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %esi + orl $2048, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl -156(%ebp), %edi + movl $15, %edx + movl %eax, %ebx + movl %edx, %eax + sall $2, %edi + movl %edi, %ecx + sall %cl, %eax + notl %eax + andl %eax, %ebx + cmpb $4, -157(%ebp) + jne .L873 + leal 8(%edi), %ecx + sall %cl, %edx + notl %edx + andl %edx, %ebx +.L873: + cmpb $26, -173(%ebp) + jbe .L875 + movl -152(%ebp), %eax + movl -152(%ebp), %ecx + movzbl 1(%eax), %eax + movl %eax, -248(%ebp) + movzbl 3(%ecx), %edx + leal (%eax,%eax,2), %eax + movzbl 2(%ecx), %ecx + imull $12, %edx, %edx + leal cs_map_aaa.3871(%eax,%edx), %eax + movzbl -72(%eax,%ecx), %edx + movl %edi, %ecx + movl %edx, %eax + sall %cl, %eax + orl %eax, %ebx + cmpb $4, -157(%ebp) + jne .L875 + leal 8(%edi), %ecx + sall %cl, %edx + orl %edx, %ebx +.L875: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L824: + incl -180(%ebp) + addl $5, -236(%ebp) + addl $8, -232(%ebp) + addl $8, -228(%ebp) + addl $8, -224(%ebp) + addl $8, -220(%ebp) + addl $8, -216(%ebp) + incl -48(%ebp) + cmpl $4, -180(%ebp) + jne .L820 + movl -196(%ebp), %edx + movl (%edx), %eax + incl %eax + je .L818 + xorl %ebx, %ebx + movl $0, -148(%ebp) +.L880: + movl -196(%ebp), %edx + movl -200(%ebp), %ecx + movl (%edx), %esi + movl $1, %edx + movw 20(%ecx,%ebx,2), %ax + movl %edx, %edi + movb %bl, %cl + sall %cl, %edi + testl %edi, %esi + je .L881 + movzwl %ax, %eax + jmp .L883 +.L881: + leal 4(%ebx), %ecx + sall %cl, %edx + testl %edx, %esi + je .L884 + movl -200(%ebp), %edx + movzwl 28(%edx,%ebx,2), %eax +.L883: + movl $20, %edx + call spd_read_byte + testl %eax, %eax + js .L1001 + andl $63, %eax + cmpl $1, %eax + je .L889 + cmpl $16, %eax + jne .L884 +.L889: + orl %edi, -148(%ebp) +.L884: + incl %ebx + cmpl $4, %ebx + jne .L880 + movl -200(%ebp), %ecx + movl 16(%ecx), %eax + movl $3320, %ecx + movl %ecx, %edx + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -200(%ebp), %ebx + movl %ecx, %edx + movl 12(%ebx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -196(%ebp), %ebx + movl %eax, %ecx + andl $-65537, %ecx + movb $1, 41(%ebx) + cmpl $0, -148(%ebp) + jne .L891 + orl $65536, %ecx + movb $0, 41(%ebx) +.L891: + movl -200(%ebp), %edx + movl 12(%edx), %eax + movl $3320, %edx + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + cmpb $0, 41(%edx) + je .L893 + pushl %eax + pushl $.LC34 + jmp .L1114 +.L893: + pushl %eax + pushl $.LC35 +.L1114: + pushl $.LC5 + pushl $7 + call do_printk + movl -196(%ebp), %ecx + addl $16, %esp + movl (%ecx), %eax + incl %eax + je .L818 + movl -200(%ebp), %ebx + movl $3320, %edx + movl 16(%ebx), %eax + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $5, %eax + andl $3, %eax + movzwl min_cycle_times.4294(%eax,%eax), %eax + cmpl $592, %eax + movl %eax, -128(%ebp) + jae .L897 + movl $592, -128(%ebp) +.L897: + movl $3, -132(%ebp) + movl $0, -52(%ebp) +.L898: + movl -196(%ebp), %ecx + movl -52(%ebp), %eax + movl -200(%ebp), %edx + movl (%ecx), %ebx + movb -52(%ebp), %cl + movw 20(%edx,%eax,2), %si + movl $1, %edx + movl %edx, %eax + sall %cl, %eax + testl %eax, %ebx + je .L899 + movzwl %si, %esi + movl %esi, -144(%ebp) + jmp .L901 +.L899: + movl -52(%ebp), %ecx + addl $4, %ecx + sall %cl, %edx + testl %edx, %ebx + je .L902 + movl -52(%ebp), %ebx + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %ebx + movl %ebx, -144(%ebp) +.L901: + movl -144(%ebp), %eax + movl $18, %edx + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + jle .L902 +#APP + bsrl %eax, %edi + jnz 1f + movl $-1, %edi + 1: + +#NO_APP + leal -2(%edi), %ebx + movl $1280, -136(%ebp) + movl $6, -140(%ebp) +.L905: + leal -3(%ebx), %eax + cmpl $3, %eax + ja .L906 + movl %esi, %eax + movb %bl, %cl + sarl %cl, %eax + testb $1, %al + je .L906 + movl %edi, %eax + negl %eax + movzbl latency_indicies.4293+2(%ebx,%eax), %edx + movl -144(%ebp), %eax + call spd_read_byte + testl %eax, %eax + js .L845 + call convert_to_linear + cmpl -128(%ebp), %eax + jb .L906 + cmpl -136(%ebp), %eax + jl .L912 + jne .L906 + cmpl %ebx, -140(%ebp) + jle .L906 +.L912: + movl %eax, -136(%ebp) + movl %ebx, -140(%ebp) +.L906: + cmpl %edi, %ebx + je .L916 + incl %ebx + jmp .L905 +.L916: + cmpl $6, -140(%ebp) + jg .L902 + movl -136(%ebp), %ebx + cmpl %ebx, -128(%ebp) + jae .L919 + movl %ebx, -128(%ebp) +.L919: + movl -132(%ebp), %eax + cmpl %eax, -140(%ebp) + jbe .L902 + movl -140(%ebp), %edx + movl %edx, -132(%ebp) +.L902: + incl -52(%ebp) + cmpl $4, -52(%ebp) + jne .L898 + xorl %edi, %edi +.L922: + movl -196(%ebp), %eax + movl $1, %edx + movl -200(%ebp), %ecx + movl (%eax), %ebx + movl %edx, %eax + movw 20(%ecx,%edi,2), %si + movl %edi, %ecx + sall %cl, %eax + testl %eax, %ebx + je .L923 + movzwl %si, %esi + jmp .L925 +.L923: + leal 4(%edi), %ecx + sall %cl, %edx + testl %edx, %ebx + je .L926 + movl -200(%ebp), %ebx + movzwl 28(%ebx,%edi,2), %esi +.L925: + movl $18, %edx + movl %esi, %eax + call spd_read_byte + cmpl $0, %eax + movl %eax, %edx + jl .L845 + je .L926 +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + xorl %ebx, %ebx + leal -2(%eax), %ecx +.L930: + movl %edx, %eax + sarl %cl, %eax + testb $1, %al + je .L931 + cmpl -132(%ebp), %ecx + je .L933 +.L931: + incl %ebx + cmpl $3, %ebx + je .L934 + incl %ecx + jmp .L930 +.L933: + movzbl latency_indicies.4293(%ebx), %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L845 + call convert_to_linear + cmpl -128(%ebp), %eax + jbe .L926 +.L934: + movl -196(%ebp), %ecx + movl %edi, %edx + movl -200(%ebp), %eax + call disable_dimm + movl -196(%ebp), %edx + movl %eax, (%edx) +.L926: + incl %edi + cmpl $4, %edi + jne .L922 + movl $speed, %edx + jmp .L938 +.L939: + movzwl 24(%edi), %eax + leal 24(%edi), %edx + cmpl %eax, -128(%ebp) + ja .L940 +.L938: + cmpw $0, (%edx) + movl %edx, %edi + jne .L939 + movl $.LC36, %eax + call die +.L940: + movl -200(%ebp), %ecx + movl 12(%ecx), %ebx + orl $2368, %ebx + shrl $4, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, -248(%ebp) + movl $3320, %ebx + movl -248(%ebp), %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-8, %ecx + movl %esi, %edx + orl 8(%edi), %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + pushl %eax + leal 12(%edi), %eax + pushl %eax + pushl $.LC5 + pushl $7 + call do_printk + movl -200(%ebp), %ecx + movl %ebx, %edx + movl 12(%ecx), %eax + orl $2176, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -248(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl -132(%ebp), %eax + andl $-8, %ecx + movl %esi, %edx + decl %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + addl $16, %esp + movl (%ecx), %eax + incl %eax + je .L818 +.L909: + movl 8(%edi), %eax + movl -196(%ebp), %edx + movb %al, 45(%edx) + leal -36(%ebp), %eax + pushl $24 + pushl %edi + pushl %eax + call memcpy + movl 8(%edi), %ebx + movl $-1073676222, %ecx + movzbl -34(%ebp), %esi +#APP + rdmsr +#NO_APP + andl $63, %eax + addl $12, %esp + shrl %eax + cmpl $12, %eax + jle .L943 + movl %esi, %ecx + movzbl %cl, %eax + jmp .L945 +.L943: + cmpl $3, %ebx + jle .L946 + movl %esi, %ebx + movzbl %bl, %eax + jmp .L945 +.L946: + movzbl dv_a.4258(%ebx,%eax,4), %eax +.L945: + movb %al, -34(%ebp) + movl $0, -124(%ebp) + movl $4, -56(%ebp) +.L948: + movl -196(%ebp), %eax + movl $1, %edi + movb -124(%ebp), %cl + movl $1, -240(%ebp) + movl (%eax), %edx + sall %cl, %edi + movl %edx, %esi + andl %edi, %esi + jne .L949 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L951 +.L949: + movl -124(%ebp), %eax + testl %esi, %esi + movl -200(%ebp), %ecx + movzwl 20(%ecx,%eax,2), %ebx + jne .L952 + movb -56(%ebp), %cl + sall %cl, -240(%ebp) + testl %edx, -240(%ebp) + je .L952 + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx +.L952: + movl $41, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + js .L969 + movl $40, %edx + movl %ebx, %eax + call spd_read_byte + movzbl -34(%ebp), %edx + movl %edx, %ebx + sarl $4, %eax + andl $7, %eax + movzbl fraction.4394(%eax), %eax + leal (%eax,%esi,4), %eax + imull $10, %eax, %eax + leal -1(%eax,%edx), %ecx + movl %ecx, %eax + cltd + idivl %ebx + cmpl $10, %eax + movl %eax, %esi + ja .L957 + movl $11, %esi + jmp .L959 +.L957: + xorl %ebx, %ebx + cmpl $26, %eax + ja .L961 +.L959: + movl -200(%ebp), %eax + movl $3320, %edx + movl 12(%eax), %ecx + orl $2176, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $16, %eax + andl $15, %eax + addl $11, %eax + cmpl %esi, %eax + jae .L962 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal -11(%esi), %eax + andl $-983041, %ebx + sall $16, %eax + movb $-4, %dl + orl %eax, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L962 +.L1108: + pushl $5 + movl -196(%ebp), %edx + pushl $2 + movl -124(%ebp), %ecx + pushl $2 + movl -200(%ebp), %eax + pushl $3 + pushl $22 + pushl $28 + pushl $136 + pushl (%edx) + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + movl -196(%ebp), %ecx + movl -124(%ebp), %ebx + movl -200(%ebp), %eax + movl (%ecx), %edx + movzwl 20(%eax,%ebx,2), %esi + testl %edi, %edx + jne .L966 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L966 + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L966: + movl $30, %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L969 + sall $2, %eax + movzbl -34(%ebp), %edx + imull $10, %eax, %eax + movl %edx, %ebx + leal -1(%eax,%edx), %ecx + movl %ecx, %eax + cltd + idivl %ebx + cmpl $4, %eax + movl %eax, %esi + ja .L971 + movl $5, %esi + jmp .L973 +.L971: + xorl %ebx, %ebx + cmpl $18, %eax + ja .L961 +.L973: + movl -200(%ebp), %eax + movl $3320, %edx + movl 12(%eax), %ecx + orl $2176, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $12, %eax + andl $15, %eax + addl $3, %eax + cmpl %esi, %eax + jae .L975 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal -3(%esi), %eax + andb $15, %bh + sall $12, %eax + movb $-4, %dl + orl %eax, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L975 +.L969: + orl $-1, %ebx + jmp .L961 +.L1109: + movl -196(%ebp), %edx + cmpb $0, 43(%edx) + jne .L978 + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + xorl %ecx, %ecx + testb $4, %ah + jne .L981 +.L978: + movl $2, %ecx +.L981: + leal 3(%ecx), %eax + movl -196(%ebp), %ebx + pushl %eax + movl -200(%ebp), %eax + leal 2(%ecx), %edx + movl -124(%ebp), %ecx + pushl %edx + pushl %edx + pushl $1 + pushl $11 + pushl $38 + pushl $136 + pushl (%ebx) + leal -36(%ebp), %esi + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + pushl $6 + movl -196(%ebp), %eax + movl %esi, %edx + pushl $3 + movl -124(%ebp), %ecx + pushl $3 + pushl $3 + pushl $20 + pushl $36 + pushl $136 + pushl (%eax) + movl -200(%ebp), %eax + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + movl -196(%ebp), %ecx + movl -124(%ebp), %ebx + movl -200(%ebp), %eax + movl (%ecx), %edx + movzwl 20(%eax,%ebx,2), %esi + testl %edi, %edx + jne .L984 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L984 + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L984: + movl $12, %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L987 + movl -200(%ebp), %edx + decl %eax + sete %al + movzbl %al, %esi + addl $2, %esi + movl 12(%edx), %ecx + movl $3320, %edx + orl $2240, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + andl $-196609, %ebx + sall $16, %esi + orl %esi, %ebx + cmpl %ebx, %eax + je .L992 + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L992 +.L1110: + movl -124(%ebp), %edx + movl -200(%ebp), %ecx + movl -196(%ebp), %eax + movzwl 20(%ecx,%edx,2), %ebx + movl (%eax), %edx + testl %edi, %edx + jne .L995 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L995 + movl -124(%ebp), %eax + movl $2, %esi + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx + jmp .L998 +.L995: + xorl %esi, %esi +.L998: + movl $13, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L987 +#APP + bsrl %eax, %edx + jnz 1f + movl $-1, %edx + 1: + +#NO_APP + imull $5, -56(%ebp), %eax + movl -196(%ebp), %ecx + movl -200(%ebp), %ebx + movzbl -16(%eax,%ecx), %eax + leal -25(%eax), %edi + movl $6, %eax + subl %edx, %eax + movl $3320, %edx + subl %eax, %edi + movl 12(%ebx), %eax + orl $2240, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -240(%ebp) +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %esi, %edx + movl %eax, %ebx + movzbl %dl, %eax + addl -124(%ebp), %eax + leal (%eax,%eax,2), %eax + leal 20(%eax), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + andl $7, %eax + cmpl %edi, %eax + jae .L951 + movl $3320, %edx + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $7, %eax + movb $-4, %dl + sall %cl, %eax + notl %eax + andl %eax, %ebx + sall %cl, %edi + orl %edi, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L951 +.L961: + pushl %esi + pushl %esi + pushl $.LC37 + pushl $7 + call do_printk + addl $16, %esp + testl %ebx, %ebx + js .L1001 + movl -124(%ebp), %edx + movl -196(%ebp), %ecx + movl -200(%ebp), %eax + call disable_dimm + movl -196(%ebp), %edx + movl %eax, (%edx) +.L951: + incl -124(%ebp) + incl -56(%ebp) + cmpl $4, -124(%ebp) + jne .L948 + movl -196(%ebp), %ecx + movl $2, %esi + movl -196(%ebp), %edi + movl $0, -104(%ebp) + movl $0, -108(%ebp) + movl (%ecx), %ecx + addl $8, %edi + movl $0, -112(%ebp) + movl $0, -116(%ebp) + movl %ecx, -120(%ebp) +.L1004: + movl -200(%ebp), %ebx + movl $1, %edx + leal -2(%esi), %ecx + movw 16(%ebx,%esi,2), %ax + movl %edx, %ebx + sall %cl, %ebx + testl %ebx, -120(%ebp) + je .L1005 + movzwl %ax, %eax + jmp .L1007 +.L1005: + leal 2(%esi), %ecx + sall %cl, %edx + testl %edx, -120(%ebp) + je .L1008 + movl -200(%ebp), %edx + movzwl 24(%edx,%esi,2), %eax +.L1007: + cmpb $1, (%edi) + jne .L1010 + orl %ebx, -112(%ebp) +.L1010: + cmpb $10, -2(%edi) + jne .L1012 + orl %ebx, -116(%ebp) +.L1012: + movl $13, %edx + call spd_read_byte + movb (%edi), %dl + cmpl $4, %eax + jne .L1014 + orl %ebx, -104(%ebp) + cmpb $4, %dl + jne .L1008 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, -104(%ebp) + jmp .L1008 +.L1014: + cmpl $16, %eax + jne .L1008 + orl %ebx, -108(%ebp) + cmpb $4, %dl + jne .L1008 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, -108(%ebp) +.L1008: + incl %esi + addl $5, %edi + cmpl $6, %esi + jne .L1004 + movl -196(%ebp), %ebx + movl -104(%ebp), %eax + movl -112(%ebp), %ecx + movl -108(%ebp), %edx + movl %eax, 24(%ebx) + movl -116(%ebp), %eax + movl %ecx, 32(%ebx) + movl %edx, 28(%ebx) + movl %eax, 36(%ebx) + movzbl -33(%ebp), %eax + leal -36(%ebp), %ebx + pushl %ecx + movl %ebx, %edx + pushl $.LC38 + movl $140, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $9 + pushl $2 + pushl $2 + pushl $7 + pushl $4 + call set_TT + movzbl -32(%ebp), %eax + addl $28, %esp + pushl $.LC39 + movl $140, %ecx + movl %ebx, %edx + pushl %eax + movl -200(%ebp), %eax + pushl $3 + pushl $0 + pushl $0 + pushl $3 + pushl $10 + call set_TT + movzbl -31(%ebp), %eax + addl $28, %esp + pushl $.LC40 + movl $140, %ecx + movl %ebx, %edx + pushl %eax + movl -200(%ebp), %eax + pushl $3 + pushl $1 + pushl $1 + pushl $3 + pushl $12 + call set_TT + movzbl -30(%ebp), %eax + addl $28, %esp + pushl $.LC41 + movl %ebx, %edx + movl $140, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $5 + pushl $2 + pushl $2 + pushl $3 + pushl $14 + call set_TT + movl -196(%ebp), %edx + addl $32, %esp + movl -28(%ebp), %eax + cmpl $0, 36(%edx) + je .L1020 + movzbl faw_1k.4809(%eax), %eax + jmp .L1022 +.L1020: + movzbl faw_2k.4810(%eax), %eax +.L1022: + pushl %edx + movl $148, %ecx + pushl $.LC42 + pushl %eax + movl -200(%ebp), %eax + pushl $20 + pushl $8 + pushl $7 + leal -36(%ebp), %ebx + pushl $15 + movl %ebx, %edx + pushl $28 + call set_TT + movzbl -29(%ebp), %eax + addl $28, %esp + pushl $.LC43 + movl %ebx, %edx + movl $148, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $15 + pushl $0 + pushl $0 + pushl $15 + pushl $24 + call set_TT + movl -200(%ebp), %ecx + movl 12(%ecx), %esi + shrl $4, %esi + movl %esi, %ebx + andl $268435452, %ebx + orl $-2147483500, %ebx + movl %ebx, -244(%ebp) + movl $3320, %ebx + movl -244(%ebp), %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl -244(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-241, %edi + movl %ecx, %edx + orl $192, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -200(%ebp), %edx + movl 16(%edx), %eax + movl %ebx, %edx + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $268435452, %esi + movl %eax, %edi + orl $-2147483504, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + addl $32, %esp + andl $-524289, %ebx + andl $8, %edi + je .L1023 + orl $524288, %ebx +.L1023: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + xorl %esi, %esi + testl $524288, %ebx + movb $1, 42(%edx) + jne .L1028 + jmp .L1115 +.L1080: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-524289, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx +.L1115: + movb $0, 42(%edx) + jmp .L1027 +.L1028: + movl -196(%ebp), %ecx + movl $1, %edx + movl %edx, %eax + movl (%ecx), %edi + movl %esi, %ecx + sall %cl, %eax + testl %eax, %edi + jne .L1029 + leal 4(%esi), %ecx + sall %cl, %edx + testl %edx, %edi + je .L1031 + movl -200(%ebp), %edx + pushl %edi + movzwl 28(%edx,%esi,2), %eax + pushl %eax + pushl $.LC44 + pushl $7 + call do_printk + addl $16, %esp +.L1029: + movl -200(%ebp), %ecx + movl $11, %edx + movzwl 20(%ecx,%esi,2), %eax + call spd_read_byte + testb $2, %al + je .L1080 +.L1031: + incl %esi + cmpl $4, %esi + jne .L1028 +.L1027: + movl -200(%ebp), %ebx + movl $3320, %edx + movl 12(%ebx), %edi + shrl $4, %edi + movl %edi, %esi + andl $268435452, %esi + orl $-2147483504, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + andb $15, %ch + movl 24(%edx), %eax + movl %ebx, %edx + andl $15, %eax + sall $12, %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + cmpb $100, -34(%ebp) + jne .L1034 + movl -196(%ebp), %ecx + cmpb $0, 43(%ecx) + je .L1034 + movl (%ecx), %edx + xorl %ebx, %ebx + xorl %ecx, %ecx + andl $15, %edx +.L1037: + movl %edx, %eax + andl $1, %eax + cmpl $1, %eax + sbbl $-1, %ebx + incl %ecx + cmpl $8, %ecx + je .L1040 + shrl %edx + jmp .L1037 +.L1040: + cmpl $2, %ebx + movl $3, -244(%ebp) + je .L1043 +.L1034: + movl $1, -244(%ebp) +.L1043: + movl $3320, %ecx + movl %esi, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -248(%ebp) + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + sall $4, -244(%ebp) + movl %ebx, %edx + andl $-49, -248(%ebp) + movl -244(%ebp), %eax + orl %eax, -248(%ebp) + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $268435452, %edi + movl %ecx, %edx + orl $-2147483488, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-449, %esi + movl %ebx, %edx + orl $224, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + pushl %ebx + movl -200(%ebp), %eax + movl $160, %ecx + pushl $.LC45 + pushl $2 + pushl $3 + pushl $0 + pushl $0 + pushl $3 + pushl $2 + leal -36(%ebp), %edx + call set_TT + movl -196(%ebp), %ecx + addl $32, %esp + movl (%ecx), %eax + incl %eax + je .L818 + movl -200(%ebp), %eax + xorl %esi, %esi + xorl %edi, %edi + movb 43(%ecx), %bl + movl $0, -84(%ebp) + movl $255, -88(%ebp) + movl 12(%eax), %eax + movb %bl, -97(%ebp) + movl $64, -212(%ebp) + shrl $4, %eax + movl %eax, %ebx + andl $268435452, %ebx + movl %eax, -96(%ebp) + orl $-2147483520, %ebx +.L1045: + movl -96(%ebp), %eax + movl $3320, %edx + orl -212(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1046 + shrl $19, %eax + incl %esi + andl $1023, %eax + cmpl $0, -84(%ebp) + jne .L1048 + movl %eax, -84(%ebp) + jmp .L1050 +.L1048: + cmpl %eax, -84(%ebp) + jne .L1051 +.L1050: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %edi, %ecx + sarl %ecx + sall $2, %ecx + shrl %cl, %eax + andl $15, %eax + cmpl $255, -88(%ebp) + jne .L1052 + movl %eax, -88(%ebp) + jmp .L1046 +.L1052: + cmpl %eax, -88(%ebp) + jne .L1051 +.L1046: + incl %edi + addl $4, -212(%ebp) + cmpl $8, %edi + jne .L1045 +#APP + bsrl %esi, %edi + jnz 1f + movl $-1, %edi + 1: + +#NO_APP + movl $1, %edx + movl %edi, %ecx + movl %edx, %eax + sall %cl, %eax + cmpl %esi, %eax + jne .L1051 + testl %edi, %edi + jle .L1051 + cmpl $3, %edi + jg .L1051 + movl -88(%ebp), %ebx + movl %edx, %esi + movzbl csbase_low_f0_shift.3963(%ebx), %ecx + sall %cl, %esi + cmpb $0, -97(%ebp) + je .L1057 + addl %esi, %esi +.L1057: + movl -84(%ebp), %eax + movl %edi, %ecx + movl $0, -80(%ebp) + movl $1, -92(%ebp) + movl $64, -208(%ebp) + sall %cl, %eax + leal -1(%eax), %ebx + movl %esi, %eax + sall %cl, %eax + subl %esi, %eax + notl %eax + sall $19, %ebx + andl $16352, %eax + orl %eax, %ebx +.L1059: + movl -96(%ebp), %ecx + movl $3320, %edx + orl -208(%ebp), %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1060 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -92(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + testb $1, -80(%ebp) + jne .L1062 + movl -80(%ebp), %eax + movb $-8, %dl + sarl %eax + leal 96(,%eax,4), %eax + orl -96(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1062: + addl %esi, -92(%ebp) +.L1060: + incl -80(%ebp) + addl $4, -208(%ebp) + cmpl $8, -80(%ebp) + jne .L1059 + pushl %ecx + pushl $.LC46 + pushl $.LC5 + pushl $7 + call do_printk + movl -84(%ebp), %ebx + leal 17(%edi), %ecx + addl $16, %esp + sall %cl, %ebx + testl %ebx, %ebx + je .L1051 + jmp .L1065 +.L1116: + movl -200(%ebp), %edx + xorl %edi, %edi + xorl %ebx, %ebx + movl $0, -76(%ebp) + movl $64, -204(%ebp) + movl 12(%edx), %esi + shrl $4, %esi +.L1067: + movl -204(%ebp), %eax + movl $3320, %edx + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + movl %eax, %edx + je .L1068 + cmpl -76(%ebp), %eax + jbe .L1068 + leal 24(%edi), %ecx + movl $1, %eax + sall %cl, %eax + testl %eax, -72(%ebp) + jne .L1068 + movl %edi, %ebx + movl %edx, -76(%ebp) +.L1068: + incl %edi + addl $4, -204(%ebp) + cmpl $8, %edi + jne .L1067 + cmpl $0, -76(%ebp) + je .L1073 + leal 24(%ebx), %eax + movl -76(%ebp), %edi + movl $1, -240(%ebp) + movb %al, %cl + movl -72(%ebp), %eax + sall %cl, -240(%ebp) + orl %eax, -240(%ebp) + movl -240(%ebp), %edx + leal 64(,%ebx,4), %eax + shrl $19, %edi + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + addl %edi, %edx + movl %edx, -72(%ebp) + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + sall $19, -240(%ebp) + movb $-4, %dl + orl $1, -240(%ebp) + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + testb $1, %bl + jne .L1116 + shrl %ebx + movb $-8, %dl + leal 96(,%ebx,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1(%edi), %eax + movb $-4, %dl + sall $19, %eax + orl $16352, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L1116 +.L1073: + movl -72(%ebp), %ebx + sall $17, %ebx +.L1065: + movl -200(%ebp), %edx + pushl (%edx) + pushl %edx + call memory_end_k + addl %eax, %ebx + movl %ebx, -60(%ebp) + movl -200(%ebp), %ebx + leal 0(,%eax,4), %esi + movl -60(%ebp), %edx + xorw %si, %si + orl $3, %esi + movl (%ebx), %ecx + sall $2, %edx + xorw %dx, %dx + leal -65536(%edx), %edi + leal 0(,%ecx,8), %ebx + orl %ecx, %edi + leal 68(%ebx), %eax + addl $64, %ebx + movl %eax, -64(%ebp) + popl %eax + popl %edx + movl %ebx, -68(%ebp) + movl $790528, %ebx +.L1076: + movl -64(%ebp), %eax + movl %ebx, %edx + movl $3320, %ecx + shrl $4, %edx + movl %edx, -244(%ebp) + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -68(%ebp), %eax + movl %ecx, %edx + orl %eax, -244(%ebp) + andl $2147483644, -244(%ebp) + orl $-2147483648, -244(%ebp) + movl -244(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $32768, %ebx + cmpl $1052672, %ebx + jne .L1076 + movl -60(%ebp), %eax + xorl %edx, %edx + call set_top_mem + jmp .L1078 +.L818: + movl $.LC47, %eax + call die + jmp .L1078 +.L808: + movl -196(%ebp), %ecx + movl $-1, (%ecx) + jmp .L818 +.L845: + movl -196(%ebp), %ebx + movl $-1, (%ebx) + jmp .L818 +.L962: + pushl $6 + movl -196(%ebp), %edx + pushl $3 + movl -124(%ebp), %ecx + pushl $3 + movl -200(%ebp), %eax + pushl $3 + pushl $4 + pushl $29 + pushl $136 + pushl (%edx) + leal -36(%ebp), %esi + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1108 + jmp .L961 +.L975: + pushl $6 + movl -196(%ebp), %ecx + pushl $3 + movl -200(%ebp), %eax + pushl $3 + pushl $3 + pushl $8 + pushl $27 + pushl $136 + pushl (%ecx) + movl -124(%ebp), %ecx + leal -36(%ebp), %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1109 + jmp .L961 +.L992: + pushl $3 + movl -196(%ebp), %ebx + pushl $1 + movl -124(%ebp), %ecx + pushl $0 + movl -200(%ebp), %eax + pushl $3 + pushl $8 + pushl $37 + pushl $140 + pushl (%ebx) + leal -36(%ebp), %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1110 + jmp .L961 +.L1001: + movl -196(%ebp), %eax + movl $-1, (%eax) + jmp .L818 +.L1051: + movl $0, -72(%ebp) + jmp .L1116 +.L987: + pushl %eax + pushl %eax + pushl $.LC37 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1001 +.L1078: + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size sdram_set_spd_registers, .-sdram_set_spd_registers + .section .rom.data.str1.1 +.LC48: + .string "Ram1." +.LC49: + .string "Ram2." +.LC50: + .string "Ram3\r\n" +.LC51: + .string "No memory\r\n" +.LC52: + .string "\tdimm_mask = " +.LC53: + .string "\tx4_mask = " +.LC54: + .string "\tx16_mask = " +.LC55: + .string "\tsingle_rank_mask = " +.LC56: + .string "\tODC = " +.LC57: + .string "\tAddr Timing= " +.LC58: + .string "Initializing memory: " +.LC59: + .string "." +.LC60: + .string " failed\r\n" +.LC61: + .string " done\r\n" +.LC62: + .string "WB" +.LC63: + .string "Setting variable MTRR %d, base: %4dMB, range: %4dMB, type %s\r\n" +.LC64: + .string "set DQS timing:RcvrEn:Pass1: " +.LC65: + .string "set DQS timing:DQSPos: " +.LC66: + .string "\r\nDQS Training Rd Wr failed ctrl" +.LC67: + .string "Total DQS Training : tsc " +.LC68: + .string "%s[%02x]=%08x%08x\r\n" +.LC69: + .string "mem_trained[" +.LC70: + .string "]=" +.LC71: + .string "mem trained failed\r\n" +.LC72: + .string "Ram4\r\n" +.LC73: + .string "set DQS timing:RcvrEn:Pass2: " + .section .rom.text +.globl sdram_initialize + .type sdram_initialize, @function +sdram_initialize: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $1356, %esp + movl 12(%ebp), %edi + movl $0, -1356(%ebp) + jmp .L1118 +.L1119: + movl -1356(%ebp), %edx + movl $.LC48, %eax + call print_debug_sdram_8 + movl 4(%edi), %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $285216802, %eax + movl (%edi), %eax + je .L1120 + movl 16(%ebp), %edx + movb $0, (%edx,%eax) + jmp .L1122 +.L1120: + movl 16(%ebp), %ecx + xorl %esi, %esi + movb $1, (%ecx,%eax) + movl 4(%edi), %ebx + movl %ebx, -1352(%ebp) +.L1123: + movl register_values.3726(,%esi,4), %edx + movl -1352(%ebp), %ecx + movl %edx, %eax + andl $255, %edx + xorb %al, %al + leal -786432(%eax,%ecx), %eax + movl $3320, %ecx + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -1364(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl register_values.3726+4(,%esi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -1368(%ebp) + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl register_values.3726+8(,%esi,4), %ecx + movl %ebx, %edx + orl %ecx, -1368(%ebp) + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %esi + cmpl $114, %esi + jne .L1123 +.L1122: + incl -1356(%ebp) + addl $36, %edi +.L1118: + movl 8(%ebp), %ecx + cmpl %ecx, -1356(%ebp) + jl .L1119 + movl 12(%ebp), %ebx + xorl %esi, %esi + jmp .L1125 +.L1126: + movl %esi, %edx + movl $.LC49, %eax + call print_debug_sdram_8 + movl 16(%ebp), %edx + movl %ebx, %eax + incl %esi + addl $36, %ebx + call sdram_set_spd_registers +.L1125: + cmpl 8(%ebp), %esi + jl .L1126 + pushl %ebx + pushl $.LC50 + pushl $.LC5 + pushl $7 + call do_printk + pushl 8(%ebp) + pushl 12(%ebp) + call memory_end_k + addl $24, %esp + testl %eax, %eax + jne .L1128 + movl $.LC51, %eax + call die +.L1128: + movl 12(%ebp), %ebx + movl $0, -1348(%ebp) + addl $12, %ebx + movl %ebx, -1240(%ebp) + jmp .L1130 +.L1131: + movl -1348(%ebp), %esi + movl 16(%ebp), %eax + cmpb $0, (%esi,%eax) + je .L1132 + movl -1240(%ebp), %edx + movl (%edx), %esi + movl $3320, %edx + orl $2368, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + imull $48, -1348(%ebp), %ebx + movl %eax, %ecx + movl 16(%ebp), %edx + cmpl $0, 8(%ebx,%edx) + jne .L1134 + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + orb $64, %ch + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L1132 +.L1134: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + orl $8, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl 16(%ebp), %eax + addl %ebx, %eax + movl 8(%eax), %edx + leal 8(%eax), %esi + movb 45(%esi), %al + movl %edx, %ecx + andl $15, %ecx + cmpb $1, %al + je .L1138 + jb .L1137 + cmpb $2, %al + je .L1139 + cmpb $3, %al + jne .L1332 + jmp .L1140 +.L1137: + cmpl $3, %ecx + jne .L1142 + jmp .L1141 +.L1138: + cmpl $3, %ecx + jne .L1143 + cmpl $0, 24(%esi) + jne .L1141 + movl 28(%esi), %eax + testl %eax, %eax + jne .L1146 + movl 32(%esi), %eax + movl $3419904, %edi + movl $1119010, -1344(%ebp) + testl %eax, %eax + je .L1151 + cmpl $3, %eax + movl $12032, %edi + je .L1151 + movl $3616512, %edi + jmp .L1343 +.L1146: + cmpl $1, %eax + jne .L1153 + cmpl $1, 32(%esi) + jmp .L1348 +.L1153: + cmpl $2, %eax + jne .L1141 + cmpl $2, 32(%esi) +.L1348: + jne .L1141 + jmp .L1155 +.L1143: + cmpl $0, 24(%esi) + jne .L1157 + cmpl $0, 28(%esi) + jne .L1157 + movl 32(%esi), %eax + decl %eax + cmpl $1, %eax + ja .L1157 + jmp .L1142 +.L1139: + cmpl $3, %ecx + movl $2105888, %edi + jne .L1162 + cmpl $0, 24(%esi) + jne .L1163 + movl 28(%esi), %eax + testl %eax, %eax + jne .L1165 + movl 32(%esi), %eax + movl $2826784, %edi + movl $1119010, -1344(%ebp) + testl %eax, %eax + je .L1151 + cmpl $3, %eax + movl $3154464, %edi + je .L1151 + movl $2761248, %edi +.L1343: + movl $1, %ebx + jmp .L1152 +.L1165: + cmpl $1, %eax + jne .L1170 + cmpl $1, 32(%esi) + jmp .L1347 +.L1170: + cmpl $2, %eax + jne .L1163 + cmpl $2, 32(%esi) +.L1347: + jne .L1163 + jmp .L1172 +.L1140: + cmpl $3, %ecx + movl $2106656, %edi + movl $1126946, -1344(%ebp) + jne .L1151 + jmp .L1174 +.L1332: + movl $1118754, -1344(%ebp) + movl $3092224, %edi + xorl %ebx, %ebx +.L1152: + movl $.LC52, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC53, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl -1344(%ebp), %edx + movl $.LC56, %eax + call print_raminit + movl %edi, %edx + movl $.LC57, %eax + call print_raminit + testl %ebx, %ebx + je .L1176 +.L1177: + movl -1240(%ebp), %edx + movl (%edx), %ecx + orl $2368, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, -1364(%ebp) + movl $3320, %ecx + movl -1364(%ebp), %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -1368(%ebp) + movl %ecx, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $1048576, -1368(%ebp) + movl %ebx, %edx + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP +.L1176: + movl (%esi), %eax + testb $15, %al + jne .L1178 + testb $-16, %al + je .L1178 + movl -1240(%ebp), %ebx + movl $32, %ecx + movl $152, %edx + pushl -1344(%ebp) + movl (%ebx), %eax + call pci_write_config32_index_wait + movl $36, %ecx + movl $152, %edx + pushl %edi + movl (%ebx), %eax + call pci_write_config32_index_wait + popl %edx + popl %ecx + jmp .L1132 +.L1178: + movl -1240(%ebp), %ebx + xorl %ecx, %ecx + movl $152, %edx + pushl -1344(%ebp) + movl (%ebx), %eax + call pci_write_config32_index_wait + cmpb $0, 43(%esi) + popl %eax + je .L1181 + pushl -1344(%ebp) + movl $32, %ecx + movl (%ebx), %eax + movl $152, %edx + call pci_write_config32_index_wait + popl %eax +.L1181: + movl -1240(%ebp), %ebx + movl $4, %ecx + movl $152, %edx + pushl %edi + movl (%ebx), %eax + call pci_write_config32_index_wait + cmpb $0, 43(%esi) + popl %eax + je .L1132 + pushl %edi + movl (%ebx), %eax + movl $36, %ecx + movl $152, %edx + call pci_write_config32_index_wait + popl %eax +.L1132: + incl -1348(%ebp) + addl $36, -1240(%ebp) +.L1130: + movl 8(%ebp), %esi + cmpl %esi, -1348(%ebp) + jl .L1131 + movl 12(%ebp), %edi + movl $0, -1236(%ebp) + jmp .L1185 +.L1186: + movl -1236(%ebp), %eax + movl 16(%ebp), %edx + cmpb $0, (%eax,%edx) + je .L1187 + movl 12(%edi), %ecx + movl $3320, %edx + shrl $4, %ecx + movl %ecx, %eax + andl $268435452, %eax + orl $-2147483500, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testb $8, %al + je .L1187 + andl $268435452, %ecx + movb $-8, %dl + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testl $524288, %eax + movl %eax, %ebx + je .L1190 + movl 16(%edi), %eax + movb $-8, %dl + orl $1088, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -1364(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + orl $4194304, %esi + testb $8, %bh + movl %eax, -1368(%ebp) + je .L1192 + movl %eax, %esi + orl $12582912, %esi +.L1192: + movl $3320, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1190: + movl $3320, %esi + movl %ecx, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + orl $1, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1187: + incl -1236(%ebp) + addl $36, %edi +.L1185: + movl 8(%ebp), %ecx + cmpl %ecx, -1236(%ebp) + jl .L1186 + movl 16(%ebp), %ebx + movl 12(%ebp), %edi + movl $0, -1232(%ebp) + addl $8, %ebx + movl %ebx, -1360(%ebp) + jmp .L1195 +.L1196: + movl -1232(%ebp), %esi + movl 16(%ebp), %eax + cmpb $0, (%esi,%eax) + je .L1197 + movl -1360(%ebp), %edx + cmpl $0, (%edx) + je .L1197 + pushl %eax + xorl %ebx, %ebx + pushl $.LC58 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1200: + movl 12(%edi), %eax + movl $3320, %edx + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + incl %ebx + movl %eax, %esi + testl $1023, %ebx + jne .L1201 + pushl %eax + pushl $.LC59 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1201: + andl $1, %esi + je .L1204 + cmpl $299999, %ebx + jg .L1206 + jmp .L1200 +.L1204: + cmpl $299999, %ebx + jle .L1205 +.L1206: + pushl %esi + pushl $.LC60 + jmp .L1344 +.L1205: + movl 12(%edi), %ecx + orb $10, %ch + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx +.L1207: + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1207 + pushl %ebx + pushl $.LC61 +.L1344: + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1197: + incl -1232(%ebp) + addl $36, %edi + addl $48, -1360(%ebp) +.L1195: + movl 8(%ebp), %edx + cmpl %edx, -1232(%ebp) + jl .L1196 + xorl %edi, %edi + movl $0, -1304(%ebp) + jmp .L1210 +.L1211: + movl 12(%ebp), %ebx + leal 64(%edi), %ecx + movl $3320, %edx + movl %ecx, -1332(%ebp) + movl 8(%ebx), %ebx + shrl $4, %ebx + movl %ebx, %eax + orl %ecx, %eax + andl $2147483644, %eax + movl %ebx, -1336(%ebp) + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + andl $3, %eax + cmpl $3, %eax + jne .L1212 + leal 68(%edi), %esi + movb $-8, %dl + movl %esi, -1340(%ebp) + movl -1336(%ebp), %esi + orl -1340(%ebp), %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + xorw %cx, %cx + cmpl $12582912, %ecx + ja .L1212 + addl $65536, %eax + xorw %ax, %ax + cmpl $12582912, %eax + jbe .L1212 + movl 8(%ebp), %ecx + decl %ecx + movl %ecx, %edi + sall $3, %edi + movl %ecx, -1308(%ebp) + jmp .L1215 +.L1216: + movl -1336(%ebp), %eax + leal 64(%edi), %ebx + movl $3320, %edx + movl %ebx, -1316(%ebp) + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + andl $3, %eax + cmpl $3, %eax + jne .L1217 + leal 68(%edi), %eax + movb $-8, %dl + movl %eax, -1320(%ebp) + movl -1336(%ebp), %eax + orl -1320(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + addl $4194304, %ebx + addl $4194304, %eax + movl %ebx, -1328(%ebp) + movl 12(%ebp), %ebx + movl %eax, -1324(%ebp) + movl $0, -1312(%ebp) + addl $8, %ebx + jmp .L1219 +.L1220: + movl -36(%ebx), %ecx + movl -1320(%ebp), %eax + shrl $4, %ecx + orl %ecx, %eax + movl %ecx, -1368(%ebp) + andl $2147483644, %eax + movl $3320, %ecx + orl $-2147483648, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -1324(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -1316(%ebp), %eax + movl %ecx, %edx + orl %eax, -1368(%ebp) + andl $2147483644, -1368(%ebp) + orl $-2147483648, -1368(%ebp) + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl -1328(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + incl -1312(%ebp) +.L1219: + movl 8(%ebp), %ecx + addl $36, %ebx + cmpl %ecx, -1312(%ebp) + jl .L1220 +.L1217: + decl -1308(%ebp) + subl $8, %edi +.L1215: + movl -1304(%ebp), %ebx + cmpl %ebx, -1308(%ebp) + jg .L1216 + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl 12(%ebp), %ecx + leal 4194304(%eax), %esi + xorl %ebx, %ebx + addl $8, %ecx + jmp .L1222 +.L1223: + movl -36(%ecx), %eax + movl $3320, %edx + shrl $4, %eax + orl -1340(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + incl %ebx +.L1222: + addl $36, %ecx + cmpl 8(%ebp), %ebx + jl .L1223 + imull $36, -1304(%ebp), %eax + movl 12(%ebp), %edx + movl 8(%eax,%edx), %ebx + movl $3320, %edx + movl -1332(%ebp), %eax + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + xorw %cx, %cx + shrl $2, %ecx + cmpl $3145728, %ecx + jne .L1225 + movl 12(%ebp), %ebx + movzwl %ax,%ecx + xorl %esi, %esi + orl $16777216, %ecx + addl $8, %ebx + jmp .L1227 +.L1228: + movl -36(%ebx), %eax + movl $3320, %edx + shrl $4, %eax + orl -1332(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + incl %esi +.L1227: + addl $36, %ebx + cmpl 8(%ebp), %esi + jl .L1228 + jmp .L1229 +.L1225: + movl %ebx, %eax + movl $3320, %edx + andl $268435452, %eax + orl $-2147483408, %eax +#APP + outl %eax, %dx +#NO_APP + leal 1048576(%ecx), %eax + movb $-4, %dl + shrl $6, %eax + andl $65280, %eax + subl $1073741823, %eax +#APP + outl %eax, %dx +#NO_APP +.L1229: + pushl 8(%ebp) + pushl 12(%ebp) + call memory_end_k + popl %edx + movl $3145728, %edx + popl %ecx + call set_top_mem + jmp .L1230 +.L1212: + incl -1304(%ebp) + addl $8, %edi +.L1210: + movl 8(%ebp), %edx + cmpl %edx, -1304(%ebp) + jl .L1211 +.L1230: + movl $-1073676262, %ecx +#APP + rdmsr +#NO_APP + movl 16(%ebp), %ecx + sall $24, %edx + shrl $8, %eax + orl %eax, %edx + shrl $2, %edx + movl %edx, 688(%ecx) + movl $-1073676259, %ecx +#APP + rdmsr +#NO_APP + movl 16(%ebp), %ebx + shrl $8, %eax + sall $24, %edx + orl %eax, %edx + shrl $2, %edx + movl %ebx, %eax + movl %edx, 692(%ebx) + addl $8, %eax + xorl %edx, %edx + jmp .L1231 +.L1232: + movl 16(%ebp), %esi + cmpb $0, (%edx,%esi) + movb $0, 680(%edx,%esi) + je .L1233 + cmpl $0, (%eax) + je .L1233 + movb $-128, 680(%edx,%esi) +.L1233: + incl %edx + addl $48, %eax +.L1231: + cmpl 8(%ebp), %edx + jl .L1232 + movl 16(%ebp), %eax + movl $592, %ecx + movl 16(%ebp), %edx + movl 692(%eax), %eax + movl 688(%edx), %ebx + movl %eax, -1300(%ebp) + movl $505290270, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP + movb $88, %cl +#APP + wrmsr +#NO_APP + testl %ebx, %ebx + je .L1237 + jmp .L1334 +.L1239: +#APP + bsfl %edi,%ecx + jnz 1f + movl $32,%ecx +1: + bsrl -1292(%ebp),%eax + jnz 1f + movl $0,%eax +1: +#NO_APP + cmpl %eax, %ecx + jbe .L1240 + movl %eax, %ecx +.L1240: + movl $1, -1296(%ebp) + sall %cl, -1296(%ebp) + pushl %eax + pushl %eax + movl -1296(%ebp), %eax + pushl $.LC62 + shrl $10, %eax + pushl %eax + movl %edi, %eax + shrl $10, %eax + pushl %eax + pushl -1244(%ebp) + pushl $.LC63 + pushl $7 + call do_printk + addl $32, %esp + cmpl $4194303, -1296(%ebp) + ja .L1241 + movl -1296(%ebp), %ebx + movl $255, -1256(%ebp) + sall $10, %ebx + negl %ebx + jmp .L1243 +.L1241: + movl -1296(%ebp), %eax + xorl %ebx, %ebx + shrl $22, %eax + negl %eax + andl $255, %eax + movl %eax, -1256(%ebp) +.L1243: + cmpl $7, -1244(%ebp) + ja .L1244 + cmpl $0, -1296(%ebp) + jne .L1246 + xorl %eax, %eax + movl %esi, %ecx + movl %eax, %edx + jmp .L1345 +.L1246: + movl %edi, %eax + movl %edi, %edx + sall $10, %eax + leal -1(%esi), %ecx + orl $6, %eax + shrl $22, %edx +#APP + wrmsr +#NO_APP + movl -1256(%ebp), %edx + orb $8, %bh + movl %esi, %ecx + movl %ebx, %eax +.L1345: +#APP + wrmsr +#NO_APP +.L1244: + incl -1244(%ebp) + addl $2, %esi + cmpl $8, -1244(%ebp) + je .L1237 + movl -1296(%ebp), %ebx + addl -1296(%ebp), %edi + subl %ebx, -1292(%ebp) + jne .L1239 +.L1237: + cmpl $0, -1300(%ebp) + jne .L1249 +.L1250: + movl 12(%ebp), %esi + movl $0, -1288(%ebp) + movl %esi, -1248(%ebp) + jmp .L1251 +.L1249: + movl $-1073676272, %ecx +#APP + rdmsr +#NO_APP + orl $6291456, %eax +#APP + wrmsr +#NO_APP + jmp .L1250 +.L1252: + movl -1288(%ebp), %eax + movl 16(%ebp), %edx + cmpb $-128, 680(%eax,%edx) + jne .L1253 + movl -1248(%ebp), %ecx + movl -1288(%ebp), %ebx + movl 8(%ecx), %eax + leal 64(,%ebx,8), %edx + shrl $4, %eax + orl %edx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl 16(%ebp), %esi + movl %eax, 696(%esi,%ebx,4) + movl %ebx, %eax + movl $64, %ebx + sall $5, %eax + leal 728(%eax,%esi), %ecx + xorl %esi, %esi +.L1255: + movl -1248(%ebp), %edx + movl 12(%edx), %eax + movl $3320, %edx + shrl $4, %eax + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + incl %esi + addl $4, %ebx + movl %eax, (%ecx) + addl $4, %ecx + cmpl $8, %esi + jne .L1255 + movl -1248(%ebp), %ecx + movb $-8, %dl + movl 8(%ecx), %eax + orb $15, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -1288(%ebp), %ecx + movl 16(%ebp), %ebx + movl %eax, 984(%ebx,%ecx,4) +#APP + rdtsc +#NO_APP + movl %eax, -52(%ebp) + pushl %eax + pushl $.LC64 + pushl $.LC5 + pushl $7 + movl %edx, -48(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl -1248(%ebp), %eax + movl %ebx, %ecx + movl $1, %edx + call train_DqsRcvrEn + addl $16, %esp + testl %eax, %eax + je .L1257 + movl -1288(%ebp), %esi + movb $-127, 680(%esi,%ebx) + jmp .L1259 +.L1257: + pushl %esi + pushl $.LC61 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + addl $12, %esp + pushl $.LC65 + pushl $.LC5 + pushl $7 + movl %edx, -40(%ebp) + movl %eax, -44(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl -1248(%ebp), %edx + movl 16(%ebp), %ecx + movl (%edx), %eax + imull $48, %eax, %edx + imull $36, %eax, %eax + movb 51(%edx,%ecx), %dl + addl $1016, %ecx + addl %ecx, %eax + movl %ecx, -1264(%ebp) + movl %eax, -1272(%ebp) + movb %dl, -1273(%ebp) +#APP + movl %cr4, %eax +#NO_APP + orb $2, %ah +#APP + movl %eax, %cr4 +#NO_APP + call set_wrap32dis + movl -1248(%ebp), %ebx + movl 12(%ebx), %ecx + movl $3320, %ebx + movl %ebx, %edx + orb $9, %ch + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -1284(%ebp) + movl %ebx, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -1284(%ebp), %eax + movb $-4, %dl + andl $-524289, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1204(%ebp), %ecx + addl $16, %esp + andl $-16, %ecx + xorl %edx, %edx + cmpb $0, -1273(%ebp) + movl %ecx, -1280(%ebp) + je .L1265 +.L1262: + movl TestPatternJD1b.5550(,%edx,4), %eax + movl -1280(%ebp), %ebx + movl %eax, (%ebx,%edx,4) + incl %edx + cmpl $288, %edx + jne .L1262 + movl $1, -1268(%ebp) + jmp .L1264 +.L1265: + movl TestPatternJD1a.5549(,%edx,4), %eax + movl -1280(%ebp), %esi + movl %eax, (%esi,%edx,4) + incl %edx + cmpl $144, %edx + jne .L1265 + movl $0, -1268(%ebp) +.L1264: + movl -1248(%ebp), %edx + xorl %ebx, %ebx + movl 16(%ebp), %ecx + imull $48, (%edx), %eax + movl 8(%eax,%ecx), %eax + testb $15, %al + jne .L1269 + xorl %ebx, %ebx + testb $-16, %al + setne %bl +.L1269: + xorl %edi, %edi + jmp .L1319 +.L1271: + xorl %esi, %esi +.L1272: + movl -1248(%ebp), %eax + xorl %ecx, %ecx + movl %ebx, %edx + pushl %esi + call SetDQSDelayAllCSR + movl -1248(%ebp), %eax + movl $1, %ecx + pushl 16(%ebp) + movl %ebx, %edx + pushl -1272(%ebp) + pushl -1280(%ebp) + pushl -1268(%ebp) + call TrainDQSPos + addl $20, %esp + testl %eax, %eax + je .L1273 + incl %esi + orl %eax, %edi + cmpl $48, %esi + je .L1275 + jmp .L1272 +.L1273: + pushl 16(%ebp) + xorl %ecx, %ecx + pushl -1272(%ebp) + movl %ebx, %edx + pushl -1280(%ebp) + pushl -1268(%ebp) + movl -1248(%ebp), %eax + call TrainDQSPos + addl $16, %esp + movl %eax, %edi +.L1275: + cmpb $1, -1273(%ebp) + adcl $1, %ebx +.L1319: + cmpl $1, %ebx + ja .L1278 + testl %edi, %edi + je .L1271 +.L1278: + movl -1248(%ebp), %ebx + movl $3320, %ecx + movl %ecx, %edx + movl 12(%ebx), %esi + orl $2304, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, -1364(%ebp) + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $524288, -1284(%ebp) + andl $-524289, %esi + orl -1284(%ebp), %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + call clear_wrap32dis +#APP + movl %cr4, %eax +#NO_APP + andb $253, %ah +#APP + movl %eax, %cr4 +#NO_APP + testl %edi, %edi + je .L1279 + pushl %ebx + pushl $.LC66 + pushl $.LC5 + pushl $3 + call do_printk + movl -1248(%ebp), %ecx + addl $12, %esp + pushl (%ecx) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $3 + call do_printk + movl -1288(%ebp), %ebx + movl 16(%ebp), %esi + movb $-126, 680(%ebx,%esi) + jmp .L1346 +.L1279: + movl -1248(%ebp), %edx + xorl %edi, %edi + movl $1, -20(%ebp) + movl $0, -16(%ebp) + imull $36, (%edx), %eax + addl -1264(%ebp), %eax + movl %eax, -1260(%ebp) + jmp .L1281 +.L1282: + movl -1252(%ebp), %ecx + movl $4, %edx + movl %edi, %eax + pushl -1260(%ebp) + movl -24(%ebp,%ecx,4), %esi + movl %esi, %ecx + call get_dqs_delay + movl $5, %edx + popl %ecx + movl %esi, %ecx + pushl -1260(%ebp) + movzbl %al, %ebx + movl %edi, %eax + call get_dqs_delay + popl %edx + movzbl %al, %edx + cmpl %edx, %ebx + jbe .L1283 + subl %edx, %ebx + imull $255, %ebx, %eax + shrl $8, %eax + leal (%eax,%edx), %ebx +.L1283: + movl -1248(%ebp), %eax + movl $8, %ecx + movl %edi, %edx + pushl %ebx + pushl %esi + call SetDQSDelayCSR + movzbl %bl, %eax + movl %esi, %ecx + pushl %eax + movl $8, %edx + pushl -1260(%ebp) + movl %edi, %eax + call save_dqs_delay + addl $16, %esp + incl -1252(%ebp) + cmpl $3, -1252(%ebp) + jne .L1282 + incl %edi + cmpl $2, %edi + je .L1339 + jmp .L1281 +.L1287: + movl -1288(%ebp), %ebx + movl 16(%ebp), %esi + movb $-125, 680(%ebx,%esi) + jmp .L1259 +.L1342: + pushl %ecx + pushl $.LC61 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + movl %edx, -24(%ebp) + movl %eax, -28(%ebp) +.L1346: + addl $16, %esp +.L1259: + xorl %ebx, %ebx +.L1289: + leal -52(%ebp), %eax + pushl %edx + pushl %edx + pushl (%eax,%ebx,8) + pushl 4(%eax,%ebx,8) + pushl %ebx + incl %ebx + pushl $.LC67 + pushl $.LC68 + pushl $7 + call do_printk + addl $32, %esp + cmpl $4, %ebx + jne .L1289 + movl -1288(%ebp), %eax + movl 16(%ebp), %edx + cmpb $-128, 680(%eax,%edx) + jne .L1253 + movb $1, 680(%eax,%edx) +.L1253: + incl -1288(%ebp) + addl $36, -1248(%ebp) +.L1251: + movl 8(%ebp), %ecx + cmpl %ecx, -1288(%ebp) + jl .L1252 + movl 16(%ebp), %esi + movl $-1073676272, %ecx + movl 692(%esi), %ebx +#APP + rdmsr +#NO_APP + orl $524288, %eax +#APP + wrmsr +#NO_APP + xorl %eax, %eax + movl $592, %ecx + movl %eax, %edx +#APP + wrmsr +#NO_APP + movb $88, %cl +#APP + wrmsr +#NO_APP + movb $4, %cl +.L1293: + xorl %eax, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP + incl %ecx + cmpl $528, %ecx + jne .L1293 + testl %ebx, %ebx + je .L1295 + movl $-1073676272, %ecx +#APP + rdmsr +#NO_APP + andl $-6291457, %eax +#APP + wrmsr +#NO_APP +.L1295: + movl 16(%ebp), %ecx + xorl %ebx, %ebx + movl 1432(%ecx), %edi + movl $1, %ecx + cmpl $1, %edi + jne .L1299 + jmp .L1297 +.L1300: + movl 16(%ebp), %esi + cmpb $0, 680(%ecx,%esi) + je .L1301 + movl $1, %eax + sall %cl, %eax + orl %eax, %ebx +.L1301: + incl %ecx +.L1299: + cmpl %edi, %ecx + jb .L1300 + movl $1, %ecx +.L1304: + movl $1, %eax + sall %cl, %eax + testl %eax, %ebx + je .L1305 + movl 16(%ebp), %edx + cmpb $-128, 680(%edx,%ecx) + je .L1305 + notl %eax + andl %eax, %ebx +.L1305: + testl %ebx, %ebx + jne .L1308 + xorl %esi, %esi + jmp .L1310 +.L1308: + leal 1(%ecx), %eax + xorl %edx, %edx + divl %edi + movl %edx, %ecx + jmp .L1304 +.L1311: + pushl %edi + pushl $.LC69 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC70 + pushl $.LC5 + pushl $7 + call do_printk + movl 16(%ebp), %ecx + addl $12, %esp + movzbl 680(%ebx,%ecx), %eax + pushl %eax + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl 16(%ebp), %edx + addl $16, %esp + movb 680(%ebx,%edx), %al + addl $127, %eax + cmpb $2, %al + ja .L1312 + movl $1, %esi +.L1312: + incl %ebx +.L1310: + movl 16(%ebp), %ecx + cmpl 1432(%ecx), %ebx + jb .L1311 + testl %esi, %esi + je .L1297 + pushl %ecx + pushl $.LC71 + pushl $.LC5 + pushl $7 + call do_printk + call soft_reset + addl $16, %esp +.L1297: + pushl %edx + pushl $.LC72 + pushl $.LC5 + pushl $7 + call do_printk + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L1174: + movl $2106656, %edi + movl $1127202, -1344(%ebp) + jmp .L1151 +.L1172: + movl $2892320, %edi + movl $1119010, -1344(%ebp) + jmp .L1151 +.L1163: + movl $2105888, %edi + movl $1119010, -1344(%ebp) + jmp .L1151 +.L1155: + movl $3682048, %edi + movl $1119010, -1344(%ebp) + jmp .L1151 +.L1141: + movl $1119010, -1344(%ebp) + movl $3092224, %edi +.L1151: + movl $.LC52, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC53, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl -1344(%ebp), %edx + movl $.LC56, %eax + call print_raminit + movl %edi, %edx + movl $.LC57, %eax + call print_raminit + jmp .L1177 +.L1157: + movl $2830080, %edi + jmp .L1162 +.L1142: + movl $3092224, %edi +.L1162: + movl $.LC52, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC53, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl $1118754, %edx + movl $.LC56, %eax + call print_raminit + movl %edi, %edx + movl $.LC57, %eax + call print_raminit + movl $1118754, -1344(%ebp) + jmp .L1176 +.L1281: + movl $1, -1252(%ebp) + jmp .L1282 +.L1339: + pushl %eax + pushl $.LC61 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + addl $12, %esp + pushl $.LC73 + pushl $.LC5 + pushl $7 + movl %edx, -32(%ebp) + movl %eax, -36(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl 16(%ebp), %ecx + movl $2, %edx + movl -1248(%ebp), %eax + call train_DqsRcvrEn + addl $16, %esp + testl %eax, %eax + jne .L1287 + jmp .L1342 +.L1334: + xorl %edi, %edi + movl $517, %esi + movl $2, -1244(%ebp) + movl %ebx, -1292(%ebp) + jmp .L1239 + .size sdram_initialize, .-sdram_initialize + .section .rom.data.str1.1 +.LC74: + .string "Testing DRAM : %08x - %08x\r\n" +.LC75: + .string "DRAM fill: 0x%08x-0x%08x\r\n" +.LC76: + .string "%08x \r" +.LC77: + .string "%08x\r\nDRAM filled\r\n" +.LC78: + .string "DRAM verify: 0x%08x-0x%08x\r\n" +.LC79: + .string "Fail: @0x%08x Read value=0x%08x\r\n" +.LC80: + .string "Aborting.\n\r" +.LC81: + .string "\r\nDRAM did _NOT_ verify!\r\n" +.LC82: + .string "DRAM ERROR" +.LC83: + .string "\r\nDRAM range verified.\r\n" +.LC84: + .string "Done.\r\n" + .section .rom.text +.globl ram_check + .type ram_check, @function +ram_check: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $12, %esp + movl 12(%ebp), %edi + movl 8(%ebp), %esi + pushl %edi + pushl %esi + movl %esi, %ebx + pushl $.LC74 + pushl $7 + call do_printk + pushl %edi + pushl %esi + pushl $.LC75 + pushl $7 + call do_printk + addl $32, %esp + jmp .L1350 +.L1351: + testl $1048575, %ebx + jne .L1352 + pushl %eax + pushl %ebx + pushl $.LC76 + pushl $7 + call do_printk + addl $16, %esp +.L1352: +#APP + movnti %ebx, (%ebx) +#NO_APP + addl $4, %ebx +.L1350: + cmpl %edi, %ebx + jb .L1351 + pushl %eax + pushl %ebx + xorl %ebx, %ebx + pushl $.LC77 + pushl $7 + call do_printk + pushl %edi + pushl %esi + pushl $.LC78 + pushl $7 + call do_printk + addl $32, %esp + jmp .L1355 +.L1356: + testl $1048575, %esi + jne .L1357 + pushl %eax + pushl %esi + pushl $.LC76 + pushl $7 + call do_printk + addl $16, %esp +.L1357: + movl (%esi), %eax + cmpl %esi, %eax + je .L1359 + pushl %eax + incl %ebx + pushl %esi + pushl $.LC79 + pushl $3 + call do_printk + addl $16, %esp + cmpl $256, %ebx + jg .L1367 +.L1359: + addl $4, %esi +.L1355: + cmpl %edi, %esi + jb .L1356 + pushl %eax + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $16, %esp + testl %ebx, %ebx + je .L1364 +.L1362: + pushl %eax + pushl %eax + pushl $.LC81 + pushl $7 + call do_printk + movl $.LC82, %eax + call die + jmp .L1368 +.L1367: + pushl %edi + pushl %edi + pushl $.LC80 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1362 +.L1364: + pushl %esi + pushl %esi + pushl $.LC83 + pushl $7 + call do_printk +.L1368: + movl $.LC84, 12(%ebp) + addl $16, %esp + movl $7, 8(%ebp) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + jmp do_printk + .size ram_check, .-ram_check + .section .rom.data.str1.1 +.LC85: + .string "\r\n\r\n\r\nINIT detected from " +.LC86: + .string "%s --- { APICID = %02x NODEID = %02x COREID = %02x} ---\r\n" +.LC87: + .string "\r\nIssuing SOFT_RESET...\r\n" +.LC88: + .string "fidvid_ap_stage1: time out while reading from BSP on " +.LC89: + .string "fidvid_ap_stage3: time out while reading from BSP on " +.LC90: + .string "while waiting for BSP signal to STOP, timeout in ap " +.LC91: + .string "BIST failed: %08x" +.LC92: + .string "*sysinfo range: [" +.LC93: + .string "," +.LC94: + .string ")\r\n" +.LC95: + .string "bsp_apicid=" +.LC96: + .string "core0 started: " +.LC97: + .string "started ap apicid: " +.LC98: + .string "begin msr fid, vid " +.LC99: + .string "end msr fid, vid " +.LC100: + .string "ht reset -\r\n" +.LC101: + .string "v_esp=" +.LC102: + .string "testx = " +.LC103: + .string "Copying data from cache to RAM -- switching to use RAM as stack... " +.LC104: + .string "Done\r\n" +.LC105: + .string "Disabling cache as ram now \r\n" +.LC106: + .string "Clearing initial memory region: " +.LC107: + .string "Uncompressing coreboot to RAM.\r\n" +.LC108: + .string "src=" +.LC109: + .string "dst=" +.LC110: + .string "coreboot_ram.nrv2b length = " +.LC111: + .string "coreboot_ram.bin length = " +.LC112: + .string "Jumping to coreboot.\r\n" +.LC113: + .string "should not be here -\r\n" +.LC114: + .string "fidvid_ap_stage2: time out while reading from BSP on " +.LC115: + .string "fidvid_bsp_stage1: time out while reading from ap " +.LC116: + .string "fidvid_bsp_stage2: time out while reading from ap " + .section .rom.text +.globl real_main + .type real_main, @function +real_main: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $348, %esp + cmpl $0, 8(%ebp) + jne .L1370 + call read_nb_cfg_54 + leal -112(%ebp), %edx + pushl %eax + pushl %edx + call get_node_core_id + movl -108(%ebp), %esi + movl -112(%ebp), %ebx + popl %edx + testl %esi, %esi + movl %esi, -156(%ebp) + movl %ebx, -160(%ebp) + jne .L1372 + movl $-1073676257, %ecx +#APP + rdmsr +#NO_APP + orl $4194304, %edx +#APP + wrmsr +#NO_APP +.L1372: + movl $27, %ecx +#APP + rdmsr +#NO_APP + andl $2047, %eax + xorb %dl, %dl + orl $-18872320, %eax +#APP + wrmsr +#NO_APP + movl -18874336, %edi + shrl $24, %edi + cmpl $0, 12(%ebp) + je .L1374 + pushl %eax + pushl %eax + pushl %esi + pushl %ebx + pushl %edi + pushl $.LC85 + pushl $.LC86 + pushl $7 + call do_printk + addl $28, %esp + pushl $.LC87 + pushl $.LC5 + pushl $7 + call do_printk + call soft_reset + addl $16, %esp +.L1374: + cmpl $0, -156(%ebp) + jne .L1376 + movl -160(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + addl $24, %eax + andl $31, %eax + sall $11, %eax + orl $-2147483540, %eax + movl %eax, -340(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $112, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1376: + movl %edi, %ecx + sall $24, %ecx + movl %ecx, %eax + orl $51, %eax + testl %edi, %edi + movl %ecx, -288(%ebp) + movl %eax, -18873472 + je .L1370 + cmpl $0, -156(%ebp) + jne .L1379 + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + movl %eax, -336(%ebp) + shrl $16, %eax + movl %edx, %ebx + andl $63, %eax + cmpl $41, %eax + jbe .L1381 + movl -336(%ebp), %eax + shrl $8, %eax + andl $63, %eax + addl $10, %eax + cmpl $41, %eax + jbe .L1381 + movl $12, %eax +.L1381: + movl %ebx, %esi + andl $63, %ebx + andl $63, -336(%ebp) + andl $4128768, %esi + sall $8, %eax + movl $-1073676223, %ecx + orl -288(%ebp), %eax + movl $1, %edx + sall $8, %ebx + orl -336(%ebp), %ebx + orl %eax, %esi + movl %ebx, %eax +#APP + wrmsr +#NO_APP + xorl %eax, %eax + movl $0, -28(%ebp) + call wait_cpu_state + testl %eax, %eax + je .L1384 + movl %edi, %edx + movl $.LC88, %eax + call print_initcpu8 +.L1384: + movl %esi, %eax + movl $999999, %ebx + orl $1, %eax + movl %eax, -18873472 +.L1386: + xorl %eax, %eax + movl $896, %edx + leal -28(%ebp), %ecx + call lapic_remote_read + testl %eax, %eax + jne .L1387 + movzbl -25(%ebp), %eax + cmpl %edi, %eax + je .L1389 +.L1387: + decl %ebx + je .L1525 + jmp .L1386 +.L1389: + movl -28(%ebp), %edx + movl $1, %ecx + movl %edi, %eax + andl $16776960, %edx + call set_fidvid + movl %eax, %esi + andl $16776960, %esi + orl -288(%ebp), %esi + movl %eax, -28(%ebp) +.L1391: + orl $2, %esi + xorl %eax, %eax + movl $3, %edx + movl %esi, -18873472 + call wait_cpu_state + testl %eax, %eax + je .L1379 + movl %edi, %edx + movl $.LC89, %eax + call print_initcpu8 +.L1379: + movl $99, %ebx +.L1393: + xorl %eax, %eax + movl $68, %edx + call wait_cpu_state + testl %eax, %eax + je .L1394 + decl %ebx + cmpl $-1, %ebx + jne .L1393 + movl %edi, %edx + movl $.LC90, %eax + call print_initcpu8 +.L1394: + orl $68, -288(%ebp) + movl -288(%ebp), %edx + movl %edx, -18873472 + call set_init_ram_access +#APP + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax, %cr0 + movl $0x269, %ecx + xorl %edx, %edx + xorl %eax, %eax + wrmsr + movl $0xC0010010, %ecx + rdmsr + andl $(~(3<<18)), %eax + wrmsr + movl $0x2ff, %ecx + xorl %edx, %edx + movl $0x00000800, %eax + wrmsr + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + +#NO_APP +.L1397: +#APP + hlt +#NO_APP + jmp .L1397 +.L1370: + movb $-121, %al +#APP + outb %al, $46 +#NO_APP + movb $1, %al +#APP + outb %al, $46 +#NO_APP + movb $85, %al +#APP + outb %al, $46 + outb %al, $46 +#NO_APP + movb $35, %al +#APP + outb %al, $46 +#NO_APP + movb $17, %al +#APP + outb %al, $47 +#NO_APP + movb $36, %al +#APP + outb %al, $46 + inb $47, %al +#NO_APP + testb $14, %al + movb %al, %dl + je .L1398 + movb $36, %al +#APP + outb %al, $46 +#NO_APP + orl $16, %edx + movzbl %dl, %eax +#APP + outb %al, $47 +#NO_APP + movb $7, %al +#APP + outb %al, $46 + outb %al, $47 +#NO_APP + movb $100, %al +#APP + outb %al, $46 +#NO_APP + movb $8, %al +#APP + outb %al, $47 +#NO_APP + movb $101, %al +#APP + outb %al, $46 +#NO_APP + movb $32, %al +#APP + outb %al, $47 +#NO_APP +.L1398: + movb $7, %al +#APP + outb %al, $46 +#NO_APP + movb $1, %cl + movb %cl, %al +#APP + outb %al, $47 +#NO_APP + movb $48, %dl + movb %dl, %al +#APP + outb %al, $46 +#NO_APP + xorl %eax, %eax +#APP + outb %al, $47 +#NO_APP + movb $96, %al +#APP + outb %al, $46 +#NO_APP + movb $3, %al +#APP + outb %al, $47 +#NO_APP + movb $97, %al +#APP + outb %al, $46 +#NO_APP + movb $-8, %al +#APP + outb %al, $47 +#NO_APP + movb %dl, %al +#APP + outb %al, $46 +#NO_APP + movb %cl, %al +#APP + outb %al, $47 +#NO_APP + movb $2, %al +#APP + outb %al, $46 + outb %al, $47 +#NO_APP + xorl %ebx, %ebx +.L1400: + movl register_values.6091(,%ebx,4), %edx + movl %edx, %eax + movl %edx, %ecx + xorb %al, %al + andl $252, %ecx + shrl $4, %eax + movl $3320, %edx + orl %eax, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + andl register_values.6091+4(,%ebx,4), %edi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + orl register_values.6091+8(,%ebx,4), %edi + movl %esi, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %ebx + cmpl $117, %ebx + jne .L1400 + pushl $3 + pushl $1 + pushl $1016 + call uart8250_init + addl $12, %esp + cmpl $0, 8(%ebp) + je .L1402 + pushl %eax + pushl 8(%ebp) + pushl $.LC91 + pushl $0 + call do_printk + movl $.LC7, %eax + call die + addl $16, %esp +.L1402: + pushl %eax + movl $-2147434388, %edi + pushl $console_test.1892 + movl $3320, %ebx + pushl $.LC5 + pushl $6 + call do_printk + addl $12, %esp + pushl $.LC92 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $847872 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC93 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $849712 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC94 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC95 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $0 + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-4, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147433496, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + addl $16, %esp + testb $48, %ah + jne .L1404 + movl $-2147434392, %ebx + movl $3320, %edi + movl %ebx, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1823, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1404: + movl $3320, %ecx + movl $-2147433496, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl %ecx, %edx + movl $-2147434400, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl $-2147434400, %eax +#APP + outl %eax, %dx +#NO_APP + sall $4, %ebx + andl $-983153, %edi + andl $196608, %ebx + orl %ebx, %edi + movl $3324, %ebx + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $-2147434392, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-251682817, %esi + movl %ebx, %edx + orl $251707392, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + call get_nodes + movl $1, %ebx + movl %eax, %esi + pushl %eax + pushl $.LC96 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1406 +.L1512: + leal 24(%ebx), %eax + movl $3320, %edx + andl $31, %eax + sall $11, %eax + orl $-2147483540, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $64, %al + je .L1512 + movl %ebx, %edx + movl $.LC12, %eax + call print_initcpu8_nocr + incl %ebx +.L1406: + cmpl %esi, %ebx + jb .L1512 + pushl %eax + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + call get_nodes + addl $16, %esp + movl $0, -280(%ebp) + movl %eax, -284(%ebp) + jmp .L1410 +.L1411: + movl -280(%ebp), %esi + movl $3320, %edx + addl $24, %esi + andl $31, %esi + sall $15, %esi + movl %esi, %ecx + orb $48, %ch + shrl $4, %ecx + movl %ecx, %eax + orl $-2147483416, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + testb $48, %ah + je .L1412 + movl %ecx, %ebx + movl $3320, %ecx + orl $-2147483580, %ebx + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -336(%ebp) + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + orl $134217728, -336(%ebp) + movl %ebx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + shrl $4, %esi + movl %ecx, %edx + movl %esi, -340(%ebp) + orl $-2147483544, -340(%ebp) + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $32, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1412: + incl -280(%ebp) +.L1410: + movl -284(%ebp), %ecx + cmpl %ecx, -280(%ebp) + jne .L1411 + pushl %eax + pushl $.LC97 + pushl $.LC5 + pushl $7 + call do_printk + movl $wait_ap_started, %ecx + movl $2, %edx + xorl %eax, %eax + movl $0, (%esp) + call for_each_ap + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl $847872, %eax + call ht_setup_chains_x + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + addl $12, %esp + movl %edx, %ebx + pushl $.LC98 + movl %eax, %esi + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl $-2147434400, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $4, %eax + addl $16, %esp + andl $7, %eax + movl %eax, -276(%ebp) + movl $24, -140(%ebp) + jmp .L1415 +.L1416: + movl -140(%ebp), %edi + movl $3320, %ecx + andl $31, %edi + sall $15, %edi + movl %edi, %esi + orl $12288, %esi + shrl $4, %esi + movl %esi, %edx + orl $-2147483432, %edx + movl %edx, -336(%ebp) + movl %edx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -340(%ebp) + movl %ecx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1880096768, -340(%ebp) + movl %ebx, %edx + orl $536880912, -340(%ebp) + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ecx, %edx + orl $-2147483436, %eax +#APP + outl %eax, %dx +#NO_APP + movl $81962759, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + shrl $4, %edi + movl %ecx, %edx + movl %edi, -336(%ebp) + orl $-2147482988, -336(%ebp) + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $16384, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ecx, %edx + orl $-2147483520, %eax +#APP + outl %eax, %dx +#NO_APP + movl $587663104, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + orl $-2147483516, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $1253651, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + incl -140(%ebp) +.L1415: + movl -276(%ebp), %eax + addl $25, %eax + cmpl %eax, -140(%ebp) + jne .L1416 + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + movl %eax, %ebx + movl %edx, %ecx + shrl $16, %eax + andl $63, %eax + cmpl $41, %eax + jbe .L1418 + shrl $8, %ebx + andl $63, %ebx + leal 10(%ebx), %eax + cmpl $41, %eax + jbe .L1418 + movl $12, %eax +.L1418: + movl %eax, %esi + subl $12, %esp + andl $4128768, %ecx + movl $1, %edx + leal -96(%ebp), %eax + sall $8, %esi + movl $1, -18873472 + orl %ecx, %esi + movl $store_ap_apicid, %ecx + pushl %eax + xorl %eax, %eax + movl $0, -96(%ebp) + call for_each_ap + addl $16, %esp + movl $0, -272(%ebp) + jmp .L1421 +.L1422: + movl -272(%ebp), %ecx + movl $999999, %ebx + movl $0, -28(%ebp) + movl -92(%ebp,%ecx,4), %edi +.L1423: + leal -28(%ebp), %ecx + movl $896, %edx + movl %edi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L1424 + cmpb $1, -28(%ebp) + je .L1426 +.L1424: + decl %ebx + je .L1529 + jmp .L1423 +.L1426: + movl -28(%ebp), %ecx + movl %esi, %edx + andl $65280, %edx + andl $16776960, %ecx + movl %ecx, %eax + andl $65280, %eax + cmpl %eax, %edx + jbe .L1428 + movl %ecx, %esi +.L1428: + incl -272(%ebp) +.L1421: + movl -272(%ebp), %ebx + cmpl -96(%ebp), %ebx + jb .L1422 + movl $1, %ecx + movl %esi, %edx + xorl %eax, %eax + call set_fidvid + movl $0, -116(%ebp) + movl %eax, %ebx + andl $16776960, %ebx + jmp .L1431 +.L1432: + movl -116(%ebp), %eax + movl $999999, %edi + movl $0, -28(%ebp) + movl -92(%ebp,%eax,4), %esi + movl %esi, %eax + sall $24, %eax + orl $2, %eax + orl %ebx, %eax + movl %eax, -18873472 +.L1433: + leal -28(%ebp), %ecx + movl $896, %edx + movl %esi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L1434 + cmpb $2, -28(%ebp) + je .L1436 +.L1434: + decl %edi + je .L1530 + jmp .L1433 +.L1436: + incl -116(%ebp) +.L1431: + movl -116(%ebp), %edx + cmpl -96(%ebp), %edx + jb .L1432 + orl $3, %ebx + movl $-1073676222, %ecx + movl %ebx, -18873472 +#APP + rdmsr +#NO_APP + pushl %edi + movl %edx, %ebx + pushl $.LC99 + movl %eax, %esi + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + call get_nodes + addl $16, %esp + movl $0, -264(%ebp) + movl $0, -268(%ebp) + movl %eax, -260(%ebp) + jmp .L1439 +.L1440: + movl -264(%ebp), %esi + movl $3320, %edx + addl $24, %esi + andl $31, %esi + sall $15, %esi + movl %esi, %ebx + shrl $4, %ebx + orl $-2147482660, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + xorl %edi, %edi + movl %eax, -136(%ebp) + movl %eax, -344(%ebp) + movl $152, -144(%ebp) +.L1441: + movl %esi, %eax + movl $3320, %edx + shrl $4, %eax + orl -144(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $7, %eax + cmpl $3, %eax + jne .L1442 + movl %edi, %ecx + movb $-1, %al + sall %cl, %eax + notl %eax + andl %eax, -344(%ebp) + movl $37, %eax + sall %cl, %eax + orl %eax, -344(%ebp) +.L1442: + addl $32, -144(%ebp) + addl $8, %edi + cmpl $248, -144(%ebp) + jne .L1441 + movl -136(%ebp), %eax + cmpl %eax, -344(%ebp) + je .L1445 + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -344(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $1, -268(%ebp) +.L1445: + incl -264(%ebp) +.L1439: + movl -260(%ebp), %edx + cmpl %edx, -264(%ebp) + jne .L1440 + movl 849692, %ecx + movl $0, -248(%ebp) + movl $0, -252(%ebp) + movl $0, -316(%ebp) + movl %ecx, -256(%ebp) + jmp .L1448 +.L1449: + movl -316(%ebp), %eax + addl $849308, %eax + movl 20(%eax), %ebx + movl 12(%eax), %edx + movl 8(%eax), %ecx + movl %ebx, -204(%ebp) + movl -316(%ebp), %ebx + movl %edx, -240(%ebp) + movb 4(%eax), %dl + movb 16(%eax), %al + movl %ecx, -196(%ebp) + movl 849308(%ebx), %ebx + movb %dl, -189(%ebp) + addl %ecx, %edx + movb %al, -197(%ebp) + movzbl %dl, %edx + movl %ebx, %eax + movl %ebx, -236(%ebp) + call ht_read_freq_cap + movb -197(%ebp), %dl + addl -204(%ebp), %edx + movzbl %dl, %edx + movl %eax, %ebx + movl -240(%ebp), %eax + call ht_read_freq_cap + andl %eax, %ebx + movzwl %bx, %eax +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -196(%ebp), %edx + movl -236(%ebp), %ebx + movzbl -189(%ebp), %ecx + movb %al, -217(%ebp) + movzbl %dh, %eax + shrl $4, %ebx + movl %ebx, -224(%ebp) + leal (%eax,%ecx), %ebx + orl -224(%ebp), %ebx + movl %ecx, -208(%ebp) + movl $3320, %ecx + movl %ecx, %edx + movl %ebx, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + andl $3, %eax + addw $3324, %ax + movw %ax, -226(%ebp) + movl %eax, %edx +#APP + inb %dx, %al +#NO_APP + movzbl -197(%ebp), %ebx + movl %eax, %esi + movl -240(%ebp), %eax + movl %ebx, -212(%ebp) + movl -204(%ebp), %ebx + shrl $4, %eax + movl %eax, -232(%ebp) + movzbl %bh, %edx + addl -212(%ebp), %edx + orl %eax, %edx + movl %edx, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %edx, -336(%ebp) + movl %ebx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -336(%ebp), %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + andl $15, %esi + movl %esi, %edx + cmpb -217(%ebp), %dl + movb -217(%ebp), %dl + movb %al, -329(%ebp) + setne -312(%ebp) + andl $15, %eax + cmpb %dl, %al + movb -312(%ebp), %al + setne %dl + orl %edx, %eax + movl %ecx, %edx + movl %eax, %esi + movl %edi, %eax + andl $1, %esi +#APP + outl %eax, %dx +#NO_APP + movzbl -217(%ebp), %edi + movw -226(%ebp), %dx + movl %edi, %eax +#APP + outb %al, %dx +#NO_APP + movl %ebx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx +#APP + outb %al, %dx +#NO_APP + movl -196(%ebp), %edi + movb -189(%ebp), %al + shrl $16, %edi + addl %edi, %eax + movzbl %al, %edx + movl -236(%ebp), %eax + call ht_read_width_cap + movl -204(%ebp), %ecx + shrl $16, %ecx + movl %ecx, -216(%ebp) + movb %al, %bl + movb -197(%ebp), %al + addl %ecx, %eax + movzbl %al, %edx + movl -240(%ebp), %eax + call ht_read_width_cap + movl %ebx, %edx + andl $7, %edx + movb link_width_to_pow2.3138(%edx), %dl + shrb $4, %bl + andl $7, %ebx + movb link_width_to_pow2.3138(%ebx), %cl + movb %dl, -129(%ebp) + movb %al, %dl + andl $7, %eax + shrb $4, %dl + movb link_width_to_pow2.3138(%eax), %al + andl $7, %edx + movb link_width_to_pow2.3138(%edx), %dl + cmpb -129(%ebp), %dl + jbe .L1450 + movb -129(%ebp), %dl +.L1450: + cmpb %cl, %al + movzbl %dl, %edx + jbe .L1451 + movb %cl, %al +.L1451: + movzbl %al, %eax + movb pow2_to_link_width.3139(%edx), %dl + movzbl pow2_to_link_width.3139(%eax), %eax + movl -208(%ebp), %ebx + sall $4, %eax + orl %eax, %edx + movb %dl, -130(%ebp) + movl %edi, %edx + andl $255, %edx + leal 1(%edx,%ebx), %edi + movl $3320, %ebx + orl -224(%ebp), %edi + movl %ebx, %edx + movl %edi, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + andl $119, %eax + movzbl -130(%ebp), %edi + movl %ebx, %edx + cmpb -130(%ebp), %al + setne %al + movzbl %al, %eax + orl %eax, %esi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx +#APP + outb %al, %dx +#NO_APP + movl %edi, %edx + andl $7, %edi + movl -212(%ebp), %eax + andl $112, %edx + sarl $4, %edx + sall $4, %edi + orl %edx, %edi + movzbl -216(%ebp),%edx + leal 1(%edx,%eax), %ecx + orl -232(%ebp), %ecx + movl %ecx, %edx + andl $2147483644, %edx + orl $-2147483648, %edx + movl %edx, -340(%ebp) + movl %edx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + movb %al, %cl + movl %ebx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx + andl $119, %eax +#APP + outb %al, %dx +#NO_APP + andl $119, %ecx + movl %edi, %ebx + xorl %eax, %eax + cmpb %bl, %cl + setne %al + orl %eax, %esi + incl -248(%ebp) + orl %esi, -252(%ebp) + addl $24, -316(%ebp) +.L1448: + movl -256(%ebp), %eax + cmpl %eax, -248(%ebp) + jne .L1449 + movb 849696, %dl + movl $0, -188(%ebp) + movl $0, -148(%ebp) + movb %dl, -241(%ebp) + jmp .L1453 +.L1454: + movzbl %dl, %eax + movl $3320, %ebx + leal 224(,%eax,4), %eax + movl %ebx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + andl $16711680, %eax + orl $-2147483648, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $65535, %eax + cmpl $4130, %eax + je .L1455 + cmpl $4318, %eax + jne .L1457 +.L1455: + movl %ecx, %edi + andl $240, %ecx + shrl $4, %ecx + andl $3840, %edi + leal 24(%ecx), %ebx + movl $3320, %edx + shrl $8, %edi + andl $31, %ebx + sall $15, %ebx + movl %edi, %eax + movl %ebx, %ecx + sall $5, %eax + addl $152, %eax + shrl $4, %ecx + orl %eax, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $7, %eax + cmpl $7, %eax + jne .L1458 + movl %ebx, %esi + movb $-8, %dl + shrl $4, %esi + orl $-2147482660, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl $255, %ebx + leal 0(,%edi,8), %ecx + sall %cl, %ebx + notl %ebx + andl %eax, %ebx + movl %eax, -336(%ebp) + movl $37, %eax + sall %cl, %eax + orl %eax, %ebx + cmpl -336(%ebp), %ebx + je .L1458 + movb $-8, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $1, %eax + jmp .L1461 +.L1458: + xorl %eax, %eax +.L1461: + orl %eax, -188(%ebp) +.L1457: + incl -148(%ebp) +.L1453: + movzbl -241(%ebp), %eax + cmpl %eax, -148(%ebp) + movb -148(%ebp), %dl + jne .L1454 + call mcp55_early_setup_x + movl -188(%ebp), %edx + orl %edx, -252(%ebp) + movl -268(%ebp), %ecx + orl %eax, -252(%ebp) + orl -252(%ebp), %ecx + je .L1463 + pushl %ecx + pushl $.LC100 + pushl $.LC5 + pushl $6 + call do_printk + call soft_reset + addl $16, %esp +.L1463: + movl 849304, %ebx + xorl %esi, %esi + xorl %edi, %edi + movl $68, -18873472 + movl $0, -152(%ebp) + movl %ebx, -184(%ebp) + jmp .L1465 +.L1466: + leal 24(%esi), %eax + movl $1, %ecx + andl $31, %eax + sall $15, %eax + movl %eax, %edx + leal 848264(%edi), %ebx + orb $16, %dh + movl %edx, 8(%ebx) + movl %eax, %edx + movl %eax, 4(%ebx) + orb $32, %dh + orb $48, %ah + movl %esi, 848264(%edi) + movl %edx, 12(%ebx) + movl %eax, 16(%ebx) +.L1467: + movl -152(%ebp), %eax + addl %ecx, %eax + movw spd_addr.6906-2(%eax,%eax), %dx + movw %dx, 18(%ebx,%ecx,2) + movw spd_addr.6906+6(%eax,%eax), %ax + movw %ax, 26(%ebx,%ecx,2) + incl %ecx + cmpl $5, %ecx + jne .L1467 + addl $8, -152(%ebp) + incl %esi + addl $36, %edi +.L1465: + cmpl -184(%ebp), %esi + jl .L1466 + xorl %ecx, %ecx +.L1470: + movl %ecx, %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57151710, %eax + je .L1471 + addl $4096, %ecx + cmpl $268435456, %ecx + jne .L1470 + orl $-1, %ecx +.L1471: + shrl $4, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx + andl $268435452, %eax + orl $-2147483616, %eax +#APP + outl %eax, %dx +#NO_APP + movl $4097, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movl %ebx, %edx + andl $268435452, %eax + orl $-2147483612, %eax +#APP + outl %eax, %dx +#NO_APP + movl $4353, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + orl $4, %ecx + movl %ebx, %edx + movl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx + movl $1, %eax + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + outw %ax, %dx +#NO_APP + movl $4097, %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + movl $4353, %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + pushl %edx + pushl $847872 + pushl $848264 + pushl 849304 + call sdram_initialize +#APP + movl %esp, %eax + +#NO_APP + movl %eax, %edx + movl $.LC101, %eax + call print_debug_pcar + movl $1515870810, %edx + movl $.LC102, %eax + call print_debug_pcar + movl $819200, %esi + movl $2064384, %edi + call set_init_ram_access + addl $12, %esp + pushl $.LC103 + pushl $.LC5 + pushl $7 + call do_printk + movl $8192, %ecx +#APP + cld + rep; movsl + +#NO_APP + movl $-1245184, %eax +#APP + subl %eax, %ebp + subl %eax, %esp + +#NO_APP + addl $12, %esp + pushl $.LC104 + pushl $.LC5 + pushl $7 + call do_printk + movl $1515870810, %edx + movl $.LC102, %eax + call print_debug_pcar + addl $12, %esp + pushl $.LC105 + pushl $.LC5 + pushl $7 + call do_printk +#APP + pushl %edx + pushl %ecx + + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax, %cr0 + movl $0x269, %ecx + xorl %edx, %edx + xorl %eax, %eax + wrmsr + movl $0xC0010010, %ecx + rdmsr + andl $(~(3<<18)), %eax + wrmsr + movl $0x2ff, %ecx + xorl %edx, %edx + movl $0x00000800, %eax + wrmsr + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + + popl %ecx + popl %edx + +#NO_APP + addl $12, %esp + movl $-2147434388, %esi + pushl $.LC106 + pushl $.LC5 + pushl $7 + call do_printk + call clear_init_ram + addl $12, %esp + pushl $.LC104 + pushl $.LC5 + pushl $7 + call do_printk + movl %esi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + andb $253, %ch + movb $-4, %dl + orb $2, %ch + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + addl $12, %esp + pushl $.LC107 + pushl $.LC5 + pushl $7 + call do_printk +#APP + leal _liseg, %eax + leal _iseg, %ebx + +#NO_APP + movl %eax, %edx + movl %eax, %esi + movl $.LC108, %eax + addl $4, %esi + movl %ebx, -164(%ebp) + xorl %edi, %edi + call print_debug_cp_run + movl %ebx, %edx + movl $.LC109, %eax + call print_debug_cp_run + xorl %ebx, %ebx + addl $16, %esp + movl %esi, -120(%ebp) + xorl %esi, %esi + movl $0, -168(%ebp) + movl $1, -172(%ebp) + jmp .L1542 +.L1475: + movl -120(%ebp), %edx + movl -164(%ebp), %ecx + movb (%edx,%edi), %al + incl %edi + movl -168(%ebp), %edx + movb %al, (%ecx,%edx) + incl %edx + movl %edx, -168(%ebp) +.L1542: + testl %esi, %esi + je .L1476 + decl %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + andl $1, %eax + jmp .L1478 +.L1476: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax +.L1478: + testb %al, %al + jne .L1475 + movl $1, %edx +.L1480: + addl %edx, %edx + testl %esi, %esi + je .L1481 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %edx + testl %ecx, %ecx + jne .L1483 + jmp .L1535 +.L1481: + movl -120(%ebp), %ecx + movl (%ecx,%edi), %ebx + addl $4, %edi + movl $31, %ecx + movl %ebx, %eax + shrl $31, %eax + addl %eax, %edx +.L1483: + leal -1(%ecx), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + xorl $1, %eax + andl $1, %eax + jmp .L1485 +.L1535: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + xorl $1, %eax + andl $1, %eax +.L1485: + testb %al, %al + jne .L1480 + movl -172(%ebp), %ecx + cmpl $2, %edx + movl %ecx, -180(%ebp) + je .L1489 + movl -120(%ebp), %ecx + sall $8, %edx + movzbl (%ecx,%edi), %eax + incl %edi + leal -768(%edx,%eax), %eax + cmpl $-1, %eax + je .L1490 + incl %eax + movl %eax, -180(%ebp) + movl %eax, -172(%ebp) +.L1489: + testl %esi, %esi + je .L1492 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %eax + testl %ecx, %ecx + jne .L1494 + jmp .L1537 +.L1492: + movl -120(%ebp), %eax + movl $31, %ecx + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + addl %eax, %eax +.L1494: + leal -1(%ecx), %esi + movl %ebx, %edx + movl %esi, %ecx + shrl %cl, %edx + andl $1, %edx + jmp .L1496 +.L1537: + movl -120(%ebp), %edx + movl $31, %esi + movl (%edx,%edi), %ebx + addl $4, %edi + movl %ebx, %edx + shrl $31, %edx +.L1496: + addl %eax, %edx + jne .L1497 + movl $1, %edx +.L1499: + addl %edx, %edx + testl %esi, %esi + je .L1500 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %edx + testl %ecx, %ecx + jne .L1502 + jmp .L1538 +.L1500: + movl -120(%ebp), %ecx + movl (%ecx,%edi), %ebx + addl $4, %edi + movl $31, %ecx + movl %ebx, %eax + shrl $31, %eax + addl %eax, %edx +.L1502: + leal -1(%ecx), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + xorl $1, %eax + andl $1, %eax + jmp .L1504 +.L1538: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + xorl $1, %eax + andl $1, %eax +.L1504: + testb %al, %al + jne .L1499 + addl $2, %edx +.L1497: + xorl %eax, %eax + cmpl $3328, -180(%ebp) + seta %al + addl %eax, %edx + movl %edx, -128(%ebp) + movl -164(%ebp), %edx + addl -168(%ebp), %edx + movl %edx, %ecx + subl -180(%ebp), %ecx + movl %ecx, -176(%ebp) + movb (%ecx), %al + movb %al, (%edx) + movl -168(%ebp), %eax + movl $0, -344(%ebp) + incl %eax + movl %eax, -124(%ebp) +.L1506: + movl -344(%ebp), %ecx + movl -176(%ebp), %eax + movl -164(%ebp), %edx + addl -344(%ebp), %edx + movl %edx, -336(%ebp) + movb 1(%ecx,%eax), %cl + movl -168(%ebp), %eax + movb %cl, 1(%eax,%edx) + movl -128(%ebp), %edx + incl -344(%ebp) + cmpl %edx, -344(%ebp) + jne .L1506 + movl -124(%ebp), %ecx + addl %edx, %ecx + movl %ecx, -168(%ebp) + jmp .L1542 +.L1490: + movl %edi, %edx + movl $.LC110, %eax + call print_debug_cp_run + movl -168(%ebp), %edx + movl $.LC111, %eax + call print_debug_cp_run + pushl %eax + pushl $.LC112 + pushl $.LC5 + pushl $7 + call do_printk +#APP + xorl %ebp, %ebp + cli + leal _iseg, %edi + jmp *%edi + +#NO_APP + addl $12, %esp + pushl $.LC113 + pushl $.LC5 + pushl $7 + call do_printk + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L1525: + movl %edi, %edx + movl $.LC114, %eax + call print_initcpu8 + jmp .L1391 +.L1529: + movl %edi, %edx + movl $.LC115, %eax + call print_initcpu8 + jmp .L1428 +.L1530: + movl %esi, %edx + movl $.LC116, %eax + call print_initcpu8 + jmp .L1436 + .size real_main, .-real_main +.globl cache_as_ram_main + .type cache_as_ram_main, @function +cache_as_ram_main: + pushl %ebp + movl %esp, %ebp + popl %ebp + jmp real_main + .size cache_as_ram_main, .-cache_as_ram_main +.globl init_timer + .type init_timer, @function +init_timer: + pushl %ebp + movl %esp, %ebp + movl $196608, -18873568 + movl $11, -18873376 + movl $-1, -18873472 + popl %ebp + ret + .size init_timer, .-init_timer +.globl uart8250_rx_byte + .type uart8250_rx_byte, @function +uart8250_rx_byte: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl 8(%ebp), %ebx +.L1549: + movl %ebx, %ecx + leal 5(%ecx), %edx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + testb $1, %al + je .L1549 + movzwl %bx, %edx +#APP + inb %dx, %al +#NO_APP + popl %ebx + movzbl %al, %eax + popl %ebp + ret + .size uart8250_rx_byte, .-uart8250_rx_byte + .section .rom.data + .align 2 + .type spd_addr.6906, @object + .size spd_addr.6906, 16 +spd_addr.6906: + .value 80 + .value 82 + .value 0 + .value 0 + .value 81 + .value 83 + .value 0 + .value 0 + .align 32 + .type next_fid_a.6702, @object + .size next_fid_a.6702, 144 +next_fid_a.6702: + .byte 0 + .byte 9 + .byte 9 + .byte 8 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 0 + .byte 11 + .byte 11 + .byte 9 + .byte 9 + .byte 10 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 0 + .byte 13 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 12 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 0 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 14 + .byte 15 + .byte 4 + .byte 9 + .byte 9 + .byte 9 + .byte 0 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 4 + .byte 5 + .byte 10 + .byte 10 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 9 + .byte 5 + .byte 11 + .byte 11 + .byte 9 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 10 + .byte 5 + .byte 6 + .byte 12 + .byte 10 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 11 + .byte 6 + .byte 13 + .byte 11 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 12 + .byte 12 + .byte 6 + .byte 7 + .byte 12 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 13 + .byte 13 + .byte 13 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 14 + .byte 14 + .byte 14 + .byte 7 + .byte 14 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .align 32 + .type register_values.6091, @object + .size register_values.6091, 468 +register_values.6091: + .long 790596 + .long 63736 + .long 0 + .long 790604 + .long 63736 + .long 1 + .long 790612 + .long 63736 + .long 2 + .long 790620 + .long 63736 + .long 3 + .long 790628 + .long 63736 + .long 4 + .long 790636 + .long 63736 + .long 5 + .long 790644 + .long 63736 + .long 6 + .long 790652 + .long 63736 + .long 7 + .long 790592 + .long 63740 + .long 0 + .long 790600 + .long 63740 + .long 0 + .long 790608 + .long 63740 + .long 0 + .long 790616 + .long 63740 + .long 0 + .long 790624 + .long 63740 + .long 0 + .long 790632 + .long 63740 + .long 0 + .long 790640 + .long 63740 + .long 0 + .long 790648 + .long 63740 + .long 0 + .long 790660 + .long 72 + .long 0 + .long 790668 + .long 72 + .long 0 + .long 790676 + .long 72 + .long 0 + .long 790684 + .long 72 + .long 0 + .long 790692 + .long 72 + .long 0 + .long 790700 + .long 72 + .long 0 + .long 790708 + .long 72 + .long 0 + .long 790656 + .long 240 + .long 0 + .long 790664 + .long 240 + .long 0 + .long 790672 + .long 240 + .long 0 + .long 790680 + .long 240 + .long 0 + .long 790688 + .long 240 + .long 0 + .long 790696 + .long 240 + .long 0 + .long 790704 + .long 240 + .long 0 + .long 790732 + .long -33550392 + .long 0 + .long 790740 + .long -33550392 + .long 0 + .long 790748 + .long -33550392 + .long 0 + .long 790728 + .long -33550388 + .long 0 + .long 790736 + .long -33550388 + .long 0 + .long 790744 + .long -33550388 + .long 0 + .long 790756 + .long 64648 + .long 0 + .long 790760 + .long 64648 + .long 0 + .long 790764 + .long 64648 + .long 0 + .align 32 + .type console_test.1892, @object + .size console_test.1892, 76 +console_test.1892: + .string "\r\n\r\ncoreboot-2.0.0nf570_Fallback Thu Oct 30 16:44:09 GMT 2008 starting...\r\n" + .type pow2_to_link_width.3139, @object + .size pow2_to_link_width.3139, 6 +pow2_to_link_width.3139: + .byte 7 + .byte 4 + .byte 5 + .byte 0 + .byte 1 + .byte 3 + .type link_width_to_pow2.3138, @object + .size link_width_to_pow2.3138, 8 +link_width_to_pow2.3138: + .byte 3 + .byte 4 + .byte 0 + .byte 5 + .byte 1 + .byte 2 + .byte 0 + .byte 0 + .align 4 + .type C.178.6378, @object + .size C.178.6378, 16 +C.178.6378: + .long 0 + .long 4 + .long 4 + .long 4 + .align 32 + .type ctrl_devport_conf.6223, @object + .size ctrl_devport_conf.6223, 36 +ctrl_devport_conf.6223: + .long 36968 + .long -65281 + .long 10240 + .long 36964 + .long -65281 + .long 9216 + .long 36960 + .long -65281 + .long 8192 + .align 32 + .type ctrl_conf_2.6324, @object + .size ctrl_conf_2.6324, 112 +ctrl_conf_2.6324: + .long 16 + .long 116 + .long -4081 + .long 2512 + .long 16 + .long 32884 + .long -32769 + .long 32768 + .long 32 + .long 9288 + .long -65537 + .long 65536 + .long 32 + .long 10336 + .long -256 + .long 18 + .long 16 + .long 37092 + .long -5242881 + .long 5242880 + .long 34 + .long 9412 + .long -256 + .long 4 + .long 34 + .long 9412 + .long -256 + .long 5 + .align 32 + .type ctrl_conf_master_only.6323, @object + .size ctrl_conf_master_only.6323, 32 +ctrl_conf_master_only.6323: + .long 32 + .long 8320 + .long 251658239 + .long 16777216 + .long 34 + .long 9408 + .long -13 + .long 0 + .align 32 + .type ctrl_conf_mcp55_only.6322, @object + .size ctrl_conf_mcp55_only.6322, 528 +ctrl_conf_mcp55_only.6322: + .long 16 + .long 36928 + .long 0 + .long -880537378 + .long 16 + .long 37088 + .long -257 + .long 0 + .long 16 + .long 37092 + .long -5 + .long 0 + .long 16 + .long 37096 + .long -5650177 + .long 12288 + .long 16 + .long 131136 + .long 0 + .long -880537378 + .long 16 + .long 131320 + .long -49 + .long 16 + .long 16 + .long 65600 + .long 0 + .long -880537378 + .long 16 + .long 69696 + .long 0 + .long -880537378 + .long 16 + .long 69732 + .long -125829121 + .long 83886080 + .long 16 + .long 69752 + .long -4161537 + .long 3538944 + .long 16 + .long 69736 + .long -33501121 + .long 20917248 + .long 16 + .long 69744 + .long -524289 + .long 524288 + .long 16 + .long 69756 + .long -4081 + .long 1392 + .long 16 + .long 69880 + .long -49 + .long 16 + .long 16 + .long 196612 + .long -261 + .long 260 + .long 16 + .long 196668 + .long -167772161 + .long 167772160 + .long 16 + .long 196672 + .long 13172735 + .long 120782848 + .long 16 + .long 196680 + .long -8 + .long 5 + .long 16 + .long 196684 + .long -33357825 + .long 4980736 + .long 16 + .long 196724 + .long -64 + .long 0 + .long 16 + .long 196800 + .long 0 + .long -880537378 + .long 16 + .long 196804 + .long -8 + .long 7 + .long 16 + .long 32888 + .long -1056964609 + .long 419430400 + .long 16 + .long 200768 + .long 0 + .long -880537378 + .long 34 + .long 9445 + .long 0 + .long 104 + .long 34 + .long 9446 + .long 0 + .long 104 + .long 34 + .long 9447 + .long 0 + .long 104 + .long 34 + .long 9448 + .long 0 + .long 104 + .long 34 + .long 9467 + .long 0 + .long 96 + .long 34 + .long 9468 + .long 0 + .long 96 + .long 34 + .long 9429 + .long -13 + .long 8 + .long 34 + .long 9430 + .long -13 + .long 8 + .long 34 + .long 9454 + .long -13 + .long 8 + .align 32 + .type ctrl_conf_1_1.6321, @object + .size ctrl_conf_1_1.6321, 144 +ctrl_conf_1_1.6321: + .long 16 + .long 163904 + .long 0 + .long -880537378 + .long 16 + .long 163920 + .long -4 + .long 3 + .long 16 + .long 163940 + .long -2 + .long 1 + .long 16 + .long 163952 + .long -983041 + .long 262144 + .long 16 + .long 164012 + .long -3841 + .long 256 + .long 16 + .long 163964 + .long -17 + .long 0 + .long 16 + .long 164040 + .long -16711936 + .long 655370 + .long 16 + .long 164048 + .long -251658241 + .long 50331648 + .long 16 + .long 164064 + .long -251658241 + .long 50331648 + .align 32 + .type ctrl_conf_1.6320, @object + .size ctrl_conf_1.6320, 640 +ctrl_conf_1.6320: + .long 32 + .long 8208 + .long 524287 + .long 267878400 + .long 32 + .long 8356 + .long -1179649 + .long 73728 + .long 32 + .long 8364 + .long -513 + .long 512 + .long 32 + .long 8372 + .long -3 + .long 2 + .long 32 + .long 10276 + .long -1057951601 + .long 637665840 + .long 32 + .long 10292 + .long 0 + .long 572662306 + .long 32 + .long 10248 + .long 2147483647 + .long 0 + .long 32 + .long 10284 + .long 2147483647 + .long -2147483648 + .long 32 + .long 10444 + .long -1537 + .long 0 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10444 + .long -1537 + .long 512 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10444 + .long -1537 + .long 1024 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10356 + .long -61451 + .long 61440 + .long 32 + .long 10360 + .long -16711936 + .long 1048592 + .long 32 + .long 10364 + .long -15732481 + .long 5244160 + .long 32 + .long 10368 + .long -25 + .long 0 + .long 32 + .long 10336 + .long -3145729 + .long 3145728 + .long 32 + .long 10384 + .long -65281 + .long 65280 + .long 32 + .long 10396 + .long -16711681 + .long 458752 + .long 16 + .long 64 + .long 0 + .long -880537378 + .long 16 + .long 72 + .long -8979 + .long 8194 + .long 16 + .long 120 + .long -114 + .long 17 + .long 16 + .long 128 + .long -65536 + .long 39203 + .long 16 + .long 136 + .long -2 + .long 0 + .long 16 + .long 140 + .long -65536 + .long 127 + .long 16 + .long 220 + .long -65537 + .long 65536 + .long 16 + .long 32832 + .long 0 + .long -880537378 + .long 16 + .long 32884 + .long -133 + .long 132 + .long 16 + .long 33016 + .long -49 + .long 16 + .long 16 + .long 37060 + .long -2 + .long 1 + .long 16 + .long 37104 + .long 2147483645 + .long 2 + .long 16 + .long 37112 + .long -49 + .long 16 + .long 16 + .long 262208 + .long 0 + .long -880537378 + .long 16 + .long 262248 + .long -256 + .long 255 + .long 16 + .long 262392 + .long -65 + .long 64 + .long 16 + .long 294976 + .long 0 + .long -880537378 + .long 16 + .long 295016 + .long -256 + .long 255 + .long 16 + .long 295160 + .long -65 + .long 64 + .align 32 + .type ctrl_devport_conf_clear.6248, @object + .size ctrl_devport_conf_clear.6248, 36 +ctrl_devport_conf_clear.6248: + .long 36968 + .long -65281 + .long 0 + .long 36964 + .long -65281 + .long 0 + .long 36960 + .long -65281 + .long 0 + .align 32 + .type register_values.3726, @object + .size register_values.3726, 456 +register_values.3726: + .long 790596 + .long 63736 + .long 0 + .long 790604 + .long 63736 + .long 1 + .long 790612 + .long 63736 + .long 2 + .long 790620 + .long 63736 + .long 3 + .long 790628 + .long 63736 + .long 4 + .long 790636 + .long 63736 + .long 5 + .long 790644 + .long 63736 + .long 6 + .long 790652 + .long 63736 + .long 7 + .long 790592 + .long 63740 + .long 0 + .long 790600 + .long 63740 + .long 0 + .long 790608 + .long 63740 + .long 0 + .long 790616 + .long 63740 + .long 0 + .long 790624 + .long 63740 + .long 0 + .long 790632 + .long 63740 + .long 0 + .long 790640 + .long 63740 + .long 0 + .long 790648 + .long 63740 + .long 0 + .long 794688 + .long -536362984 + .long 0 + .long 794692 + .long -536362984 + .long 0 + .long 794696 + .long -536362984 + .long 0 + .long 794700 + .long -536362984 + .long 0 + .long 794704 + .long -536362984 + .long 0 + .long 794708 + .long -536362984 + .long 0 + .long 794712 + .long -536362984 + .long 0 + .long 794716 + .long -536362984 + .long 0 + .long 794720 + .long -536362977 + .long 0 + .long 794724 + .long -536362977 + .long 0 + .long 794728 + .long -536362977 + .long 0 + .long 794732 + .long -536362977 + .long 0 + .long 794744 + .long -524288 + .long 102 + .long 794752 + .long -65536 + .long 0 + .long 794760 + .long 1224 + .long -16777214 + .long 794764 + .long 786575 + .long 131328 + .long 794768 + .long -655284 + .long 16 + .long 794772 + .long 11022080 + .long 32768 + .long 794784 + .long 16776192 + .long -16777216 + .long 798808 + .long -2039584 + .long 0 + .long 798812 + .long 62 + .long 0 + .long 798816 + .long -256 + .long 0 + .type addresses.4189, @object + .size addresses.4189, 24 +addresses.4189: + .byte 2 + .byte 3 + .byte 4 + .byte 5 + .byte 6 + .byte 9 + .byte 11 + .byte 13 + .byte 17 + .byte 18 + .byte 20 + .byte 21 + .byte 23 + .byte 26 + .byte 27 + .byte 28 + .byte 29 + .byte 30 + .byte 36 + .byte 37 + .byte 38 + .byte 41 + .byte 41 + .byte 42 + .type cs_map_aaa.3871, @object + .size cs_map_aaa.3871, 24 +cs_map_aaa.3871: + .byte 0 + .byte 1 + .byte 3 + .byte 0 + .byte 2 + .byte 6 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 0 + .byte 0 + .byte 5 + .byte 8 + .byte 0 + .byte 7 + .byte 9 + .byte 0 + .byte 10 + .byte 11 + .align 2 + .type min_cycle_times.4294, @object + .size min_cycle_times.4294, 8 +min_cycle_times.4294: + .value 592 + .value 768 + .value 885 + .value 1280 + .type latency_indicies.4293, @object + .size latency_indicies.4293, 3 +latency_indicies.4293: + .byte 25 + .byte 23 + .byte 9 + .align 4 + .type fraction.4275, @object + .size fraction.4275, 16 +fraction.4275: + .long 37 + .long 51 + .long 102 + .long 117 + .align 32 + .type speed, @object + .size speed, 120 +speed: + .value 1280 + .byte -56 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 0 + .string "200Mhz\r\n" + .zero 3 + .value 885 + .byte -106 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 1 + .string "266Mhz\r\n" + .zero 3 + .value 768 + .byte 120 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 2 + .string "333Mhz\r\n" + .zero 3 + .value 592 + .byte 100 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 3 + .string "400Mhz\r\n" + .zero 3 + .value 0 + .zero 22 + .align 32 + .type dv_a.4258, @object + .size dv_a.4258, 48 +dv_a.4258: + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -56 + .byte -56 + .byte -56 + .byte 100 + .byte -56 + .byte -90 + .byte -90 + .byte 100 + .byte -56 + .byte -85 + .byte -114 + .byte 100 + .byte -56 + .byte -106 + .byte 125 + .byte 100 + .byte -56 + .byte -100 + .byte -123 + .byte 100 + .byte -56 + .byte -96 + .byte 120 + .byte 100 + .byte -56 + .byte -93 + .byte 127 + .byte 100 + .byte -56 + .byte -106 + .byte -123 + .byte 100 + .byte -56 + .byte -103 + .byte 123 + .byte 100 + .byte -56 + .byte -99 + .byte -128 + .byte 100 + .byte -56 + .byte -96 + .byte 120 + .byte 100 + .type fraction.4394, @object + .size fraction.4394, 7 +fraction.4394: + .byte 0 + .byte 1 + .byte 2 + .byte 2 + .byte 3 + .byte 3 + .byte 0 + .type faw_2k.4810, @object + .size faw_2k.4810, 4 +faw_2k.4810: + .byte 10 + .byte 14 + .byte 17 + .byte 18 + .type faw_1k.4809, @object + .size faw_1k.4809, 4 +faw_1k.4809: + .byte 8 + .byte 10 + .byte 13 + .byte 14 + .type csbase_low_f0_shift.3963, @object + .size csbase_low_f0_shift.3963, 12 +csbase_low_f0_shift.3963: + .byte 6 + .byte 7 + .byte 7 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte 9 + .byte 9 + .byte 8 + .byte 9 + .align 32 + .type TestPatternJD1b.5550, @object + .size TestPatternJD1b.5550, 1152 +TestPatternJD1b.5550: + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long 538976288 + .long 538976288 + .long 538976288 + .long 538976288 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .align 32 + .type TestPatternJD1a.5549, @object + .size TestPatternJD1a.5549, 576 +TestPatternJD1a.5549: + .long 0 + .long 0 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long 538976288 + .long 538976288 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .align 32 + .type TestPattern2.5214, @object + .size TestPattern2.5214, 64 +TestPattern2.5214: + .long 305419896 + .long -2023406815 + .long 591751049 + .long -1737075662 + .long 1496864804 + .long 810116900 + .long 608765845 + .long -1718384845 + .long 1077433922 + .long 944132677 + .long 692265315 + .long 84310164 + .long 305434693 + .long -1737345945 + .long 305690164 + .long 878212643 + .align 32 + .type TestPattern1.5213, @object + .size TestPattern1.5213, 64 +TestPattern1.5213: + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .align 32 + .type TestPattern0.5212, @object + .size TestPattern0.5212, 64 +TestPattern0.5212: + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .align 32 + .type TT_a.5178, @object + .size TT_a.5178, 96 +TT_a.5178: + .value 6250 + .value 6250 + .value 6250 + .value 6250 + .value 5000 + .value 5000 + .value 5000 + .value 2500 + .value 5000 + .value 4166 + .value 4166 + .value 2500 + .value 5000 + .value 4285 + .value 3571 + .value 2500 + .value 5000 + .value 3750 + .value 3125 + .value 2500 + .value 5000 + .value 3888 + .value 3333 + .value 2500 + .value 5000 + .value 4000 + .value 3000 + .value 2500 + .value 5000 + .value 4090 + .value 3181 + .value 2500 + .value 5000 + .value 3750 + .value 3333 + .value 2500 + .value 5000 + .value 3846 + .value 3076 + .value 2500 + .value 5000 + .value 3928 + .value 3214 + .value 2500 + .value 5000 + .value 4000 + .value 3000 + .value 2500 + .align 2 + .type T1000_a.5177, @object + .size T1000_a.5177, 8 +T1000_a.5177: + .value 5000 + .value 3759 + .value 3003 + .value 2500 + .ident "GCC: (GNU) 4.1.3 20080308 (prerelease) (Ubuntu 4.1.2-21ubuntu1)" + .section .note.GNU-stack,"",@progbits Index: targets/dfi/nf570/nf570/fallback/coreboot_ram.map =================================================================== --- targets/dfi/nf570/nf570/fallback/coreboot_ram.map (revision 0) +++ targets/dfi/nf570/nf570/fallback/coreboot_ram.map (revision 0) @@ -0,0 +1,1110 @@ +00000000 A ACPI_SSDTX_NUM +00000000 A CAR_FAM10 +00000000 A CBB +00000000 A CONFIG_AMDMCT +00000000 A CONFIG_AP_CODE_IN_CAR +00000000 A CONFIG_AP_IN_SIPI_WAIT +00000000 A CONFIG_COMPRESSED_PAYLOAD_LZMA +00000000 A CONFIG_COMPRESSED_PAYLOAD_NRV2B +00000000 A CONFIG_CONSOLE_BTEXT +00000000 A CONFIG_CONSOLE_LOGBUF +00000000 A CONFIG_CONSOLE_SROM +00000000 A CONFIG_CONSOLE_VGA_MULTI +00000000 A CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST +00000000 A CONFIG_FS_EXT2 +00000000 A CONFIG_FS_FAT +00000000 A CONFIG_FS_ISO9660 +00000000 A CONFIG_FS_PAYLOAD +00000000 A CONFIG_GDB_STUB +00000000 A CONFIG_IDE +00000000 A CONFIG_IDE_PAYLOAD +00000000 A CONFIG_PCI_64BIT_PREF_MEM +00000000 A CONFIG_PCIE_CONFIGSPACE_HOLE +00000000 A CONFIG_PRECOMPRESSED_PAYLOAD +00000000 A CONFIG_SERIAL_PAYLOAD +00000000 A CONFIG_SERIAL_POST +00000000 A CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +00000000 A CONFIG_UDELAY_IO +00000000 A CONFIG_UDELAY_TSC +00000000 A CONFIG_UNCOMPRESSED +00000000 A CONFIG_USBDEBUG_DIRECT +00000000 A CONFIG_USE_INIT +00000000 A CONFIG_VGA_ROM_RUN +00000000 A ENABLE_APIC_EXT_ID +00000000 A EXT_CONF_SUPPORT +00000000 A EXT_RT_TBL_SUPPORT +00000000 A FAKE_SPDROM +00000000 A HAVE_ACPI_TABLES +00000000 A HT3_SUPPORT +00000000 A HT_CHAIN_UNITID_BASE +00000000 A HW_MEM_HOLE_SIZE_AUTO_INC +00000000 A IDE_BOOT_DRIVE +00000000 A IDE_OFFSET +00000000 A K8_MEM_BANK_B_ONLY +00000000 A MMCONF_SUPPORT +00000000 A MMCONF_SUPPORT_DEFAULT +00000000 A PCI_BUS_SEGN_BITS +00000000 A PCI_IO_CFG_EXT +00000000 A SB_HT_CHAIN_UNITID_OFFSET_ONLY +00000000 A USE_FAILOVER_IMAGE +00000000 A USE_OPTION_TABLE +00000000 A USE_WATCHDOG_ON_BOOT +00000000 A WAIT_BEFORE_CPUS_INIT +00000001 A _bogus +00000001 A CONFIG_AGP_PLUGIN_SUPPORT +00000001 A CONFIG_CARDBUS_PLUGIN_SUPPORT +00000001 A CONFIG_CHIP_NAME +00000001 A CONFIG_COMPRESS +00000001 A CONFIG_CONSOLE_SERIAL8250 +00000001 A CONFIG_CONSOLE_VGA +00000001 A CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT +00000001 A CONFIG_IOAPIC +00000001 A CONFIG_LOGICAL_CPUS +00000001 A CONFIG_MAX_PHYSICAL_CPUS +00000001 A CONFIG_PCIEXP_PLUGIN_SUPPORT +00000001 A CONFIG_PCI_ROM_RUN +00000001 A CONFIG_PCIX_PLUGIN_SUPPORT +00000001 A CONFIG_ROM_PAYLOAD +00000001 A CONFIG_SMP +00000001 A CONFIG_USE_PRINTK_IN_CAR +00000001 A CONFIG_VAR_MTRR_HOLE +00000001 A DEBUG +00000001 A HAVE_FAILOVER_BOOT +00000001 A HAVE_FALLBACK_BOOT +00000001 A HAVE_FANCTL +00000001 A HAVE_HARD_RESET +00000001 A HAVE_INIT_TIMER +00000001 A HAVE_MOVNTI +00000001 A HAVE_MP_TABLE +00000001 A HAVE_OPTION_TABLE +00000001 A HAVE_PIRQ_TABLE +00000001 A K8_HT_FREQ_1G_SUPPORT +00000001 A K8_REV_F_SUPPORT +00000001 A LIFT_BSP_APIC_ID +00000001 A SERIAL_CPU_INIT +00000001 A USE_DCACHE_RAM +00000001 A USE_FALLBACK_IMAGE +00000002 A AUTOBOOT_DELAY +00000002 A CONFIG_MAX_CPUS +00000002 A MEM_TRAIN_SEQ +00000002 A SB_HT_CHAIN_ON_BUS0 +00000003 A MAX_REBOOT_CNT +00000003 A TTYS0_LCS +00000004 A DIMM_SUPPORT +00000008 A DEFAULT_CONSOLE_LOGLEVEL +00000008 A MAXIMUM_CONSOLE_LOGLEVEL +0000000b A IRQ_SLOT_COUNT +00000010 A APIC_ID_OFFSET +00000011 A CPU_SOCKET_TYPE +00000018 A CDB +00000020 A HT_CHAIN_END_UNITID_BASE +00000027 A gdt_limit +00000028 A CPU_ADDR_BITS +00000031 A LB_CKS_RANGE_START +0000007a A LB_CKS_RANGE_END +0000007b A LB_CKS_LOC +000000ff A CONFIG_MAX_PCI_BUSES +000003f8 A TTYS0_BASE +00000800 A CONFIG_LB_MEM_TOPK +00001000 A DCACHE_RAM_GLOBAL_VAR_SIZE +00001000 A FAILOVER_SIZE +00001022 A MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +00002000 A STACK_SIZE +00002b80 A MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +00008000 A DCACHE_RAM_SIZE +00008000 A HEAP_SIZE +0001c200 A TTYS0_BAUD +0001f000 A PAYLOAD_SIZE +00020000 A ROM_IMAGE_SIZE +0003f000 A FALLBACK_SIZE +0003f000 A ROM_SECTION_SIZE +00040000 A ROM_SECTION_OFFSET +00040000 A XIP_ROM_SIZE +00080000 A ROM_SIZE +000c8000 A DCACHE_RAM_BASE +00100000 A HW_MEM_HOLE_SIZEK +00100000 A _RAMBASE +00100000 T _ram_seg +00100000 T _start +00100000 T _text +001000a0 t vec0 +001000a6 t vec1 +001000ac t vec2 +001000b2 t vec3 +001000b8 t vec4 +001000be t vec5 +001000c4 t vec6 +001000ca t vec7 +001000d0 t vec8 +001000d6 t vec9 +001000dc t vec10 +001000e2 t vec11 +001000e8 t vec12 +001000ee t vec13 +001000f4 t vec14 +001000fa t vec15 +00100100 t vec16 +00100106 t vec17 +0010010c t vec18 +00100112 t vec19 +00100118 t int_hand +00100137 t gdtaddr +00100140 t lpci_set_subsystem +0010015f t set_bits +001001cb t aza_init +00100350 t lpci_set_subsystem +00100370 t pci_init +00100410 t ttyS0_tst_byte +00100422 t ttyS0_rx_byte +00100437 t ttyS0_tx_byte +00100451 t ttyS0_init +0010046c t lpci_set_subsystem +0010048b t ide_init +00100530 t vga_tx_byte +0010069c t lpci_set_subsystem +001006bb t lpc_common_init +0010077d t lpc_slave_init +0010078b t mcp55_lpc_enable_resources +00100972 t mcp55_lpc_read_resources +001009b2 t lpc_init +00100a40 t lpci_set_subsystem +00100a5f t phy_read +00100af2 t nic_init +00100c88 t pcie_init +00100cb4 t lpci_set_subsystem +00100cd3 t usb2_init +00100d02 t usb2_set_resources +00100d0c t lpci_set_subsystem +00100d2b t sata_init +00100dd0 t find_lpc_dev +00100e25 T mcp55_enable +00101178 t lpci_set_subsystem +00101198 t misc_control_init +00101291 t mcf3_set_resources +0010134a t mcf3_read_resources +001013c0 t enable_lapic +001013da t disable_lapic +001013eb t disable_cache +001013ff T cpus_ready_for_init +00101404 t restore_mtrr_state +00101496 t set_init_ecc_mtrrs +001014f7 T is_cpu_f0_in_bsp +00101536 t clear_2M_ram +001015dd T model_fxx_init +00101988 t smbus_wait_until_done +001019b1 t mcp55_sm_init +001019b6 t lsmbus_write_byte +00101a63 t lsmbus_read_byte +00101b0a t lsmbus_send_byte +00101ba6 t lsmbus_recv_byte +00101c31 t lpci_set_subsystem +00101c50 t mcp55_sm_read_resources +00101c8c T x86_enable_cache +00101cb8 t ops_pci_bus +00101cd8 t get_pbus +00101d46 T pci_write_config32 +00101d7d T pci_write_config16 +00101dbb T pci_write_config8 +00101dfb T pci_read_config32 +00101e29 T pci_read_config16 +00101e5a T pci_read_config8 +00101e8c t disable_cache +00101ea0 t fixed_mtrr_index +00101ed6 t set_fixed_mtrrs +00101fb6 t set_fixed_mtrr_resource +00102086 T amd_setup_mtrrs +001021a8 t lapic_write_atomic +001021b3 T setup_lapic +0010226c t ops_smbus_bus +0010228c T get_pbus_smbus +001022fb T smbus_block_write +00102340 T smbus_block_read +00102385 T smbus_process_call +001023c0 T smbus_write_word +001023fb T smbus_read_word +0010242b T smbus_write_byte +00102468 T smbus_read_byte +00102498 T smbus_send_byte +001024c8 T smbus_recv_byte +001024ec T smbus_quick_write +00102510 T smbus_quick_read +00102533 T smbus_set_link +001025ac T model_fxx_update_microcode +001025b4 T pnp_write_config +001025da T pnp_read_config +001025ff T pnp_set_logical_device +00102617 T pnp_set_enable +00102669 T pnp_read_enable +0010268e T pnp_set_iobase +001026ce T pnp_set_irq +001026e5 T pnp_set_drq +001026fc T pnp_read_resources +00102701 T pnp_enable_resources +0010271e T pnp_enable +00102741 t pnp_get_ioresource +001027b7 T pnp_enable_devices +0010292b T pnp_set_resources +00102a48 T do_printk +00102a98 T pci_level_irq +00102b3e T pci_assign_irqs +00102bf0 T pci_moving_config8 +00102c61 T pci_find_next_capability +00102d08 T pci_find_capability +00102d1d T pci_moving_config16 +00102d8f T do_pci_scan_bridge +00102e6a T pci_scan_bridge +00102e82 T pci_dev_set_subsystem +00102ea1 T pci_moving_config32 +00102f0a T pci_dev_enable_resources +00102fa7 T pci_probe_dev +00103394 T pci_scan_bus +001034f3 T pci_dev_init +00103542 T pci_bus_reset +0010359c T pci_bus_enable_resources +00103604 t pci_set_resource +001038e5 T pci_dev_set_resources +00103992 t pci_record_bridge_resource +00103a83 t pci_get_rom_resource +00103bc6 T pci_get_resource +00103dae t pci_read_bases +00103dff T pci_bus_read_resources +00103fae T pci_dev_read_resources +00103fd4 T console_init +0010400d t __console_tx_byte +0010403c T console_tx_flush +00104062 T console_tx_byte +00104090 T console_rx_byte +001040d5 T console_tst_byte +00104100 T post_code +0010410b T die +0010412c T read_nb_cfg_54 +00104140 T get_apicid_base +0010425d T get_node_core_id +001042a8 T hardwaremain +0010438c T mdelay +001043b4 T delay +001043dc T isa_dma_init +001043f0 T hard_reset +00104424 T ht_scan_bridge +0010443c t ht_lookup_slave_capability +00104476 T hypertransport_scan_chain +0010499b T hypertransport_scan_chain_x +001049bc t skip_atoi +001049e7 t number +00104c4a T vtxprintf +00104fec T root_dev_init +00104ff1 T root_dev_reset +0010500c T enable_childrens_resources +0010504e T root_dev_enable_resources +00105057 T scan_static_bus +00105195 T root_dev_scan_bus +0010519e T root_dev_set_resources +001051e5 T root_dev_read_resources +001052a4 T cardbus_scan_bus +001052ad T cardbus_scan_bridge +0010538a T cardbus_enable_resources +001053e8 t cardbus_record_bridge_resource +001054d1 t cardbus_size_bridge_resource +00105524 T cardbus_read_resources +001056dc T uart8250_tx_byte +00105707 T uart8250_can_rx_byte +00105719 T uart8250_init +0010576e T init_uart8250 +001057a2 T uart8250_rx_byte +001057c0 T dev_find_slot +001057f7 T dev_find_slot_on_smbus +0010582e T dev_find_device +00105858 T dev_find_class +00105886 T probe_resource +001058be T resource_end +0010590b T resource_max +00105956 T search_bus_resources +001059d8 T search_global_resources +00105a32 T dev_set_enabled +00105a7f T disable_children +00105aca T resource_type +00105b61 T path_eq +00105bbd T find_dev_path +00105bf0 T compact_resources +00105c60 T new_resource +00105d08 T dev_path +00105df8 T report_resource_stored +00105eb2 T find_resource +00105f01 T bus_path +00105f31 T alloc_find_dev +00105f64 t round +00105f96 t pick_largest_resource +0010601a T reset_bus +0010605a T scan_bus +00106108 T dev_enumerate +00106174 T dev_initialize +0010621e T enable_resources +00106264 T dev_enable +00106295 T assign_resources +001062f4 t read_resources +001063d5 T dev_configure +00106598 T alloc_dev +00106656 T compute_allocate_resource +00106830 t disable_cache +00106844 T enable_fixed_mtrr +00106855 t set_var_mtrr +00106905 t set_fixed_mtrrs +001069e5 t fixed_mtrr_index +00106a1b t range_to_mtrr +00106ae0 T x86_mtrr_check +00106b7a T x86_setup_var_mtrrs +00106c54 T x86_setup_fixed_mtrrs +00106cb4 T x86_setup_mtrrs +00106cce t set_fixed_mtrr_resource +00106d60 T set_var_mtrr_resource +00106e40 T init_processor_name +001070b4 T x86_exception +00107100 T memcpy +00107124 T udelay +00107145 T init_timer +00107168 T memmove +001071ac T pci_rom_load +00107272 T pci_rom_probe +00107350 T map_2M_page +001074a0 t pci_conf2_write_config32 +001074dc t pci_conf2_write_config16 +0010751e t pci_conf2_write_config8 +0010755c t pci_conf2_read_config32 +001075a9 t pci_conf2_read_config16 +001075f8 t pci_conf2_read_config8 +00107648 t pci_conf1_read_config16 +00107685 t pci_conf1_read_config8 +001076c1 t pci_conf1_write_config32 +001076ef t pci_conf1_write_config16 +00107731 t pci_conf1_write_config8 +0010776f t pci_conf1_read_config32 +0010779c t rtc_checksum_valid +001077ed T rtc_init +001078f8 T x_inb +00107905 T x_inw +00107913 T x_inl +0010791d T x_outw +0010792c T x_outl +00107939 T getIntVect +0010796d T pushw +0010799d T run_bios_int +001079fe T do_int +00107a83 T x_outb +00107a91 T run_bios +00107bdc t str_tx_byte +00107bf1 T vsprintf +00107c1a T sprintf +00107c34 T malloc_mark +00107c44 T malloc_release +00107c53 T free +00107c58 T malloc +00107cb0 T memset +00107ccc t pnp_enter_ext_func_mode +00107ce9 t enable_dev +00107d08 t pnp_exit_ext_func_mode +00107d1d t it8716f_pnp_enable +00107d54 t it8716f_init +00107e0c t it8716f_pnp_enable_resources +00107e34 t it8716f_pnp_set_resources +00107e5c T pciexp_scan_bridge +00107e74 T pciexp_scan_bus +00107ee4 T move_gdt +00107f3f T write_tables +00108034 t kbc_cleanup_buffers +00108088 t kbc_output_buffer_full +001080c0 t kbc_input_buffer_empty +001080f8 t send_keyboard +0010812d T init_pc_keyboard +001082e0 T set_kbc_ps2_mode +00108340 T write_pirq_routing_table +00108430 T pcix_speed +0010847b T pcix_scan_bus +0010858b T pcix_scan_bridge +00108640 T get_bus_conf +00108834 T X86EMU_halt_sys +00108846 T fetch_decode_modrm +00108898 T fetch_byte_imm +001088c8 T fetch_word_imm +001088f5 T fetch_long_imm +0010891f T fetch_data_byte_abs +0010893a T fetch_data_word_abs +00108955 T fetch_data_long_abs +0010896d T store_data_byte_abs +0010898e T store_data_word_abs +001089af T store_data_long_abs +001089cf T decode_sib_si +00108a46 T decode_sib_address +00108b39 T decode_rm10_address +00108c86 T decode_rm01_address +00108dd9 T decode_rm00_address +00108ee8 T decode_rmXX_address +00108f13 t get_data_segment +00108fc3 T store_data_long +00108ff3 T store_data_word +00109024 T store_data_byte +00109057 T fetch_data_long +00109079 T fetch_data_word +0010909f T fetch_data_byte +001090c5 T X86EMU_exec +001091e3 T x86emu_intr_raise +00109222 T decode_rm_byte_register +00109299 T decode_rm_seg_register +00109302 T decode_rm_long_register +00109379 T decode_rm_word_register +001093f0 t mcf0_control_init +001093f5 t tolm_test +0010941e t cpu_bus_noop +00109423 t root_complex_enable_dev +0010944e t get_fx_devs +001094b7 t f1_write_config32 +001094f6 t f1_read_config32 +00109517 t amdk8_scan_chain +001097a0 t amdk8_enable_resources +001097bf t ram_resource +00109808 t pci_domain_read_resources +001098d0 t reg_useable +0010994d t amdk8_find_mempair +001099b8 t amdk8_read_resources +00109bb1 t cpu_bus_scan +00109eac t cpu_bus_init +00109ebc t pci_domain_scan_bus +00109f52 t pci_domain_set_resources +0010a376 t amdk8_scan_chains +0010a3fe t amdk8_set_resources +0010a7a4 T elfload +0010afb2 T elfboot +0010b132 T verify_ip_checksum +0010b224 T elf_check_arch +0010b249 T jmp_to_elf_entry +0010b318 T get_sblk_pci1234 +0010b48c T memcmp +0010b4bc T pcibios_handler +0010b6cc T x86emuOp_two_byte +0010b70a T x86emuOp_segovr_ES +0010b716 T x86emuOp_segovr_CS +0010b722 T x86emuOp_segovr_SS +0010b72e T x86emuOp_segovr_DS +0010b73a T x86emuOp_segovr_FS +0010b746 T x86emuOp_segovr_GS +0010b752 T x86emuOp_prefix_data +0010b761 T x86emuOp_prefix_addr +0010b770 T x86emuOp_nop +0010b77f T x86emuOp_cbw +0010b7c6 T x86emuOp_cwd +0010b7fd T x86emuOp_wait +0010b80c T x86emuOp_sahf +0010b827 T x86emuOp_lahf +0010b843 T x86emuOp_in_byte_AL_DX +0010b86b T x86emuOp_in_word_AX_DX +0010b8b1 T x86emuOp_out_byte_DX_AL +0010b8dc T x86emuOp_out_word_DX_AX +0010b923 T x86emuOp_lock +0010b932 T x86emuOp_repne +0010b949 T x86emuOp_repe +0010b95f T x86emuOp_cmc +0010b975 T x86emuOp_clc +0010b98b T x86emuOp_stc +0010b9a1 T x86emuOp_cli +0010b9ba T x86emuOp_sti +0010b9d3 T x86emuOp_cld +0010b9ec T x86emuOp_std +0010ba05 T x86emuOp_lods_word +0010baba T x86emuOp_push_DS +0010badc T x86emuOp_push_SS +0010bafe T x86emuOp_push_CS +0010bb20 T x86emuOp_push_ES +0010bb42 T x86emuOp_pushf_word +0010bb81 T x86emuOp_push_all +0010bc82 T x86emuOp_opcD3_word_RM_CL +0010bd8d T x86emuOp_opcD1_word_RM_1 +0010be7e T x86emuOp_lds_R_IMM +0010beec T x86emuOp_les_R_IMM +0010bf5a T x86emuOp_xchg_word_AX_register +0010bfbc T x86emuOp_lea_word_R_M +0010c00c T x86emuOp_mov_word_R_RM +0010c0d1 T x86emuOp_mov_word_RM_R +0010c190 T x86emuOp_xchg_word_RM_R +0010c274 T x86emuOp_push_register +0010c2c5 T x86emuOp_dec_register +0010c323 T x86emuOp_inc_register +0010c381 T x86emuOp_genop_word_R_RM +0010c485 T x86emuOp_genop_word_RM_R +0010c5c7 T x86emuOp_opcFF_word_RM +0010c89a T x86emuOp_halt +0010c8ca T x86emuOp_illegal_op +0010c8f9 T x86emuOp_xlat +0010c92b T x86emuOp_lods_byte +0010c9bd T x86emuOp_opcFE_byte_RM +0010ca6a T x86emuOp_opcD2_byte_RM_CL +0010cb07 T x86emuOp_opcD0_byte_RM_1 +0010cb92 T x86emuOp_mov_byte_R_RM +0010cc03 T x86emuOp_mov_byte_RM_R +0010cc76 T x86emuOp_xchg_byte_RM_R +0010ccfe T x86emuOp_genop_byte_R_RM +0010cd90 T x86emuOp_genop_byte_RM_R +0010ce4d T x86emuOp_jump_far_IMM +0010ce7b T x86emuOp_jump_near_IMM +0010ce99 T x86emuOp_call_near_IMM +0010ced5 T x86emuOp_mov_word_RM_IMM +0010cfa8 T x86emuOp_mov_word_register_IMM +0010cffd T x86emuOp_mov_M_AX_IMM +0010d043 T x86emuOp_mov_M_AL_IMM +0010d070 T x86emuOp_mov_AX_M_IMM +0010d0b5 T x86emuOp_mov_AL_M_IMM +0010d0e0 T x86emuOp_call_far_IMM +0010d134 T x86emuOp_opc81_word_RM_IMM +0010d254 T x86emuOp_push_word_IMM +0010d2a1 T x86emuOp_genop_word_AX_IMM +0010d31e T x86emuOp_test_AX_IMM +0010d377 T x86emuOp_test_word_RM_R +0010d44e T x86emuOp_opcF7_word_RM +0010d719 T x86emuOp_jump_byte_IMM +0010d739 T x86emuOp_out_word_IMM_AX +0010d786 T x86emuOp_out_byte_IMM_AL +0010d7b4 T x86emuOp_in_word_AX_IMM +0010d7fe T x86emuOp_in_byte_AL_IMM +0010d82a T x86emuOp_jcxz +0010d85d T x86emuOp_loop +0010d89b T x86emuOp_loope +0010d8e2 T x86emuOp_loopne +0010d929 T x86emuOp_mov_byte_RM_IMM +0010d9b6 T x86emuOp_opcC1_word_RM_MEM +0010dad2 T x86emuOp_opcC0_byte_RM_MEM +0010db72 T x86emuOp_mov_byte_register_IMM +0010dba1 T x86emuOp_opc83_word_RM_IMM +0010dccb T x86emuOp_opc82_byte_RM_IMM +0010dd72 T x86emuOp_opc80_byte_RM_IMM +0010de19 T x86emuOp_push_byte_IMM +0010de41 T x86emuOp_genop_byte_AL_IMM +0010de82 T x86emuOp_test_AL_IMM +0010deaf T x86emuOp_test_byte_RM_R +0010df32 T x86emuOp_opcF6_byte_RM +0010e0b7 T x86emuOp_aad +0010e0e7 T x86emuOp_aam +0010e139 T x86emuOp_iret +0010e16e T x86emuOp_ret_far +0010e196 T x86emuOp_ret_far_IMM +0010e1cf T x86emuOp_leave +0010e1f8 T x86emuOp_ret_near +0010e215 T x86emuOp_ret_near_IMM +0010e243 T x86emuOp_pop_DS +0010e260 T x86emuOp_pop_SS +0010e27d T x86emuOp_pop_ES +0010e29a T x86emuOp_into +0010e333 T x86emuOp_int_IMM +0010e3d6 T x86emuOp_int3 +0010e463 T x86emuOp_enter +0010e510 T x86emuOp_scas_word +0010e6bb T x86emuOp_cmps_word +0010e83e T x86emuOp_scas_byte +0010e964 T x86emuOp_cmps_byte +0010ea71 T x86emuOp_stos_word +0010eb2e T x86emuOp_movs_word +0010ec18 T x86emuOp_stos_byte +0010ecbc T x86emuOp_movs_byte +0010ed55 T x86emuOp_popf_word +0010ed84 T x86emuOp_pop_RM +0010ee4d T x86emuOp_pop_all +0010ef0c T x86emuOp_pop_register +0010ef61 T x86emuOp_mov_word_SR_RM +0010efd4 T x86emuOp_mov_word_RM_SR +0010f049 T x86emuOp_jump_near_cond +0010f08c T x86emuOp_outs_word +0010f0bb T x86emuOp_outs_byte +0010f0d7 T x86emuOp_ins_word +0010f106 T x86emuOp_ins_byte +0010f122 T x86emuOp_imul_byte_IMM +0010f2ad T x86emuOp_imul_word_IMM +0010f430 T x86emuOp_aas +0010f458 T x86emuOp_aaa +0010f480 T x86emuOp_das +0010f4a7 T x86emuOp_daa +0010f4d0 t set_parity_flag +0010f4ff t set_szp_flags_8 +0010f536 t set_szp_flags_16 +0010f572 t set_szp_flags_32 +0010f5a9 t no_carry_byte_side_eff +0010f5bf t no_carry_word_side_eff +0010f5d5 t no_carry_long_side_eff +0010f5e5 t calc_carry_chain +0010f662 t calc_borrow_chain +0010f6da T aaa_word +0010f71e T aas_word +0010f762 T aad_word +0010f784 T aam_word +0010f7ba T adc_byte +0010f805 T adc_word +0010f850 T adc_long +0010f8cf T add_byte +0010f90a T add_word +0010f945 T add_long +0010f990 T and_byte +0010f9a9 T and_word +0010f9c2 T and_long +0010f9d8 T cmp_byte +0010fa0f T cmp_word +0010fa44 T cmp_long +0010fa73 T daa_byte +0010fac2 T das_byte +0010fb0d T dec_byte +0010fb44 T dec_word +0010fb79 T dec_long +0010fba8 T inc_byte +0010fbdf T inc_word +0010fc14 T inc_long +0010fc43 T or_byte +0010fc5c T or_word +0010fc75 T or_long +0010fc8b T neg_byte +0010fcd5 T neg_word +0010fd1b T neg_long +0010fd5c T not_byte +0010fd69 T not_word +0010fd76 T not_long +0010fd80 T rcl_byte +0010fe45 T rcl_word +0010ff00 T rcl_long +0010ffa8 T rcr_byte +00110086 T rcr_word +00110166 T rcr_long +00110257 T rol_byte +00110306 T rol_word +001103b0 T rol_long +00110454 T ror_byte +001104fe T ror_word +001105a1 T ror_long +0011063f T shl_byte +001106fc T shl_word +001107b5 T shl_long +00110861 T shr_byte +00110915 T shr_word +001109a6 T shr_long +00110a2c T sar_byte +00110ada T sar_word +00110b84 T sar_long +00110c2b T shld_word +00110cfc T shld_long +00110dbd T shrd_word +00110e62 T shrd_long +00110efa T sbb_byte +00110fa4 T sbb_word +00111043 T sbb_long +001110d0 T sub_byte +00111156 T sub_word +001111db T sub_long +00111254 T test_byte +00111278 T test_word +0011129c T test_long +001112bd T xor_byte +001112d6 T xor_word +001112ef T xor_long +00111305 T imul_byte +0011134a T imul_word +00111397 T imul_long_direct +001113b3 T imul_long +00111404 T mul_byte +00111437 T mul_word +00111473 T mul_long +001114ac T mem_access_word +001114c0 T push_word +001114f7 T push_long +0011152c T pop_word +00111559 T pop_long +00111583 t single_out +00111600 T outs +0011168d t single_in +00111723 T ins +001117b0 T div_long +00111847 T div_word +001118da T div_byte +00111918 T idiv_long +001119b0 T idiv_word +00111a4a T idiv_byte +00111a94 t p_inb +00111aa1 t p_inw +00111aaf t p_inl +00111ab9 t p_outb +00111ac7 t p_outw +00111ad6 t p_outl +00111ae3 T X86EMU_setupMemFuncs +00111b1a T X86EMU_setupPioFuncs +00111b51 T X86EMU_setupIntrFuncs +00111b8b T X86EMU_setMemBase +00111ba0 T X86EMU_prepareForInt +00111c13 T mem_ptr +00111c51 T wrl +00111c6b T wrw +00111c8a T wrb +00111ca8 T rdl +00111cbc T rdw +00111cd1 T rdb +00111ce8 T init_ec +00111d28 T compute_ip_checksum +00111d7b T add_ip_checksums +00111dbc T x86emuOp_esc_coprocess_d8 +00111dcb T x86emuOp_esc_coprocess_df +00111e2a T x86emuOp_esc_coprocess_de +00111e89 T x86emuOp_esc_coprocess_dd +00111ee8 T x86emuOp_esc_coprocess_dc +00111f47 T x86emuOp_esc_coprocess_db +00111fa6 T x86emuOp_esc_coprocess_da +00112005 T x86emuOp_esc_coprocess_d9 +00112064 t pack_lb64 +0011207a T lb_table_init +001120ba T lb_first_record +001120c5 T lb_last_record +001120d3 T lb_next_record +001120de T lb_new_record +0011210c T lb_memory +00112126 T lb_serial +0011214d T add_console +0011217e T lb_console +001121c0 T lb_cmos_checksum +001121f6 T lb_memory_range +0011226f T get_lb_mem +00112279 t build_lb_mem_range +00112299 T lb_strings +001122f4 T lb_mainboard +00112399 t lb_cleanup_memory_ranges +0011263e t lb_add_memory_range +001128ce T lb_table_fini +00112a4e T write_coreboot_table +00112b9c T stream_fini +00112ba1 T stream_skip +00112bf2 T stream_read +00112c20 T stream_init +00112c4c T x86emu_dump_xregs +00112e93 T x86emu_dump_regs +001130ec T x86emu_check_jump_condition +00113206 T x86emuOp2_movsx_word_R_RM +00113279 T x86emuOp2_movzx_word_R_RM +001132ee T x86emuOp2_lgs_R_IMM +0011335c T x86emuOp2_lfs_R_IMM +001133ca T x86emuOp2_lss_R_IMM +00113438 T x86emuOp2_movsx_byte_R_RM +00113504 T x86emuOp2_movzx_byte_R_RM +001135d2 T x86emuOp2_bsr +0011376d T x86emuOp2_bsf +00113904 T x86emuOp2_bt_R +00113a23 T x86emuOp2_btc_R +00113ba2 T x86emuOp2_btr_R +00113d2b T x86emuOp2_bts_R +00113eaa T x86emuOp2_illegal_op +00113ef3 T x86emuOp2_btX_I +0011412f T x86emuOp2_imul_R_RM +00114283 T x86emuOp2_shrd_CL +001143b1 T x86emuOp2_shrd_IMM +001144f1 T x86emuOp2_pop_GS +0011450e T x86emuOp2_pop_FS +0011452b T x86emuOp2_push_GS +0011454d T x86emuOp2_push_FS +0011456f T x86emuOp2_shld_CL +0011469d T x86emuOp2_shld_IMM +001147dd T x86emuOp2_set_byte +00114979 T x86emuOp2_long_jump +001149bc T smp_compute_checksum +001149da T smp_write_floating_table +00114a2e T smp_write_floating_table_physaddr +00114a7c T smp_next_mpc_entry +00114a8a t smp_add_mpc_entry +00114a97 T smp_next_mpe_entry +00114aac T smp_write_intsrc +00114b27 T smp_write_processor +00114b95 T smp_write_processors +00114c36 T smp_write_intsrc_pci_bridge +00114d8d T smp_write_lintsrc +00114e08 T smp_write_ioapic +00114e62 T smp_write_bus +00114eb7 T smp_write_compatibility_address_space +00114f0b T smp_write_bus_hierarchy +00114f65 T smp_write_address_space +00114fcc t lapic_write_atomic +00114fd7 T secondary_cpu_init +00114ff3 T start_cpu +00115284 T initialize_cpus +001153d4 T set_boot_successful +00115402 T boot_successful +0011540c T smp_write_config_table +001159a0 T write_smp_table +00116000 T _secondary_start +00116055 t gdtaddr +0011605b T _secondary_start_end +0011605c t set_cpu_ops +001160a6 T cpu_initialize +00116350 T __divdi3 +001164f0 T __moddi3 +00116700 T __udivdi3 +00116830 T __umoddi3 +001169f0 T _etext +00116a00 R console_drivers +00116a00 R _rodata +00116a00 r uart8250_console +00116a14 r vga_console +00116a28 r azaaudio_driver +00116a28 R econsole_drivers +00116a28 R pci_drivers +00116a30 r ht_driver +00116a38 r pci_driver +00116a40 r ide_driver +00116a48 r lpc_driver_slave +00116a50 r lpc_driver_lpc6 +00116a58 r lpc_driver_lpc5 +00116a60 r lpc_driver_lpc4 +00116a68 r lpc_driver_lpc3 +00116a70 r lpc_driver_lpc2 +00116a78 r lpc_driver_pro +00116a80 r lpc_driver +00116a88 r nic_bridge_driver +00116a90 r nic_driver +00116a98 r pcied_driver +00116aa0 r pcief_driver +00116aa8 r pciea_driver +00116ab0 r pciee_driver +00116ab8 r pciebc_driver +00116ac0 r usb2_driver +00116ac8 r sata1_driver +00116ad0 r sata0_driver +00116ad8 r usb_driver +00116ae0 r mcf3_driver +00116ae8 r smbus_driver +00116af0 r mcf0_driver +00116af8 R cpu_drivers +00116af8 R epci_drivers +00116af8 r model_fxx +00116b00 R ecpu_drivers +00116b60 r mtrr_msr +00116b8c r __func__.2192 +00116ba0 R mainboard_vendor +00116ba4 R mainboard_part_number +00116baa R coreboot_version +00116bb0 R coreboot_extra_version +00116bbf R coreboot_build +00116bdc R coreboot_compile_time +00116be5 R coreboot_compile_by +00116beb R coreboot_compile_host +00116bf2 R coreboot_compile_domain +00116c00 R coreboot_compiler +00116c60 R coreboot_linker +00116cc0 R coreboot_assembler +00116d80 r mtrr_msr +00116dd8 R pci_cf8_conf2 +00116df0 R pci_cf8_conf1 +00116e08 r free_mem_end_ptr +00116e8c r unknown.1381 +00116e94 r pcix_533mhz.1380 +00116ea1 r pcix_266mhz.1379 +00116eae r pcix_133mhz.1378 +00116ebb r pcix_100mhz.1377 +00116ec8 r pcix_66mhz.1376 +00116ed4 r conventional.1375 +00117060 r __func__.1635 +001171c0 r opcD1_long_operation +001171e0 r opcD1_word_operation +00117200 r opcD0_byte_operation +00117220 r genop_long_operation +00117240 r genop_word_operation +00117260 r genop_byte_operation +00117280 r x86emu_parity_tab +001172a0 r sequence +001172e0 r strings.1557 +00117330 r __FUNCTION__.1109 +001173b8 r productid.1666 +001173c4 r oem.1665 +001173cc r sig.1664 +001173e0 r x86_vendors +00117440 r x86_vendor_name +0011948c R _erodata +00119560 D _data +00119560 D gdt +00119588 D gdt_end +00119588 D idtarg +00119590 d _idt +00119630 d _idt_end +00119640 d verb_data +00119700 d aza_audio_ops +0011972c d lops_pci +00119740 d ht_ops +0011976c d lops_pci +00119780 d pci_ops +001197c0 d ide_ops +001197ec d lops_pci +001197f0 D mainboard_dfi_nf570_ops +00119800 d ioapicregvalues +00119920 d lpc_slave_ops +00119960 d lpc_ops +0011998c d lops_pci +001199a0 d nic_ops +001199cc d lops_pci +001199e0 d pcie_ops +00119a20 d usb2_ops +00119a4c d lops_pci +00119a60 d sata_ops +00119a8c d lops_pci +00119a90 D southbridge_nvidia_mcp55_ops +00119aa0 d usb_ops +00119acc d lops_pci +00119ae0 d mcf3_ops +00119b20 d cpu_dev_ops +00119b60 d cpu_table +00119c40 d smbus_ops +00119c6c d lops_pci +00119c80 d lops_smbus_bus +00119cc0 D pnp_ops +00119cec D console_loglevel +00119cf0 D default_message_loglevel +00119cf4 D minimum_console_loglevel +00119cf8 D default_console_loglevel +00119cfc d console_lock +00119d00 D default_pci_ops_dev +00119d40 D default_pci_ops_bus +00119d6c d pci_dev_ops_pci +00119d80 D default_ht_ops_bus +00119dc0 D default_dev_ops_root +00119e00 D default_cardbus_ops_bus +00119e2c D all_devices +00119e30 d dev_lock +00119e34 d pci_ram_image_start +00119e38 D myfuncs +00119e60 D last_dev_p +00119e80 D dev_root +0011a2e0 D _dev3 +0011a740 D _dev6 +0011aba0 D _dev5 +0011b000 D _dev8 +0011b460 D _dev62 +0011b8c0 D _dev63 +0011bd20 D _dev64 +0011c16c D southbridge_nvidia_mcp55_info_9 +0011c180 D _dev10 +0011c5e0 D _dev11 +0011ca40 D _dev24 +0011cea0 D _dev44 +0011d300 D _dev45 +0011d760 D _dev46 +0011dbc0 D _dev47 +0011e020 D _dev48 +0011e480 D _dev49 +0011e8e0 D _dev50 +0011ed40 D _dev51 +0011f1a0 D _dev52 +0011f600 D _dev53 +0011fa60 D _dev54 +0011fec0 D _dev55 +00120320 D _dev56 +00120780 D _dev57 +00120be0 D _dev58 +00121040 D _dev59 +001214a0 D _dev13 +00121900 D _dev14 +00121d60 D _dev15 +001221c0 D _dev16 +00122620 D _dev17 +00122a80 D _dev18 +00122ee0 D _dev19 +00123340 D _dev20 +001237a0 D _dev21 +00123c00 D _dev22 +00124060 D _dev23 +001244c0 D _dev26 +00124920 D _dev28 +00124d80 D _dev30 +001251e0 D _dev32 +00125640 D _dev34 +00125aa0 D _dev36 +00125f00 D _dev38 +00126360 D _dev40 +001267c0 D _dev43 +00126c0c d free_mem_ptr +00126c20 D superio_ite_it8716f_ops +00126c40 d ops +00126c80 d pnp_dev_info +00126e80 D default_pciexp_ops_bus +00126ec0 D default_pcix_ops_bus +00126eec D pci1234x +00126ef0 D hcdnx +00126f00 D northbridge_amd_amdk8_ops +00126f08 D northbridge_amd_amdk8_root_complex_ops +00126f20 d pci_domain_ops +00126f60 d cpu_bus_ops +00126fa0 d northbridge_operations +00126fe0 d elf_boot_notes +00127040 D x86emu_optab +00127440 D sys_rdb +00127444 D sys_rdw +00127448 D sys_rdl +0012744c D sys_wrb +00127450 D sys_wrw +00127454 D sys_wrl +00127458 D sys_inb +0012745c D sys_inw +00127460 D sys_inl +00127464 D sys_outb +00127468 D sys_outw +0012746c D sys_outl +00127470 D cpu_amd_socket_AM2_ops +00127478 D rom_start +0012747c D rom_end +00127480 D x86emu_optab2 +00127880 d active_cpus +00127884 d start_cpu_lock +001278a0 D option_table +00127f90 A _bss +00127f90 D _edata +00128000 b lops_pci +00128004 B vga_inited +00128008 b vga_console_inited +0012800c b vidmem +00128010 b nic_index.1563 +00128014 b lops_pci +00128018 b final_reg +0012801c b pci_bus_ops_pci +00128020 b initialized +00128024 b ht_bus_ops_pci +00128028 b smbus_max +00128040 b buffer.1729 +00128060 b buffer.1579 +00128088 b buffer.1547 +001280a8 B vga_pri +00129000 b mapped_window.1413 +0012a000 b pgtbl.1412 +00134000 b str_buf +00134004 b pciexp_bus_ops_pci +00134008 b pcix_bus_ops_pci +0013400c b get_bus_conf_done +00134020 b __f0_dev +00134040 b __f1_dev +00134060 b header.1645 +00136060 b mem_ranges +00136064 b rom +00136068 b last_cpu_index +00136080 B sysconf +00136120 B _dev41 +0013656c B superio_ite_it8716f_info_12 +00136580 B _X86EMU_intrTab +00136980 B bus_isa +00136984 B vga_col +00136988 B mainboard_dfi_nf570_info_0 +00136988 B northbridge_amd_amdk8_info_7 +001369a0 B _dev61 +00136dec B vga_line +00136df0 B bus_mcp55 +00136df8 B apicid_mcp55 +00136e00 B _dev60 +0013724c B northbridge_amd_amdk8_root_complex_info_2 +00137260 B _X86EMU_env +001373e4 B cpu_amd_socket_AM2_info_4 +00137400 B bus_type +00137800 B secondary_stack +00137804 A _ebss +00137804 A _end +00138000 A _stack +0013c000 A _estack +0013c000 A _heap +00144000 A _eheap +00144000 A _eram_seg +04000000 A AGP_APERTURE_SIZE +fffc0000 A CONFIG_ROM_PAYLOAD_START +fffc0000 A XIP_ROM_BASE +fffdf000 A _RESET +fffdf000 A _ROMBASE +fffdf100 A _EXCEPTION_VECTORS Index: targets/dfi/nf570/nf570/fallback/coreboot.map =================================================================== --- targets/dfi/nf570/nf570/fallback/coreboot.map (revision 0) +++ targets/dfi/nf570/nf570/fallback/coreboot.map (revision 0) @@ -0,0 +1,268 @@ +00000000 A ACPI_SSDTX_NUM +00000000 A CAR_FAM10 +00000000 A CBB +00000000 A CONFIG_AMDMCT +00000000 A CONFIG_AP_CODE_IN_CAR +00000000 A CONFIG_AP_IN_SIPI_WAIT +00000000 A CONFIG_COMPRESSED_PAYLOAD_LZMA +00000000 A CONFIG_COMPRESSED_PAYLOAD_NRV2B +00000000 A CONFIG_CONSOLE_BTEXT +00000000 A CONFIG_CONSOLE_LOGBUF +00000000 A CONFIG_CONSOLE_SROM +00000000 A CONFIG_CONSOLE_VGA_MULTI +00000000 A CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST +00000000 A CONFIG_FS_EXT2 +00000000 A CONFIG_FS_FAT +00000000 A CONFIG_FS_ISO9660 +00000000 A CONFIG_FS_PAYLOAD +00000000 A CONFIG_GDB_STUB +00000000 A CONFIG_IDE +00000000 A CONFIG_IDE_PAYLOAD +00000000 A CONFIG_PCI_64BIT_PREF_MEM +00000000 A CONFIG_PCIE_CONFIGSPACE_HOLE +00000000 A CONFIG_PRECOMPRESSED_PAYLOAD +00000000 A CONFIG_SERIAL_PAYLOAD +00000000 A CONFIG_SERIAL_POST +00000000 A CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +00000000 A CONFIG_UDELAY_IO +00000000 A CONFIG_UDELAY_TSC +00000000 A CONFIG_UNCOMPRESSED +00000000 A CONFIG_USBDEBUG_DIRECT +00000000 A CONFIG_USE_INIT +00000000 A CONFIG_VGA_ROM_RUN +00000000 A ENABLE_APIC_EXT_ID +00000000 A EXT_CONF_SUPPORT +00000000 A EXT_RT_TBL_SUPPORT +00000000 A FAKE_SPDROM +00000000 A HAVE_ACPI_TABLES +00000000 A HT3_SUPPORT +00000000 A HT_CHAIN_UNITID_BASE +00000000 A HW_MEM_HOLE_SIZE_AUTO_INC +00000000 A IDE_BOOT_DRIVE +00000000 A IDE_OFFSET +00000000 A K8_MEM_BANK_B_ONLY +00000000 A MMCONF_SUPPORT +00000000 A MMCONF_SUPPORT_DEFAULT +00000000 A PCI_BUS_SEGN_BITS +00000000 A PCI_IO_CFG_EXT +00000000 A SB_HT_CHAIN_UNITID_OFFSET_ONLY +00000000 A USE_FAILOVER_IMAGE +00000000 A USE_OPTION_TABLE +00000000 A USE_WATCHDOG_ON_BOOT +00000000 A WAIT_BEFORE_CPUS_INIT +00000001 A CONFIG_AGP_PLUGIN_SUPPORT +00000001 A CONFIG_CARDBUS_PLUGIN_SUPPORT +00000001 A CONFIG_CHIP_NAME +00000001 A CONFIG_COMPRESS +00000001 A CONFIG_CONSOLE_SERIAL8250 +00000001 A CONFIG_CONSOLE_VGA +00000001 A CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT +00000001 A CONFIG_IOAPIC +00000001 A CONFIG_LOGICAL_CPUS +00000001 A CONFIG_MAX_PHYSICAL_CPUS +00000001 A CONFIG_PCIEXP_PLUGIN_SUPPORT +00000001 A CONFIG_PCI_ROM_RUN +00000001 A CONFIG_PCIX_PLUGIN_SUPPORT +00000001 A CONFIG_ROM_PAYLOAD +00000001 A CONFIG_SMP +00000001 A CONFIG_USE_PRINTK_IN_CAR +00000001 A CONFIG_VAR_MTRR_HOLE +00000001 A DEBUG +00000001 A HAVE_FAILOVER_BOOT +00000001 A HAVE_FALLBACK_BOOT +00000001 A HAVE_FANCTL +00000001 A HAVE_HARD_RESET +00000001 A HAVE_INIT_TIMER +00000001 A HAVE_MOVNTI +00000001 A HAVE_MP_TABLE +00000001 A HAVE_OPTION_TABLE +00000001 A HAVE_PIRQ_TABLE +00000001 A K8_HT_FREQ_1G_SUPPORT +00000001 A K8_REV_F_SUPPORT +00000001 A LIFT_BSP_APIC_ID +00000001 A SERIAL_CPU_INIT +00000001 A USE_DCACHE_RAM +00000001 A USE_FALLBACK_IMAGE +00000002 A AUTOBOOT_DELAY +00000002 A CONFIG_MAX_CPUS +00000002 A MEM_TRAIN_SEQ +00000002 A SB_HT_CHAIN_ON_BUS0 +00000003 A MAX_REBOOT_CNT +00000003 A TTYS0_LCS +00000004 A DIMM_SUPPORT +00000008 A DEFAULT_CONSOLE_LOGLEVEL +00000008 A MAXIMUM_CONSOLE_LOGLEVEL +0000000b A IRQ_SLOT_COUNT +00000010 A APIC_ID_OFFSET +00000011 A CPU_SOCKET_TYPE +00000018 A CDB +00000020 A HT_CHAIN_END_UNITID_BASE +00000028 A CPU_ADDR_BITS +00000031 A LB_CKS_RANGE_START +0000007a A LB_CKS_RANGE_END +0000007b A LB_CKS_LOC +000000ff A CONFIG_MAX_PCI_BUSES +000003f8 A TTYS0_BASE +00000800 A CONFIG_LB_MEM_TOPK +00001000 A DCACHE_RAM_GLOBAL_VAR_SIZE +00001000 A FAILOVER_SIZE +00001022 A MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +00002000 A STACK_SIZE +00002b80 A MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +00008000 A DCACHE_RAM_SIZE +00008000 A HEAP_SIZE +0000d9bf A _binary_coreboot_ram_rom_size +0001c200 A TTYS0_BAUD +0001f000 A PAYLOAD_SIZE +00020000 A ROM_IMAGE_SIZE +0003f000 A FALLBACK_SIZE +0003f000 A ROM_SECTION_SIZE +00040000 A ROM_SECTION_OFFSET +00040000 A XIP_ROM_SIZE +00080000 A ROM_SIZE +000c8000 A DCACHE_RAM_BASE +00100000 A HW_MEM_HOLE_SIZEK +00100000 A _iseg +00100000 A _RAMBASE +0010d9bf A _eiseg +04000000 A AGP_APERTURE_SIZE +fffc0000 A CONFIG_ROM_PAYLOAD_START +fffc0000 A XIP_ROM_BASE +fffdf000 A _RESET +fffdf000 A _ROMBASE +fffdf000 D _binary_coreboot_ram_rom_start +fffdf000 D _liseg +fffdf000 D _ram +fffdf100 A _EXCEPTION_VECTORS +fffec9bf A _lrom +fffec9bf D _binary_coreboot_ram_rom_end +fffec9bf D _eliseg +fffec9bf D _eram +fffec9bf T _rom +fffec9c4 t gdt +fffec9c4 T gdtptr +fffec9dc t gdt_end +fffec9dc T protected_start +fffec9eb t __protected_start +fffeca03 t cache_as_ram_setup +fffeca62 t fixed_mtrr_msr +fffeca8e t var_mtrr_msr +fffecace t var_iorr_msr +fffecade t mem_top +fffecaea t cache_as_ram_setup_out +fffecaea T uart8250_tx_byte +fffecb15 T uart8250_can_rx_byte +fffecb27 T uart8250_init +fffecb7c T init_uart8250 +fffecbb0 t skip_atoi +fffecbdb t number +fffece3e T vtxprintf +fffed1dd T console_tx_byte +fffed20c T udelay +fffed22d T mdelay +fffed250 T delay +fffed273 T memcpy +fffed296 t setup_resource_map_offset +fffed30f t setup_resource_map_x_offset +fffed3ca t soft_reset +fffed3fb t spd_read_byte +fffed46c t get_nodes +fffed486 t ht_lookup_slave_capability +fffed570 t ht_read_freq_cap +fffed5e3 t ht_read_width_cap +fffed64b t pci_read_config32_index_wait +fffed6af t pci_write_config32_index_wait +fffed71e T memory_end_k +fffed79a t convert_to_linear +fffed7bd t update_dimm_TT_1_4 +fffed88a t Get_MCTSysAddr +fffed8e5 t Get_RcvrSysAddr +fffed8f0 t set_wrap32dis +fffed903 t clear_wrap32dis +fffed916 t Write1LTestPattern +fffed959 t Read1LTestPattern +fffed980 t CompareTestPatternQW0 +fffed9ed t SetMaxAL_RcvrDly +fffeda46 t SetTargetWTIO +fffeda68 t proc_IOCLFLUSH +fffeda98 t ResetDCTWrPtr +fffedaf6 t SetDQSDelayCSR +fffedb6a t SetDQSDelayAllCSR +fffedbbd t save_dqs_delay +fffedbd3 t FlushDQSTestPattern_L18 +fffedc6b t TrainDQSPos +fffee163 t get_dqs_delay +fffee177 T read_nb_cfg_54 +fffee18b T get_node_core_id +fffee1d5 t clear_init_ram +fffee1e8 t set_init_ram_access +fffee206 t for_each_ap +fffee2e4 t lapic_remote_read +fffee356 t wait_cpu_state +fffee3a2 t store_ap_apicid +fffee3b6 T do_printk +fffee3de t set_fidvid +fffee5f9 t print_initcpu8_nocr +fffee612 t wait_ap_started +fffee663 t print_initcpu8 +fffee67c t print_debug_pcar +fffee695 t print_debug_cp_run +fffee6ae t mcp55_early_setup_x +fffee98a T sdram_no_memory +fffee9a7 t print_debug_sdram_8 +fffee9e9 t train_DqsRcvrEn +fffef262 t disable_dimm +fffef3b1 t print_raminit +fffef3ca t print_linkn_in +fffef3e6 t ht_setup_chains_x +fffefc21 t die +fffefc3a t set_TT +fffefccc t set_top_mem +fffefd9e t sdram_set_spd_registers +ffff18b3 T sdram_initialize +ffff2c33 T ram_check +ffff2d68 T real_main +ffff4227 T cache_as_ram_main +ffff4230 T init_timer +ffff4253 T uart8250_rx_byte +ffff4280 t spd_addr.6906 +ffff42a0 t next_fid_a.6702 +ffff4340 t register_values.6091 +ffff4520 t console_test.1892 +ffff456c t pow2_to_link_width.3139 +ffff4572 t link_width_to_pow2.3138 +ffff457c t C.178.6378 +ffff45a0 t ctrl_devport_conf.6223 +ffff45e0 t ctrl_conf_2.6324 +ffff4660 t ctrl_conf_master_only.6323 +ffff4680 t ctrl_conf_mcp55_only.6322 +ffff48a0 t ctrl_conf_1_1.6321 +ffff4940 t ctrl_conf_1.6320 +ffff4bc0 t ctrl_devport_conf_clear.6248 +ffff4c00 t register_values.3726 +ffff4dc8 t addresses.4189 +ffff4de0 t cs_map_aaa.3871 +ffff4df8 t min_cycle_times.4294 +ffff4e00 t latency_indicies.4293 +ffff4e04 t fraction.4275 +ffff4e20 t speed +ffff4ea0 t dv_a.4258 +ffff4ed0 t fraction.4394 +ffff4ed7 t faw_2k.4810 +ffff4edb t faw_1k.4809 +ffff4edf t csbase_low_f0_shift.3963 +ffff4f00 t TestPatternJD1b.5550 +ffff5380 t TestPatternJD1a.5549 +ffff55c0 t TestPattern2.5214 +ffff5600 t TestPattern1.5213 +ffff5640 t TestPattern0.5212 +ffff5680 t TT_a.5178 +ffff56e0 t T1000_a.5177 +ffff5fb0 A _elrom +ffff5fb0 T _erom +ffffef6a R __id_start +ffffef6a r vendor +ffffef6e r part +ffffef80 R __id_end +ffffeff0 A _ROMTOP +ffffeff0 R reset_vector Index: targets/dfi/nf570/nf570/fallback/secondary.s =================================================================== --- targets/dfi/nf570/nf570/fallback/secondary.s (revision 0) +++ targets/dfi/nf570/nf570/fallback/secondary.s (revision 0) @@ -0,0 +1,64 @@ +# 1 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/asm.h" 1 +# 2 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" 2 +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/intel.h" 1 +# 3 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" 2 +# 1 "/home/chris/coreboot-v2/src/include/cpu/x86/mtrr.h" 1 +# 4 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" 2 +# 1 "/home/chris/coreboot-v2/src/include/cpu/x86/lapic_def.h" 1 +# 5 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" 2 + .text + .globl _secondary_start, _secondary_start_end + .balign 4096 +_secondary_start: + .code16 + cli + xorl %eax, %eax + movl %eax, %cr3 + + + + + + + movw %cs, %ax + movw %ax, %ds + + data32 lgdt gdtaddr - _secondary_start + + movl %cr0, %eax + andl $0x7FFAFFD1, %eax + orl $0x60000001, %eax + movl %eax, %cr0 + + ljmpl $0x10, $1f +1: + .code32 + movw $0x18, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + + + lidt idtarg + + + xorl %eax, %eax + movl secondary_stack, %esp + movl %eax, secondary_stack + + call secondary_cpu_init +1: hlt + jmp 1b + + gdtaddr: + .word gdt_limit + .long gdt + +_secondary_start_end: +.code32 Index: targets/dfi/nf570/nf570/fallback/payload =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/payload ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/nrv2b =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/nrv2b ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/option_table.c =================================================================== --- targets/dfi/nf570/nf570/fallback/option_table.c (revision 0) +++ targets/dfi/nf570/nf570/fallback/option_table.c (revision 0) @@ -0,0 +1,179 @@ +unsigned char option_table[] = { + 0xc8,0x00,0x00,0x00,0xf0,0x06,0x00,0x00,0x0c,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x28,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x80,0x01,0x00,0x00,0x72,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x72,0x65,0x73,0x65, + 0x72,0x76,0x65,0x64,0x5f,0x6d,0x65,0x6d,0x6f,0x72, + 0x79,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0x80,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x04,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74, + 0x5f,0x6f,0x70,0x74,0x69,0x6f,0x6e,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0x81,0x01,0x00,0x00, + 0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x6c,0x61,0x73,0x74,0x5f,0x62,0x6f,0x6f, + 0x74,0x00,0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00, + 0x00,0x00,0x82,0x01,0x00,0x00,0x01,0x00,0x00,0x00, + 0x65,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x45,0x43, + 0x43,0x5f,0x6d,0x65,0x6d,0x6f,0x72,0x79,0x00,0x00, + 0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0x84,0x01, + 0x00,0x00,0x04,0x00,0x00,0x00,0x72,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x72,0x65,0x62,0x6f,0x6f,0x74, + 0x5f,0x62,0x69,0x74,0x73,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x88,0x01,0x00,0x00,0x03,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x05,0x00,0x00,0x00, + 0x62,0x61,0x75,0x64,0x5f,0x72,0x61,0x74,0x65,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0x8b,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x68,0x77,0x5f,0x73, + 0x63,0x72,0x75,0x62,0x62,0x65,0x72,0x00,0xc9,0x00, + 0x00,0x00,0x30,0x00,0x00,0x00,0x8c,0x01,0x00,0x00, + 0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x69,0x6e,0x74,0x65,0x72,0x6c,0x65,0x61, + 0x76,0x65,0x5f,0x63,0x68,0x69,0x70,0x5f,0x73,0x65, + 0x6c,0x65,0x63,0x74,0x73,0x00,0xc9,0x00,0x00,0x00, + 0x28,0x00,0x00,0x00,0x8d,0x01,0x00,0x00,0x02,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x08,0x00,0x00,0x00, + 0x6d,0x61,0x78,0x5f,0x6d,0x65,0x6d,0x5f,0x63,0x6c, + 0x6f,0x63,0x6b,0x00,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x8f,0x01,0x00,0x00,0x01,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x02,0x00,0x00,0x00, + 0x64,0x75,0x61,0x6c,0x5f,0x63,0x6f,0x72,0x65,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x2c,0x00,0x00,0x00, + 0x90,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x70,0x6f,0x77,0x65, + 0x72,0x5f,0x6f,0x6e,0x5f,0x61,0x66,0x74,0x65,0x72, + 0x5f,0x66,0x61,0x69,0x6c,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x9c,0x01,0x00,0x00,0x04,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x64,0x65,0x62,0x75,0x67,0x5f,0x6c,0x65,0x76,0x65, + 0x6c,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0xa0,0x01,0x00,0x00,0x04,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74, + 0x5f,0x66,0x69,0x72,0x73,0x74,0x00,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0xa4,0x01,0x00,0x00, + 0x04,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x07,0x00, + 0x00,0x00,0x62,0x6f,0x6f,0x74,0x5f,0x73,0x65,0x63, + 0x6f,0x6e,0x64,0x00,0xc9,0x00,0x00,0x00,0x24,0x00, + 0x00,0x00,0xa8,0x01,0x00,0x00,0x04,0x00,0x00,0x00, + 0x65,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x62,0x6f, + 0x6f,0x74,0x5f,0x74,0x68,0x69,0x72,0x64,0x00,0x00, + 0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0xac,0x01, + 0x00,0x00,0x04,0x00,0x00,0x00,0x68,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74,0x5f,0x69, + 0x6e,0x64,0x65,0x78,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x28,0x00,0x00,0x00,0xb0,0x01,0x00,0x00,0x08,0x00, + 0x00,0x00,0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x62,0x6f,0x6f,0x74,0x5f,0x63,0x6f,0x75,0x6e,0x74, + 0x64,0x6f,0x77,0x6e,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0xb8,0x01,0x00,0x00,0x04,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x73,0x6c,0x6f,0x77,0x5f,0x63,0x70,0x75,0x00,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x1c,0x00,0x00,0x00, + 0xbc,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x6e,0x6d,0x69,0x00, + 0xc9,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0xbd,0x01, + 0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x69,0x6f,0x6d,0x6d,0x75,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0xd8,0x02,0x00,0x00,0x00,0x01,0x00,0x00,0x68,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x75,0x73,0x65,0x72, + 0x5f,0x64,0x61,0x74,0x61,0x00,0x00,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0xd8,0x03,0x00,0x00, + 0x10,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x63,0x68,0x65,0x63,0x6b,0x5f,0x73,0x75, + 0x6d,0x00,0x00,0x00,0xc9,0x00,0x00,0x00,0x28,0x00, + 0x00,0x00,0xe8,0x03,0x00,0x00,0x18,0x00,0x00,0x00, + 0x72,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x72,0x65, + 0x73,0x65,0x72,0x76,0x65,0x64,0x5f,0x6d,0x65,0x6d, + 0x6f,0x72,0x79,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x44,0x69,0x73,0x61,0x62,0x6c,0x65,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x45,0x6e,0x61,0x62,0x6c,0x65, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x45,0x6e, + 0x61,0x62,0x6c,0x65,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x44,0x69,0x73,0x61,0x62,0x6c,0x65,0x00, + 0xca,0x00,0x00,0x00,0x1c,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x46,0x61,0x6c,0x6c, + 0x62,0x61,0x63,0x6b,0x00,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x04,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x4e,0x6f,0x72,0x6d,0x61,0x6c, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x31,0x31, + 0x35,0x32,0x30,0x30,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x35,0x37,0x36,0x30,0x30,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00, + 0x00,0x00,0x02,0x00,0x00,0x00,0x33,0x38,0x34,0x30, + 0x30,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x05,0x00,0x00,0x00,0x03,0x00,0x00,0x00, + 0x31,0x39,0x32,0x30,0x30,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00, + 0x04,0x00,0x00,0x00,0x39,0x36,0x30,0x30,0x00,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x05,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x34,0x38, + 0x30,0x30,0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x06,0x00, + 0x00,0x00,0x32,0x34,0x30,0x30,0x00,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x31,0x32,0x30,0x30, + 0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x06,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x4e,0x6f,0x74,0x69,0x63,0x65,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x07,0x00,0x00,0x00,0x49,0x6e,0x66,0x6f,0x00,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x06,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x44,0x65, + 0x62,0x75,0x67,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x06,0x00,0x00,0x00,0x09,0x00, + 0x00,0x00,0x53,0x70,0x65,0x77,0x00,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x07,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x4e,0x65,0x74,0x77, + 0x6f,0x72,0x6b,0x00,0xca,0x00,0x00,0x00,0x14,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x48,0x44,0x44,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x02,0x00,0x00,0x00, + 0x46,0x6c,0x6f,0x70,0x70,0x79,0x00,0x00,0xca,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0x07,0x00,0x00,0x00, + 0x08,0x00,0x00,0x00,0x46,0x61,0x6c,0x6c,0x62,0x61, + 0x63,0x6b,0x5f,0x4e,0x65,0x74,0x77,0x6f,0x72,0x6b, + 0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x20,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x46,0x61,0x6c,0x6c,0x62,0x61,0x63,0x6b,0x5f,0x48, + 0x44,0x44,0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x20,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x0a,0x00, + 0x00,0x00,0x46,0x61,0x6c,0x6c,0x62,0x61,0x63,0x6b, + 0x5f,0x46,0x6c,0x6f,0x70,0x70,0x79,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x32,0x30,0x30,0x4d,0x68,0x7a, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x31,0x36, + 0x36,0x4d,0x68,0x7a,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x02,0x00, + 0x00,0x00,0x31,0x33,0x33,0x4d,0x68,0x7a,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x08,0x00, + 0x00,0x00,0x03,0x00,0x00,0x00,0x31,0x30,0x30,0x4d, + 0x68,0x7a,0x00,0x00,0xca,0x00,0x00,0x00,0x14,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x6f,0x66,0x66,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x38,0x37,0x2e,0x35,0x25,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x02,0x00,0x00,0x00,0x37,0x35,0x2e,0x30,0x25,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x09,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x36,0x32, + 0x2e,0x35,0x25,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x35,0x30,0x2e,0x30,0x25,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00, + 0x00,0x00,0x05,0x00,0x00,0x00,0x33,0x37,0x2e,0x35, + 0x25,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x32,0x35,0x2e,0x30,0x25,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x07,0x00,0x00,0x00,0x31,0x32,0x2e,0x35,0x25,0x00, + 0x00,0x00,0xcc,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x88,0x01,0x00,0x00,0xd7,0x03,0x00,0x00,0xd8,0x03, + 0x00,0x00,0x01,0x00,0x00,0x00}; Index: targets/dfi/nf570/nf570/fallback/c_start.s =================================================================== --- targets/dfi/nf570/nf570/fallback/c_start.s (revision 0) +++ targets/dfi/nf570/nf570/fallback/c_start.s (revision 0) @@ -0,0 +1,281 @@ +# 1 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/asm.h" 1 +# 2 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" 2 +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/intel.h" 1 +# 3 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" 2 + + .section ".text" + .code32 + .globl _start +_start: + cli + lgdt %cs:gdtaddr + ljmp $0x10, $1f +1: movl $0x18, %eax + movl %eax, %ds + movl %eax, %es + movl %eax, %ss + movl %eax, %fs + movl %eax, %gs + + movb $0x13, %al ; outb %al, $0x80 + + + cld + leal _stack, %edi + movl $_estack, %ecx + subl %edi, %ecx + shrl $2, %ecx + xorl %eax, %eax + rep + stosl + + + leal _bss, %edi + movl $_ebss, %ecx + subl %edi, %ecx + jz .Lnobss + shrl $2, %ecx + xorl %eax, %eax + rep + stosl +.Lnobss: + + + movl $_estack, %esp + + + pushl $0 + pushl $0 + + + pushl %ebp + + + movl %esp, %ebp + + + leal _idt, %edi + leal vec0, %ebx + movl $(0x10 << 16), %eax + +1: movw %bx, %ax + movl %ebx, %edx + movw $0x8E00, %dx + movl %eax, 0(%edi) + movl %edx, 4(%edi) + addl $6, %ebx + addl $8, %edi + cmpl $_idt_end, %edi + jne 1b + + + lidt idtarg + + + + + + + movb $0xfe, %al ; outb %al, $0x80 + + + movl %ebp, %esp + + + call hardwaremain + +.Lhlt: + movb $0xee, %al ; outb %al, $0x80 + hlt + jmp .Lhlt + +vec0: + pushl $0 + pushl $0 + jmp int_hand +vec1: + pushl $0 + pushl $1 + jmp int_hand + +vec2: + pushl $0 + pushl $2 + jmp int_hand + +vec3: + pushl $0 + pushl $3 + jmp int_hand + +vec4: + pushl $0 + pushl $4 + jmp int_hand + +vec5: + pushl $0 + pushl $5 + jmp int_hand + +vec6: + pushl $0 + pushl $6 + jmp int_hand + +vec7: + pushl $0 + pushl $7 + jmp int_hand + +vec8: + + pushl $8 + jmp int_hand + .word 0x9090 + +vec9: + pushl $0 + pushl $9 + jmp int_hand + +vec10: + + pushl $10 + jmp int_hand + .word 0x9090 + +vec11: + + pushl $11 + jmp int_hand + .word 0x9090 + +vec12: + + pushl $12 + jmp int_hand + .word 0x9090 + +vec13: + + pushl $13 + jmp int_hand + .word 0x9090 + +vec14: + + pushl $14 + jmp int_hand + .word 0x9090 + +vec15: + pushl $0 + pushl $15 + jmp int_hand + +vec16: + pushl $0 + pushl $16 + jmp int_hand + +vec17: + + pushl $17 + jmp int_hand + .word 0x9090 + +vec18: + pushl $0 + pushl $18 + jmp int_hand + +vec19: + pushl $0 + pushl $19 + jmp int_hand +int_hand: + + + + + + + + pushl %edi + pushl %esi + pushl %ebp + + leal 32(%esp), %ebp + pushl %ebp + pushl %ebx + pushl %edx + pushl %ecx + pushl %eax + + pushl %esp + call x86_exception + pop %eax + + popl %eax + popl %ecx + popl %edx + popl %ebx + popl %ebp + popl %ebp + popl %esi + popl %edi + + addl $8, %esp + + iret +# 245 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" + .globl gdt, gdt_end, gdt_limit, idtarg + +gdt_limit = gdt_end - gdt - 1 +gdtaddr: + .word gdt_limit + .long gdt + + .data + + + + +gdt: + + .word 0x0000, 0x0000 + .byte 0x00, 0x00, 0x00, 0x00 + + + .word 0x0000, 0x0000 + .byte 0x00, 0x00, 0x00, 0x00 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0xcf, 0x00 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x93, 0xcf, 0x00 + + + .word 0x0000, 0x0000 + .byte 0x00, 0x00, 0x00, 0x00 + +gdt_end: + +idtarg: + .word _idt_end - _idt - 1 + .long _idt + .word 0 +_idt: + .fill 20, 8, 0 # idt is unitiailzed +_idt_end: + + .previous +.code32 Index: targets/dfi/nf570/nf570/fallback/coreboot_ram.nrv2b =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/coreboot_ram.nrv2b ___________________________________________________________________ Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/option_table.h =================================================================== --- targets/dfi/nf570/nf570/fallback/option_table.h (revision 0) +++ targets/dfi/nf570/nf570/fallback/option_table.h (revision 0) @@ -0,0 +1,40 @@ +#define CMOS_VSTART_boot_option 384 +#define CMOS_VLEN_boot_option 1 +#define CMOS_VSTART_last_boot 385 +#define CMOS_VLEN_last_boot 1 +#define CMOS_VSTART_ECC_memory 386 +#define CMOS_VLEN_ECC_memory 1 +#define CMOS_VSTART_baud_rate 392 +#define CMOS_VLEN_baud_rate 3 +#define CMOS_VSTART_hw_scrubber 395 +#define CMOS_VLEN_hw_scrubber 1 +#define CMOS_VSTART_interleave_chip_selects 396 +#define CMOS_VLEN_interleave_chip_selects 1 +#define CMOS_VSTART_max_mem_clock 397 +#define CMOS_VLEN_max_mem_clock 2 +#define CMOS_VSTART_dual_core 399 +#define CMOS_VLEN_dual_core 1 +#define CMOS_VSTART_power_on_after_fail 400 +#define CMOS_VLEN_power_on_after_fail 1 +#define CMOS_VSTART_debug_level 412 +#define CMOS_VLEN_debug_level 4 +#define CMOS_VSTART_boot_first 416 +#define CMOS_VLEN_boot_first 4 +#define CMOS_VSTART_boot_second 420 +#define CMOS_VLEN_boot_second 4 +#define CMOS_VSTART_boot_third 424 +#define CMOS_VLEN_boot_third 4 +#define CMOS_VSTART_boot_index 428 +#define CMOS_VLEN_boot_index 4 +#define CMOS_VSTART_boot_countdown 432 +#define CMOS_VLEN_boot_countdown 8 +#define CMOS_VSTART_slow_cpu 440 +#define CMOS_VLEN_slow_cpu 4 +#define CMOS_VSTART_nmi 444 +#define CMOS_VLEN_nmi 1 +#define CMOS_VSTART_iommu 445 +#define CMOS_VLEN_iommu 1 +#define CMOS_VSTART_user_data 728 +#define CMOS_VLEN_user_data 256 +#define CMOS_VSTART_check_sum 984 +#define CMOS_VLEN_check_sum 16 Index: targets/dfi/nf570/nf570/fallback/coreboot_ram.rom =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/coreboot_ram.rom ___________________________________________________________________ Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/static.c =================================================================== --- targets/dfi/nf570/nf570/fallback/static.c (revision 0) +++ targets/dfi/nf570/nf570/fallback/static.c (revision 0) @@ -0,0 +1,808 @@ +#include <device/device.h> +#include <device/pci.h> +#include "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/chip.h" +#include "/home/chris/coreboot-v2/src/cpu/amd/socket_AM2/chip.h" +#include "/home/chris/coreboot-v2/src/mainboard/dfi/nf570/chip.h" +#include "/home/chris/coreboot-v2/src/superio/ite/it8716f/chip.h" +#include "/home/chris/coreboot-v2/src/northbridge/amd/amdk8/chip.h" +#include "/home/chris/coreboot-v2/src/northbridge/amd/amdk8/root_complex/chip.h" +struct device _dev3; +struct device _dev6; +struct device _dev5; +struct device _dev8; +struct device _dev60; +struct device _dev61; +struct device _dev62; +struct device _dev63; +struct device _dev64; +struct device _dev10; +struct device _dev11; +struct device _dev24; +struct device _dev41; +struct device _dev44; +struct device _dev45; +struct device _dev46; +struct device _dev47; +struct device _dev48; +struct device _dev49; +struct device _dev50; +struct device _dev51; +struct device _dev52; +struct device _dev53; +struct device _dev54; +struct device _dev55; +struct device _dev56; +struct device _dev57; +struct device _dev58; +struct device _dev59; +struct device _dev13; +struct device _dev14; +struct device _dev15; +struct device _dev16; +struct device _dev17; +struct device _dev18; +struct device _dev19; +struct device _dev20; +struct device _dev21; +struct device _dev22; +struct device _dev23; +struct device _dev26; +struct device _dev28; +struct device _dev30; +struct device _dev32; +struct device _dev34; +struct device _dev36; +struct device _dev38; +struct device _dev40; +struct device _dev43; +struct mainboard_dfi_nf570_config mainboard_dfi_nf570_info_0; +struct device **last_dev_p = &_dev64.next; +struct device dev_root = { + .ops = &default_dev_ops_root, + .bus = &dev_root.link[0], + .path = { .type = DEVICE_PATH_ROOT }, + .enabled = 1, + .links = 1, + .on_mainboard = 1, + .link = { + [0] = { + .dev=&dev_root, + .link = 0, + .children = &_dev3, + }, + }, + .chip_ops = &mainboard_dfi_nf570_ops, + .chip_info = &mainboard_dfi_nf570_info_0, + .next = &_dev3, +}; +struct northbridge_amd_amdk8_root_complex_config northbridge_amd_amdk8_root_complex_info_2; +struct device _dev3 = { + .ops = 0, + .bus = &dev_root.link[0], + .path = {.type=DEVICE_PATH_APIC_CLUSTER,.u={.apic_cluster={ .cluster = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev3, + .children = &_dev5, + }, + }, + .links = 1, + .sibling = &_dev6, + .chip_ops = &northbridge_amd_amdk8_root_complex_ops, + .chip_info = &northbridge_amd_amdk8_root_complex_info_2, + .next=&_dev5 +}; +struct device _dev6 = { + .ops = 0, + .bus = &dev_root.link[0], + .path = {.type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev6, + .children = &_dev8, + }, + }, + .links = 1, + .chip_ops = &northbridge_amd_amdk8_root_complex_ops, + .chip_info = &northbridge_amd_amdk8_root_complex_info_2, + .next=&_dev8 +}; +struct cpu_amd_socket_AM2_config cpu_amd_socket_AM2_info_4; +struct device _dev5 = { + .ops = 0, + .bus = &_dev3.link[0], + .path = {.type=DEVICE_PATH_APIC,.u={.apic={ .apic_id = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &cpu_amd_socket_AM2_ops, + .chip_info = &cpu_amd_socket_AM2_info_4, + .next=&_dev6 +}; +struct northbridge_amd_amdk8_config northbridge_amd_amdk8_info_7; +struct device _dev8 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev8, + .children = &_dev10, + }, + [1] = { + .link = 1, + .dev = &_dev8, + }, + [2] = { + .link = 2, + .dev = &_dev8, + }, + }, + .links = 3, + .sibling = &_dev62, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev10 +}; +struct device _dev62 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev63, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev63 +}; +struct device _dev63 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,2)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev64, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev64 +}; +struct device _dev64 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,3)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, +}; +struct southbridge_nvidia_mcp55_config southbridge_nvidia_mcp55_info_9 = { + .ide0_enable = 1, + .sata0_enable = 1, + .sata1_enable = 1, + .mac_eeprom_addr = 0x51, + .mac_eeprom_smbus = 3, +}; + +struct device _dev10 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x0,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev11, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev11 +}; +struct device _dev11 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x1,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev11, + .children = &_dev13, + }, + }, + .links = 1, + .sibling = &_dev24, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev13 +}; +struct device _dev24 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x1,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev24, + .children = &_dev26, + }, + [1] = { + .link = 1, + .dev = &_dev24, + .children = &_dev43, + }, + }, + .links = 2, + .sibling = &_dev44, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev26 +}; +struct device _dev44 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x2,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev45, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev45 +}; +struct device _dev45 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x2,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev46, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev46 +}; +struct device _dev46 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x4,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev47, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev47 +}; +struct device _dev47 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev48, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev48 +}; +struct device _dev48 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev49, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev49 +}; +struct device _dev49 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,2)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev50, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev50 +}; +struct device _dev50 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x6,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev51, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev51 +}; +struct device _dev51 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x6,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev52, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev52 +}; +struct device _dev52 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x8,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev53, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev53 +}; +struct device _dev53 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x9,0)}}}, + .enabled = 0, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev54, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev54 +}; +struct device _dev54 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xa,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev55, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev55 +}; +struct device _dev55 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xb,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev56, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev56 +}; +struct device _dev56 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xc,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev57, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev57 +}; +struct device _dev57 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xd,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev58, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev58 +}; +struct device _dev58 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xe,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev59, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev59 +}; +struct device _dev59 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xf,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev62 +}; +struct superio_ite_it8716f_config superio_ite_it8716f_info_12; +struct device _dev13 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x0 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 4, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x23, .base=0x11}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x3f0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x6}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_DRQ, .index=0x74, .base=0x2}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev14, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev14 +}; +struct device _dev14 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x1 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x3f8}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x4}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev15, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev15 +}; +struct device _dev15 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x2 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x2f8}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x3}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev16, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev16 +}; +struct device _dev16 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x3 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x378}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x7}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev17, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev17 +}; +struct device _dev17 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x4 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 3, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x290}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x230}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x9}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev18, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev18 +}; +struct device _dev18 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x5 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 3, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x60}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x64}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x1}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev19, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev19 +}; +struct device _dev19 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x6 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 1, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0xc}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev20, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev20 +}; +struct device _dev20 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x7 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 13, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x25, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x26, .base=0x43}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x27, .base=0x20}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x29, .base=0x81}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x800}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x64, .base=0x820}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x72, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xb8, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xbc, .base=0x1}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc1, .base=0x43}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc2, .base=0x20}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc9, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xf6, .base=0x28}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev21, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev21 +}; +struct device _dev21 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x8 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x300}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0xa}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev22, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev22 +}; +struct device _dev22 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x9 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 1, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x220}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev23, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev23 +}; +struct device _dev23 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0xa }}}, + .enabled = 0, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev24 +}; +struct device _dev26 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x50 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev28, + .next=&_dev28 +}; +struct device _dev28 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x51 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev30, + .next=&_dev30 +}; +struct device _dev30 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x52 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev32, + .next=&_dev32 +}; +struct device _dev32 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x53 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev34, + .next=&_dev34 +}; +struct device _dev34 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x54 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev36, + .next=&_dev36 +}; +struct device _dev36 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x55 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev38, + .next=&_dev38 +}; +struct device _dev38 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x56 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev40, + .next=&_dev40 +}; +struct device _dev40 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x57 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .next=&_dev43 +}; +struct device _dev43 = { + .ops = 0, + .bus = &_dev24.link[1], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x51 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .next=&_dev44 +}; Index: targets/dfi/nf570/nf570/fallback/coreboot.rom =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/coreboot.rom ___________________________________________________________________ Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/crt0.s =================================================================== --- targets/dfi/nf570/nf570/fallback/crt0.s (revision 0) +++ targets/dfi/nf570/nf570/fallback/crt0.s (revision 0) @@ -0,0 +1,13399 @@ +# 1 "crt0.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "crt0.S" +# 24 "crt0.S" +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/asm.h" 1 +# 25 "crt0.S" 2 +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/intel.h" 1 +# 26 "crt0.S" 2 +# 1 "/home/chris/coreboot-v2/src/include/console/loglevel.h" 1 +# 27 "crt0.S" 2 + + + + + + +.section ".rom.data", "a", @progbits +.section ".rom.text", "ax", @progbits + + movb $0x01, %al ; outb %al, $0x80 + +# 1 "crt0_includes.h" 1 +# 1 "/home/chris/coreboot-v2/src/cpu/x86/32bit/entry32.inc" 1 + + +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/rom_segs.h" 1 +# 4 "/home/chris/coreboot-v2/src/cpu/x86/32bit/entry32.inc" 2 + + + .code32 + + .align 4 +.globl gdtptr + + + + +gdt: +gdtptr: + .word gdt_end - gdt -1 + .long gdt + .word 0 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0xcf, 0x00 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x93, 0xcf, 0x00 + +gdt_end: +# 42 "/home/chris/coreboot-v2/src/cpu/x86/32bit/entry32.inc" + .align 4 +.globl protected_start +protected_start: + + lgdt %cs:gdtptr + ljmp $0x08, $__protected_start + +__protected_start: + + movl %eax, %ebp + + movb $0x10, %al ; outb %al, $0x80 + + movw $0x10, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + + + movl %ebp, %eax +# 2 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/cpu/x86/32bit/reset32.inc" 1 + .section ".reset" + .code16 +.globl reset_vector +reset_vector: + + . = 0x8; + .code32 + jmp protected_start + + .previous +# 3 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/id.inc" 1 +# 22 "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/id.inc" + .section ".id", "a", @progbits + + .globl __id_start +__id_start: +vendor: + .asciz "DFI" +part: + .asciz "nf570" +.long __id_end + 0x80 - vendor +.long __id_end + 0x80 - part +.long 0x1f000 + 0x20000 + .globl __id_end + +__id_end: +.previous +# 4 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 1 +# 31 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" +# 1 "/home/chris/coreboot-v2/src/include/cpu/x86/mtrr.h" 1 +# 32 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 2 +# 1 "/home/chris/coreboot-v2/src/include/cpu/amd/mtrr.h" 1 +# 33 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 2 + + + movl %eax, %ebp + + + +cache_as_ram_setup: + + movb $0xA0, %al + outb %al, $0x80 +# 206 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movl %cr0, %eax + orl $(1 << 30),%eax + movl %eax, %cr0 + + + + + + + + movl $0x202, %ecx + xorl %edx, %edx + movl $(0xfffc0000 | 6), %eax + wrmsr + + movl $0x203, %ecx + movl $((1 << (40 - 32)) - 1), %edx + movl $(~(0x40000 - 1) | 0x800), %eax + wrmsr +# 242 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movb $0xA1, %al + outb %al, $0x80 + + + movl %cr0, %eax + andl $0x9fffffff, %eax + movl %eax, %cr0 +# 259 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movb $0xA2, %al + outb %al, $0x80 +# 277 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movl $((0xd0000 - 0x8000) + 0x8000 - 0x1000), %eax + movl %eax, %esp + + movb $0xA3, %al + outb %al, $0x80 +# 331 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movb $0xA5, %al + outb %al, $0x80 + + + movl %ebp, %eax + + + movl %esp, %ebp + pushl %ebx + pushl %eax + call cache_as_ram_main + + + movb $0xAF, %al + outb %al, $0x80 + +fixed_mtrr_msr: + .long 0x250, 0x258, 0x259 + .long 0x268, 0x269, 0x26A + .long 0x26B, 0x26C, 0x26D + .long 0x26E, 0x26F +var_mtrr_msr: + .long 0x200, 0x201, 0x202, 0x203 + .long 0x204, 0x205, 0x206, 0x207 + .long 0x208, 0x209, 0x20A, 0x20B + .long 0x20C, 0x20D, 0x20E, 0x20F +var_iorr_msr: + .long 0xC0010016, 0xC0010017, 0xC0010018, 0xC0010019 +mem_top: + .long 0xC001001A, 0xC001001D + .long 0x000 + +cache_as_ram_setup_out: +# 5 "crt0_includes.h" 2 +# 1 "././cache_as_ram_auto.inc" 1 + .file "cache_as_ram_auto.c" + .section .rom.text +.globl uart8250_tx_byte + .type uart8250_tx_byte, @function +uart8250_tx_byte: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + movb 12(%ebp), %bl +.L2: + movl %esi, %edi + leal 5(%edi), %ecx + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + testb $32, %al + je .L2 + movzbl %bl, %eax + movzwl %si, %edx +#APP + outb %al, %dx +#NO_APP +.L4: + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + testb $64, %al + je .L4 + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size uart8250_tx_byte, .-uart8250_tx_byte +.globl uart8250_can_rx_byte + .type uart8250_can_rx_byte, @function +uart8250_can_rx_byte: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + addl $5, %edx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + popl %ebp + andl $1, %eax + ret + .size uart8250_can_rx_byte, .-uart8250_can_rx_byte +.globl uart8250_init + .type uart8250_init, @function +uart8250_init: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + movzwl 8(%ebp), %ecx + pushl %edi + pushl %esi + pushl %ebx + leal 1(%ecx), %ebx + movl %ebx, %edx +#APP + outb %al, %dx +#NO_APP + leal 2(%ecx), %edx + movb $1, %al + movzwl %dx, %edx +#APP + outb %al, %dx +#NO_APP + leal 4(%ecx), %edx + movb $3, %al + movzwl %dx, %edx +#APP + outb %al, %dx +#NO_APP + movb 16(%ebp), %al + leal 3(%ecx), %edi + movl %edi, %edx + andl $127, %eax + movl %eax, %esi + orl $-128, %eax + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + movzbl 12(%ebp), %eax + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl 12(%ebp), %edx + movzbl %dh, %eax + movl %ebx, %edx +#APP + outb %al, %dx +#NO_APP + movl %esi, %edx + movzbl %dl, %eax + movl %edi, %edx +#APP + outb %al, %dx +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size uart8250_init, .-uart8250_init +.globl init_uart8250 + .type init_uart8250, @function +init_uart8250: + pushl %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + pushl %ebx + movl 8(%ebp), %ecx + movl (%eax), %edx + movl $115200, %eax + testl %edx, %edx + je .L18 + movl %edx, %ebx + xorl %edx, %edx + divl %ebx +.L18: + cmpl $1016, %ecx + je .L21 + pushl $3 + pushl %eax + pushl %ecx + call uart8250_init + addl $12, %esp +.L21: + movl -4(%ebp), %ebx + leave + ret + .size init_uart8250, .-init_uart8250 + .type skip_atoi, @function +skip_atoi: + pushl %ebp + xorl %ecx, %ecx + movl %esp, %ebp + pushl %esi + movl %eax, %esi + pushl %ebx + jmp .L23 +.L24: + imull $10, %ecx, %eax + movsbl %dl,%edx + leal -48(%eax,%edx), %ecx + leal 1(%ebx), %eax + movl %eax, (%esi) +.L23: + movl (%esi), %ebx + movb (%ebx), %dl + leal -48(%edx), %eax + cmpb $9, %al + jbe .L24 + popl %ebx + movl %ecx, %eax + popl %esi + popl %ebp + ret + .size skip_atoi, .-skip_atoi + .section .rom.data.str1.1,"aMS",@progbits,1 +.LC0: + .string "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ" +.LC1: + .string "0123456789abcdefghijklmnopqrstuvwxyz" + .section .rom.text + .type number, @function +number: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $188, %esp + movl 20(%ebp), %edi + movl %edx, %ecx + movl %eax, -160(%ebp) + movl 12(%ebp), %esi + movl $.LC0, -120(%ebp) + testl $64, %edi + jne .L30 + movl $.LC1, -120(%ebp) +.L30: + testl $16, %edi + je .L31 + andl $-2, %edi +.L31: + movl 8(%ebp), %eax + movl $0, -112(%ebp) + subl $2, %eax + cmpl $34, %eax + ja .L35 + movl %edi, %eax + andl $1, %eax + cmpl $1, %eax + sbbl %eax, %eax + andl $-16, %eax + addl $48, %eax + testl $2, %edi + movb %al, -152(%ebp) + je .L39 + testl %ebx, %ebx + jns .L41 + negl %ecx + adcl $0, %ebx + decl %esi + negl %ebx + movb $45, -121(%ebp) + jmp .L43 +.L41: + testl $4, %edi + je .L44 + decl %esi + movb $43, -121(%ebp) + jmp .L43 +.L44: + testl $8, %edi + je .L39 + decl %esi + movb $32, -121(%ebp) + jmp .L43 +.L39: + movb $0, -121(%ebp) +.L43: + movl %edi, %edx + andl $32, %edx + movl %edx, -156(%ebp) + je .L47 + cmpl $16, 8(%ebp) + jne .L49 + subl $2, %esi + jmp .L47 +.L49: + xorl %eax, %eax + cmpl $8, 8(%ebp) + sete %al + subl %eax, %esi +.L47: + movl %ebx, %eax + orl %ecx, %eax + movl $0, -116(%ebp) + jne .L55 + movb $48, -90(%ebp) + movl $1, -116(%ebp) + jmp .L54 +.L55: + movl %ecx, %eax + movl %ebx, %edx + movl %edx, %ecx + xorl %edx, %edx + testl %ecx, %ecx + movl %eax, -176(%ebp) + je .L58 + movl %ecx, %eax + xorl %edx, %edx + divl 8(%ebp) + movl %eax, %ecx +.L58: + movl -176(%ebp), %eax +#APP + divl 8(%ebp) +#NO_APP + movl %edx, -172(%ebp) + movl %ecx, %edx + movl %eax, %ecx + movl %edx, %ebx + movl -172(%ebp), %eax + movl -120(%ebp), %edx + movb (%edx,%eax), %dl + movl -116(%ebp), %eax + movb %dl, -90(%ebp,%eax) + movl %ebx, %edx + incl %eax + orl %ecx, %edx + movl %eax, -116(%ebp) + jne .L55 +.L54: + movl -116(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -108(%ebp) + cmpl %edx, %eax + jge .L59 + movl %edx, -108(%ebp) +.L59: + subl -108(%ebp), %esi + testl $17, %edi + movl $0, -112(%ebp) + movl %esi, %eax + je .L63 + jmp .L62 +.L64: + subl $12, %esp + pushl $32 + call *-160(%ebp) + movl %ebx, %eax + addl $16, %esp +.L63: + testl %eax, %eax + leal -1(%eax), %ebx + jg .L64 + subl %eax, %esi + movl %esi, -112(%ebp) + movl %ebx, %esi +.L62: + cmpb $0, -121(%ebp) + je .L66 + movzbl -121(%ebp), %eax + subl $12, %esp + pushl %eax + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L66: + cmpl $0, -156(%ebp) + je .L68 + cmpl $8, 8(%ebp) + jne .L70 + subl $12, %esp + pushl $48 + call *-160(%ebp) + incl -112(%ebp) + jmp .L88 +.L70: + cmpl $16, 8(%ebp) + jne .L68 + subl $12, %esp + pushl $48 + call *-160(%ebp) + movl -120(%ebp), %edx + movzbl 33(%edx), %eax + movl %eax, (%esp) + call *-160(%ebp) + addl $2, -112(%ebp) +.L88: + addl $16, %esp +.L68: + andl $16, %edi + movl %esi, %eax + je .L75 + jmp .L73 +.L76: + movzbl -152(%ebp), %eax + subl $12, %esp + pushl %eax + call *-160(%ebp) + movl %ebx, %eax + addl $16, %esp + incl -112(%ebp) +.L75: + testl %eax, %eax + leal -1(%eax), %ebx + jg .L76 + movl %ebx, %esi +.L73: + movl -108(%ebp), %ebx + jmp .L78 +.L79: + subl $12, %esp + decl %ebx + pushl $48 + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L78: + cmpl %ebx, -116(%ebp) + jl .L79 + jmp .L87 +.L81: + decl -116(%ebp) + subl $12, %esp + movl -116(%ebp), %edx + movzbl -90(%ebp,%edx), %eax + pushl %eax + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L87: + cmpl $0, -116(%ebp) + jg .L81 + movl %esi, %ebx + jmp .L83 +.L84: + subl $12, %esp + decl %ebx + pushl $32 + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L83: + testl %ebx, %ebx + jg .L84 +.L35: + movl -112(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size number, .-number + .section .rom.data.str1.1 +.LC2: + .string "<NULL>" + .section .rom.text +.globl vtxprintf + .type vtxprintf, @function +vtxprintf: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl 16(%ebp), %esi + movl $0, -20(%ebp) + jmp .L90 +.L91: + cmpb $37, %al + movl $0, -28(%ebp) + je .L198 + subl $12, %esp + movzbl %al, %eax + jmp .L194 +.L198: + movl 12(%ebp), %ecx + incl %ecx + movl %ecx, 12(%ebp) + movb (%ecx), %dl + cmpb $43, %dl + je .L99 + jg .L102 + cmpb $32, %dl + je .L97 + cmpb $35, %dl + jne .L96 + jmp .L98 +.L102: + cmpb $45, %dl + je .L100 + cmpb $48, %dl + jne .L96 + jmp .L101 +.L100: + orl $16, -28(%ebp) + jmp .L198 +.L99: + orl $4, -28(%ebp) + jmp .L198 +.L97: + orl $8, -28(%ebp) + jmp .L198 +.L98: + orl $32, -28(%ebp) + jmp .L198 +.L101: + orl $1, -28(%ebp) + jmp .L198 +.L96: + leal -48(%edx), %eax + cmpb $9, %al + ja .L103 + leal 12(%ebp), %eax + call skip_atoi + movl %eax, %edi + jmp .L105 +.L103: + orl $-1, %edi + cmpb $42, %dl + jne .L105 + movl (%esi), %edi + leal 1(%ecx), %eax + movl %eax, 12(%ebp) + leal 4(%esi), %eax + movl %eax, %esi + testl %edi, %edi + jns .L105 + orl $16, -28(%ebp) + negl %edi +.L105: + movl 12(%ebp), %edx + movl $-1, -24(%ebp) + cmpb $46, (%edx) + jne .L112 + leal 1(%edx), %eax + movl %eax, 12(%ebp) + movb 1(%edx), %cl + leal -48(%ecx), %eax + cmpb $9, %al + ja .L113 + leal 12(%ebp), %eax + call skip_atoi + movl %eax, -24(%ebp) + jmp .L115 +.L113: + cmpb $42, %cl + jne .L116 + leal 2(%edx), %eax + movl %eax, 12(%ebp) + movl (%esi), %eax + addl $4, %esi + movl %eax, -24(%ebp) +.L115: + cmpl $0, -24(%ebp) + jns .L112 +.L116: + movl $0, -24(%ebp) +.L112: + movl 12(%ebp), %ecx + movb (%ecx), %dl + cmpb $104, %dl + je .L118 + cmpb $108, %dl + je .L118 + orl $-1, %ebx + cmpb $76, %dl + jne .L121 +.L118: + leal 1(%ecx), %eax + movl %eax, 12(%ebp) + cmpb $108, 1(%ecx) + je .L122 + movsbl %dl,%ebx + jmp .L121 +.L122: + leal 2(%ecx), %eax + movl $76, %ebx + movl %eax, 12(%ebp) +.L121: + movl 12(%ebp), %eax + movb (%eax), %al + cmpb $110, %al + je .L129 + jg .L135 + cmpb $99, %al + je .L127 + jg .L136 + cmpb $37, %al + je .L125 + cmpb $88, %al + jne .L124 + jmp .L126 +.L136: + cmpb $100, %al + je .L128 + cmpb $105, %al + jne .L124 + jmp .L128 +.L135: + cmpb $115, %al + je .L132 + jg .L137 + cmpb $111, %al + je .L130 + cmpb $112, %al + jne .L124 + jmp .L131 +.L137: + cmpb $117, %al + je .L133 + cmpb $120, %al + movl $16, -36(%ebp) + je .L138 + jmp .L124 +.L127: + testb $16, -28(%ebp) + movl %edi, %ebx + je .L141 + jmp .L139 +.L142: + subl $12, %esp + pushl $32 + call *8(%ebp) + addl $16, %esp +.L141: + decl %ebx + testl %ebx, %ebx + jg .L142 + movl -20(%ebp), %eax + addl %edi, %eax + movl %ebx, %edi + subl %ebx, %eax + decl %eax + movl %eax, -20(%ebp) +.L139: + movzbl (%esi), %eax + subl $12, %esp + pushl %eax + call *8(%ebp) + movl -20(%ebp), %ebx + jmp .L189 +.L145: + subl $12, %esp + pushl $32 + call *8(%ebp) +.L189: + decl %edi + addl $16, %esp + incl %ebx + testl %edi, %edi + jg .L145 + movl %ebx, -20(%ebp) + jmp .L197 +.L132: + movl (%esi), %edx + testl %edx, %edx + movl %edx, -32(%ebp) + jne .L147 + movl $.LC2, -32(%ebp) +.L147: + movl $0, -16(%ebp) + jmp .L149 +.L150: + incl -16(%ebp) +.L149: + movl -16(%ebp), %ecx + movl -32(%ebp), %eax + cmpb $0, (%ecx,%eax) + je .L151 + movl -24(%ebp), %edx + cmpl %edx, %ecx + jne .L150 +.L151: + testb $16, -28(%ebp) + movl %edi, %eax + je .L155 + jmp .L153 +.L156: + subl $12, %esp + pushl $32 + call *8(%ebp) + movl %ebx, %eax + addl $16, %esp + incl -20(%ebp) +.L155: + cmpl %eax, -16(%ebp) + leal -1(%eax), %ebx + jl .L156 + movl %ebx, %edi +.L153: + xorl %ebx, %ebx + jmp .L158 +.L159: + movl -32(%ebp), %ecx + subl $12, %esp + movzbl (%ebx,%ecx), %eax + incl %ebx + pushl %eax + call *8(%ebp) + addl $16, %esp + incl -20(%ebp) +.L158: + cmpl -16(%ebp), %ebx + jl .L159 + movl %edi, %ebx + jmp .L161 +.L162: + subl $12, %esp + decl %ebx + pushl $32 + call *8(%ebp) + addl $16, %esp + incl -20(%ebp) +.L161: + cmpl %ebx, -16(%ebp) + jl .L162 + jmp .L197 +.L131: + cmpl $-1, %edi + jne .L164 + orl $1, -28(%ebp) + movl $8, %edi +.L164: + movl (%esi), %edx + leal 4(%esi), %ebx + xorl %ecx, %ecx + pushl -28(%ebp) + pushl -24(%ebp) + pushl %edi + pushl $16 + jmp .L195 +.L129: + cmpl $76, %ebx + jne .L166 + movl -20(%ebp), %eax + movl (%esi), %ecx + cltd + movl %eax, (%ecx) + movl %edx, 4(%ecx) +.L197: + addl $4, %esi + jmp .L95 +.L166: + movl (%esi), %eax + leal 4(%esi), %edx + movl -20(%ebp), %ecx + movl %edx, %esi + movl %ecx, (%eax) + jmp .L95 +.L125: + subl $12, %esp + pushl $37 + jmp .L196 +.L130: + movl $8, -36(%ebp) + jmp .L138 +.L126: + orl $64, -28(%ebp) + movl $16, -36(%ebp) + jmp .L138 +.L128: + orl $2, -28(%ebp) + jmp .L133 +.L124: + subl $12, %esp + pushl $37 + call *8(%ebp) + movl 12(%ebp), %eax + addl $16, %esp + incl -20(%ebp) + movb (%eax), %dl + testb %dl, %dl + je .L170 + subl $12, %esp + movzbl %dl, %eax +.L194: + pushl %eax +.L196: + call *8(%ebp) + incl -20(%ebp) + jmp .L192 +.L170: + decl %eax + movl %eax, 12(%ebp) + jmp .L95 +.L133: + movl $10, -36(%ebp) +.L138: + cmpl $76, %ebx + jne .L172 + movl (%esi), %edx + leal 8(%esi), %ebx + movl 4(%esi), %ecx + jmp .L174 +.L172: + cmpl $108, %ebx + jne .L175 + leal 4(%esi), %ebx + jmp .L190 +.L175: + cmpl $104, %ebx + jne .L177 + xorl %ecx, %ecx + movzwl (%esi), %edx + testb $2, -28(%ebp) + leal 4(%esi), %ebx + je .L174 + movswl %dx,%edx + movl %edx, %ecx + jmp .L191 +.L177: + testb $2, -28(%ebp) + leal 4(%esi), %edx + je .L180 + movl (%esi), %eax + movl %edx, %ebx + movl %eax, %ecx + movl %eax, %edx +.L191: + sarl $31, %ecx + jmp .L174 +.L180: + movl %edx, %ebx +.L190: + movl (%esi), %edx + xorl %ecx, %ecx +.L174: + pushl -28(%ebp) + pushl -24(%ebp) + pushl %edi + pushl -36(%ebp) +.L195: + movl 8(%ebp), %eax + movl %ebx, %esi + call number + addl %eax, -20(%ebp) +.L192: + addl $16, %esp +.L95: + incl 12(%ebp) +.L90: + movl 12(%ebp), %eax + movb (%eax), %al + testb %al, %al + jne .L91 + movl -20(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size vtxprintf, .-vtxprintf +.globl console_tx_byte + .type console_tx_byte, @function +console_tx_byte: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movb 8(%ebp), %bl + cmpb $10, %bl + jne .L200 + pushl $13 + pushl $1016 + call uart8250_tx_byte + popl %ecx + popl %eax +.L200: + movzbl %bl, %eax + pushl %eax + pushl $1016 + call uart8250_tx_byte + movl -4(%ebp), %ebx + popl %eax + popl %edx + leave + ret + .size console_tx_byte, .-console_tx_byte +.globl udelay + .type udelay, @function +udelay: + pushl %ebp + movl %esp, %ebp + imull $200, 8(%ebp), %ecx + pushl %ebx + movl -18873456, %edx +.L204: + movl -18873456, %eax + movl %edx, %ebx + subl %eax, %ebx + cmpl %ecx, %ebx + jb .L204 + popl %ebx + popl %ebp + ret + .size udelay, .-udelay +.globl mdelay + .type mdelay, @function +mdelay: + pushl %ebp + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + xorl %ebx, %ebx + jmp .L210 +.L211: + pushl $1000 + incl %ebx + call udelay + popl %eax +.L210: + cmpl %esi, %ebx + jne .L211 + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size mdelay, .-mdelay +.globl delay + .type delay, @function +delay: + pushl %ebp + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + xorl %ebx, %ebx + jmp .L215 +.L216: + pushl $1000 + incl %ebx + call mdelay + popl %eax +.L215: + cmpl %esi, %ebx + jne .L216 + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size delay, .-delay +.globl memcpy + .type memcpy, @function +memcpy: + pushl %ebp + xorl %edx, %edx + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %ecx + pushl %ebx + movl 12(%ebp), %esi + movl 16(%ebp), %ebx + jmp .L220 +.L221: + movb (%edx,%esi), %al + movb %al, (%edx,%ecx) + incl %edx +.L220: + cmpl %ebx, %edx + jne .L221 + popl %ebx + movl %ecx, %eax + popl %esi + popl %ebp + ret + .size memcpy, .-memcpy + .type setup_resource_map_offset, @function +setup_resource_map_offset: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + subl $16, %esp + movl %edx, -16(%ebp) + movl %ecx, -20(%ebp) + jmp .L225 +.L226: + movl (%esi,%edi,4), %edx + movl $3320, %ecx + movl %edx, %eax + andl $4095, %edx + andl $-4096, %eax + addl -20(%ebp), %eax + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -28(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl 4(%esi,%edi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -24(%ebp) + movl -28(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl 8(%ebp), %eax + movl %ebx, %edx + addl 8(%esi,%edi,4), %eax + orl %eax, -24(%ebp) + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %edi +.L225: + cmpl -16(%ebp), %edi + jl .L226 + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size setup_resource_map_offset, .-setup_resource_map_offset + .type setup_resource_map_x_offset, @function +setup_resource_map_x_offset: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + subl $16, %esp + movl %edx, -16(%ebp) + movl %ecx, -20(%ebp) + jmp .L230 +.L231: + movl (%esi,%edi,4), %eax + cmpl $32, %eax + je .L234 + cmpl $34, %eax + je .L235 + cmpl $16, %eax + jne .L232 + movl 4(%esi,%edi,4), %edx + movl $3320, %ecx + movl %edx, %eax + andl $4095, %edx + andl $-4096, %eax + addl -20(%ebp), %eax + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -28(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl 8(%esi,%edi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -24(%ebp) + movl -28(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl 12(%esi,%edi,4), %eax + movl %ebx, %edx + orl %eax, -24(%ebp) + movl -24(%ebp), %eax + jmp .L238 +.L235: + movl 8(%ebp), %edx + addl 4(%esi,%edi,4), %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax + andl 8(%esi,%edi,4), %eax + orl 12(%esi,%edi,4), %eax + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + jmp .L232 +.L234: + movl 8(%ebp), %edx + addl 4(%esi,%edi,4), %edx +#APP + inl %dx, %eax +#NO_APP + andl 8(%esi,%edi,4), %eax + orl 12(%esi,%edi,4), %eax +.L238: +#APP + outl %eax, %dx +#NO_APP +.L232: + addl $4, %edi +.L230: + cmpl -16(%ebp), %edi + jl .L231 + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size setup_resource_map_x_offset, .-setup_resource_map_x_offset + .type soft_reset, @function +soft_reset: + pushl %ebp + movl $-2147434388, %eax + movl %esp, %ebp + movl $3320, %edx + pushl %ebx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl $-2147434388, %ecx + movl %eax, %ebx + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-33, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $2, %al + movb $-7, %dl +#APP + outb %al, %dx +#NO_APP + movb $6, %al +#APP + outb %al, %dx +#NO_APP + popl %ebx + popl %ebp + ret + .size soft_reset, .-soft_reset + .type spd_read_byte, @function +spd_read_byte: + pushl %ebp + addl %eax, %eax + movl %esp, %ebp + orl $1, %eax + pushl %esi + movl $4098, %ecx + pushl %ebx + movzbl %al, %eax + movl %edx, %ebx + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl $-128, %esi + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movzbl %bl, %ecx + movb $3, %dl + movb %cl, %al +#APP + outb %al, %dx +#NO_APP + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movb $7, %cl + xorb %dl, %dl + movb %cl, %al +#APP + outb %al, %dx +#NO_APP + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movl $1000000, %ecx +.L242: + movb $-128, %al +#APP + outb %al, $128 +#NO_APP + movl $4097, %edx +#APP + inb %dx, %al +#NO_APP + testb %al, %al + jne .L243 + decl %ecx + jne .L242 + movl $-3, %edx + jmp .L246 +.L243: +#APP + inb %dx, %al +#NO_APP + movl $4100, %edx + movb %al, %bl +#APP + inb %dx, %al +#NO_APP + andl $-128, %ebx + orl $-1, %edx + cmpb $-128, %bl + jne .L246 + movzbl %al, %edx +.L246: + popl %ebx + movl %edx, %eax + popl %esi + popl %ebp + ret + .size spd_read_byte, .-spd_read_byte + .type get_nodes, @function +get_nodes: + pushl %ebp + movl $-2147434400, %eax + movl %esp, %ebp + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $4, %eax + popl %ebp + andl $7, %eax + incl %eax + ret + .size get_nodes, .-get_nodes + .type ht_lookup_slave_capability, @function +ht_lookup_slave_capability: + pushl %ebp + movl $3320, %ecx + movl %esp, %ebp + movl %ecx, %edx + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + shrl $4, %ebx + subl $4, %esp + movl %ebx, %esi + orl $14, %esi + movl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + andl $127, %eax + xorl %edi, %edi + cmpb $1, %al + ja .L263 + jmp .L255 +.L258: + movl %edi, %eax + movl %ebx, %edx + movzbl %al, %esi + movl $3320, %ecx + orl %esi, %edx + movl %edx, %eax + andl $2147483644, %eax + movl %edx, -16(%ebp) + orl $-2147483648, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -16(%ebp), %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + cmpb $8, %al + jne .L259 + leal 2(%esi), %eax + movl %ecx, %edx + orl %ebx, %eax + movl %eax, -16(%ebp) + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -16(%ebp), %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + shrw $13, %ax + je .L261 +.L259: + incl %esi + orl %ebx, %esi +.L264: + movl %esi, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + movl %eax, %edi +.L263: + movl %edi, %edx + testb %dl, %dl + jne .L258 + jmp .L261 +.L255: + movl %ebx, %esi + orl $52, %esi + jmp .L264 +.L261: + movl %edi, %edx + movzbl %dl, %eax + popl %edx + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size ht_lookup_slave_capability, .-ht_lookup_slave_capability + .type ht_read_freq_cap, @function +ht_read_freq_cap: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movzbl %dl, %esi + shrl $4, %edi + orl %edi, %esi + movl %esi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + andl $2147483644, %edi + movl %eax, %esi + orl $-2147483648, %edi + movl %eax, %ecx + andw $32767, %si + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $1951404066, %eax + je .L272 + cmpl $1951666210, %eax + jne .L269 +.L272: + movl %ecx, %eax + andl $32735, %eax + jmp .L268 +.L269: + movzwl %si, %eax +.L268: + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size ht_read_freq_cap, .-ht_read_freq_cap + .type ht_read_width_cap, @function +ht_read_width_cap: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movzbl %dl, %esi + shrl $4, %edi + orl %edi, %esi + movl %esi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + andl $2147483644, %edi + movb %al, %cl + orl $-2147483648, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $71758, %eax + jne .L274 + movl %ecx, %eax + andl $119, %eax + cmpl $17, %eax + jne .L274 + andl $-120, %ecx +.L274: + popl %ebx + movzbl %cl, %eax + popl %esi + popl %edi + popl %ebp + ret + .size ht_read_width_cap, .-ht_read_width_cap + .type pci_read_config32_index_wait, @function +pci_read_config32_index_wait: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %edx, %edi + pushl %esi + movl %ecx, %esi + pushl %ebx + movl %eax, %ebx + shrl $4, %ebx + movl %ebx, %ecx + orl %edx, %ecx + movl $3320, %edx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1073741825, %esi + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L279: + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testl %eax, %eax + jns .L279 + leal 4(%edi), %eax + movb $-8, %dl + orl %eax, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size pci_read_config32_index_wait, .-pci_read_config32_index_wait + .type pci_write_config32_index_wait, @function +pci_write_config32_index_wait: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl %ecx, %esi + movl %edx, %ecx + shrl $4, %edi + addl $4, %ecx + orl %edi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + subl $4, %esp + movl %ecx, %eax + movl %edx, -16(%ebp) + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl 8(%ebp), %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + orl -16(%ebp), %edi + movl %ebx, %edx + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1073741824, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L285: + movl $3320, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testl %eax, %eax + jns .L285 + popl %ecx + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size pci_write_config32_index_wait, .-pci_write_config32_index_wait +.globl memory_end_k + .type memory_end_k, @function +memory_end_k: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + xorl %esi, %esi + pushl %ebx + subl $4, %esp + movl $0, -16(%ebp) + jmp .L291 +.L292: + movl 8(%ebp), %eax + movl $3320, %edx + movl -16(%ebp), %edi + movl 8(%eax), %ecx + sall $3, %edi + leal 64(%edi), %eax + shrl $4, %ecx + orl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $3, %eax + cmpl $3, %eax + jne .L293 + leal 68(%edi), %eax + movb $-8, %dl + orl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + leal 65536(%eax), %esi + xorw %si, %si + shrl $2, %esi +.L293: + incl -16(%ebp) +.L291: + movl 12(%ebp), %eax + cmpl %eax, -16(%ebp) + jne .L292 + popl %ebx + movl %esi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size memory_end_k, .-memory_end_k + .type convert_to_linear, @function +convert_to_linear: + movl %eax, %edx + andl $15, %edx + pushl %ebp + cmpl $9, %edx + movl %esp, %ebp + ja .L298 + sall $4, %eax + jmp .L300 +.L298: + andl $240, %eax + sall $4, %eax + orl fraction.4275-40(,%edx,4), %eax +.L300: + popl %ebp + ret + .size convert_to_linear, .-convert_to_linear + .type update_dimm_TT_1_4, @function +update_dimm_TT_1_4: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $12, %esp + movl 8(%ebp), %edi + movl %edx, -20(%ebp) + movl $1, %edx + movzwl 20(%eax,%ecx,2), %esi + movl %eax, -16(%ebp) + movl %edx, %eax + sall %cl, %eax + testl %eax, %edi + jne .L303 + leal 4(%ebx), %ecx + sall %cl, %edx + testl %edx, %edi + je .L303 + movl -16(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L303: + movl 16(%ebp), %edx + movl %esi, %eax + orl $-1, %edi + call spd_read_byte + testl %eax, %eax + js .L308 + movl -20(%ebp), %ecx + imull $10, %eax, %edx + movl 32(%ebp), %esi + movzbl 2(%ecx), %ebx + leal -1(%edx,%ebx), %edx + movl %edx, %eax + cltd + idivl %ebx + cmpl %eax, %esi + jae .L309 + movl %eax, %esi +.L309: + xorl %edi, %edi + cmpl 36(%ebp), %esi + ja .L308 + movl -16(%ebp), %ecx + movl $3320, %edx + movl 12(%ebp), %eax + movl 12(%ecx), %ecx + shrl $4, %ecx + orl %eax, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, -24(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movb 20(%ebp), %cl + movl %eax, %ebx + movw $1, %di + shrl %cl, %eax + andl 24(%ebp), %eax + addl 28(%ebp), %eax + cmpl %esi, %eax + jae .L308 + sall %cl, 24(%ebp) + movb $-8, %dl + notl 24(%ebp) + andl 24(%ebp), %ebx + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + subl 28(%ebp), %esi + movb $-4, %dl + sall %cl, %esi + orl %esi, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L308: + addl $12, %esp + movl %edi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size update_dimm_TT_1_4, .-update_dimm_TT_1_4 + .type Get_MCTSysAddr, @function +Get_MCTSysAddr: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl (%eax), %ebx + leal (%edx,%ebx,8), %eax + movl 728(%ecx,%eax,4), %edx + movl 696(%ecx,%ebx,4), %eax + andl $-16, %edx + xorw %ax, %ax + addl %eax, %edx + movl 984(%ecx,%ebx,4), %eax + testb $1, %al + je .L316 + movl %eax, %ecx + andl $-16777216, %ecx + shrl $10, %ecx + leal 0(,%ecx,4), %eax + cmpl %eax, %edx + jb .L316 + cmpl $16777215, %edx + ja .L316 + movl $4194304, %eax + subl %ecx, %eax + leal (%edx,%eax,4), %edx +.L316: + popl %ebx + popl %ebp + leal 4096(%edx), %eax + ret + .size Get_MCTSysAddr, .-Get_MCTSysAddr + .type Get_RcvrSysAddr, @function +Get_RcvrSysAddr: + pushl %ebp + movl %ecx, %edx + movl %esp, %ebp + movl 8(%ebp), %ecx + popl %ebp + jmp Get_MCTSysAddr + .size Get_RcvrSysAddr, .-Get_RcvrSysAddr + .type set_wrap32dis, @function +set_wrap32dis: + pushl %ebp + movl $-1073676267, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + orl $131072, %eax +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size set_wrap32dis, .-set_wrap32dis + .type clear_wrap32dis, @function +clear_wrap32dis: + pushl %ebp + movl $-1073676267, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + andl $-131073, %eax +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size clear_wrap32dis, .-clear_wrap32dis + .type Write1LTestPattern, @function +Write1LTestPattern: + pushl %ebp + decl %edx + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + je .L329 + movl %ecx, %esi +.L329: + movl %edi, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + sall $8, %edi + movl $16, %edx + movl $4, %ecx + movl %edi, %eax + movl %esi, %ebx +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size Write1LTestPattern, .-Write1LTestPattern + .type Read1LTestPattern, @function +Read1LTestPattern: + pushl %ebp + movl %eax, %edx + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + movl $-1073741568, %ebx + shrl $24, %edx + movl %ebx, %ecx + movl %edi, %eax +#APP + wrmsr +#NO_APP + sall $8, %esi + movl %esi, %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size Read1LTestPattern, .-Read1LTestPattern + .type CompareTestPatternQW0, @function +CompareTestPatternQW0: + pushl %ebp + movl %esp, %ebp + cmpl $1, 20(%ebp) + pushl %edi + movl %eax, %edi + pushl %esi + movl 16(%ebp), %esi + pushl %ebx + movl %edx, %ebx + jne .L338 + decl %ecx + movl 12(%ebp), %esi + je .L338 + movl 8(%ebp), %esi +.L338: + movl %ebx, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + movl %ebx, %eax + sall $8, %eax + cmpl $0, 24(%ebp) + je .L339 + decl %edi + jne .L339 + addl $8, %eax + addl $8, %esi +.L339: +#APP + movl %fs:(%eax), %ebx + +#NO_APP + cmpl (%esi), %ebx + movl $1, %edx + jne .L343 + addl $4, %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + xorl %edx, %edx + cmpl 4(%esi), %ebx + setne %dl +.L343: + cmpl $2, 20(%ebp) + jne .L344 + testl %edx, %edx + sete %al + movzbl %al, %edx +.L344: + popl %ebx + movl %edx, %eax + popl %esi + popl %edi + popl %ebp + ret + .size CompareTestPatternQW0, .-CompareTestPatternQW0 + .type SetMaxAL_RcvrDly, @function +SetMaxAL_RcvrDly: + pushl %ebp + movl %esp, %ebp + leal 19(%edx), %ecx + movl $20, %edx + pushl %edi + movl %eax, %edi + pushl %esi + movl %ecx, %eax + movl %edx, %esi + xorl %edx, %edx + divl %esi + movl 12(%edi), %esi + movl $3320, %edx + pushl %ebx + orl $2368, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %eax, %ebx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + andb $15, %cl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 6(%ebx), %eax + movb $-4, %dl + sall $4, %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size SetMaxAL_RcvrDly, .-SetMaxAL_RcvrDly + .type SetTargetWTIO, @function +SetTargetWTIO: + pushl %ebp + movl %eax, %edx + movl %esp, %ebp + movl $-1073676266, %ecx + sall $8, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + movl $-67106816, %eax + movb $23, %cl + movl $255, %edx +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size SetTargetWTIO, .-SetTargetWTIO + .type proc_IOCLFLUSH, @function +proc_IOCLFLUSH: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %eax, %ebx + call SetTargetWTIO + movl %ebx, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + sall $8, %ebx + movl %ebx, %eax +#APP + clflush %fs:(%eax) + +#NO_APP + movl $-1073676265, %ecx + xorl %eax, %eax + xorl %edx, %edx +#APP + wrmsr +#NO_APP + popl %ebx + popl %ebp + ret + .size proc_IOCLFLUSH, .-proc_IOCLFLUSH + .type ResetDCTWrPtr, @function +ResetDCTWrPtr: + pushl %ebp + movl $16, %ecx + movl %esp, %ebp + movl $152, %edx + pushl %esi + pushl %ebx + movl %eax, %ebx + movl 12(%eax), %eax + call pci_read_config32_index_wait + movl 12(%ebx), %esi + movl $16, %ecx + movl $152, %edx + pushl %eax + movl %esi, %eax + call pci_write_config32_index_wait + movl 12(%ebx), %eax + movl $48, %ecx + movl $152, %edx + call pci_read_config32_index_wait + movl 12(%ebx), %ebx + movl $48, %ecx + movl $152, %edx + pushl %eax + movl %ebx, %eax + call pci_write_config32_index_wait + popl %esi + popl %eax + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size ResetDCTWrPtr, .-ResetDCTWrPtr + .type SetDQSDelayCSR, @function +SetDQSDelayCSR: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $8, %esp + movl 12(%ebp), %eax + sall $5, %edx + movl %eax, -16(%ebp) + movl %ecx, %eax + shrl $2, %eax + leal 1(%eax,%edx), %eax + movl 8(%ebp), %edx + leal (%eax,%edx,4), %esi + jmp .L356 +.L357: + subl $4, %ebx +.L356: + cmpl $3, %ebx + ja .L357 + movl 12(%edi), %eax + movl %esi, %ecx + movl $152, %edx + sall $3, %ebx + call pci_read_config32_index_wait + movzbl -16(%ebp),%edx + movb %bl, %cl + movl $63, -20(%ebp) + sall %cl, -20(%ebp) + notl -20(%ebp) + andl %eax, -20(%ebp) + sall %cl, %edx + movl 12(%edi), %eax + movl %esi, %ecx + orl -20(%ebp), %edx + movl %edx, 8(%ebp) + movl $152, %edx + popl %ebx + popl %esi + popl %ebx + popl %esi + popl %edi + popl %ebp + jmp pci_write_config32_index_wait + .size SetDQSDelayCSR, .-SetDQSDelayCSR + .type SetDQSDelayAllCSR, @function +SetDQSDelayAllCSR: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl $1, %esi + pushl %ebx + subl $4, %esp + movl %eax, -16(%ebp) + movzbl 8(%ebp),%eax + leal (%ecx,%edx,8), %edx + leal 0(,%edx,4), %edi + movl %eax, %ebx + sall $8, %ebx + orl %eax, %ebx + sall $16, %eax + orl %eax, %ebx + sall $8, %eax + orl %eax, %ebx +.L361: + movl -16(%ebp), %edx + leal (%edi,%esi), %ecx + incl %esi + movl 12(%edx), %eax + movl $152, %edx + pushl %ebx + call pci_write_config32_index_wait + cmpl $3, %esi + popl %eax + jne .L361 + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size SetDQSDelayAllCSR, .-SetDQSDelayAllCSR + .type save_dqs_delay, @function +save_dqs_delay: + imull $18, %eax, %eax + pushl %ebp + movl %esp, %ebp + leal (%ecx,%ecx,8), %ecx + addl %eax, %ecx + movl 12(%ebp), %eax + addl 8(%ebp), %ecx + movb %al, (%ecx,%edx) + popl %ebp + ret + .size save_dqs_delay, .-save_dqs_delay + .type FlushDQSTestPattern_L18, @function +FlushDQSTestPattern_L18: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + leal 896(%eax), %edx + pushl %ebx + leal 640(%eax), %esi + subl $12, %esp + leal 1152(%eax), %ecx + leal 128(%eax), %ebx + movl %ecx, -20(%ebp) + leal 384(%eax), %edi + movl %edx, %ecx + movl %ebx, -24(%ebp) + movl %esi, %ebx + movl -24(%ebp), %eax + movl %edx, -16(%ebp) + movl -20(%ebp), %edx +#APP + clflush %fs:-128(%eax) + clflush %fs:-64(%eax) + clflush %fs:(%eax) + clflush %fs:64(%eax) + clflush %fs:-128(%edi) + clflush %fs:-64(%edi) + clflush %fs:(%edi) + clflush %fs:64(%edi) + clflush %fs:-128(%ebx) + clflush %fs:-64(%ebx) + clflush %fs:(%ebx) + clflush %fs:64(%ebx) + clflush %fs:-128(%ecx) + clflush %fs:-64(%ecx) + clflush %fs:(%ecx) + clflush %fs:64(%ecx) + clflush %fs:-128(%edx) + clflush %fs:-64(%edx) + +#NO_APP + addl $12, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size FlushDQSTestPattern_L18, .-FlushDQSTestPattern_L18 + .type TrainDQSPos, @function +TrainDQSPos: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $268, %esp + movl %eax, -264(%ebp) + xorl %eax, %eax + movl %edx, -268(%ebp) + movl %ecx, -272(%ebp) +.L371: + movl $255, -204(%ebp,%eax,4) + incl %eax + cmpl $48, %eax + jne .L371 + imull $9, 8(%ebp), %eax + xorl %edx, %edx + movl $0, -252(%ebp) + leal 36(,%eax,4), %eax + movl %eax, -236(%ebp) +.L373: + movl -264(%ebp), %ecx + movl -252(%ebp), %ebx + movl (%ecx), %eax + movl 20(%ebp), %ecx + leal (%ebx,%eax,8), %eax + testb $1, 728(%ecx,%eax,4) + je .L374 + movl -264(%ebp), %eax + movl %ebx, %edx + call Get_MCTSysAddr + movl $-1073741568, %ecx + movl %eax, -248(%ebp) + movl -248(%ebp), %edx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + cmpl $1, -272(%ebp) + movl $0, -216(%ebp) + jne .L424 + movl -248(%ebp), %eax + movl $16, %edx + movl -236(%ebp), %ecx + movl 12(%ebp), %ebx + sall $8, %eax +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP +.L424: + movl -216(%ebp), %eax + movl -204(%ebp,%eax,4), %eax + testl %eax, %eax + movl %eax, -208(%ebp) + je .L379 + pushl -216(%ebp) + movl -264(%ebp), %eax + movl -272(%ebp), %ecx + movl -268(%ebp), %edx + call SetDQSDelayAllCSR + cmpl $0, -272(%ebp) + popl %eax + jne .L381 + movl -248(%ebp), %eax + movl $16, %edx + movl -236(%ebp), %ecx + movl 12(%ebp), %ebx + sall $8, %eax +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP +.L381: + movl -248(%ebp), %eax + sall $8, %eax + cmpl $0, 8(%ebp) + movl %eax, -212(%ebp) + leal 640(%eax), %ebx + leal 128(%eax), %esi + leal 384(%eax), %edi + jne .L383 + xorl %eax, %eax + movl %esi, %ecx + movl %edi, %edx +#APP + movl %fs:-128(%ecx), %eax + movl %fs:-64(%ecx), %eax + movl %fs:(%ecx), %eax + movl %fs:64(%ecx), %eax + movl %fs:-128(%edx), %eax + movl %fs:-64(%edx), %eax + movl %fs:(%edx), %eax + movl %fs:64(%edx), %eax + movl %fs:-128(%ebx), %eax + +#NO_APP + movl 12(%ebp), %ebx + movl -212(%ebp), %eax + movl %ebx, -280(%ebp) + movl %eax, -276(%ebp) + jmp .L385 +.L383: + movl -212(%ebp), %ecx + xorl %eax, %eax + movl -212(%ebp), %edx + addl $896, %ecx + addl $1152, %edx +#APP + movl %fs:-128(%esi), %eax + movl %fs:-64(%esi), %eax + movl %fs:(%esi), %eax + movl %fs:64(%esi), %eax + movl %fs:-128(%edi), %eax + movl %fs:-64(%edi), %eax + movl %fs:(%edi), %eax + movl %fs:64(%edi), %eax + movl %fs:-128(%ebx), %eax + movl %fs:-64(%ebx), %eax + movl %fs:(%ebx), %eax + movl %fs:64(%ebx), %eax + movl %fs:-128(%ecx), %eax + movl %fs:-64(%ecx), %eax + movl %fs:(%ecx), %eax + movl %fs:64(%ecx), %eax + movl %fs:-128(%edx), %eax + movl %fs:-64(%edx), %eax + +#NO_APP + movl 12(%ebp), %edx + movl -212(%ebp), %ecx + cmpl $0, -268(%ebp) + movl %edx, -280(%ebp) + movl %ecx, -276(%ebp) + je .L385 + movl %ecx, %ebx + addl $8, %edx + addl $8, %ebx + movl %ebx, -276(%ebp) + movl %edx, -280(%ebp) +.L385: + movl $0, -224(%ebp) + xorl %edi, %edi + movl $255, -220(%ebp) +.L388: + movl -276(%ebp), %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + movl -280(%ebp), %eax + xorl %esi, %esi + movl %ebx, -232(%ebp) + movl (%eax), %eax + movl %eax, -228(%ebp) +.L389: + movl -232(%ebp), %edx + movl %esi, %ecx + movl -228(%ebp), %eax + shrl %cl, %edx + shrl %cl, %eax + cmpb %dl, %al + je .L390 + movl $-2, %eax + movl %edi, %ecx + roll %cl, %eax + andl %eax, -220(%ebp) +.L390: + incl %edi + addl $8, %esi + andl $7, %edi + cmpl $32, %esi + jne .L389 + testl %edi, %edi + jne .L393 + cmpl $1, 8(%ebp) + jne .L393 + addl $8, -276(%ebp) + addl $8, -280(%ebp) +.L393: + incl -224(%ebp) + cmpl $144, -224(%ebp) + je .L396 + addl $4, -276(%ebp) + addl $4, -280(%ebp) + jmp .L388 +.L396: + movl -248(%ebp), %eax + call SetTargetWTIO + cmpl $0, 8(%ebp) + jne .L398 + movl -212(%ebp), %ebx + movl -212(%ebp), %ecx + movl -212(%ebp), %eax + addl $640, %ebx + subl $-128, %ecx + addl $384, %eax +#APP + clflush %fs:-128(%ecx) + clflush %fs:-64(%ecx) + clflush %fs:(%ecx) + clflush %fs:64(%ecx) + clflush %fs:-128(%eax) + clflush %fs:-64(%eax) + clflush %fs:(%eax) + clflush %fs:64(%eax) + clflush %fs:-128(%ebx) + +#NO_APP + jmp .L400 +.L398: + movl -212(%ebp), %eax + call FlushDQSTestPattern_L18 +.L400: + movl -220(%ebp), %ebx + movl $-1073676265, %ecx + andl %ebx, -208(%ebp) + movl -208(%ebp), %edx + movl -216(%ebp), %eax + movl %edx, -204(%ebp,%eax,4) + xorl %eax, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP +.L379: + incl -216(%ebp) + cmpl $48, -216(%ebp) + jne .L424 + movl $1, %edx +.L374: + incl -252(%ebp) + cmpl $8, -252(%ebp) + jne .L373 + testl %edx, %edx + movl $0, -256(%ebp) + je .L405 + jmp .L403 +.L406: + movb -260(%ebp), %cl + movl $1, %eax + movl -276(%ebp), %edx + sall %cl, %eax + testl %eax, -204(%ebp,%edx,4) + jne .L407 + movl $1, -244(%ebp) + jmp .L409 +.L407: + cmpl $1, -244(%ebp) + jne .L410 + movl -276(%ebp), %esi + movl $0, -244(%ebp) + movl %esi, -240(%ebp) + jmp .L409 +.L410: + movl -276(%ebp), %edx + movl %edi, %eax + subl -240(%ebp), %edx + subl %ebx, %eax + movl -276(%ebp), %esi + movl $0, -244(%ebp) + cmpl %eax, %edx + jbe .L409 + movl -240(%ebp), %ebx + movl %esi, %edi +.L409: + incl -276(%ebp) + cmpl $48, -276(%ebp) + jne .L406 + testl %esi, %esi + jne .L415 + orl $14, -256(%ebp) + jmp .L417 +.L415: + movl %edi, %edx + subl %ebx, %edx + cmpl $2, %edx + ja .L418 + orl $15, -256(%ebp) + jmp .L417 +.L418: + movl %edx, %eax + movl -260(%ebp), %ecx + andl $1, %eax + cmpl $1, %eax + movl -264(%ebp), %eax + sbbl $-1, %ebx + shrl %edx + addl %edx, %ebx + movl -268(%ebp), %edx + pushl %ebx + movzbl %bl, %ebx + pushl -272(%ebp) + call SetDQSDelayCSR + movl -272(%ebp), %ecx + pushl %ebx + movl -260(%ebp), %edx + pushl 16(%ebp) + movl -268(%ebp), %eax + call save_dqs_delay + addl $16, %esp +.L417: + incl -260(%ebp) + cmpl $8, -260(%ebp) + je .L405 + jmp .L422 +.L403: + movl $0, -240(%ebp) + movl $0, -260(%ebp) + movl $0, -256(%ebp) +.L422: + xorl %edi, %edi + xorl %ebx, %ebx + xorl %esi, %esi + movl $0, -276(%ebp) + movl $1, -244(%ebp) + jmp .L406 +.L405: + movl -256(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size TrainDQSPos, .-TrainDQSPos + .type get_dqs_delay, @function +get_dqs_delay: + imull $18, %eax, %eax + pushl %ebp + movl %esp, %ebp + leal (%ecx,%ecx,8), %ecx + addl %eax, %ecx + addl 8(%ebp), %ecx + popl %ebp + movzbl (%ecx,%edx), %eax + ret + .size get_dqs_delay, .-get_dqs_delay +.globl read_nb_cfg_54 + .type read_nb_cfg_54, @function +read_nb_cfg_54: + pushl %ebp + movl $-1073676257, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + shrl $22, %edx + popl %ebp + andl $1, %edx + movl %edx, %eax + ret + .size read_nb_cfg_54, .-read_nb_cfg_54 +.globl get_node_core_id + .type get_node_core_id, @function +get_node_core_id: + pushl %ebp + movl %esp, %ebp + cmpl $0, 12(%ebp) + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + je .L441 + movl $1, %eax +#APP + cpuid +#NO_APP + shrl $24, %ebx + movl %ebx, %edx + movl %ebx, %eax + andl $15, %edx + andl $1, %eax + shrl %edx + jmp .L443 +.L441: + movl $1, %eax +#APP + cpuid +#NO_APP + shrl $24, %ebx + movl %ebx, %eax + movl %ebx, %edx + andl $15, %eax + andl $7, %edx + shrl $3, %eax +.L443: + movl %eax, 4(%esi) + movl %esi, %eax + movl %edx, (%esi) + popl %ebx + popl %esi + popl %ebp + ret $4 + .size get_node_core_id, .-get_node_core_id + .type clear_init_ram, @function +clear_init_ram: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + movl $516096, %ecx + pushl %edi + xorl %edi, %edi +#APP + cld + rep; stosl + +#NO_APP + popl %edi + popl %ebp + ret + .size clear_init_ram, .-clear_init_ram + .type set_init_ram_access, @function +set_init_ram_access: + pushl %ebp + movl $512, %ecx + movl %esp, %ebp + movl $6, %eax + xorl %edx, %edx +#APP + wrmsr +#NO_APP + movl $-2095104, %eax + movb $1, %cl + movb $-1, %dl +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size set_init_ram_access, .-set_init_ram_access + .type for_each_ap, @function +for_each_ap: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl %edx, -32(%ebp) + movl %ecx, -36(%ebp) + movl %eax, -28(%ebp) + call get_nodes + movl %eax, -24(%ebp) + call read_nb_cfg_54 + movl %eax, -20(%ebp) + jmp .L450 +.L451: + leal 24(%edi), %ecx + movl $3320, %edx + andl $31, %ecx + sall $11, %ecx + orb $3, %ch + movl %ecx, %eax + orl $-2147483416, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $12, %ebx + andl $3, %ebx + cmpl $0, -20(%ebp) + je .L452 + testl %ebx, %ebx + jne .L452 + orl $-2147483396, %ecx + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + andl $1048320, %eax + cmpl $265984, %eax + jne .L452 + movb $1, %bl + jmp .L457 +.L452: + cmpl $1, -32(%ebp) + movl %ebx, -16(%ebp) + jne .L459 +.L457: + movl $0, -16(%ebp) +.L459: + cmpl $2, -32(%ebp) + sete %al + movzbl %al, %esi + leal 1(%ebx), %eax + movl %edi, %ebx + imull %eax, %ebx + jmp .L460 +.L461: + cmpl $0, -20(%ebp) + movl %edi, %edx + movl $8, %eax + je .L464 + movl %ebx, %edx + movb $1, %al +.L464: + imull %esi, %eax + leal (%edx,%eax), %eax + cmpl -28(%ebp), %eax + je .L465 + pushl %edx + pushl %edx + pushl 8(%ebp) + pushl %eax + call *-36(%ebp) + addl $16, %esp +.L465: + incl %esi +.L460: + cmpl -16(%ebp), %esi + jbe .L461 + incl %edi +.L450: + cmpl -24(%ebp), %edi + jne .L451 + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size for_each_ap, .-for_each_ap + .type lapic_remote_read, @function +lapic_remote_read: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %eax, %ebx +.L473: + movl -18873600, %eax + testb $16, %ah + jne .L473 + sarl $4, %edx + orb $3, %dh + sall $24, %ebx + movl %ebx, -18873584 + movl %edx, -18873600 + xorl %edx, %edx +.L475: + movl -18873600, %eax + testb $16, %ah + je .L476 + cmpl $1000, %edx + je .L476 + incl %edx + jmp .L475 +.L476: + xorl %edx, %edx +.L479: + movl -18873600, %eax + andl $196608, %eax + cmpl $65536, %eax + jne .L480 + cmpl $1000, %edx + je .L482 + incl %edx + jmp .L479 +.L480: + cmpl $131072, %eax + jne .L482 + movl -18874176, %eax + movl %eax, (%ecx) + xorl %eax, %eax + jmp .L485 +.L482: + orl $-1, %eax +.L485: + popl %ebx + popl %ebp + ret + .size lapic_remote_read, .-lapic_remote_read + .type wait_cpu_state, @function +wait_cpu_state: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl %edx, %esi + pushl %ebx + movl $1999999, %ebx + subl $16, %esp + movl $0, -16(%ebp) +.L490: + leal -16(%ebp), %ecx + movl $896, %edx + movl %edi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L491 + movzbl -16(%ebp),%eax + cmpl %esi, %eax + jne .L491 + xorl %eax, %eax + jmp .L494 +.L491: + decl %ebx + jne .L490 + movl -16(%ebp), %eax + testl %eax, %eax + jne .L494 + movb $1, %al +.L494: + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size wait_cpu_state, .-wait_cpu_state + .type store_ap_apicid, @function +store_ap_apicid: + pushl %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + movl 8(%ebp), %ecx + movl (%eax), %edx + movl %ecx, 4(%eax,%edx,4) + incl %edx + movl %edx, (%eax) + popl %ebp + ret + .size store_ap_apicid, .-store_ap_apicid +.globl do_printk + .type do_printk, @function +do_printk: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + subl $24, %esp + cmpl $7, 8(%ebp) + jg .L505 + leal 16(%ebp), %eax + pushl %ecx + pushl %eax + pushl 12(%ebp) + movl %eax, -4(%ebp) + pushl $console_tx_byte + call vtxprintf + addl $16, %esp +.L505: + leave + ret + .size do_printk, .-do_printk + .section .rom.data.str1.1 +.LC3: + .string "wrong apicid, we want change %x, but it is %x\r\n" +.LC4: + .string "set vid failed for apicid =" +.LC5: + .string "%s" +.LC6: + .string "%02x" +.LC7: + .string "\r\n" +.LC8: + .string "set fid failed for apicid =" + .section .rom.text + .type set_fidvid, @function +set_fidvid: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %edx, %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl %eax, -32(%ebp) + movl -18874336, %eax + movl %ecx, -36(%ebp) + shrl $24, %eax + cmpl %eax, -32(%ebp) + je .L508 + pushl %eax + pushl -32(%ebp) + pushl $.LC3 + jmp .L544 +.L508: + movl %edx, %eax + movl $-1073676222, %ecx + shrl $8, %eax + shrl $16, %edx + andl $63, %eax + andl $63, %edx + movl %eax, -24(%ebp) + movl %edx, -28(%ebp) +#APP + rdmsr +#NO_APP + movl %eax, %esi + movl %eax, %ecx + movl %edx, %eax + andl $63, %esi + andl $63, %eax + movl %edx, %ebx + cmpl -28(%ebp), %eax + jne .L512 + cmpl -24(%ebp), %esi + je .L510 +.L512: + movl %ecx, %edi + shrl $16, %edi + andl $63, %edi + cmpl $41, %edi + jbe .L513 + shrl $8, %ecx + andl $63, %ecx + leal 10(%ecx), %edi + cmpl $41, %edi + jbe .L513 + movl $12, %edi +.L513: + shrl $8, %ebx + movl %esi, %eax + orl $65536, %eax + andl $16128, %ebx + orl %eax, %ebx + movl $-1073676223, %ecx + movl $1, %edx + movl %ebx, %eax +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L516: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + movl %edx, %ecx + jns .L517 + incl %ebx + cmpl $100000, %ebx + jne .L516 +.L517: + andl $63, %ecx + movl %ecx, -16(%ebp) + movl $8, -20(%ebp) + jmp .L519 +.L520: + cmpl $8, %esi + jbe .L521 + cmpl $8, -24(%ebp) + jbe .L521 + cmpl -24(%ebp), %esi + leal 2(%esi), %edx + jb .L525 + leal -2(%esi), %edx + jmp .L525 +.L521: + movl %esi, %eax + movl -24(%ebp), %edx + shrl %eax + imull $12, %eax, %eax + shrl %edx + movzbl next_fid_a.6702(%eax,%edx), %eax + testl %eax, %eax + jle .L526 + leal -8(%eax,%eax), %edx +.L525: + cmpl %edi, %edx + ja .L526 + movl -16(%ebp), %eax + orl $65536, %edx + movl $-1073676223, %ecx + sall $8, %eax + orl %edx, %eax + movl $20000, %edx +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L529: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + jns .L530 + incl %ebx + cmpl $100000, %ebx + jne .L529 +.L530: + decl -20(%ebp) + movl %eax, %esi + andl $63, %esi +.L519: + cmpl -24(%ebp), %esi + je .L526 + cmpl $0, -20(%ebp) + jne .L520 +.L526: + movl -28(%ebp), %eax + movl $-1073676223, %ecx + movl $1, %edx + sall $8, %eax + orl $65536, %eax + orl %esi, %eax +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L533: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + movl %edx, %ecx + jns .L534 + incl %ebx + cmpl $100000, %ebx + jne .L533 +.L534: + movl %ecx, %edx + movl %esi, %eax + andl $63, %edx + movl %edx, %edi + sall $16, %edi + sall $8, %eax + orl %eax, %edi + cmpl $0, -36(%ebp) + je .L510 + cmpl %edx, -28(%ebp) + je .L537 + pushl %eax + pushl $.LC4 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -32(%ebp) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L537: + cmpl %esi, -24(%ebp) + je .L510 + pushl %ebx + pushl $.LC8 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -32(%ebp) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 +.L544: + pushl $3 + call do_printk + addl $16, %esp +.L510: + leal -12(%ebp), %esp + movl %edi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size set_fidvid, .-set_fidvid + .section .rom.data.str1.1 +.LC9: + .string "%s%02x" + .section .rom.text + .type print_initcpu8_nocr, @function +print_initcpu8_nocr: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC9 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_initcpu8_nocr, .-print_initcpu8_nocr + .section .rom.data.str1.1 +.LC10: + .string "*" +.LC11: + .string "%s%08x\r\n" +.LC12: + .string " " + .section .rom.text + .type wait_ap_started, @function +wait_ap_started: + pushl %ebp + movl $51, %edx + movl %esp, %ebp + pushl %esi + pushl %ebx + movl 8(%ebp), %ebx + movl %ebx, %eax + call wait_cpu_state + testl %eax, %eax + movl %eax, %esi + je .L548 + movl %ebx, %edx + movl $.LC10, %eax + call print_initcpu8_nocr + pushl %esi + pushl $.LC10 + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret +.L548: + leal -8(%ebp), %esp + movl %ebx, %edx + popl %ebx + movl $.LC12, %eax + popl %esi + popl %ebp + jmp print_initcpu8_nocr + .size wait_ap_started, .-wait_ap_started + .section .rom.data.str1.1 +.LC13: + .string "%s%02x\r\n" + .section .rom.text + .type print_initcpu8, @function +print_initcpu8: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC13 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_initcpu8, .-print_initcpu8 + .type print_debug_pcar, @function +print_debug_pcar: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_debug_pcar, .-print_debug_pcar + .type print_debug_cp_run, @function +print_debug_cp_run: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_debug_cp_run, .-print_debug_cp_run + .section .rom.data.str1.1 +.LC14: + .string "mcp55_num:" + .section .rom.text + .type mcp55_early_setup_x, @function +mcp55_early_setup_x: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + xorl %esi, %esi + pushl %ebx + xorl %ebx, %ebx + subl $112, %esp + pushl $16 + pushl $C.178.6378 + leal -76(%ebp), %eax + pushl %eax + call memcpy + addl $16, %esp +.L559: + xorl %ecx, %ecx +.L560: + movl %ebx, %eax + movl $3320, %edx + sall $20, %eax + movl %eax, -112(%ebp) + movl %ecx, %eax + andl $31, %eax + sall $15, %eax + orl %eax, -112(%ebp) + shrl $4, -112(%ebp) + orl $-2147483648, -112(%ebp) + movl -112(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57217246, %eax + jne .L561 + movl %ebx, -28(%ebp) + movl %ecx, -44(%ebp) + movl %edi, -60(%ebp) + movl $1, -108(%ebp) + jmp .L563 +.L561: + incl %ecx + cmpl $32, %ecx + jne .L560 + incl %esi + addl $64, %ebx + addl $16384, %edi + cmpl $4, %esi + jne .L559 + movl $0, -108(%ebp) +.L563: + pushl %ebx + xorl %ebx, %ebx + pushl $.LC14 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl -108(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L566 +.L567: + movl -28(%ebp,%ebx,4), %ecx + movl $9, %edx + movl -44(%ebp,%ebx,4), %eax + pushl -60(%ebp,%ebx,4) + incl %ebx + andl $4095, %ecx + andl $31, %eax + sall $15, %eax + sall $20, %ecx + orl %eax, %ecx + movl $ctrl_devport_conf.6223, %eax + call setup_resource_map_offset + popl %ecx +.L566: + cmpl -108(%ebp), %ebx + jne .L567 + movl $0, -104(%ebp) + jmp .L569 +.L570: + movl -104(%ebp), %eax + movl -60(%ebp,%eax,4), %edx + movl -76(%ebp,%eax,4), %esi + movl -44(%ebp,%eax,4), %eax + movl %edx, -100(%ebp) + addl $10240, %edx + movl %edx, -88(%ebp) + movl -104(%ebp), %edx + movl %eax, %ebx + incl %ebx + movl %eax, -84(%ebp) + andl $31, %ebx + movl -28(%ebp,%edx,4), %edx + sall $15, %ebx + movl %edx, -80(%ebp) + sall $20, %edx + movl %edx, %eax + orb $16, %ah + orl %eax, %ebx + shrl $4, %ebx + orl $-2147483420, %ebx + movl %edx, -92(%ebp) + movl %ebx, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1008, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edi, %edi + movl $0, -96(%ebp) +.L571: + movl -88(%ebp), %ecx + leal 204(%ecx), %edx +#APP + inl %dx, %eax +#NO_APP + andb $249, %ah + orl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 48(%ecx), %edx +#APP + inl %dx, %eax +#NO_APP + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP +.L572: +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L572 + incl -96(%ebp) + addl $512, %edi + cmpl $3, -96(%ebp) + jne .L571 + movl -88(%ebp), %edx + addw $204, %dx +#APP + inl %dx, %eax +#NO_APP + andl $-369, %eax + orb $1, %ah + sall $4, %esi + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edx, %edx +.L575: + movb $1, %al +#APP + outb %al, $128 +#NO_APP + incl %edx + cmpl $32768, %edx + jne .L575 + movl $3320, %edi + movl %ebx, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1009, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edx, %edx +.L577: + movb $-24, %al +#APP + outb %al, $128 +#NO_APP + incl %edx + cmpl $32768, %edx + jne .L577 + movl -84(%ebp), %ebx + movw $160, %dx + movl $ctrl_conf_1.6320, %eax + pushl -100(%ebp) + xorl %esi, %esi + andl $31, %ebx + sall $15, %ebx + orl -92(%ebp), %ebx + movl %ebx, %ecx + call setup_resource_map_x_offset + popl %edx +.L579: + movl %esi, %ecx + movl $ctrl_conf_1_1.6321, %eax + pushl -100(%ebp) + andl $7, %ecx + sall $12, %ecx + movl $36, %edx + orl %ebx, %ecx + incl %esi + call setup_resource_map_x_offset + cmpl $3, %esi + popl %eax + jne .L579 + cmpl $0, -80(%ebp) + jne .L581 + pushl -100(%ebp) + movl $ctrl_conf_mcp55_only.6322, %eax + movl %ebx, %ecx + movl $132, %edx + call setup_resource_map_x_offset + cmpl $1, -108(%ebp) + popl %eax + jbe .L581 + pushl -100(%ebp) + movl $ctrl_conf_master_only.6323, %eax + movl %ebx, %ecx + movl $8, %edx + call setup_resource_map_x_offset + popl %eax +.L581: + pushl -100(%ebp) + movl $ctrl_conf_2.6324, %eax + movl %ebx, %ecx + movl $28, %edx + call setup_resource_map_x_offset + incl -104(%ebp) + popl %eax +.L569: + movl -108(%ebp), %eax + cmpl %eax, -104(%ebp) + jne .L570 + xorl %ebx, %ebx + jmp .L585 +.L586: + movl -28(%ebp,%ebx,4), %ecx + movl $9, %edx + movl -44(%ebp,%ebx,4), %eax + pushl -60(%ebp,%ebx,4) + incl %ebx + andl $4095, %ecx + andl $31, %eax + sall $15, %eax + sall $20, %ecx + orl %eax, %ecx + movl $ctrl_devport_conf_clear.6248, %eax + call setup_resource_map_offset + popl %eax +.L585: + cmpl -108(%ebp), %ebx + jne .L586 + leal -12(%ebp), %esp + xorl %eax, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size mcp55_early_setup_x, .-mcp55_early_setup_x + .section .rom.data.str1.1 +.LC15: + .string "No memory!!\r\n" + .section .rom.text +.globl sdram_no_memory + .type sdram_no_memory, @function +sdram_no_memory: + pushl %ebp + movl %esp, %ebp + subl $12, %esp + pushl $.LC15 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L604: +#APP + hlt +#NO_APP + jmp .L604 + .size sdram_no_memory, .-sdram_no_memory + .type print_debug_sdram_8, @function +print_debug_sdram_8: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %edx, %ebx + subl $8, %esp + pushl %eax + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + movl -4(%ebp), %ebx + leave + ret + .size print_debug_sdram_8, .-print_debug_sdram_8 + .section .rom.data.str1.1 +.LC16: + .string " CTLRMaxDelay=%02x" + .section .rom.text + .type train_DqsRcvrEn, @function +train_DqsRcvrEn: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + pushl %ebx + subl $380, %esp + movl (%eax), %eax + movl %edx, -380(%ebp) + movl %ecx, -384(%ebp) + movl %eax, %edx + imull $48, %eax, %eax + sall $4, %edx + leal 1304(%ecx,%edx), %edx + movl %edx, -320(%ebp) + movb 51(%eax,%ecx), %al + cmpl $1, -380(%ebp) + movb %al, -305(%ebp) + movzbl %al, %eax + movl %eax, -376(%ebp) + jne .L609 + movl $1, %ebx +.L611: + movl 12(%edi), %eax + movl %ebx, %ecx + movl $152, %edx + pushl $0 + call pci_write_config32_index_wait + movl 12(%edi), %eax + leal 32(%ebx), %ecx + pushl $0 + movl $152, %edx + incl %ebx + call pci_write_config32_index_wait + cmpl $4, %ebx + popl %eax + popl %edx + jne .L611 + movb $5, %bl +.L613: + movl 12(%edi), %eax + movl %ebx, %ecx + movl $152, %edx + pushl $791621423 + call pci_write_config32_index_wait + movl 12(%edi), %eax + leal 32(%ebx), %ecx + pushl $791621423 + movl $152, %edx + incl %ebx + call pci_write_config32_index_wait + cmpl $8, %ebx + popl %esi + popl %eax + jne .L613 +.L609: +#APP + movl %cr4, %eax +#NO_APP + orb $2, %ah +#APP + movl %eax, %cr4 +#NO_APP + call set_wrap32dis + movl 12(%edi), %esi + movl $3320, %edx + shrl $4, %esi + movl %esi, %ecx + andl $268435452, %ecx + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -296(%ebp) + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -296(%ebp), %eax + movl %ebx, %edx + andl $-524289, %eax +#APP + outl %eax, %dx +#NO_APP + cmpl $1, -380(%ebp) + jne .L614 + movl %esi, %ecx + movb $-8, %dl + andl $268435452, %ecx + orl $-2147483528, %ecx + movl %ecx, -388(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + movl -388(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $262144, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP +.L614: + movl %esi, %eax + movl $3320, %edx + andl $268435452, %eax + orl $-2147483500, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl $-1073676222, %ecx + andl $7, %ebx +#APP + rdmsr +#NO_APP + andl $63, %eax + shrl %eax + cmpl $12, %eax + jle .L616 + movzwl T1000_a.5177(%ebx,%ebx), %eax + jmp .L618 +.L616: + leal (%ebx,%eax,4), %eax + movzwl TT_a.5178(%eax,%eax), %eax +.L618: + leal -268(%ebp), %ecx + xorl %edx, %edx + andl $-16, %ecx + movzwl %ax, %eax + movl %ecx, -312(%ebp) + subl $-128, %ecx + cmpl $1, -380(%ebp) + movl %eax, -336(%ebp) + movl %ecx, -316(%ebp) + jne .L623 +.L621: + movl TestPattern0.5212(,%edx,4), %eax + movl -312(%ebp), %ecx + movl %eax, (%ecx,%edx,4) + movl TestPattern1.5213(,%edx,4), %eax + movl %eax, 128(%ecx,%edx,4) + incl %edx + cmpl $16, %edx + je .L622 + jmp .L621 +.L623: + movl TestPattern2.5214(,%edx,4), %eax + movl -312(%ebp), %ecx + movl %eax, (%ecx,%edx,4) + movl %eax, 128(%ecx,%edx,4) + incl %edx + cmpl $16, %edx + jne .L623 +.L622: + imull $48, (%edi), %eax + movl -384(%ebp), %edx + movl $0, -372(%ebp) + movl 8(%eax,%edx), %eax + testb $15, %al + jne .L626 + testb $-16, %al + setne %al + movzbl %al, %eax + movl %eax, -372(%ebp) +.L626: + movl -372(%ebp), %ecx + movl $0, -328(%ebp) + movl $0, -332(%ebp) + movl $0, -292(%ebp) + sall $3, %ecx + movl %ecx, -300(%ebp) + movl $0, -364(%ebp) + jmp .L627 +.L628: + movl -324(%ebp), %eax + shrl %eax + cmpb $0, -305(%ebp) + leal (%eax,%eax,2), %eax + leal 16(%eax), %edx + movl %edx, -368(%ebp) + je .L629 + cmpl $0, -372(%ebp) + je .L631 + movl 12(%edi), %eax + movl %edx, %ecx + movl $152, %edx + call pci_read_config32_index_wait + andl $255, %eax + movl %eax, -364(%ebp) + jmp .L631 +.L629: + cmpl $0, -372(%ebp) + je .L631 + addl $48, %eax + movl %eax, -368(%ebp) +.L631: + movl (%edi), %eax + movl -324(%ebp), %ecx + movl -384(%ebp), %edx + leal 0(,%eax,8), %ebx + leal (%ebx,%ecx), %eax + testb $1, 728(%edx,%eax,4) + je .L634 + pushl %edx + movl -372(%ebp), %edx + movl %edi, %eax + call Get_RcvrSysAddr + movl -384(%ebp), %edx + popl %ecx + movl -304(%ebp), %ecx + movl %eax, -356(%ebp) + addl $16384, %eax + movl %eax, -288(%ebp) + leal (%ebx,%ecx), %eax + testb $1, 728(%edx,%eax,4) + je .L636 + pushl %edx + movl -372(%ebp), %edx + movl %edi, %eax + call Get_RcvrSysAddr + movl -312(%ebp), %ecx + popl %edx + xorl %edx, %edx + pushl -316(%ebp) + movl %eax, -360(%ebp) + addl $16384, %eax + movl %eax, -292(%ebp) + movl -356(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + movl $1, %edx + pushl -316(%ebp) + movl -288(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + xorl %edx, %edx + pushl -316(%ebp) + movl -360(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + movl $1, %edx + pushl -316(%ebp) + movl -292(%ebp), %eax + call Write1LTestPattern + addl $16, %esp + movl $1, -344(%ebp) +.L638: + xorl %esi, %esi + cmpl $1, -380(%ebp) + je .L641 + movl -320(%ebp), %eax + movl -300(%ebp), %ecx + addl -304(%ebp), %eax + movzbl -1(%ecx,%eax), %esi +.L641: + movl $1, -340(%ebp) + jmp .L642 +.L643: + testl $1, %esi + movl $1, -348(%ebp) + movl $0, -352(%ebp) + jne .L646 + movl $0, -348(%ebp) + movl $1, -352(%ebp) +.L646: + movl 12(%edi), %eax + movl $152, %edx + movl -368(%ebp), %ecx + pushl %esi + call pci_write_config32_index_wait + cmpb $0, -305(%ebp) + popl %eax + je .L647 + movl -368(%ebp), %ecx + movl $152, %edx + movl 12(%edi), %eax + pushl %esi + addl $32, %ecx + call pci_write_config32_index_wait + popl %eax +.L647: + movl %esi, %edx + movl %edi, %eax + call SetMaxAL_RcvrDly + movl -356(%ebp), %eax + call Read1LTestPattern + movl -348(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -356(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5214 + pushl $TestPattern1.5213 + pushl $TestPattern0.5212 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -356(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + movl -288(%ebp), %eax + call Read1LTestPattern + movl -352(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -288(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5214 + pushl $TestPattern1.5213 + pushl $TestPattern0.5212 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -288(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + cmpl $0, -344(%ebp) + je .L652 + movl -360(%ebp), %eax + call Read1LTestPattern + movl -348(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -360(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5214 + pushl $TestPattern1.5213 + pushl $TestPattern0.5212 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -360(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + movl -292(%ebp), %eax + call Read1LTestPattern + movl -352(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -292(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5214 + pushl $TestPattern1.5213 + pushl $TestPattern0.5212 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -292(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + je .L652 +.L649: + movl $1, -340(%ebp) +.L655: + movl -288(%ebp), %eax + incl %esi + movl -356(%ebp), %edx + movl -360(%ebp), %ecx + movl %eax, -356(%ebp) + movl -292(%ebp), %eax + movl %edx, -288(%ebp) + movl %ecx, -292(%ebp) + movl %eax, -360(%ebp) +.L642: + cmpl $174, %esi + jbe .L643 + jmp .L684 +.L657: + cmpl $174, %esi + jbe .L658 +.L659: + orl $13, -328(%ebp) + movl $174, %esi +.L658: + cmpl $2, -380(%ebp) + jne .L660 + movl -320(%ebp), %eax + movl -300(%ebp), %edx + addl -304(%ebp), %eax + movzbl -1(%edx,%eax), %eax + addl %eax, %esi + shrl %esi +.L660: + movl -320(%ebp), %eax + movl %esi, %ecx + movl -300(%ebp), %edx + addl -304(%ebp), %eax + movb %cl, -1(%edx,%eax) + movl 12(%edi), %eax + movl $152, %edx + movl -368(%ebp), %ecx + pushl %esi + call pci_write_config32_index_wait + cmpb $0, -305(%ebp) + popl %eax + je .L662 + movl -368(%ebp), %ecx + movl $152, %edx + movl 12(%edi), %eax + pushl %esi + addl $32, %ecx + call pci_write_config32_index_wait + cmpl $0, -372(%ebp) + popl %ebx + je .L662 + movl 12(%edi), %eax + movl $152, %edx + pushl -364(%ebp) + movl -368(%ebp), %ecx + call pci_write_config32_index_wait + cmpl -364(%ebp), %esi + popl %ecx + jbe .L665 + movl %esi, %eax + subl -364(%ebp), %eax + jmp .L667 +.L665: + movl -364(%ebp), %eax + subl %esi, %eax +.L667: + imull $50, %eax, %eax + cmpl -336(%ebp), %eax + jbe .L662 + orl $12, -328(%ebp) +.L662: + cmpl -332(%ebp), %esi + jbe .L634 + movl %esi, -332(%ebp) +.L634: + addl $2, -324(%ebp) + addl $2, -304(%ebp) +.L670: + cmpl $7, -324(%ebp) + ja .L672 + cmpl $0, -328(%ebp) + je .L628 +.L672: + incl -372(%ebp) + addl $8, -300(%ebp) +.L627: + cmpl $1, -372(%ebp) + ja .L673 + cmpl $0, -328(%ebp) + jne .L673 + movl $0, -324(%ebp) + movl $1, -304(%ebp) + jmp .L670 +.L673: + movl -332(%ebp), %edx + movl %edi, %eax + call SetMaxAL_RcvrDly + movl %edi, %eax + call ResetDCTWrPtr + movl 12(%edi), %ebx + movl $3320, %edx + shrl $4, %ebx + movl %ebx, %ecx + andl $268435452, %ecx + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $524288, -296(%ebp) + andl $-524289, %edi + orl -296(%ebp), %edi + movl %esi, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + cmpl $1, -380(%ebp) + jne .L675 + andl $268435452, %ebx + movl $3320, %edi + orl $-2147483528, %ebx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-262145, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L675 +.L636: + pushl -316(%ebp) + xorl %edx, %edx + movl -312(%ebp), %ecx + movl -356(%ebp), %eax + call Write1LTestPattern + movl -288(%ebp), %eax + movl $1, %edx + pushl -316(%ebp) + movl -312(%ebp), %ecx + call Write1LTestPattern + popl %eax + popl %edx + movl $0, -344(%ebp) + jmp .L638 +.L652: + cmpl $1, -340(%ebp) + je .L657 + movl $0, -340(%ebp) + jmp .L655 +.L684: + movl $11, -328(%ebp) + jmp .L659 +.L675: + call clear_wrap32dis +#APP + movl %cr4, %eax +#NO_APP + andb $253, %ah +#APP + movl %eax, %cr4 +#NO_APP + pushl %esi + pushl -332(%ebp) + pushl $.LC16 + pushl $7 + call do_printk + addl $16, %esp + xorl %eax, %eax + cmpl $174, -332(%ebp) + sete %al + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size train_DqsRcvrEn, .-train_DqsRcvrEn + .section .rom.data.str1.1 +.LC17: + .string "disabling dimm" + .section .rom.text + .type disable_dimm, @function +disable_dimm: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + subl $16, %esp + pushl $.LC17 + pushl $.LC5 + pushl $7 + movl %edx, -20(%ebp) + movl %ecx, -24(%ebp) + call do_printk + addl $12, %esp + pushl -20(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl -24(%ebp), %eax + addl $16, %esp + movl (%eax), %eax + testb $15, %al + movl %eax, -16(%ebp) + jne .L686 + testb $-16, %al + je .L686 + movl -20(%ebp), %esi + movl 12(%ebx), %edi + movl $3320, %ebx + movl %ebx, %edx + addl %esi, %esi + shrl $4, %edi + leal 80(,%esi,4), %eax + orl %edi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal 84(,%esi,4), %esi + orl %esi, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax + jmp .L692 +.L686: + movl 12(%ebx), %esi + movl $3320, %ebx + movl -20(%ebp), %ecx + movl %ebx, %edx + shrl $4, %esi + leal 64(,%ecx,8), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -20(%ebp), %edi + movl %ebx, %edx + addl %edi, %edi + leal 68(,%edi,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + imull $5, -20(%ebp), %eax + movl -24(%ebp), %ecx + cmpb $4, 8(%eax,%ecx) + jne .L689 + leal 80(,%edi,4), %eax + movl %ebx, %edx + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal 84(,%edi,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +.L692: + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP +.L689: + movb -20(%ebp), %cl + movl $-2, %eax + movl -24(%ebp), %edx + roll %cl, %eax + andl -16(%ebp), %eax + movl %eax, (%edx) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size disable_dimm, .-disable_dimm + .type print_raminit, @function +print_raminit: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_raminit, .-print_raminit + .type print_linkn_in, @function +print_linkn_in: + pushl %ebp + movzbl %dl, %edx + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC13 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_linkn_in, .-print_linkn_in + .section .rom.data.str1.1 +.LC18: + .string "SBLink=" +.LC19: + .string "NC node|link=" +.LC20: + .string "\tbusn=" +.LC21: + .string "Detected error on Hypertransport Link\n" +.LC22: + .string "udev=" +.LC23: + .string "%08x" +.LC24: + .string "\tupos=" +.LC25: + .string "\tuoffs=" +.LC26: + .string "\tHT link capability not found\r\n" + .section .rom.text + .type ht_setup_chains_x, @function +ht_setup_chains_x: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl $3320, %esi + pushl %ebx + subl $188, %esp + movl %eax, -176(%ebp) + call get_nodes + movl %esi, %edx + movb %al, -137(%ebp) + movl $-2147434396, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl $.LC18, %eax + shrl $8, %ebx + movl %ebx, %edx + andl $3, %ebx + andl $3, %edx + call print_linkn_in + movl -176(%ebp), %eax + movzbl -137(%ebp), %edx + movl %ebx, 1832(%eax) + movl %edx, 1432(%eax) + movl $0, 1836(%eax) + movl $-2147434016, %eax + movl %edx, -172(%ebp) + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + movl %edi, %edx + sall $8, %eax + orl $1056964611, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434044, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + sall $4, %ebx + movl %edi, %edx + orb $48, %bh + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434048, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $51, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $228, %edi + movl $204, %esi +.L698: + movl %edi, %eax + movl $3320, %ebx + andl $2147483644, %eax + movl %ebx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ebx, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + leal -4(%esi), %eax + movl %ebx, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $4, %edi + addl $8, %esi + cmpl $240, %edi + jne .L698 + movb $64, -138(%ebp) + movl $4, -136(%ebp) + movl $0, -48(%ebp) + jmp .L700 +.L701: + movzbl %al, %eax + movl %eax, -32(%ebp) + addl $24, %eax + andl $31, %eax + sall $15, %eax + movl %eax, -128(%ebp) + movl -136(%ebp), %eax + movl $0, -56(%ebp) + movl $152, -52(%ebp) + sall $12, %eax + addl $12288, %eax + movl %eax, -184(%ebp) +.L702: + movl -128(%ebp), %eax + movl $3320, %edx + shrl $4, %eax + orl -52(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $23, %eax + cmpl $7, %eax + jne .L703 + movb -32(%ebp), %dl + xorl %edi, %edi + movl $224, %ebx + movb -56(%ebp), %al + sall $4, %edx + andl $15, %eax + orl %eax, %edx + movl $.LC19, %eax + movzbl %dl, %edx + call print_linkn_in + movl -56(%ebp), %eax + movl -32(%ebp), %esi + sall $8, %eax + sall $4, %esi + orl $3, %eax + orl %eax, %esi +.L705: + movl %ebx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movzwl %ax,%ecx + movl %eax, %edx + movl %esi, %eax + andl $65535, %eax + cmpl %eax, %ecx + je .L706 + testl %ecx, %ecx + je .L706 + incl %edi + addl $4, %ebx + movl %edi, %edx + cmpb $4, %dl + jne .L705 + jmp .L710 +.L706: + andl $15, %edx + cmpl $3, %edx + je .L703 + movzbl -138(%ebp), %ebx + movl $.LC20, %eax + andl $255, %edi + movl %ebx, %edx + call print_linkn_in + leal 224(,%edi,4), %eax + movl $3320, %ecx + orl $-2147434240, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + addl $63, %ebx + sall $16, %eax + movb $-4, %dl + sall $24, %ebx + orl %ebx, %eax + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 0(,%edi,8), %ebx + movl %ecx, %edx + leal 196(%ebx), %eax + addb $64, -138(%ebp) + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl -56(%ebp), %eax + movb $-4, %dl + sall $4, %eax + orl -32(%ebp), %eax + orl -184(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + leal 192(%ebx), %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl -136(%ebp), %eax + movb $-4, %dl + sall $12, %eax + orl $3, %eax +#APP + outl %eax, %dx +#NO_APP + addl $4, -136(%ebp) + addl $16384, -184(%ebp) +.L703: + incl -56(%ebp) + addl $32, -52(%ebp) + cmpl $3, -56(%ebp) + jne .L702 +.L710: + incl -48(%ebp) +.L700: + movl -172(%ebp), %ebx + cmpl %ebx, -48(%ebp) + movb -48(%ebp), %al + jne .L701 + movb $1, -168(%ebp) + jmp .L713 +.L714: + movb -168(%ebp), %al + movl $224, %esi + leal 24(%eax), %ebx + andl $31, %ebx + sall $15, %ebx + orb $16, %bh +.L715: + movl %esi, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %ebx, %edi + movl %ecx, %edx + shrl $4, %edi + movl %eax, -36(%ebp) + movl %edi, %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -36(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $4, %esi + cmpl $240, %esi + jne .L715 + movl $196, %ebx +.L717: + movl %ebx, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -40(%ebp) + movl %edi, %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -40(%ebp), %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + addl $8, %ebx + cmpl $228, %ebx + jne .L717 + movb $-64, %bl +.L719: + movl %ebx, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -44(%ebp) + movl %edi, %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -44(%ebp), %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + addl $8, %ebx + cmpl $224, %ebx + jne .L719 + incb -168(%ebp) +.L713: + movb -137(%ebp), %bl + cmpb %bl, -168(%ebp) + jb .L714 + movb $0, -129(%ebp) + movl $224, %ecx +.L722: + movl %ecx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $15, %eax + cmpl $1, %eax + sbbb $-1, -129(%ebp) + addl $4, %ecx + cmpl $240, %ecx + jne .L722 + movl -176(%ebp), %edx + movzbl -129(%ebp), %eax + movb $0, -121(%ebp) + movl $0, 1820(%edx) + movl %eax, 1824(%edx) + jmp .L726 +.L727: + movzbl -121(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + leal 224(,%eax,4), %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %eax, %edi + andl $240, %eax + andl $3840, %edi + shrl $4, %eax + addl $24, %eax + movl %eax, %edx + andl $31, %edx + sall $15, %edx + shrl $3, %edi + movl %edx, -96(%ebp) + shrl $4, %edx + movl %edx, -196(%ebp) + leal 148(%edi), %edx + orl %edx, -196(%ebp) + movl %ecx, %edx + orl $-2147483648, -196(%ebp) + movl -196(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -192(%ebp) + movl %ecx, %edx + movl -196(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ebx, %edx + andl $-16776961, -192(%ebp) + xorw %ax, %ax + shrl $8, %eax + orl %eax, -192(%ebp) + movl -192(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $16711680, %esi + movl %esi, %ebx + shrl $16, %ebx + leal -128(%edi), %esi + movb %bl, -120(%ebp) + movb $0, -88(%ebp) + movl $67504394, -92(%ebp) + jmp .L768 +.L729: + movzbl -25(%ebp), %esi + movl %edi, %eax + movl %ecx, -96(%ebp) + movb %al, -88(%ebp) +.L768: + movl %esi, %edx + movl -96(%ebp), %ebx + movzbl %dl, %edx + movl %edx, -60(%ebp) + movl -92(%ebp), %edx + shrl $4, %ebx + shrl $24, %edx + addl -60(%ebp), %edx + orl %edx, %ebx + movl $3320, %edx + movl %ebx, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + andl $2, %eax + leal 3324(%eax), %ebx + movl %ebx, %edx +#APP + inw %dx, %ax +#NO_APP + movzwl %ax, %edx + movl %eax, %edi + testb $64, %dl + jne .L730 + andl $272, %edx + je .L732 + movl %ecx, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + orw $272, %di + movl %ebx, %edx + movzwl %di, %eax +#APP + outw %ax, %dx +#NO_APP + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + testl $272, %edi + je .L732 + pushl %ebx + pushl $.LC21 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp + jmp .L735 +.L732: + testw $32, %di + je .L768 +.L735: + movzbl -120(%ebp), %ebx + movl $3320, %edx + sall $20, %ebx + movl %ebx, -64(%ebp) + shrl $4, %ebx + movl %ebx, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edx + leal -1(%eax), %eax + cmpl $-3, %eax + ja .L730 + cmpl $65535, %edx + je .L730 + cmpl $-65536, %edx + je .L730 + movl -64(%ebp), %eax + call ht_lookup_slave_capability + testb %al, %al + movb %al, -25(%ebp) + jne .L738 + pushl %ecx + pushl $.LC22 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -96(%ebp) + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC24 + pushl $.LC5 + pushl $3 + call do_printk + movl %esi, %edx + addl $12, %esp + movzbl %dl, %eax + pushl %eax + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC25 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -92(%ebp) + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC26 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp + jmp .L730 +.L738: + movzbl -25(%ebp), %eax + movl %ebx, %edi + movl $3320, %ebx + movl %ebx, %edx + movl %eax, %esi + addl $2, %esi + orl %esi, %edi + movl %edi, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %eax, -180(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx + andl $2, %edx + addw $3324, %dx + movw %dx, -186(%ebp) +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + movb -88(%ebp), %al + movl %ebx, %edx + andl $-32, %edi + andl $31, %eax + orl %eax, %edi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movzwl %di, %eax + movw -186(%ebp), %dx +#APP + outw %ax, %dx +#NO_APP + movb -88(%ebp), %cl + shrw $5, %di + movb -88(%ebp), %dl + movl %edi, %eax + andl $31, %eax + andl $31, %ecx + sall $15, %ecx + orl -64(%ebp), %ecx + leal (%edx,%eax), %edi + movl %ebx, %edx + movl %ecx, %eax + shrl $4, %eax + orl %esi, %eax + movl %eax, -192(%ebp) + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -192(%ebp), %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + movl -176(%ebp), %ebx + testb $4, %ah + movl 1820(%ebx), %eax + je .L740 + imull $24, %eax, %eax + leal 1424(%eax,%ebx), %eax + movl -96(%ebp), %ebx + leal 12(%eax), %edx + movl %ecx, 12(%edx) + movl $134877458, 20(%edx) + movl %ebx, 12(%eax) + movl -60(%ebp), %eax + movl -92(%ebp), %ebx + movl $67505422, -92(%ebp) + movl %eax, 4(%edx) + movl -180(%ebp), %eax + movl %ebx, 8(%edx) + movl %eax, 16(%edx) + movl -176(%ebp), %edx + incl 1820(%edx) +.L742: + movl %edi, %ebx + cmpb %bl, -88(%ebp) + jne .L729 +.L730: + incb -121(%ebp) +.L726: + movb -129(%ebp), %al + cmpb %al, -121(%ebp) + jne .L727 + movl -176(%ebp), %edx + movl 1836(%edx), %ecx + andl $4095, %ecx + sall $20, %ecx + movl %ecx, %ebx + orl $1044480, %ebx + jmp .L744 +.L745: + movl %ecx, %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57217246, %eax + je .L746 + addl $4096, %ecx +.L744: + cmpl %ebx, %ecx + jbe .L745 + orl $-1, %ecx +.L746: + movl -176(%ebp), %ebx + shrl $15, %ecx + andl $31, %ecx + movl %ecx, 1828(%ebx) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L740: + movl -176(%ebp), %edx + imull $24, %eax, %eax + movl -96(%ebp), %ebx + leal 1424(%eax,%edx), %eax + leal 12(%eax), %edx + movl %ebx, 12(%eax) + movl -60(%ebp), %eax + movl -92(%ebp), %ebx + movl %ecx, 12(%edx) + movl $67505422, 20(%edx) + movl %eax, 4(%edx) + movl -180(%ebp), %eax + movl %ebx, 8(%edx) + movl $134877458, -92(%ebp) + movl %eax, 16(%edx) + movl -176(%ebp), %edx + incl 1820(%edx) + jmp .L742 + .size ht_setup_chains_x, .-ht_setup_chains_x + .type die, @function +die: + pushl %ebp + movl %esp, %ebp + subl $12, %esp + pushl %eax + pushl $.LC5 + pushl $0 + call do_printk + addl $16, %esp +.L770: +#APP + hlt +#NO_APP + jmp .L770 + .size die, .-die + .section .rom.data.str1.1 +.LC27: + .string " Unknown\r\n" + .section .rom.text + .type set_TT, @function +set_TT: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + subl $12, %esp + movl 28(%ebp), %esi + cmpl 20(%ebp), %esi + movl %ecx, -16(%ebp) + movl 12(%ebp), %edi + jb .L775 + cmpl 24(%ebp), %esi + jbe .L773 +.L775: + pushl %eax + pushl 32(%ebp) + pushl $.LC5 + pushl $3 + call do_printk + movl $.LC27, %eax + call die + addl $16, %esp +.L773: + movl 12(%ebx), %ebx + movl $3320, %edx + movl -16(%ebp), %eax + movl %ebx, -20(%ebp) + shrl $4, -20(%ebp) + orl %eax, -20(%ebp) + andl $2147483644, -20(%ebp) + orl $-2147483648, -20(%ebp) + movl -20(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movb 8(%ebp), %cl + movb $-8, %dl + sall %cl, %edi + notl %edi + andl %edi, %eax + movl %eax, -24(%ebp) + movl -20(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + subl 16(%ebp), %esi + movl %ebx, %edx + sall %cl, %esi + orl %esi, -24(%ebp) + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size set_TT, .-set_TT + .section .rom.data.str1.1 +.LC28: + .string "No memory?" +.LC29: + .string "RAM: 0x" +.LC30: + .string " KB\r\n" + .section .rom.text + .type set_top_mem, @function +set_top_mem: + pushl %ebp + testl %eax, %eax + movl %esp, %ebp + pushl %esi + movl %edx, %esi + pushl %ebx + movl %eax, %ebx + jne .L778 + movl $.LC28, %eax + call die + pushl %eax + pushl $.LC29 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $0 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC30 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L780 +.L778: + pushl %eax + pushl $.LC29 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC30 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + cmpl $4194304, %ebx + jbe .L781 + movl %ebx, %eax + movl $-1073676259, %ecx + shrl $22, %ebx + sall $10, %eax + movl %ebx, %edx +#APP + wrmsr +#NO_APP + jmp .L783 +.L781: + cmpl $4128767, %ebx + jbe .L780 +.L783: + testl %esi, %esi + movl %esi, %ebx + jne .L780 + movl $4128768, %ebx +.L780: + movl %ebx, %eax + movl $-1073676262, %ecx + shrl $22, %ebx + sall $10, %eax + movl %ebx, %edx +#APP + wrmsr +#NO_APP + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size set_top_mem, .-set_top_mem + .section .rom.data.str1.1 +.LC31: + .string "No memory for this cpu\r\n" +.LC32: + .string "Bad RANK Size --\r\n" +.LC33: + .string "Bad SPD value\r\n" +.LC34: + .string "Registered\r\n" +.LC35: + .string "Unbuffered\r\n" +.LC36: + .string "min_cycle_time to low" +.LC37: + .string "spd_set_dram_timing dimm_err!\n" +.LC38: + .string "TrwtTO" +.LC39: + .string "Twrrd" +.LC40: + .string "Twrwr" +.LC41: + .string "Trdrd" +.LC42: + .string "FourActWindow" +.LC43: + .string "DcqBypassMax" +.LC44: + .string "set_ecc spd_device: 0x%x\n" +.LC45: + .string "RdWrQByp" +.LC46: + .string "Interleaved\r\n" +.LC47: + .string "Unrecoverable error reading SPD data. No qualified DIMMs?" + .section .rom.text + .type sdram_set_spd_registers, @function +sdram_set_spd_registers: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $236, %esp + movl %eax, -200(%ebp) + movl (%eax), %eax + cmpb $0, (%edx,%eax) + je .L1078 + imull $48, %eax, %eax + xorl %ebx, %ebx + xorl %esi, %esi + leal 8(%edx,%eax), %eax + movl %eax, -196(%ebp) +.L790: + movl -200(%ebp), %edx + movw 20(%edx,%esi,2), %ax + testw %ax, %ax + je .L791 + movzwl %ax, %eax + movl $2, %edx + call spd_read_byte + cmpl $8, %eax + jne .L791 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, %ebx +.L791: + movl -200(%ebp), %edx + movw 28(%edx,%esi,2), %ax + testw %ax, %ax + je .L794 + movzwl %ax, %eax + movl $2, %edx + call spd_read_byte + cmpl $8, %eax + jne .L794 + leal 4(%esi), %ecx + movb $1, %al + sall %cl, %eax + orl %eax, %ebx +.L794: + incl %esi + cmpl $4, %esi + jne .L790 + movl -196(%ebp), %ecx + testb %bl, %bl + movl %ebx, (%ecx) + jne .L798 + pushl %eax + pushl $.LC31 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1078 +.L798: + movl %ebx, %eax + shrl $4, %ebx + andl $15, %eax + andl $15, %ebx + cmpl %ebx, %eax + jne .L800 + movl -200(%ebp), %ebx + movl $3320, %edx + movl 16(%ebx), %eax + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + movl $0, -184(%ebp) + jne .L803 + jmp .L800 +.L804: + movb -184(%ebp), %cl + movl $1, %eax + movl -196(%ebp), %ebx + sall %cl, %eax + testl %eax, (%ebx) + je .L805 + movzwl %dx, %edx + movl -184(%ebp), %eax + xorl %edi, %edi + movl %edx, -188(%ebp) + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %eax + movl %eax, -192(%ebp) +.L807: + movzbl addresses.4189(%edi), %ebx + movl -188(%ebp), %eax + movl %ebx, %edx + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + js .L808 + movl -192(%ebp), %eax + movl %ebx, %edx + call spd_read_byte + testl %eax, %eax + js .L808 + cmpl %eax, %esi + jne .L800 + incl %edi + cmpl $24, %edi + jne .L807 +.L805: + incl -184(%ebp) + cmpl $4, -184(%ebp) + je .L812 +.L803: + movl -184(%ebp), %ecx + movl -200(%ebp), %ebx + movw 20(%ebx,%ecx,2), %dx + testw %dx, %dx + jne .L804 +.L812: + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %edi + orl $2304, %edi + shrl $4, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1025, %esi + movl %ebx, %edx + orl $2048, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + movl (%ecx), %eax + movb $1, 43(%ecx) + jmp .L813 +.L800: + movl -196(%ebp), %ebx + movl (%ebx), %ecx + movb $0, 43(%ebx) + movb $0, 44(%ebx) + movl %ecx, %edx + movl %ecx, %eax + shrl $4, %edx + andl $15, %eax + andl $15, %edx + cmpl %edx, %eax + je .L814 + testl %edx, %edx + je .L816 + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %esi + shrl $4, %esi + movl %esi, %ebx + andl $268435452, %ebx + orl $-2147483488, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $16, %edi + movb $-4, %dl + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %ebx + movl %ecx, %edx + andl $268435452, %ebx + orl $-2147483504, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, -248(%ebp) + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -248(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + movb $1, 44(%ecx) + jmp .L816 +.L814: + movl -196(%ebp), %ebx + andb $15, %cl + movl %ecx, (%ebx) +.L816: + movl -196(%ebp), %edx + movl (%edx), %eax +.L813: + movl -196(%ebp), %ecx + movl %eax, (%ecx) + incl %eax + je .L818 + movl $0, -180(%ebp) + movl $2, -48(%ebp) + movl $84, -216(%ebp) + movl $80, -220(%ebp) + movl $68, -224(%ebp) + movl $84, -228(%ebp) + movl $80, -232(%ebp) + movl %ecx, -236(%ebp) +.L820: + movl -180(%ebp), %ebx + movl -200(%ebp), %eax + movl -196(%ebp), %edx + movb -180(%ebp), %cl + movw 20(%eax,%ebx,2), %si + movl (%edx), %ebx + movl $1, %edx + movl %edx, %eax + sall %cl, %eax + testl %eax, %ebx + je .L821 + movzwl %si, %ebx + jmp .L823 +.L821: + movl -180(%ebp), %ecx + addl $4, %ecx + sall %cl, %edx + testl %edx, %ebx + je .L824 + movl -180(%ebp), %eax + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx +.L823: + movl -236(%ebp), %eax + movl -180(%ebp), %ecx + movl -236(%ebp), %edx + addl $4, %eax + movl %eax, -152(%ebp) + movl %ecx, -156(%ebp) + movb $0, 4(%edx) + movl $3, %edx + movb $0, 1(%eax) + movb $0, 2(%eax) + movb $0, 4(%eax) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + testb %al, %al + je .L828 + movl -152(%ebp), %ecx + movl $4, %edx + addb %al, (%ecx) + movb %al, 1(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + testb %al, %al + je .L828 + movl -152(%ebp), %ecx + movl $17, %edx + addb %al, (%ecx) + movb %al, 2(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax + je .L828 +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -152(%ebp), %edx + addb %al, (%edx) + movb %al, 3(%edx) + movl $6, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax + cmpl $72, %eax + je .L836 + cmpl $64, %eax + jne .L828 +.L836: +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -236(%ebp), %ecx + movl $5, %edx + addb 4(%ecx), %al + subl $3, %eax + movb %al, 4(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $7, %eax + cmpl $1, %eax + leal 1(%eax), %edx + jbe .L839 + cmpl $4, %edx + jne .L828 +.L839: + movl -152(%ebp), %eax + movb %dl, 4(%eax) + movl $31, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + cmpl $4, %eax + jg .L841 + addl $8, %eax +.L841: + movl -236(%ebp), %ecx + leal 22(%eax), %edx + movzbl 4(%ecx), %eax + cmpl %eax, %edx + je .L843 + pushl %eax + pushl $.LC32 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L828: + movl $.LC33, %eax + call die +.L826: + movl -152(%ebp), %ebx + movb $0, (%ebx) + movb $0, 1(%ebx) + movb $0, 2(%ebx) + movb $0, 3(%ebx) + movb $0, 4(%ebx) +.L843: + movl -152(%ebp), %eax + movb (%eax), %al + testb %al, %al + movb %al, -173(%ebp) + je .L845 + xorl %ebx, %ebx + cmpb $26, %al + jbe .L849 + movzbl %al, %ecx + movb $1, %bl + subl $8, %ecx + sall %cl, %ebx + orl $1, %ebx +.L849: + movl -152(%ebp), %edx + movb 4(%edx), %dl + movb %dl, -157(%ebp) + xorl %edx, %edx + cmpb $1, -157(%ebp) + jbe .L852 + movzbl -173(%ebp), %ecx + movb $1, %dl + subl $8, %ecx + sall %cl, %edx + orl $1, %edx +.L852: + movl -196(%ebp), %ecx + movb 43(%ecx), %cl + testb %cl, %cl + movb %cl, -158(%ebp) + je .L853 + leal (%ebx,%ebx), %eax + andl $1, %ebx + orl %eax, %ebx + leal (%edx,%edx), %eax + andl $1, %edx + orl %eax, %edx +.L853: + movl %ebx, %esi + movl -196(%ebp), %ebx + movl %edx, %edi + andl $536346625, %esi + andl $536346625, %edi + movl (%ebx), %ebx + movl %ebx, -164(%ebp) + andl $15, %ebx + movl %ebx, -168(%ebp) + jne .L855 + testb $-16, -164(%ebp) + je .L855 + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %ebx + movl -232(%ebp), %eax + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + orl -228(%ebp), %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, %eax + jmp .L1113 +.L855: + movl -200(%ebp), %ecx + movl -180(%ebp), %edx + movl 12(%ecx), %ebx + movl $3320, %ecx + leal 64(,%edx,8), %eax + movl %ecx, %edx + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -224(%ebp), %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + cmpb $4, -157(%ebp) + jne .L858 + movl -220(%ebp), %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + orl -216(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +.L1113: + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP +.L858: + testl %esi, %esi + je .L860 + cmpl $0, -168(%ebp) + jne .L862 + testb $-16, -164(%ebp) + je .L862 + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %edi + orl $2560, %edi + shrl $4, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movb $-8, %dl + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb -180(%ebp), %cl + movl $-1577058304, %eax + movl %ebx, %edx + shrl %cl, %eax + notl %eax + andl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L865 +.L862: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %ecx + shrl $4, %ecx + movl %ecx, %ebx + andl $268435452, %ebx + orl $-2147483512, %ebx + movl %ecx, -172(%ebp) + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movb -180(%ebp), %cl + movl $-1577058304, %edi + movl %edi, %esi + shrl %cl, %esi + notl %esi + andl %esi, %eax + cmpb $4, -157(%ebp) + movl %eax, -240(%ebp) + jne .L866 + movb -48(%ebp), %cl + movl %edi, %eax + shrl %cl, %eax + notl %eax + andl %eax, -240(%ebp) +.L866: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + cmpb $0, -158(%ebp) + je .L860 + movl -172(%ebp), %ebx + movb $-8, %dl + andl $268435452, %ebx + orl $-2147483488, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl %esi, %eax + cmpb $4, -157(%ebp) + movl %eax, -240(%ebp) + jne .L869 + movb -48(%ebp), %cl + shrl %cl, %edi + notl %edi + andl %edi, %eax + movl %eax, -240(%ebp) +.L869: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP +.L860: + cmpl $0, -168(%ebp) + jne .L871 + testb $-16, -164(%ebp) + je .L871 +.L865: + movl -48(%ebp), %edx + movl %edx, -156(%ebp) +.L871: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %esi + orl $2048, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl -156(%ebp), %edi + movl $15, %edx + movl %eax, %ebx + movl %edx, %eax + sall $2, %edi + movl %edi, %ecx + sall %cl, %eax + notl %eax + andl %eax, %ebx + cmpb $4, -157(%ebp) + jne .L873 + leal 8(%edi), %ecx + sall %cl, %edx + notl %edx + andl %edx, %ebx +.L873: + cmpb $26, -173(%ebp) + jbe .L875 + movl -152(%ebp), %eax + movl -152(%ebp), %ecx + movzbl 1(%eax), %eax + movl %eax, -248(%ebp) + movzbl 3(%ecx), %edx + leal (%eax,%eax,2), %eax + movzbl 2(%ecx), %ecx + imull $12, %edx, %edx + leal cs_map_aaa.3871(%eax,%edx), %eax + movzbl -72(%eax,%ecx), %edx + movl %edi, %ecx + movl %edx, %eax + sall %cl, %eax + orl %eax, %ebx + cmpb $4, -157(%ebp) + jne .L875 + leal 8(%edi), %ecx + sall %cl, %edx + orl %edx, %ebx +.L875: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L824: + incl -180(%ebp) + addl $5, -236(%ebp) + addl $8, -232(%ebp) + addl $8, -228(%ebp) + addl $8, -224(%ebp) + addl $8, -220(%ebp) + addl $8, -216(%ebp) + incl -48(%ebp) + cmpl $4, -180(%ebp) + jne .L820 + movl -196(%ebp), %edx + movl (%edx), %eax + incl %eax + je .L818 + xorl %ebx, %ebx + movl $0, -148(%ebp) +.L880: + movl -196(%ebp), %edx + movl -200(%ebp), %ecx + movl (%edx), %esi + movl $1, %edx + movw 20(%ecx,%ebx,2), %ax + movl %edx, %edi + movb %bl, %cl + sall %cl, %edi + testl %edi, %esi + je .L881 + movzwl %ax, %eax + jmp .L883 +.L881: + leal 4(%ebx), %ecx + sall %cl, %edx + testl %edx, %esi + je .L884 + movl -200(%ebp), %edx + movzwl 28(%edx,%ebx,2), %eax +.L883: + movl $20, %edx + call spd_read_byte + testl %eax, %eax + js .L1001 + andl $63, %eax + cmpl $1, %eax + je .L889 + cmpl $16, %eax + jne .L884 +.L889: + orl %edi, -148(%ebp) +.L884: + incl %ebx + cmpl $4, %ebx + jne .L880 + movl -200(%ebp), %ecx + movl 16(%ecx), %eax + movl $3320, %ecx + movl %ecx, %edx + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -200(%ebp), %ebx + movl %ecx, %edx + movl 12(%ebx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -196(%ebp), %ebx + movl %eax, %ecx + andl $-65537, %ecx + movb $1, 41(%ebx) + cmpl $0, -148(%ebp) + jne .L891 + orl $65536, %ecx + movb $0, 41(%ebx) +.L891: + movl -200(%ebp), %edx + movl 12(%edx), %eax + movl $3320, %edx + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + cmpb $0, 41(%edx) + je .L893 + pushl %eax + pushl $.LC34 + jmp .L1114 +.L893: + pushl %eax + pushl $.LC35 +.L1114: + pushl $.LC5 + pushl $7 + call do_printk + movl -196(%ebp), %ecx + addl $16, %esp + movl (%ecx), %eax + incl %eax + je .L818 + movl -200(%ebp), %ebx + movl $3320, %edx + movl 16(%ebx), %eax + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $5, %eax + andl $3, %eax + movzwl min_cycle_times.4294(%eax,%eax), %eax + cmpl $592, %eax + movl %eax, -128(%ebp) + jae .L897 + movl $592, -128(%ebp) +.L897: + movl $3, -132(%ebp) + movl $0, -52(%ebp) +.L898: + movl -196(%ebp), %ecx + movl -52(%ebp), %eax + movl -200(%ebp), %edx + movl (%ecx), %ebx + movb -52(%ebp), %cl + movw 20(%edx,%eax,2), %si + movl $1, %edx + movl %edx, %eax + sall %cl, %eax + testl %eax, %ebx + je .L899 + movzwl %si, %esi + movl %esi, -144(%ebp) + jmp .L901 +.L899: + movl -52(%ebp), %ecx + addl $4, %ecx + sall %cl, %edx + testl %edx, %ebx + je .L902 + movl -52(%ebp), %ebx + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %ebx + movl %ebx, -144(%ebp) +.L901: + movl -144(%ebp), %eax + movl $18, %edx + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + jle .L902 +#APP + bsrl %eax, %edi + jnz 1f + movl $-1, %edi + 1: + +#NO_APP + leal -2(%edi), %ebx + movl $1280, -136(%ebp) + movl $6, -140(%ebp) +.L905: + leal -3(%ebx), %eax + cmpl $3, %eax + ja .L906 + movl %esi, %eax + movb %bl, %cl + sarl %cl, %eax + testb $1, %al + je .L906 + movl %edi, %eax + negl %eax + movzbl latency_indicies.4293+2(%ebx,%eax), %edx + movl -144(%ebp), %eax + call spd_read_byte + testl %eax, %eax + js .L845 + call convert_to_linear + cmpl -128(%ebp), %eax + jb .L906 + cmpl -136(%ebp), %eax + jl .L912 + jne .L906 + cmpl %ebx, -140(%ebp) + jle .L906 +.L912: + movl %eax, -136(%ebp) + movl %ebx, -140(%ebp) +.L906: + cmpl %edi, %ebx + je .L916 + incl %ebx + jmp .L905 +.L916: + cmpl $6, -140(%ebp) + jg .L902 + movl -136(%ebp), %ebx + cmpl %ebx, -128(%ebp) + jae .L919 + movl %ebx, -128(%ebp) +.L919: + movl -132(%ebp), %eax + cmpl %eax, -140(%ebp) + jbe .L902 + movl -140(%ebp), %edx + movl %edx, -132(%ebp) +.L902: + incl -52(%ebp) + cmpl $4, -52(%ebp) + jne .L898 + xorl %edi, %edi +.L922: + movl -196(%ebp), %eax + movl $1, %edx + movl -200(%ebp), %ecx + movl (%eax), %ebx + movl %edx, %eax + movw 20(%ecx,%edi,2), %si + movl %edi, %ecx + sall %cl, %eax + testl %eax, %ebx + je .L923 + movzwl %si, %esi + jmp .L925 +.L923: + leal 4(%edi), %ecx + sall %cl, %edx + testl %edx, %ebx + je .L926 + movl -200(%ebp), %ebx + movzwl 28(%ebx,%edi,2), %esi +.L925: + movl $18, %edx + movl %esi, %eax + call spd_read_byte + cmpl $0, %eax + movl %eax, %edx + jl .L845 + je .L926 +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + xorl %ebx, %ebx + leal -2(%eax), %ecx +.L930: + movl %edx, %eax + sarl %cl, %eax + testb $1, %al + je .L931 + cmpl -132(%ebp), %ecx + je .L933 +.L931: + incl %ebx + cmpl $3, %ebx + je .L934 + incl %ecx + jmp .L930 +.L933: + movzbl latency_indicies.4293(%ebx), %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L845 + call convert_to_linear + cmpl -128(%ebp), %eax + jbe .L926 +.L934: + movl -196(%ebp), %ecx + movl %edi, %edx + movl -200(%ebp), %eax + call disable_dimm + movl -196(%ebp), %edx + movl %eax, (%edx) +.L926: + incl %edi + cmpl $4, %edi + jne .L922 + movl $speed, %edx + jmp .L938 +.L939: + movzwl 24(%edi), %eax + leal 24(%edi), %edx + cmpl %eax, -128(%ebp) + ja .L940 +.L938: + cmpw $0, (%edx) + movl %edx, %edi + jne .L939 + movl $.LC36, %eax + call die +.L940: + movl -200(%ebp), %ecx + movl 12(%ecx), %ebx + orl $2368, %ebx + shrl $4, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, -248(%ebp) + movl $3320, %ebx + movl -248(%ebp), %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-8, %ecx + movl %esi, %edx + orl 8(%edi), %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + pushl %eax + leal 12(%edi), %eax + pushl %eax + pushl $.LC5 + pushl $7 + call do_printk + movl -200(%ebp), %ecx + movl %ebx, %edx + movl 12(%ecx), %eax + orl $2176, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -248(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl -132(%ebp), %eax + andl $-8, %ecx + movl %esi, %edx + decl %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + addl $16, %esp + movl (%ecx), %eax + incl %eax + je .L818 +.L909: + movl 8(%edi), %eax + movl -196(%ebp), %edx + movb %al, 45(%edx) + leal -36(%ebp), %eax + pushl $24 + pushl %edi + pushl %eax + call memcpy + movl 8(%edi), %ebx + movl $-1073676222, %ecx + movzbl -34(%ebp), %esi +#APP + rdmsr +#NO_APP + andl $63, %eax + addl $12, %esp + shrl %eax + cmpl $12, %eax + jle .L943 + movl %esi, %ecx + movzbl %cl, %eax + jmp .L945 +.L943: + cmpl $3, %ebx + jle .L946 + movl %esi, %ebx + movzbl %bl, %eax + jmp .L945 +.L946: + movzbl dv_a.4258(%ebx,%eax,4), %eax +.L945: + movb %al, -34(%ebp) + movl $0, -124(%ebp) + movl $4, -56(%ebp) +.L948: + movl -196(%ebp), %eax + movl $1, %edi + movb -124(%ebp), %cl + movl $1, -240(%ebp) + movl (%eax), %edx + sall %cl, %edi + movl %edx, %esi + andl %edi, %esi + jne .L949 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L951 +.L949: + movl -124(%ebp), %eax + testl %esi, %esi + movl -200(%ebp), %ecx + movzwl 20(%ecx,%eax,2), %ebx + jne .L952 + movb -56(%ebp), %cl + sall %cl, -240(%ebp) + testl %edx, -240(%ebp) + je .L952 + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx +.L952: + movl $41, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + js .L969 + movl $40, %edx + movl %ebx, %eax + call spd_read_byte + movzbl -34(%ebp), %edx + movl %edx, %ebx + sarl $4, %eax + andl $7, %eax + movzbl fraction.4394(%eax), %eax + leal (%eax,%esi,4), %eax + imull $10, %eax, %eax + leal -1(%eax,%edx), %ecx + movl %ecx, %eax + cltd + idivl %ebx + cmpl $10, %eax + movl %eax, %esi + ja .L957 + movl $11, %esi + jmp .L959 +.L957: + xorl %ebx, %ebx + cmpl $26, %eax + ja .L961 +.L959: + movl -200(%ebp), %eax + movl $3320, %edx + movl 12(%eax), %ecx + orl $2176, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $16, %eax + andl $15, %eax + addl $11, %eax + cmpl %esi, %eax + jae .L962 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal -11(%esi), %eax + andl $-983041, %ebx + sall $16, %eax + movb $-4, %dl + orl %eax, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L962 +.L1108: + pushl $5 + movl -196(%ebp), %edx + pushl $2 + movl -124(%ebp), %ecx + pushl $2 + movl -200(%ebp), %eax + pushl $3 + pushl $22 + pushl $28 + pushl $136 + pushl (%edx) + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + movl -196(%ebp), %ecx + movl -124(%ebp), %ebx + movl -200(%ebp), %eax + movl (%ecx), %edx + movzwl 20(%eax,%ebx,2), %esi + testl %edi, %edx + jne .L966 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L966 + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L966: + movl $30, %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L969 + sall $2, %eax + movzbl -34(%ebp), %edx + imull $10, %eax, %eax + movl %edx, %ebx + leal -1(%eax,%edx), %ecx + movl %ecx, %eax + cltd + idivl %ebx + cmpl $4, %eax + movl %eax, %esi + ja .L971 + movl $5, %esi + jmp .L973 +.L971: + xorl %ebx, %ebx + cmpl $18, %eax + ja .L961 +.L973: + movl -200(%ebp), %eax + movl $3320, %edx + movl 12(%eax), %ecx + orl $2176, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $12, %eax + andl $15, %eax + addl $3, %eax + cmpl %esi, %eax + jae .L975 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal -3(%esi), %eax + andb $15, %bh + sall $12, %eax + movb $-4, %dl + orl %eax, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L975 +.L969: + orl $-1, %ebx + jmp .L961 +.L1109: + movl -196(%ebp), %edx + cmpb $0, 43(%edx) + jne .L978 + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + xorl %ecx, %ecx + testb $4, %ah + jne .L981 +.L978: + movl $2, %ecx +.L981: + leal 3(%ecx), %eax + movl -196(%ebp), %ebx + pushl %eax + movl -200(%ebp), %eax + leal 2(%ecx), %edx + movl -124(%ebp), %ecx + pushl %edx + pushl %edx + pushl $1 + pushl $11 + pushl $38 + pushl $136 + pushl (%ebx) + leal -36(%ebp), %esi + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + pushl $6 + movl -196(%ebp), %eax + movl %esi, %edx + pushl $3 + movl -124(%ebp), %ecx + pushl $3 + pushl $3 + pushl $20 + pushl $36 + pushl $136 + pushl (%eax) + movl -200(%ebp), %eax + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + movl -196(%ebp), %ecx + movl -124(%ebp), %ebx + movl -200(%ebp), %eax + movl (%ecx), %edx + movzwl 20(%eax,%ebx,2), %esi + testl %edi, %edx + jne .L984 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L984 + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L984: + movl $12, %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L987 + movl -200(%ebp), %edx + decl %eax + sete %al + movzbl %al, %esi + addl $2, %esi + movl 12(%edx), %ecx + movl $3320, %edx + orl $2240, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + andl $-196609, %ebx + sall $16, %esi + orl %esi, %ebx + cmpl %ebx, %eax + je .L992 + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L992 +.L1110: + movl -124(%ebp), %edx + movl -200(%ebp), %ecx + movl -196(%ebp), %eax + movzwl 20(%ecx,%edx,2), %ebx + movl (%eax), %edx + testl %edi, %edx + jne .L995 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L995 + movl -124(%ebp), %eax + movl $2, %esi + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx + jmp .L998 +.L995: + xorl %esi, %esi +.L998: + movl $13, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L987 +#APP + bsrl %eax, %edx + jnz 1f + movl $-1, %edx + 1: + +#NO_APP + imull $5, -56(%ebp), %eax + movl -196(%ebp), %ecx + movl -200(%ebp), %ebx + movzbl -16(%eax,%ecx), %eax + leal -25(%eax), %edi + movl $6, %eax + subl %edx, %eax + movl $3320, %edx + subl %eax, %edi + movl 12(%ebx), %eax + orl $2240, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -240(%ebp) +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %esi, %edx + movl %eax, %ebx + movzbl %dl, %eax + addl -124(%ebp), %eax + leal (%eax,%eax,2), %eax + leal 20(%eax), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + andl $7, %eax + cmpl %edi, %eax + jae .L951 + movl $3320, %edx + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $7, %eax + movb $-4, %dl + sall %cl, %eax + notl %eax + andl %eax, %ebx + sall %cl, %edi + orl %edi, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L951 +.L961: + pushl %esi + pushl %esi + pushl $.LC37 + pushl $7 + call do_printk + addl $16, %esp + testl %ebx, %ebx + js .L1001 + movl -124(%ebp), %edx + movl -196(%ebp), %ecx + movl -200(%ebp), %eax + call disable_dimm + movl -196(%ebp), %edx + movl %eax, (%edx) +.L951: + incl -124(%ebp) + incl -56(%ebp) + cmpl $4, -124(%ebp) + jne .L948 + movl -196(%ebp), %ecx + movl $2, %esi + movl -196(%ebp), %edi + movl $0, -104(%ebp) + movl $0, -108(%ebp) + movl (%ecx), %ecx + addl $8, %edi + movl $0, -112(%ebp) + movl $0, -116(%ebp) + movl %ecx, -120(%ebp) +.L1004: + movl -200(%ebp), %ebx + movl $1, %edx + leal -2(%esi), %ecx + movw 16(%ebx,%esi,2), %ax + movl %edx, %ebx + sall %cl, %ebx + testl %ebx, -120(%ebp) + je .L1005 + movzwl %ax, %eax + jmp .L1007 +.L1005: + leal 2(%esi), %ecx + sall %cl, %edx + testl %edx, -120(%ebp) + je .L1008 + movl -200(%ebp), %edx + movzwl 24(%edx,%esi,2), %eax +.L1007: + cmpb $1, (%edi) + jne .L1010 + orl %ebx, -112(%ebp) +.L1010: + cmpb $10, -2(%edi) + jne .L1012 + orl %ebx, -116(%ebp) +.L1012: + movl $13, %edx + call spd_read_byte + movb (%edi), %dl + cmpl $4, %eax + jne .L1014 + orl %ebx, -104(%ebp) + cmpb $4, %dl + jne .L1008 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, -104(%ebp) + jmp .L1008 +.L1014: + cmpl $16, %eax + jne .L1008 + orl %ebx, -108(%ebp) + cmpb $4, %dl + jne .L1008 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, -108(%ebp) +.L1008: + incl %esi + addl $5, %edi + cmpl $6, %esi + jne .L1004 + movl -196(%ebp), %ebx + movl -104(%ebp), %eax + movl -112(%ebp), %ecx + movl -108(%ebp), %edx + movl %eax, 24(%ebx) + movl -116(%ebp), %eax + movl %ecx, 32(%ebx) + movl %edx, 28(%ebx) + movl %eax, 36(%ebx) + movzbl -33(%ebp), %eax + leal -36(%ebp), %ebx + pushl %ecx + movl %ebx, %edx + pushl $.LC38 + movl $140, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $9 + pushl $2 + pushl $2 + pushl $7 + pushl $4 + call set_TT + movzbl -32(%ebp), %eax + addl $28, %esp + pushl $.LC39 + movl $140, %ecx + movl %ebx, %edx + pushl %eax + movl -200(%ebp), %eax + pushl $3 + pushl $0 + pushl $0 + pushl $3 + pushl $10 + call set_TT + movzbl -31(%ebp), %eax + addl $28, %esp + pushl $.LC40 + movl $140, %ecx + movl %ebx, %edx + pushl %eax + movl -200(%ebp), %eax + pushl $3 + pushl $1 + pushl $1 + pushl $3 + pushl $12 + call set_TT + movzbl -30(%ebp), %eax + addl $28, %esp + pushl $.LC41 + movl %ebx, %edx + movl $140, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $5 + pushl $2 + pushl $2 + pushl $3 + pushl $14 + call set_TT + movl -196(%ebp), %edx + addl $32, %esp + movl -28(%ebp), %eax + cmpl $0, 36(%edx) + je .L1020 + movzbl faw_1k.4809(%eax), %eax + jmp .L1022 +.L1020: + movzbl faw_2k.4810(%eax), %eax +.L1022: + pushl %edx + movl $148, %ecx + pushl $.LC42 + pushl %eax + movl -200(%ebp), %eax + pushl $20 + pushl $8 + pushl $7 + leal -36(%ebp), %ebx + pushl $15 + movl %ebx, %edx + pushl $28 + call set_TT + movzbl -29(%ebp), %eax + addl $28, %esp + pushl $.LC43 + movl %ebx, %edx + movl $148, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $15 + pushl $0 + pushl $0 + pushl $15 + pushl $24 + call set_TT + movl -200(%ebp), %ecx + movl 12(%ecx), %esi + shrl $4, %esi + movl %esi, %ebx + andl $268435452, %ebx + orl $-2147483500, %ebx + movl %ebx, -244(%ebp) + movl $3320, %ebx + movl -244(%ebp), %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl -244(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-241, %edi + movl %ecx, %edx + orl $192, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -200(%ebp), %edx + movl 16(%edx), %eax + movl %ebx, %edx + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $268435452, %esi + movl %eax, %edi + orl $-2147483504, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + addl $32, %esp + andl $-524289, %ebx + andl $8, %edi + je .L1023 + orl $524288, %ebx +.L1023: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + xorl %esi, %esi + testl $524288, %ebx + movb $1, 42(%edx) + jne .L1028 + jmp .L1115 +.L1080: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-524289, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx +.L1115: + movb $0, 42(%edx) + jmp .L1027 +.L1028: + movl -196(%ebp), %ecx + movl $1, %edx + movl %edx, %eax + movl (%ecx), %edi + movl %esi, %ecx + sall %cl, %eax + testl %eax, %edi + jne .L1029 + leal 4(%esi), %ecx + sall %cl, %edx + testl %edx, %edi + je .L1031 + movl -200(%ebp), %edx + pushl %edi + movzwl 28(%edx,%esi,2), %eax + pushl %eax + pushl $.LC44 + pushl $7 + call do_printk + addl $16, %esp +.L1029: + movl -200(%ebp), %ecx + movl $11, %edx + movzwl 20(%ecx,%esi,2), %eax + call spd_read_byte + testb $2, %al + je .L1080 +.L1031: + incl %esi + cmpl $4, %esi + jne .L1028 +.L1027: + movl -200(%ebp), %ebx + movl $3320, %edx + movl 12(%ebx), %edi + shrl $4, %edi + movl %edi, %esi + andl $268435452, %esi + orl $-2147483504, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + andb $15, %ch + movl 24(%edx), %eax + movl %ebx, %edx + andl $15, %eax + sall $12, %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + cmpb $100, -34(%ebp) + jne .L1034 + movl -196(%ebp), %ecx + cmpb $0, 43(%ecx) + je .L1034 + movl (%ecx), %edx + xorl %ebx, %ebx + xorl %ecx, %ecx + andl $15, %edx +.L1037: + movl %edx, %eax + andl $1, %eax + cmpl $1, %eax + sbbl $-1, %ebx + incl %ecx + cmpl $8, %ecx + je .L1040 + shrl %edx + jmp .L1037 +.L1040: + cmpl $2, %ebx + movl $3, -244(%ebp) + je .L1043 +.L1034: + movl $1, -244(%ebp) +.L1043: + movl $3320, %ecx + movl %esi, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -248(%ebp) + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + sall $4, -244(%ebp) + movl %ebx, %edx + andl $-49, -248(%ebp) + movl -244(%ebp), %eax + orl %eax, -248(%ebp) + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $268435452, %edi + movl %ecx, %edx + orl $-2147483488, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-449, %esi + movl %ebx, %edx + orl $224, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + pushl %ebx + movl -200(%ebp), %eax + movl $160, %ecx + pushl $.LC45 + pushl $2 + pushl $3 + pushl $0 + pushl $0 + pushl $3 + pushl $2 + leal -36(%ebp), %edx + call set_TT + movl -196(%ebp), %ecx + addl $32, %esp + movl (%ecx), %eax + incl %eax + je .L818 + movl -200(%ebp), %eax + xorl %esi, %esi + xorl %edi, %edi + movb 43(%ecx), %bl + movl $0, -84(%ebp) + movl $255, -88(%ebp) + movl 12(%eax), %eax + movb %bl, -97(%ebp) + movl $64, -212(%ebp) + shrl $4, %eax + movl %eax, %ebx + andl $268435452, %ebx + movl %eax, -96(%ebp) + orl $-2147483520, %ebx +.L1045: + movl -96(%ebp), %eax + movl $3320, %edx + orl -212(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1046 + shrl $19, %eax + incl %esi + andl $1023, %eax + cmpl $0, -84(%ebp) + jne .L1048 + movl %eax, -84(%ebp) + jmp .L1050 +.L1048: + cmpl %eax, -84(%ebp) + jne .L1051 +.L1050: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %edi, %ecx + sarl %ecx + sall $2, %ecx + shrl %cl, %eax + andl $15, %eax + cmpl $255, -88(%ebp) + jne .L1052 + movl %eax, -88(%ebp) + jmp .L1046 +.L1052: + cmpl %eax, -88(%ebp) + jne .L1051 +.L1046: + incl %edi + addl $4, -212(%ebp) + cmpl $8, %edi + jne .L1045 +#APP + bsrl %esi, %edi + jnz 1f + movl $-1, %edi + 1: + +#NO_APP + movl $1, %edx + movl %edi, %ecx + movl %edx, %eax + sall %cl, %eax + cmpl %esi, %eax + jne .L1051 + testl %edi, %edi + jle .L1051 + cmpl $3, %edi + jg .L1051 + movl -88(%ebp), %ebx + movl %edx, %esi + movzbl csbase_low_f0_shift.3963(%ebx), %ecx + sall %cl, %esi + cmpb $0, -97(%ebp) + je .L1057 + addl %esi, %esi +.L1057: + movl -84(%ebp), %eax + movl %edi, %ecx + movl $0, -80(%ebp) + movl $1, -92(%ebp) + movl $64, -208(%ebp) + sall %cl, %eax + leal -1(%eax), %ebx + movl %esi, %eax + sall %cl, %eax + subl %esi, %eax + notl %eax + sall $19, %ebx + andl $16352, %eax + orl %eax, %ebx +.L1059: + movl -96(%ebp), %ecx + movl $3320, %edx + orl -208(%ebp), %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1060 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -92(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + testb $1, -80(%ebp) + jne .L1062 + movl -80(%ebp), %eax + movb $-8, %dl + sarl %eax + leal 96(,%eax,4), %eax + orl -96(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1062: + addl %esi, -92(%ebp) +.L1060: + incl -80(%ebp) + addl $4, -208(%ebp) + cmpl $8, -80(%ebp) + jne .L1059 + pushl %ecx + pushl $.LC46 + pushl $.LC5 + pushl $7 + call do_printk + movl -84(%ebp), %ebx + leal 17(%edi), %ecx + addl $16, %esp + sall %cl, %ebx + testl %ebx, %ebx + je .L1051 + jmp .L1065 +.L1116: + movl -200(%ebp), %edx + xorl %edi, %edi + xorl %ebx, %ebx + movl $0, -76(%ebp) + movl $64, -204(%ebp) + movl 12(%edx), %esi + shrl $4, %esi +.L1067: + movl -204(%ebp), %eax + movl $3320, %edx + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + movl %eax, %edx + je .L1068 + cmpl -76(%ebp), %eax + jbe .L1068 + leal 24(%edi), %ecx + movl $1, %eax + sall %cl, %eax + testl %eax, -72(%ebp) + jne .L1068 + movl %edi, %ebx + movl %edx, -76(%ebp) +.L1068: + incl %edi + addl $4, -204(%ebp) + cmpl $8, %edi + jne .L1067 + cmpl $0, -76(%ebp) + je .L1073 + leal 24(%ebx), %eax + movl -76(%ebp), %edi + movl $1, -240(%ebp) + movb %al, %cl + movl -72(%ebp), %eax + sall %cl, -240(%ebp) + orl %eax, -240(%ebp) + movl -240(%ebp), %edx + leal 64(,%ebx,4), %eax + shrl $19, %edi + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + addl %edi, %edx + movl %edx, -72(%ebp) + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + sall $19, -240(%ebp) + movb $-4, %dl + orl $1, -240(%ebp) + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + testb $1, %bl + jne .L1116 + shrl %ebx + movb $-8, %dl + leal 96(,%ebx,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1(%edi), %eax + movb $-4, %dl + sall $19, %eax + orl $16352, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L1116 +.L1073: + movl -72(%ebp), %ebx + sall $17, %ebx +.L1065: + movl -200(%ebp), %edx + pushl (%edx) + pushl %edx + call memory_end_k + addl %eax, %ebx + movl %ebx, -60(%ebp) + movl -200(%ebp), %ebx + leal 0(,%eax,4), %esi + movl -60(%ebp), %edx + xorw %si, %si + orl $3, %esi + movl (%ebx), %ecx + sall $2, %edx + xorw %dx, %dx + leal -65536(%edx), %edi + leal 0(,%ecx,8), %ebx + orl %ecx, %edi + leal 68(%ebx), %eax + addl $64, %ebx + movl %eax, -64(%ebp) + popl %eax + popl %edx + movl %ebx, -68(%ebp) + movl $790528, %ebx +.L1076: + movl -64(%ebp), %eax + movl %ebx, %edx + movl $3320, %ecx + shrl $4, %edx + movl %edx, -244(%ebp) + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -68(%ebp), %eax + movl %ecx, %edx + orl %eax, -244(%ebp) + andl $2147483644, -244(%ebp) + orl $-2147483648, -244(%ebp) + movl -244(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $32768, %ebx + cmpl $1052672, %ebx + jne .L1076 + movl -60(%ebp), %eax + xorl %edx, %edx + call set_top_mem + jmp .L1078 +.L818: + movl $.LC47, %eax + call die + jmp .L1078 +.L808: + movl -196(%ebp), %ecx + movl $-1, (%ecx) + jmp .L818 +.L845: + movl -196(%ebp), %ebx + movl $-1, (%ebx) + jmp .L818 +.L962: + pushl $6 + movl -196(%ebp), %edx + pushl $3 + movl -124(%ebp), %ecx + pushl $3 + movl -200(%ebp), %eax + pushl $3 + pushl $4 + pushl $29 + pushl $136 + pushl (%edx) + leal -36(%ebp), %esi + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1108 + jmp .L961 +.L975: + pushl $6 + movl -196(%ebp), %ecx + pushl $3 + movl -200(%ebp), %eax + pushl $3 + pushl $3 + pushl $8 + pushl $27 + pushl $136 + pushl (%ecx) + movl -124(%ebp), %ecx + leal -36(%ebp), %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1109 + jmp .L961 +.L992: + pushl $3 + movl -196(%ebp), %ebx + pushl $1 + movl -124(%ebp), %ecx + pushl $0 + movl -200(%ebp), %eax + pushl $3 + pushl $8 + pushl $37 + pushl $140 + pushl (%ebx) + leal -36(%ebp), %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1110 + jmp .L961 +.L1001: + movl -196(%ebp), %eax + movl $-1, (%eax) + jmp .L818 +.L1051: + movl $0, -72(%ebp) + jmp .L1116 +.L987: + pushl %eax + pushl %eax + pushl $.LC37 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1001 +.L1078: + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size sdram_set_spd_registers, .-sdram_set_spd_registers + .section .rom.data.str1.1 +.LC48: + .string "Ram1." +.LC49: + .string "Ram2." +.LC50: + .string "Ram3\r\n" +.LC51: + .string "No memory\r\n" +.LC52: + .string "\tdimm_mask = " +.LC53: + .string "\tx4_mask = " +.LC54: + .string "\tx16_mask = " +.LC55: + .string "\tsingle_rank_mask = " +.LC56: + .string "\tODC = " +.LC57: + .string "\tAddr Timing= " +.LC58: + .string "Initializing memory: " +.LC59: + .string "." +.LC60: + .string " failed\r\n" +.LC61: + .string " done\r\n" +.LC62: + .string "WB" +.LC63: + .string "Setting variable MTRR %d, base: %4dMB, range: %4dMB, type %s\r\n" +.LC64: + .string "set DQS timing:RcvrEn:Pass1: " +.LC65: + .string "set DQS timing:DQSPos: " +.LC66: + .string "\r\nDQS Training Rd Wr failed ctrl" +.LC67: + .string "Total DQS Training : tsc " +.LC68: + .string "%s[%02x]=%08x%08x\r\n" +.LC69: + .string "mem_trained[" +.LC70: + .string "]=" +.LC71: + .string "mem trained failed\r\n" +.LC72: + .string "Ram4\r\n" +.LC73: + .string "set DQS timing:RcvrEn:Pass2: " + .section .rom.text +.globl sdram_initialize + .type sdram_initialize, @function +sdram_initialize: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $1356, %esp + movl 12(%ebp), %edi + movl $0, -1356(%ebp) + jmp .L1118 +.L1119: + movl -1356(%ebp), %edx + movl $.LC48, %eax + call print_debug_sdram_8 + movl 4(%edi), %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $285216802, %eax + movl (%edi), %eax + je .L1120 + movl 16(%ebp), %edx + movb $0, (%edx,%eax) + jmp .L1122 +.L1120: + movl 16(%ebp), %ecx + xorl %esi, %esi + movb $1, (%ecx,%eax) + movl 4(%edi), %ebx + movl %ebx, -1352(%ebp) +.L1123: + movl register_values.3726(,%esi,4), %edx + movl -1352(%ebp), %ecx + movl %edx, %eax + andl $255, %edx + xorb %al, %al + leal -786432(%eax,%ecx), %eax + movl $3320, %ecx + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -1364(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl register_values.3726+4(,%esi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -1368(%ebp) + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl register_values.3726+8(,%esi,4), %ecx + movl %ebx, %edx + orl %ecx, -1368(%ebp) + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %esi + cmpl $114, %esi + jne .L1123 +.L1122: + incl -1356(%ebp) + addl $36, %edi +.L1118: + movl 8(%ebp), %ecx + cmpl %ecx, -1356(%ebp) + jl .L1119 + movl 12(%ebp), %ebx + xorl %esi, %esi + jmp .L1125 +.L1126: + movl %esi, %edx + movl $.LC49, %eax + call print_debug_sdram_8 + movl 16(%ebp), %edx + movl %ebx, %eax + incl %esi + addl $36, %ebx + call sdram_set_spd_registers +.L1125: + cmpl 8(%ebp), %esi + jl .L1126 + pushl %ebx + pushl $.LC50 + pushl $.LC5 + pushl $7 + call do_printk + pushl 8(%ebp) + pushl 12(%ebp) + call memory_end_k + addl $24, %esp + testl %eax, %eax + jne .L1128 + movl $.LC51, %eax + call die +.L1128: + movl 12(%ebp), %ebx + movl $0, -1348(%ebp) + addl $12, %ebx + movl %ebx, -1240(%ebp) + jmp .L1130 +.L1131: + movl -1348(%ebp), %esi + movl 16(%ebp), %eax + cmpb $0, (%esi,%eax) + je .L1132 + movl -1240(%ebp), %edx + movl (%edx), %esi + movl $3320, %edx + orl $2368, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + imull $48, -1348(%ebp), %ebx + movl %eax, %ecx + movl 16(%ebp), %edx + cmpl $0, 8(%ebx,%edx) + jne .L1134 + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + orb $64, %ch + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L1132 +.L1134: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + orl $8, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl 16(%ebp), %eax + addl %ebx, %eax + movl 8(%eax), %edx + leal 8(%eax), %esi + movb 45(%esi), %al + movl %edx, %ecx + andl $15, %ecx + cmpb $1, %al + je .L1138 + jb .L1137 + cmpb $2, %al + je .L1139 + cmpb $3, %al + jne .L1332 + jmp .L1140 +.L1137: + cmpl $3, %ecx + jne .L1142 + jmp .L1141 +.L1138: + cmpl $3, %ecx + jne .L1143 + cmpl $0, 24(%esi) + jne .L1141 + movl 28(%esi), %eax + testl %eax, %eax + jne .L1146 + movl 32(%esi), %eax + movl $3419904, %edi + movl $1119010, -1344(%ebp) + testl %eax, %eax + je .L1151 + cmpl $3, %eax + movl $12032, %edi + je .L1151 + movl $3616512, %edi + jmp .L1343 +.L1146: + cmpl $1, %eax + jne .L1153 + cmpl $1, 32(%esi) + jmp .L1348 +.L1153: + cmpl $2, %eax + jne .L1141 + cmpl $2, 32(%esi) +.L1348: + jne .L1141 + jmp .L1155 +.L1143: + cmpl $0, 24(%esi) + jne .L1157 + cmpl $0, 28(%esi) + jne .L1157 + movl 32(%esi), %eax + decl %eax + cmpl $1, %eax + ja .L1157 + jmp .L1142 +.L1139: + cmpl $3, %ecx + movl $2105888, %edi + jne .L1162 + cmpl $0, 24(%esi) + jne .L1163 + movl 28(%esi), %eax + testl %eax, %eax + jne .L1165 + movl 32(%esi), %eax + movl $2826784, %edi + movl $1119010, -1344(%ebp) + testl %eax, %eax + je .L1151 + cmpl $3, %eax + movl $3154464, %edi + je .L1151 + movl $2761248, %edi +.L1343: + movl $1, %ebx + jmp .L1152 +.L1165: + cmpl $1, %eax + jne .L1170 + cmpl $1, 32(%esi) + jmp .L1347 +.L1170: + cmpl $2, %eax + jne .L1163 + cmpl $2, 32(%esi) +.L1347: + jne .L1163 + jmp .L1172 +.L1140: + cmpl $3, %ecx + movl $2106656, %edi + movl $1126946, -1344(%ebp) + jne .L1151 + jmp .L1174 +.L1332: + movl $1118754, -1344(%ebp) + movl $3092224, %edi + xorl %ebx, %ebx +.L1152: + movl $.LC52, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC53, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl -1344(%ebp), %edx + movl $.LC56, %eax + call print_raminit + movl %edi, %edx + movl $.LC57, %eax + call print_raminit + testl %ebx, %ebx + je .L1176 +.L1177: + movl -1240(%ebp), %edx + movl (%edx), %ecx + orl $2368, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, -1364(%ebp) + movl $3320, %ecx + movl -1364(%ebp), %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -1368(%ebp) + movl %ecx, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $1048576, -1368(%ebp) + movl %ebx, %edx + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP +.L1176: + movl (%esi), %eax + testb $15, %al + jne .L1178 + testb $-16, %al + je .L1178 + movl -1240(%ebp), %ebx + movl $32, %ecx + movl $152, %edx + pushl -1344(%ebp) + movl (%ebx), %eax + call pci_write_config32_index_wait + movl $36, %ecx + movl $152, %edx + pushl %edi + movl (%ebx), %eax + call pci_write_config32_index_wait + popl %edx + popl %ecx + jmp .L1132 +.L1178: + movl -1240(%ebp), %ebx + xorl %ecx, %ecx + movl $152, %edx + pushl -1344(%ebp) + movl (%ebx), %eax + call pci_write_config32_index_wait + cmpb $0, 43(%esi) + popl %eax + je .L1181 + pushl -1344(%ebp) + movl $32, %ecx + movl (%ebx), %eax + movl $152, %edx + call pci_write_config32_index_wait + popl %eax +.L1181: + movl -1240(%ebp), %ebx + movl $4, %ecx + movl $152, %edx + pushl %edi + movl (%ebx), %eax + call pci_write_config32_index_wait + cmpb $0, 43(%esi) + popl %eax + je .L1132 + pushl %edi + movl (%ebx), %eax + movl $36, %ecx + movl $152, %edx + call pci_write_config32_index_wait + popl %eax +.L1132: + incl -1348(%ebp) + addl $36, -1240(%ebp) +.L1130: + movl 8(%ebp), %esi + cmpl %esi, -1348(%ebp) + jl .L1131 + movl 12(%ebp), %edi + movl $0, -1236(%ebp) + jmp .L1185 +.L1186: + movl -1236(%ebp), %eax + movl 16(%ebp), %edx + cmpb $0, (%eax,%edx) + je .L1187 + movl 12(%edi), %ecx + movl $3320, %edx + shrl $4, %ecx + movl %ecx, %eax + andl $268435452, %eax + orl $-2147483500, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testb $8, %al + je .L1187 + andl $268435452, %ecx + movb $-8, %dl + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testl $524288, %eax + movl %eax, %ebx + je .L1190 + movl 16(%edi), %eax + movb $-8, %dl + orl $1088, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -1364(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + orl $4194304, %esi + testb $8, %bh + movl %eax, -1368(%ebp) + je .L1192 + movl %eax, %esi + orl $12582912, %esi +.L1192: + movl $3320, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1190: + movl $3320, %esi + movl %ecx, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + orl $1, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1187: + incl -1236(%ebp) + addl $36, %edi +.L1185: + movl 8(%ebp), %ecx + cmpl %ecx, -1236(%ebp) + jl .L1186 + movl 16(%ebp), %ebx + movl 12(%ebp), %edi + movl $0, -1232(%ebp) + addl $8, %ebx + movl %ebx, -1360(%ebp) + jmp .L1195 +.L1196: + movl -1232(%ebp), %esi + movl 16(%ebp), %eax + cmpb $0, (%esi,%eax) + je .L1197 + movl -1360(%ebp), %edx + cmpl $0, (%edx) + je .L1197 + pushl %eax + xorl %ebx, %ebx + pushl $.LC58 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1200: + movl 12(%edi), %eax + movl $3320, %edx + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + incl %ebx + movl %eax, %esi + testl $1023, %ebx + jne .L1201 + pushl %eax + pushl $.LC59 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1201: + andl $1, %esi + je .L1204 + cmpl $299999, %ebx + jg .L1206 + jmp .L1200 +.L1204: + cmpl $299999, %ebx + jle .L1205 +.L1206: + pushl %esi + pushl $.LC60 + jmp .L1344 +.L1205: + movl 12(%edi), %ecx + orb $10, %ch + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx +.L1207: + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1207 + pushl %ebx + pushl $.LC61 +.L1344: + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1197: + incl -1232(%ebp) + addl $36, %edi + addl $48, -1360(%ebp) +.L1195: + movl 8(%ebp), %edx + cmpl %edx, -1232(%ebp) + jl .L1196 + xorl %edi, %edi + movl $0, -1304(%ebp) + jmp .L1210 +.L1211: + movl 12(%ebp), %ebx + leal 64(%edi), %ecx + movl $3320, %edx + movl %ecx, -1332(%ebp) + movl 8(%ebx), %ebx + shrl $4, %ebx + movl %ebx, %eax + orl %ecx, %eax + andl $2147483644, %eax + movl %ebx, -1336(%ebp) + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + andl $3, %eax + cmpl $3, %eax + jne .L1212 + leal 68(%edi), %esi + movb $-8, %dl + movl %esi, -1340(%ebp) + movl -1336(%ebp), %esi + orl -1340(%ebp), %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + xorw %cx, %cx + cmpl $12582912, %ecx + ja .L1212 + addl $65536, %eax + xorw %ax, %ax + cmpl $12582912, %eax + jbe .L1212 + movl 8(%ebp), %ecx + decl %ecx + movl %ecx, %edi + sall $3, %edi + movl %ecx, -1308(%ebp) + jmp .L1215 +.L1216: + movl -1336(%ebp), %eax + leal 64(%edi), %ebx + movl $3320, %edx + movl %ebx, -1316(%ebp) + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + andl $3, %eax + cmpl $3, %eax + jne .L1217 + leal 68(%edi), %eax + movb $-8, %dl + movl %eax, -1320(%ebp) + movl -1336(%ebp), %eax + orl -1320(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + addl $4194304, %ebx + addl $4194304, %eax + movl %ebx, -1328(%ebp) + movl 12(%ebp), %ebx + movl %eax, -1324(%ebp) + movl $0, -1312(%ebp) + addl $8, %ebx + jmp .L1219 +.L1220: + movl -36(%ebx), %ecx + movl -1320(%ebp), %eax + shrl $4, %ecx + orl %ecx, %eax + movl %ecx, -1368(%ebp) + andl $2147483644, %eax + movl $3320, %ecx + orl $-2147483648, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -1324(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -1316(%ebp), %eax + movl %ecx, %edx + orl %eax, -1368(%ebp) + andl $2147483644, -1368(%ebp) + orl $-2147483648, -1368(%ebp) + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl -1328(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + incl -1312(%ebp) +.L1219: + movl 8(%ebp), %ecx + addl $36, %ebx + cmpl %ecx, -1312(%ebp) + jl .L1220 +.L1217: + decl -1308(%ebp) + subl $8, %edi +.L1215: + movl -1304(%ebp), %ebx + cmpl %ebx, -1308(%ebp) + jg .L1216 + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl 12(%ebp), %ecx + leal 4194304(%eax), %esi + xorl %ebx, %ebx + addl $8, %ecx + jmp .L1222 +.L1223: + movl -36(%ecx), %eax + movl $3320, %edx + shrl $4, %eax + orl -1340(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + incl %ebx +.L1222: + addl $36, %ecx + cmpl 8(%ebp), %ebx + jl .L1223 + imull $36, -1304(%ebp), %eax + movl 12(%ebp), %edx + movl 8(%eax,%edx), %ebx + movl $3320, %edx + movl -1332(%ebp), %eax + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + xorw %cx, %cx + shrl $2, %ecx + cmpl $3145728, %ecx + jne .L1225 + movl 12(%ebp), %ebx + movzwl %ax,%ecx + xorl %esi, %esi + orl $16777216, %ecx + addl $8, %ebx + jmp .L1227 +.L1228: + movl -36(%ebx), %eax + movl $3320, %edx + shrl $4, %eax + orl -1332(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + incl %esi +.L1227: + addl $36, %ebx + cmpl 8(%ebp), %esi + jl .L1228 + jmp .L1229 +.L1225: + movl %ebx, %eax + movl $3320, %edx + andl $268435452, %eax + orl $-2147483408, %eax +#APP + outl %eax, %dx +#NO_APP + leal 1048576(%ecx), %eax + movb $-4, %dl + shrl $6, %eax + andl $65280, %eax + subl $1073741823, %eax +#APP + outl %eax, %dx +#NO_APP +.L1229: + pushl 8(%ebp) + pushl 12(%ebp) + call memory_end_k + popl %edx + movl $3145728, %edx + popl %ecx + call set_top_mem + jmp .L1230 +.L1212: + incl -1304(%ebp) + addl $8, %edi +.L1210: + movl 8(%ebp), %edx + cmpl %edx, -1304(%ebp) + jl .L1211 +.L1230: + movl $-1073676262, %ecx +#APP + rdmsr +#NO_APP + movl 16(%ebp), %ecx + sall $24, %edx + shrl $8, %eax + orl %eax, %edx + shrl $2, %edx + movl %edx, 688(%ecx) + movl $-1073676259, %ecx +#APP + rdmsr +#NO_APP + movl 16(%ebp), %ebx + shrl $8, %eax + sall $24, %edx + orl %eax, %edx + shrl $2, %edx + movl %ebx, %eax + movl %edx, 692(%ebx) + addl $8, %eax + xorl %edx, %edx + jmp .L1231 +.L1232: + movl 16(%ebp), %esi + cmpb $0, (%edx,%esi) + movb $0, 680(%edx,%esi) + je .L1233 + cmpl $0, (%eax) + je .L1233 + movb $-128, 680(%edx,%esi) +.L1233: + incl %edx + addl $48, %eax +.L1231: + cmpl 8(%ebp), %edx + jl .L1232 + movl 16(%ebp), %eax + movl $592, %ecx + movl 16(%ebp), %edx + movl 692(%eax), %eax + movl 688(%edx), %ebx + movl %eax, -1300(%ebp) + movl $505290270, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP + movb $88, %cl +#APP + wrmsr +#NO_APP + testl %ebx, %ebx + je .L1237 + jmp .L1334 +.L1239: +#APP + bsfl %edi,%ecx + jnz 1f + movl $32,%ecx +1: + bsrl -1292(%ebp),%eax + jnz 1f + movl $0,%eax +1: +#NO_APP + cmpl %eax, %ecx + jbe .L1240 + movl %eax, %ecx +.L1240: + movl $1, -1296(%ebp) + sall %cl, -1296(%ebp) + pushl %eax + pushl %eax + movl -1296(%ebp), %eax + pushl $.LC62 + shrl $10, %eax + pushl %eax + movl %edi, %eax + shrl $10, %eax + pushl %eax + pushl -1244(%ebp) + pushl $.LC63 + pushl $7 + call do_printk + addl $32, %esp + cmpl $4194303, -1296(%ebp) + ja .L1241 + movl -1296(%ebp), %ebx + movl $255, -1256(%ebp) + sall $10, %ebx + negl %ebx + jmp .L1243 +.L1241: + movl -1296(%ebp), %eax + xorl %ebx, %ebx + shrl $22, %eax + negl %eax + andl $255, %eax + movl %eax, -1256(%ebp) +.L1243: + cmpl $7, -1244(%ebp) + ja .L1244 + cmpl $0, -1296(%ebp) + jne .L1246 + xorl %eax, %eax + movl %esi, %ecx + movl %eax, %edx + jmp .L1345 +.L1246: + movl %edi, %eax + movl %edi, %edx + sall $10, %eax + leal -1(%esi), %ecx + orl $6, %eax + shrl $22, %edx +#APP + wrmsr +#NO_APP + movl -1256(%ebp), %edx + orb $8, %bh + movl %esi, %ecx + movl %ebx, %eax +.L1345: +#APP + wrmsr +#NO_APP +.L1244: + incl -1244(%ebp) + addl $2, %esi + cmpl $8, -1244(%ebp) + je .L1237 + movl -1296(%ebp), %ebx + addl -1296(%ebp), %edi + subl %ebx, -1292(%ebp) + jne .L1239 +.L1237: + cmpl $0, -1300(%ebp) + jne .L1249 +.L1250: + movl 12(%ebp), %esi + movl $0, -1288(%ebp) + movl %esi, -1248(%ebp) + jmp .L1251 +.L1249: + movl $-1073676272, %ecx +#APP + rdmsr +#NO_APP + orl $6291456, %eax +#APP + wrmsr +#NO_APP + jmp .L1250 +.L1252: + movl -1288(%ebp), %eax + movl 16(%ebp), %edx + cmpb $-128, 680(%eax,%edx) + jne .L1253 + movl -1248(%ebp), %ecx + movl -1288(%ebp), %ebx + movl 8(%ecx), %eax + leal 64(,%ebx,8), %edx + shrl $4, %eax + orl %edx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl 16(%ebp), %esi + movl %eax, 696(%esi,%ebx,4) + movl %ebx, %eax + movl $64, %ebx + sall $5, %eax + leal 728(%eax,%esi), %ecx + xorl %esi, %esi +.L1255: + movl -1248(%ebp), %edx + movl 12(%edx), %eax + movl $3320, %edx + shrl $4, %eax + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + incl %esi + addl $4, %ebx + movl %eax, (%ecx) + addl $4, %ecx + cmpl $8, %esi + jne .L1255 + movl -1248(%ebp), %ecx + movb $-8, %dl + movl 8(%ecx), %eax + orb $15, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -1288(%ebp), %ecx + movl 16(%ebp), %ebx + movl %eax, 984(%ebx,%ecx,4) +#APP + rdtsc +#NO_APP + movl %eax, -52(%ebp) + pushl %eax + pushl $.LC64 + pushl $.LC5 + pushl $7 + movl %edx, -48(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl -1248(%ebp), %eax + movl %ebx, %ecx + movl $1, %edx + call train_DqsRcvrEn + addl $16, %esp + testl %eax, %eax + je .L1257 + movl -1288(%ebp), %esi + movb $-127, 680(%esi,%ebx) + jmp .L1259 +.L1257: + pushl %esi + pushl $.LC61 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + addl $12, %esp + pushl $.LC65 + pushl $.LC5 + pushl $7 + movl %edx, -40(%ebp) + movl %eax, -44(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl -1248(%ebp), %edx + movl 16(%ebp), %ecx + movl (%edx), %eax + imull $48, %eax, %edx + imull $36, %eax, %eax + movb 51(%edx,%ecx), %dl + addl $1016, %ecx + addl %ecx, %eax + movl %ecx, -1264(%ebp) + movl %eax, -1272(%ebp) + movb %dl, -1273(%ebp) +#APP + movl %cr4, %eax +#NO_APP + orb $2, %ah +#APP + movl %eax, %cr4 +#NO_APP + call set_wrap32dis + movl -1248(%ebp), %ebx + movl 12(%ebx), %ecx + movl $3320, %ebx + movl %ebx, %edx + orb $9, %ch + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -1284(%ebp) + movl %ebx, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -1284(%ebp), %eax + movb $-4, %dl + andl $-524289, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1204(%ebp), %ecx + addl $16, %esp + andl $-16, %ecx + xorl %edx, %edx + cmpb $0, -1273(%ebp) + movl %ecx, -1280(%ebp) + je .L1265 +.L1262: + movl TestPatternJD1b.5550(,%edx,4), %eax + movl -1280(%ebp), %ebx + movl %eax, (%ebx,%edx,4) + incl %edx + cmpl $288, %edx + jne .L1262 + movl $1, -1268(%ebp) + jmp .L1264 +.L1265: + movl TestPatternJD1a.5549(,%edx,4), %eax + movl -1280(%ebp), %esi + movl %eax, (%esi,%edx,4) + incl %edx + cmpl $144, %edx + jne .L1265 + movl $0, -1268(%ebp) +.L1264: + movl -1248(%ebp), %edx + xorl %ebx, %ebx + movl 16(%ebp), %ecx + imull $48, (%edx), %eax + movl 8(%eax,%ecx), %eax + testb $15, %al + jne .L1269 + xorl %ebx, %ebx + testb $-16, %al + setne %bl +.L1269: + xorl %edi, %edi + jmp .L1319 +.L1271: + xorl %esi, %esi +.L1272: + movl -1248(%ebp), %eax + xorl %ecx, %ecx + movl %ebx, %edx + pushl %esi + call SetDQSDelayAllCSR + movl -1248(%ebp), %eax + movl $1, %ecx + pushl 16(%ebp) + movl %ebx, %edx + pushl -1272(%ebp) + pushl -1280(%ebp) + pushl -1268(%ebp) + call TrainDQSPos + addl $20, %esp + testl %eax, %eax + je .L1273 + incl %esi + orl %eax, %edi + cmpl $48, %esi + je .L1275 + jmp .L1272 +.L1273: + pushl 16(%ebp) + xorl %ecx, %ecx + pushl -1272(%ebp) + movl %ebx, %edx + pushl -1280(%ebp) + pushl -1268(%ebp) + movl -1248(%ebp), %eax + call TrainDQSPos + addl $16, %esp + movl %eax, %edi +.L1275: + cmpb $1, -1273(%ebp) + adcl $1, %ebx +.L1319: + cmpl $1, %ebx + ja .L1278 + testl %edi, %edi + je .L1271 +.L1278: + movl -1248(%ebp), %ebx + movl $3320, %ecx + movl %ecx, %edx + movl 12(%ebx), %esi + orl $2304, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, -1364(%ebp) + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $524288, -1284(%ebp) + andl $-524289, %esi + orl -1284(%ebp), %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + call clear_wrap32dis +#APP + movl %cr4, %eax +#NO_APP + andb $253, %ah +#APP + movl %eax, %cr4 +#NO_APP + testl %edi, %edi + je .L1279 + pushl %ebx + pushl $.LC66 + pushl $.LC5 + pushl $3 + call do_printk + movl -1248(%ebp), %ecx + addl $12, %esp + pushl (%ecx) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $3 + call do_printk + movl -1288(%ebp), %ebx + movl 16(%ebp), %esi + movb $-126, 680(%ebx,%esi) + jmp .L1346 +.L1279: + movl -1248(%ebp), %edx + xorl %edi, %edi + movl $1, -20(%ebp) + movl $0, -16(%ebp) + imull $36, (%edx), %eax + addl -1264(%ebp), %eax + movl %eax, -1260(%ebp) + jmp .L1281 +.L1282: + movl -1252(%ebp), %ecx + movl $4, %edx + movl %edi, %eax + pushl -1260(%ebp) + movl -24(%ebp,%ecx,4), %esi + movl %esi, %ecx + call get_dqs_delay + movl $5, %edx + popl %ecx + movl %esi, %ecx + pushl -1260(%ebp) + movzbl %al, %ebx + movl %edi, %eax + call get_dqs_delay + popl %edx + movzbl %al, %edx + cmpl %edx, %ebx + jbe .L1283 + subl %edx, %ebx + imull $255, %ebx, %eax + shrl $8, %eax + leal (%eax,%edx), %ebx +.L1283: + movl -1248(%ebp), %eax + movl $8, %ecx + movl %edi, %edx + pushl %ebx + pushl %esi + call SetDQSDelayCSR + movzbl %bl, %eax + movl %esi, %ecx + pushl %eax + movl $8, %edx + pushl -1260(%ebp) + movl %edi, %eax + call save_dqs_delay + addl $16, %esp + incl -1252(%ebp) + cmpl $3, -1252(%ebp) + jne .L1282 + incl %edi + cmpl $2, %edi + je .L1339 + jmp .L1281 +.L1287: + movl -1288(%ebp), %ebx + movl 16(%ebp), %esi + movb $-125, 680(%ebx,%esi) + jmp .L1259 +.L1342: + pushl %ecx + pushl $.LC61 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + movl %edx, -24(%ebp) + movl %eax, -28(%ebp) +.L1346: + addl $16, %esp +.L1259: + xorl %ebx, %ebx +.L1289: + leal -52(%ebp), %eax + pushl %edx + pushl %edx + pushl (%eax,%ebx,8) + pushl 4(%eax,%ebx,8) + pushl %ebx + incl %ebx + pushl $.LC67 + pushl $.LC68 + pushl $7 + call do_printk + addl $32, %esp + cmpl $4, %ebx + jne .L1289 + movl -1288(%ebp), %eax + movl 16(%ebp), %edx + cmpb $-128, 680(%eax,%edx) + jne .L1253 + movb $1, 680(%eax,%edx) +.L1253: + incl -1288(%ebp) + addl $36, -1248(%ebp) +.L1251: + movl 8(%ebp), %ecx + cmpl %ecx, -1288(%ebp) + jl .L1252 + movl 16(%ebp), %esi + movl $-1073676272, %ecx + movl 692(%esi), %ebx +#APP + rdmsr +#NO_APP + orl $524288, %eax +#APP + wrmsr +#NO_APP + xorl %eax, %eax + movl $592, %ecx + movl %eax, %edx +#APP + wrmsr +#NO_APP + movb $88, %cl +#APP + wrmsr +#NO_APP + movb $4, %cl +.L1293: + xorl %eax, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP + incl %ecx + cmpl $528, %ecx + jne .L1293 + testl %ebx, %ebx + je .L1295 + movl $-1073676272, %ecx +#APP + rdmsr +#NO_APP + andl $-6291457, %eax +#APP + wrmsr +#NO_APP +.L1295: + movl 16(%ebp), %ecx + xorl %ebx, %ebx + movl 1432(%ecx), %edi + movl $1, %ecx + cmpl $1, %edi + jne .L1299 + jmp .L1297 +.L1300: + movl 16(%ebp), %esi + cmpb $0, 680(%ecx,%esi) + je .L1301 + movl $1, %eax + sall %cl, %eax + orl %eax, %ebx +.L1301: + incl %ecx +.L1299: + cmpl %edi, %ecx + jb .L1300 + movl $1, %ecx +.L1304: + movl $1, %eax + sall %cl, %eax + testl %eax, %ebx + je .L1305 + movl 16(%ebp), %edx + cmpb $-128, 680(%edx,%ecx) + je .L1305 + notl %eax + andl %eax, %ebx +.L1305: + testl %ebx, %ebx + jne .L1308 + xorl %esi, %esi + jmp .L1310 +.L1308: + leal 1(%ecx), %eax + xorl %edx, %edx + divl %edi + movl %edx, %ecx + jmp .L1304 +.L1311: + pushl %edi + pushl $.LC69 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC70 + pushl $.LC5 + pushl $7 + call do_printk + movl 16(%ebp), %ecx + addl $12, %esp + movzbl 680(%ebx,%ecx), %eax + pushl %eax + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl 16(%ebp), %edx + addl $16, %esp + movb 680(%ebx,%edx), %al + addl $127, %eax + cmpb $2, %al + ja .L1312 + movl $1, %esi +.L1312: + incl %ebx +.L1310: + movl 16(%ebp), %ecx + cmpl 1432(%ecx), %ebx + jb .L1311 + testl %esi, %esi + je .L1297 + pushl %ecx + pushl $.LC71 + pushl $.LC5 + pushl $7 + call do_printk + call soft_reset + addl $16, %esp +.L1297: + pushl %edx + pushl $.LC72 + pushl $.LC5 + pushl $7 + call do_printk + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L1174: + movl $2106656, %edi + movl $1127202, -1344(%ebp) + jmp .L1151 +.L1172: + movl $2892320, %edi + movl $1119010, -1344(%ebp) + jmp .L1151 +.L1163: + movl $2105888, %edi + movl $1119010, -1344(%ebp) + jmp .L1151 +.L1155: + movl $3682048, %edi + movl $1119010, -1344(%ebp) + jmp .L1151 +.L1141: + movl $1119010, -1344(%ebp) + movl $3092224, %edi +.L1151: + movl $.LC52, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC53, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl -1344(%ebp), %edx + movl $.LC56, %eax + call print_raminit + movl %edi, %edx + movl $.LC57, %eax + call print_raminit + jmp .L1177 +.L1157: + movl $2830080, %edi + jmp .L1162 +.L1142: + movl $3092224, %edi +.L1162: + movl $.LC52, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC53, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl $1118754, %edx + movl $.LC56, %eax + call print_raminit + movl %edi, %edx + movl $.LC57, %eax + call print_raminit + movl $1118754, -1344(%ebp) + jmp .L1176 +.L1281: + movl $1, -1252(%ebp) + jmp .L1282 +.L1339: + pushl %eax + pushl $.LC61 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + addl $12, %esp + pushl $.LC73 + pushl $.LC5 + pushl $7 + movl %edx, -32(%ebp) + movl %eax, -36(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl 16(%ebp), %ecx + movl $2, %edx + movl -1248(%ebp), %eax + call train_DqsRcvrEn + addl $16, %esp + testl %eax, %eax + jne .L1287 + jmp .L1342 +.L1334: + xorl %edi, %edi + movl $517, %esi + movl $2, -1244(%ebp) + movl %ebx, -1292(%ebp) + jmp .L1239 + .size sdram_initialize, .-sdram_initialize + .section .rom.data.str1.1 +.LC74: + .string "Testing DRAM : %08x - %08x\r\n" +.LC75: + .string "DRAM fill: 0x%08x-0x%08x\r\n" +.LC76: + .string "%08x \r" +.LC77: + .string "%08x\r\nDRAM filled\r\n" +.LC78: + .string "DRAM verify: 0x%08x-0x%08x\r\n" +.LC79: + .string "Fail: @0x%08x Read value=0x%08x\r\n" +.LC80: + .string "Aborting.\n\r" +.LC81: + .string "\r\nDRAM did _NOT_ verify!\r\n" +.LC82: + .string "DRAM ERROR" +.LC83: + .string "\r\nDRAM range verified.\r\n" +.LC84: + .string "Done.\r\n" + .section .rom.text +.globl ram_check + .type ram_check, @function +ram_check: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $12, %esp + movl 12(%ebp), %edi + movl 8(%ebp), %esi + pushl %edi + pushl %esi + movl %esi, %ebx + pushl $.LC74 + pushl $7 + call do_printk + pushl %edi + pushl %esi + pushl $.LC75 + pushl $7 + call do_printk + addl $32, %esp + jmp .L1350 +.L1351: + testl $1048575, %ebx + jne .L1352 + pushl %eax + pushl %ebx + pushl $.LC76 + pushl $7 + call do_printk + addl $16, %esp +.L1352: +#APP + movnti %ebx, (%ebx) +#NO_APP + addl $4, %ebx +.L1350: + cmpl %edi, %ebx + jb .L1351 + pushl %eax + pushl %ebx + xorl %ebx, %ebx + pushl $.LC77 + pushl $7 + call do_printk + pushl %edi + pushl %esi + pushl $.LC78 + pushl $7 + call do_printk + addl $32, %esp + jmp .L1355 +.L1356: + testl $1048575, %esi + jne .L1357 + pushl %eax + pushl %esi + pushl $.LC76 + pushl $7 + call do_printk + addl $16, %esp +.L1357: + movl (%esi), %eax + cmpl %esi, %eax + je .L1359 + pushl %eax + incl %ebx + pushl %esi + pushl $.LC79 + pushl $3 + call do_printk + addl $16, %esp + cmpl $256, %ebx + jg .L1367 +.L1359: + addl $4, %esi +.L1355: + cmpl %edi, %esi + jb .L1356 + pushl %eax + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $16, %esp + testl %ebx, %ebx + je .L1364 +.L1362: + pushl %eax + pushl %eax + pushl $.LC81 + pushl $7 + call do_printk + movl $.LC82, %eax + call die + jmp .L1368 +.L1367: + pushl %edi + pushl %edi + pushl $.LC80 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1362 +.L1364: + pushl %esi + pushl %esi + pushl $.LC83 + pushl $7 + call do_printk +.L1368: + movl $.LC84, 12(%ebp) + addl $16, %esp + movl $7, 8(%ebp) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + jmp do_printk + .size ram_check, .-ram_check + .section .rom.data.str1.1 +.LC85: + .string "\r\n\r\n\r\nINIT detected from " +.LC86: + .string "%s --- { APICID = %02x NODEID = %02x COREID = %02x} ---\r\n" +.LC87: + .string "\r\nIssuing SOFT_RESET...\r\n" +.LC88: + .string "fidvid_ap_stage1: time out while reading from BSP on " +.LC89: + .string "fidvid_ap_stage3: time out while reading from BSP on " +.LC90: + .string "while waiting for BSP signal to STOP, timeout in ap " +.LC91: + .string "BIST failed: %08x" +.LC92: + .string "*sysinfo range: [" +.LC93: + .string "," +.LC94: + .string ")\r\n" +.LC95: + .string "bsp_apicid=" +.LC96: + .string "core0 started: " +.LC97: + .string "started ap apicid: " +.LC98: + .string "begin msr fid, vid " +.LC99: + .string "end msr fid, vid " +.LC100: + .string "ht reset -\r\n" +.LC101: + .string "v_esp=" +.LC102: + .string "testx = " +.LC103: + .string "Copying data from cache to RAM -- switching to use RAM as stack... " +.LC104: + .string "Done\r\n" +.LC105: + .string "Disabling cache as ram now \r\n" +.LC106: + .string "Clearing initial memory region: " +.LC107: + .string "Uncompressing coreboot to RAM.\r\n" +.LC108: + .string "src=" +.LC109: + .string "dst=" +.LC110: + .string "coreboot_ram.nrv2b length = " +.LC111: + .string "coreboot_ram.bin length = " +.LC112: + .string "Jumping to coreboot.\r\n" +.LC113: + .string "should not be here -\r\n" +.LC114: + .string "fidvid_ap_stage2: time out while reading from BSP on " +.LC115: + .string "fidvid_bsp_stage1: time out while reading from ap " +.LC116: + .string "fidvid_bsp_stage2: time out while reading from ap " + .section .rom.text +.globl real_main + .type real_main, @function +real_main: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $348, %esp + cmpl $0, 8(%ebp) + jne .L1370 + call read_nb_cfg_54 + leal -112(%ebp), %edx + pushl %eax + pushl %edx + call get_node_core_id + movl -108(%ebp), %esi + movl -112(%ebp), %ebx + popl %edx + testl %esi, %esi + movl %esi, -156(%ebp) + movl %ebx, -160(%ebp) + jne .L1372 + movl $-1073676257, %ecx +#APP + rdmsr +#NO_APP + orl $4194304, %edx +#APP + wrmsr +#NO_APP +.L1372: + movl $27, %ecx +#APP + rdmsr +#NO_APP + andl $2047, %eax + xorb %dl, %dl + orl $-18872320, %eax +#APP + wrmsr +#NO_APP + movl -18874336, %edi + shrl $24, %edi + cmpl $0, 12(%ebp) + je .L1374 + pushl %eax + pushl %eax + pushl %esi + pushl %ebx + pushl %edi + pushl $.LC85 + pushl $.LC86 + pushl $7 + call do_printk + addl $28, %esp + pushl $.LC87 + pushl $.LC5 + pushl $7 + call do_printk + call soft_reset + addl $16, %esp +.L1374: + cmpl $0, -156(%ebp) + jne .L1376 + movl -160(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + addl $24, %eax + andl $31, %eax + sall $11, %eax + orl $-2147483540, %eax + movl %eax, -340(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $112, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1376: + movl %edi, %ecx + sall $24, %ecx + movl %ecx, %eax + orl $51, %eax + testl %edi, %edi + movl %ecx, -288(%ebp) + movl %eax, -18873472 + je .L1370 + cmpl $0, -156(%ebp) + jne .L1379 + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + movl %eax, -336(%ebp) + shrl $16, %eax + movl %edx, %ebx + andl $63, %eax + cmpl $41, %eax + jbe .L1381 + movl -336(%ebp), %eax + shrl $8, %eax + andl $63, %eax + addl $10, %eax + cmpl $41, %eax + jbe .L1381 + movl $12, %eax +.L1381: + movl %ebx, %esi + andl $63, %ebx + andl $63, -336(%ebp) + andl $4128768, %esi + sall $8, %eax + movl $-1073676223, %ecx + orl -288(%ebp), %eax + movl $1, %edx + sall $8, %ebx + orl -336(%ebp), %ebx + orl %eax, %esi + movl %ebx, %eax +#APP + wrmsr +#NO_APP + xorl %eax, %eax + movl $0, -28(%ebp) + call wait_cpu_state + testl %eax, %eax + je .L1384 + movl %edi, %edx + movl $.LC88, %eax + call print_initcpu8 +.L1384: + movl %esi, %eax + movl $999999, %ebx + orl $1, %eax + movl %eax, -18873472 +.L1386: + xorl %eax, %eax + movl $896, %edx + leal -28(%ebp), %ecx + call lapic_remote_read + testl %eax, %eax + jne .L1387 + movzbl -25(%ebp), %eax + cmpl %edi, %eax + je .L1389 +.L1387: + decl %ebx + je .L1525 + jmp .L1386 +.L1389: + movl -28(%ebp), %edx + movl $1, %ecx + movl %edi, %eax + andl $16776960, %edx + call set_fidvid + movl %eax, %esi + andl $16776960, %esi + orl -288(%ebp), %esi + movl %eax, -28(%ebp) +.L1391: + orl $2, %esi + xorl %eax, %eax + movl $3, %edx + movl %esi, -18873472 + call wait_cpu_state + testl %eax, %eax + je .L1379 + movl %edi, %edx + movl $.LC89, %eax + call print_initcpu8 +.L1379: + movl $99, %ebx +.L1393: + xorl %eax, %eax + movl $68, %edx + call wait_cpu_state + testl %eax, %eax + je .L1394 + decl %ebx + cmpl $-1, %ebx + jne .L1393 + movl %edi, %edx + movl $.LC90, %eax + call print_initcpu8 +.L1394: + orl $68, -288(%ebp) + movl -288(%ebp), %edx + movl %edx, -18873472 + call set_init_ram_access +#APP + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax, %cr0 + movl $0x269, %ecx + xorl %edx, %edx + xorl %eax, %eax + wrmsr + movl $0xC0010010, %ecx + rdmsr + andl $(~(3<<18)), %eax + wrmsr + movl $0x2ff, %ecx + xorl %edx, %edx + movl $0x00000800, %eax + wrmsr + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + +#NO_APP +.L1397: +#APP + hlt +#NO_APP + jmp .L1397 +.L1370: + movb $-121, %al +#APP + outb %al, $46 +#NO_APP + movb $1, %al +#APP + outb %al, $46 +#NO_APP + movb $85, %al +#APP + outb %al, $46 + outb %al, $46 +#NO_APP + movb $35, %al +#APP + outb %al, $46 +#NO_APP + movb $17, %al +#APP + outb %al, $47 +#NO_APP + movb $36, %al +#APP + outb %al, $46 + inb $47, %al +#NO_APP + testb $14, %al + movb %al, %dl + je .L1398 + movb $36, %al +#APP + outb %al, $46 +#NO_APP + orl $16, %edx + movzbl %dl, %eax +#APP + outb %al, $47 +#NO_APP + movb $7, %al +#APP + outb %al, $46 + outb %al, $47 +#NO_APP + movb $100, %al +#APP + outb %al, $46 +#NO_APP + movb $8, %al +#APP + outb %al, $47 +#NO_APP + movb $101, %al +#APP + outb %al, $46 +#NO_APP + movb $32, %al +#APP + outb %al, $47 +#NO_APP +.L1398: + movb $7, %al +#APP + outb %al, $46 +#NO_APP + movb $1, %cl + movb %cl, %al +#APP + outb %al, $47 +#NO_APP + movb $48, %dl + movb %dl, %al +#APP + outb %al, $46 +#NO_APP + xorl %eax, %eax +#APP + outb %al, $47 +#NO_APP + movb $96, %al +#APP + outb %al, $46 +#NO_APP + movb $3, %al +#APP + outb %al, $47 +#NO_APP + movb $97, %al +#APP + outb %al, $46 +#NO_APP + movb $-8, %al +#APP + outb %al, $47 +#NO_APP + movb %dl, %al +#APP + outb %al, $46 +#NO_APP + movb %cl, %al +#APP + outb %al, $47 +#NO_APP + movb $2, %al +#APP + outb %al, $46 + outb %al, $47 +#NO_APP + xorl %ebx, %ebx +.L1400: + movl register_values.6091(,%ebx,4), %edx + movl %edx, %eax + movl %edx, %ecx + xorb %al, %al + andl $252, %ecx + shrl $4, %eax + movl $3320, %edx + orl %eax, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + andl register_values.6091+4(,%ebx,4), %edi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + orl register_values.6091+8(,%ebx,4), %edi + movl %esi, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %ebx + cmpl $117, %ebx + jne .L1400 + pushl $3 + pushl $1 + pushl $1016 + call uart8250_init + addl $12, %esp + cmpl $0, 8(%ebp) + je .L1402 + pushl %eax + pushl 8(%ebp) + pushl $.LC91 + pushl $0 + call do_printk + movl $.LC7, %eax + call die + addl $16, %esp +.L1402: + pushl %eax + movl $-2147434388, %edi + pushl $console_test.1892 + movl $3320, %ebx + pushl $.LC5 + pushl $6 + call do_printk + addl $12, %esp + pushl $.LC92 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $847872 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC93 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $849712 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC94 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC95 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $0 + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-4, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147433496, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + addl $16, %esp + testb $48, %ah + jne .L1404 + movl $-2147434392, %ebx + movl $3320, %edi + movl %ebx, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1823, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1404: + movl $3320, %ecx + movl $-2147433496, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl %ecx, %edx + movl $-2147434400, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl $-2147434400, %eax +#APP + outl %eax, %dx +#NO_APP + sall $4, %ebx + andl $-983153, %edi + andl $196608, %ebx + orl %ebx, %edi + movl $3324, %ebx + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $-2147434392, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-251682817, %esi + movl %ebx, %edx + orl $251707392, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + call get_nodes + movl $1, %ebx + movl %eax, %esi + pushl %eax + pushl $.LC96 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1406 +.L1512: + leal 24(%ebx), %eax + movl $3320, %edx + andl $31, %eax + sall $11, %eax + orl $-2147483540, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $64, %al + je .L1512 + movl %ebx, %edx + movl $.LC12, %eax + call print_initcpu8_nocr + incl %ebx +.L1406: + cmpl %esi, %ebx + jb .L1512 + pushl %eax + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + call get_nodes + addl $16, %esp + movl $0, -280(%ebp) + movl %eax, -284(%ebp) + jmp .L1410 +.L1411: + movl -280(%ebp), %esi + movl $3320, %edx + addl $24, %esi + andl $31, %esi + sall $15, %esi + movl %esi, %ecx + orb $48, %ch + shrl $4, %ecx + movl %ecx, %eax + orl $-2147483416, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + testb $48, %ah + je .L1412 + movl %ecx, %ebx + movl $3320, %ecx + orl $-2147483580, %ebx + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -336(%ebp) + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + orl $134217728, -336(%ebp) + movl %ebx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + shrl $4, %esi + movl %ecx, %edx + movl %esi, -340(%ebp) + orl $-2147483544, -340(%ebp) + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $32, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1412: + incl -280(%ebp) +.L1410: + movl -284(%ebp), %ecx + cmpl %ecx, -280(%ebp) + jne .L1411 + pushl %eax + pushl $.LC97 + pushl $.LC5 + pushl $7 + call do_printk + movl $wait_ap_started, %ecx + movl $2, %edx + xorl %eax, %eax + movl $0, (%esp) + call for_each_ap + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl $847872, %eax + call ht_setup_chains_x + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + addl $12, %esp + movl %edx, %ebx + pushl $.LC98 + movl %eax, %esi + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl $-2147434400, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $4, %eax + addl $16, %esp + andl $7, %eax + movl %eax, -276(%ebp) + movl $24, -140(%ebp) + jmp .L1415 +.L1416: + movl -140(%ebp), %edi + movl $3320, %ecx + andl $31, %edi + sall $15, %edi + movl %edi, %esi + orl $12288, %esi + shrl $4, %esi + movl %esi, %edx + orl $-2147483432, %edx + movl %edx, -336(%ebp) + movl %edx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -340(%ebp) + movl %ecx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1880096768, -340(%ebp) + movl %ebx, %edx + orl $536880912, -340(%ebp) + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ecx, %edx + orl $-2147483436, %eax +#APP + outl %eax, %dx +#NO_APP + movl $81962759, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + shrl $4, %edi + movl %ecx, %edx + movl %edi, -336(%ebp) + orl $-2147482988, -336(%ebp) + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $16384, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ecx, %edx + orl $-2147483520, %eax +#APP + outl %eax, %dx +#NO_APP + movl $587663104, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + orl $-2147483516, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $1253651, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + incl -140(%ebp) +.L1415: + movl -276(%ebp), %eax + addl $25, %eax + cmpl %eax, -140(%ebp) + jne .L1416 + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + movl %eax, %ebx + movl %edx, %ecx + shrl $16, %eax + andl $63, %eax + cmpl $41, %eax + jbe .L1418 + shrl $8, %ebx + andl $63, %ebx + leal 10(%ebx), %eax + cmpl $41, %eax + jbe .L1418 + movl $12, %eax +.L1418: + movl %eax, %esi + subl $12, %esp + andl $4128768, %ecx + movl $1, %edx + leal -96(%ebp), %eax + sall $8, %esi + movl $1, -18873472 + orl %ecx, %esi + movl $store_ap_apicid, %ecx + pushl %eax + xorl %eax, %eax + movl $0, -96(%ebp) + call for_each_ap + addl $16, %esp + movl $0, -272(%ebp) + jmp .L1421 +.L1422: + movl -272(%ebp), %ecx + movl $999999, %ebx + movl $0, -28(%ebp) + movl -92(%ebp,%ecx,4), %edi +.L1423: + leal -28(%ebp), %ecx + movl $896, %edx + movl %edi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L1424 + cmpb $1, -28(%ebp) + je .L1426 +.L1424: + decl %ebx + je .L1529 + jmp .L1423 +.L1426: + movl -28(%ebp), %ecx + movl %esi, %edx + andl $65280, %edx + andl $16776960, %ecx + movl %ecx, %eax + andl $65280, %eax + cmpl %eax, %edx + jbe .L1428 + movl %ecx, %esi +.L1428: + incl -272(%ebp) +.L1421: + movl -272(%ebp), %ebx + cmpl -96(%ebp), %ebx + jb .L1422 + movl $1, %ecx + movl %esi, %edx + xorl %eax, %eax + call set_fidvid + movl $0, -116(%ebp) + movl %eax, %ebx + andl $16776960, %ebx + jmp .L1431 +.L1432: + movl -116(%ebp), %eax + movl $999999, %edi + movl $0, -28(%ebp) + movl -92(%ebp,%eax,4), %esi + movl %esi, %eax + sall $24, %eax + orl $2, %eax + orl %ebx, %eax + movl %eax, -18873472 +.L1433: + leal -28(%ebp), %ecx + movl $896, %edx + movl %esi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L1434 + cmpb $2, -28(%ebp) + je .L1436 +.L1434: + decl %edi + je .L1530 + jmp .L1433 +.L1436: + incl -116(%ebp) +.L1431: + movl -116(%ebp), %edx + cmpl -96(%ebp), %edx + jb .L1432 + orl $3, %ebx + movl $-1073676222, %ecx + movl %ebx, -18873472 +#APP + rdmsr +#NO_APP + pushl %edi + movl %edx, %ebx + pushl $.LC99 + movl %eax, %esi + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + call get_nodes + addl $16, %esp + movl $0, -264(%ebp) + movl $0, -268(%ebp) + movl %eax, -260(%ebp) + jmp .L1439 +.L1440: + movl -264(%ebp), %esi + movl $3320, %edx + addl $24, %esi + andl $31, %esi + sall $15, %esi + movl %esi, %ebx + shrl $4, %ebx + orl $-2147482660, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + xorl %edi, %edi + movl %eax, -136(%ebp) + movl %eax, -344(%ebp) + movl $152, -144(%ebp) +.L1441: + movl %esi, %eax + movl $3320, %edx + shrl $4, %eax + orl -144(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $7, %eax + cmpl $3, %eax + jne .L1442 + movl %edi, %ecx + movb $-1, %al + sall %cl, %eax + notl %eax + andl %eax, -344(%ebp) + movl $37, %eax + sall %cl, %eax + orl %eax, -344(%ebp) +.L1442: + addl $32, -144(%ebp) + addl $8, %edi + cmpl $248, -144(%ebp) + jne .L1441 + movl -136(%ebp), %eax + cmpl %eax, -344(%ebp) + je .L1445 + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -344(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $1, -268(%ebp) +.L1445: + incl -264(%ebp) +.L1439: + movl -260(%ebp), %edx + cmpl %edx, -264(%ebp) + jne .L1440 + movl 849692, %ecx + movl $0, -248(%ebp) + movl $0, -252(%ebp) + movl $0, -316(%ebp) + movl %ecx, -256(%ebp) + jmp .L1448 +.L1449: + movl -316(%ebp), %eax + addl $849308, %eax + movl 20(%eax), %ebx + movl 12(%eax), %edx + movl 8(%eax), %ecx + movl %ebx, -204(%ebp) + movl -316(%ebp), %ebx + movl %edx, -240(%ebp) + movb 4(%eax), %dl + movb 16(%eax), %al + movl %ecx, -196(%ebp) + movl 849308(%ebx), %ebx + movb %dl, -189(%ebp) + addl %ecx, %edx + movb %al, -197(%ebp) + movzbl %dl, %edx + movl %ebx, %eax + movl %ebx, -236(%ebp) + call ht_read_freq_cap + movb -197(%ebp), %dl + addl -204(%ebp), %edx + movzbl %dl, %edx + movl %eax, %ebx + movl -240(%ebp), %eax + call ht_read_freq_cap + andl %eax, %ebx + movzwl %bx, %eax +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -196(%ebp), %edx + movl -236(%ebp), %ebx + movzbl -189(%ebp), %ecx + movb %al, -217(%ebp) + movzbl %dh, %eax + shrl $4, %ebx + movl %ebx, -224(%ebp) + leal (%eax,%ecx), %ebx + orl -224(%ebp), %ebx + movl %ecx, -208(%ebp) + movl $3320, %ecx + movl %ecx, %edx + movl %ebx, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + andl $3, %eax + addw $3324, %ax + movw %ax, -226(%ebp) + movl %eax, %edx +#APP + inb %dx, %al +#NO_APP + movzbl -197(%ebp), %ebx + movl %eax, %esi + movl -240(%ebp), %eax + movl %ebx, -212(%ebp) + movl -204(%ebp), %ebx + shrl $4, %eax + movl %eax, -232(%ebp) + movzbl %bh, %edx + addl -212(%ebp), %edx + orl %eax, %edx + movl %edx, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %edx, -336(%ebp) + movl %ebx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -336(%ebp), %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + andl $15, %esi + movl %esi, %edx + cmpb -217(%ebp), %dl + movb -217(%ebp), %dl + movb %al, -329(%ebp) + setne -312(%ebp) + andl $15, %eax + cmpb %dl, %al + movb -312(%ebp), %al + setne %dl + orl %edx, %eax + movl %ecx, %edx + movl %eax, %esi + movl %edi, %eax + andl $1, %esi +#APP + outl %eax, %dx +#NO_APP + movzbl -217(%ebp), %edi + movw -226(%ebp), %dx + movl %edi, %eax +#APP + outb %al, %dx +#NO_APP + movl %ebx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx +#APP + outb %al, %dx +#NO_APP + movl -196(%ebp), %edi + movb -189(%ebp), %al + shrl $16, %edi + addl %edi, %eax + movzbl %al, %edx + movl -236(%ebp), %eax + call ht_read_width_cap + movl -204(%ebp), %ecx + shrl $16, %ecx + movl %ecx, -216(%ebp) + movb %al, %bl + movb -197(%ebp), %al + addl %ecx, %eax + movzbl %al, %edx + movl -240(%ebp), %eax + call ht_read_width_cap + movl %ebx, %edx + andl $7, %edx + movb link_width_to_pow2.3138(%edx), %dl + shrb $4, %bl + andl $7, %ebx + movb link_width_to_pow2.3138(%ebx), %cl + movb %dl, -129(%ebp) + movb %al, %dl + andl $7, %eax + shrb $4, %dl + movb link_width_to_pow2.3138(%eax), %al + andl $7, %edx + movb link_width_to_pow2.3138(%edx), %dl + cmpb -129(%ebp), %dl + jbe .L1450 + movb -129(%ebp), %dl +.L1450: + cmpb %cl, %al + movzbl %dl, %edx + jbe .L1451 + movb %cl, %al +.L1451: + movzbl %al, %eax + movb pow2_to_link_width.3139(%edx), %dl + movzbl pow2_to_link_width.3139(%eax), %eax + movl -208(%ebp), %ebx + sall $4, %eax + orl %eax, %edx + movb %dl, -130(%ebp) + movl %edi, %edx + andl $255, %edx + leal 1(%edx,%ebx), %edi + movl $3320, %ebx + orl -224(%ebp), %edi + movl %ebx, %edx + movl %edi, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + andl $119, %eax + movzbl -130(%ebp), %edi + movl %ebx, %edx + cmpb -130(%ebp), %al + setne %al + movzbl %al, %eax + orl %eax, %esi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx +#APP + outb %al, %dx +#NO_APP + movl %edi, %edx + andl $7, %edi + movl -212(%ebp), %eax + andl $112, %edx + sarl $4, %edx + sall $4, %edi + orl %edx, %edi + movzbl -216(%ebp),%edx + leal 1(%edx,%eax), %ecx + orl -232(%ebp), %ecx + movl %ecx, %edx + andl $2147483644, %edx + orl $-2147483648, %edx + movl %edx, -340(%ebp) + movl %edx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + movb %al, %cl + movl %ebx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx + andl $119, %eax +#APP + outb %al, %dx +#NO_APP + andl $119, %ecx + movl %edi, %ebx + xorl %eax, %eax + cmpb %bl, %cl + setne %al + orl %eax, %esi + incl -248(%ebp) + orl %esi, -252(%ebp) + addl $24, -316(%ebp) +.L1448: + movl -256(%ebp), %eax + cmpl %eax, -248(%ebp) + jne .L1449 + movb 849696, %dl + movl $0, -188(%ebp) + movl $0, -148(%ebp) + movb %dl, -241(%ebp) + jmp .L1453 +.L1454: + movzbl %dl, %eax + movl $3320, %ebx + leal 224(,%eax,4), %eax + movl %ebx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + andl $16711680, %eax + orl $-2147483648, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $65535, %eax + cmpl $4130, %eax + je .L1455 + cmpl $4318, %eax + jne .L1457 +.L1455: + movl %ecx, %edi + andl $240, %ecx + shrl $4, %ecx + andl $3840, %edi + leal 24(%ecx), %ebx + movl $3320, %edx + shrl $8, %edi + andl $31, %ebx + sall $15, %ebx + movl %edi, %eax + movl %ebx, %ecx + sall $5, %eax + addl $152, %eax + shrl $4, %ecx + orl %eax, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $7, %eax + cmpl $7, %eax + jne .L1458 + movl %ebx, %esi + movb $-8, %dl + shrl $4, %esi + orl $-2147482660, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl $255, %ebx + leal 0(,%edi,8), %ecx + sall %cl, %ebx + notl %ebx + andl %eax, %ebx + movl %eax, -336(%ebp) + movl $37, %eax + sall %cl, %eax + orl %eax, %ebx + cmpl -336(%ebp), %ebx + je .L1458 + movb $-8, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $1, %eax + jmp .L1461 +.L1458: + xorl %eax, %eax +.L1461: + orl %eax, -188(%ebp) +.L1457: + incl -148(%ebp) +.L1453: + movzbl -241(%ebp), %eax + cmpl %eax, -148(%ebp) + movb -148(%ebp), %dl + jne .L1454 + call mcp55_early_setup_x + movl -188(%ebp), %edx + orl %edx, -252(%ebp) + movl -268(%ebp), %ecx + orl %eax, -252(%ebp) + orl -252(%ebp), %ecx + je .L1463 + pushl %ecx + pushl $.LC100 + pushl $.LC5 + pushl $6 + call do_printk + call soft_reset + addl $16, %esp +.L1463: + movl 849304, %ebx + xorl %esi, %esi + xorl %edi, %edi + movl $68, -18873472 + movl $0, -152(%ebp) + movl %ebx, -184(%ebp) + jmp .L1465 +.L1466: + leal 24(%esi), %eax + movl $1, %ecx + andl $31, %eax + sall $15, %eax + movl %eax, %edx + leal 848264(%edi), %ebx + orb $16, %dh + movl %edx, 8(%ebx) + movl %eax, %edx + movl %eax, 4(%ebx) + orb $32, %dh + orb $48, %ah + movl %esi, 848264(%edi) + movl %edx, 12(%ebx) + movl %eax, 16(%ebx) +.L1467: + movl -152(%ebp), %eax + addl %ecx, %eax + movw spd_addr.6906-2(%eax,%eax), %dx + movw %dx, 18(%ebx,%ecx,2) + movw spd_addr.6906+6(%eax,%eax), %ax + movw %ax, 26(%ebx,%ecx,2) + incl %ecx + cmpl $5, %ecx + jne .L1467 + addl $8, -152(%ebp) + incl %esi + addl $36, %edi +.L1465: + cmpl -184(%ebp), %esi + jl .L1466 + xorl %ecx, %ecx +.L1470: + movl %ecx, %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57151710, %eax + je .L1471 + addl $4096, %ecx + cmpl $268435456, %ecx + jne .L1470 + orl $-1, %ecx +.L1471: + shrl $4, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx + andl $268435452, %eax + orl $-2147483616, %eax +#APP + outl %eax, %dx +#NO_APP + movl $4097, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movl %ebx, %edx + andl $268435452, %eax + orl $-2147483612, %eax +#APP + outl %eax, %dx +#NO_APP + movl $4353, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + orl $4, %ecx + movl %ebx, %edx + movl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx + movl $1, %eax + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + outw %ax, %dx +#NO_APP + movl $4097, %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + movl $4353, %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + pushl %edx + pushl $847872 + pushl $848264 + pushl 849304 + call sdram_initialize +#APP + movl %esp, %eax + +#NO_APP + movl %eax, %edx + movl $.LC101, %eax + call print_debug_pcar + movl $1515870810, %edx + movl $.LC102, %eax + call print_debug_pcar + movl $819200, %esi + movl $2064384, %edi + call set_init_ram_access + addl $12, %esp + pushl $.LC103 + pushl $.LC5 + pushl $7 + call do_printk + movl $8192, %ecx +#APP + cld + rep; movsl + +#NO_APP + movl $-1245184, %eax +#APP + subl %eax, %ebp + subl %eax, %esp + +#NO_APP + addl $12, %esp + pushl $.LC104 + pushl $.LC5 + pushl $7 + call do_printk + movl $1515870810, %edx + movl $.LC102, %eax + call print_debug_pcar + addl $12, %esp + pushl $.LC105 + pushl $.LC5 + pushl $7 + call do_printk +#APP + pushl %edx + pushl %ecx + + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax, %cr0 + movl $0x269, %ecx + xorl %edx, %edx + xorl %eax, %eax + wrmsr + movl $0xC0010010, %ecx + rdmsr + andl $(~(3<<18)), %eax + wrmsr + movl $0x2ff, %ecx + xorl %edx, %edx + movl $0x00000800, %eax + wrmsr + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + + popl %ecx + popl %edx + +#NO_APP + addl $12, %esp + movl $-2147434388, %esi + pushl $.LC106 + pushl $.LC5 + pushl $7 + call do_printk + call clear_init_ram + addl $12, %esp + pushl $.LC104 + pushl $.LC5 + pushl $7 + call do_printk + movl %esi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + andb $253, %ch + movb $-4, %dl + orb $2, %ch + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + addl $12, %esp + pushl $.LC107 + pushl $.LC5 + pushl $7 + call do_printk +#APP + leal _liseg, %eax + leal _iseg, %ebx + +#NO_APP + movl %eax, %edx + movl %eax, %esi + movl $.LC108, %eax + addl $4, %esi + movl %ebx, -164(%ebp) + xorl %edi, %edi + call print_debug_cp_run + movl %ebx, %edx + movl $.LC109, %eax + call print_debug_cp_run + xorl %ebx, %ebx + addl $16, %esp + movl %esi, -120(%ebp) + xorl %esi, %esi + movl $0, -168(%ebp) + movl $1, -172(%ebp) + jmp .L1542 +.L1475: + movl -120(%ebp), %edx + movl -164(%ebp), %ecx + movb (%edx,%edi), %al + incl %edi + movl -168(%ebp), %edx + movb %al, (%ecx,%edx) + incl %edx + movl %edx, -168(%ebp) +.L1542: + testl %esi, %esi + je .L1476 + decl %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + andl $1, %eax + jmp .L1478 +.L1476: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax +.L1478: + testb %al, %al + jne .L1475 + movl $1, %edx +.L1480: + addl %edx, %edx + testl %esi, %esi + je .L1481 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %edx + testl %ecx, %ecx + jne .L1483 + jmp .L1535 +.L1481: + movl -120(%ebp), %ecx + movl (%ecx,%edi), %ebx + addl $4, %edi + movl $31, %ecx + movl %ebx, %eax + shrl $31, %eax + addl %eax, %edx +.L1483: + leal -1(%ecx), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + xorl $1, %eax + andl $1, %eax + jmp .L1485 +.L1535: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + xorl $1, %eax + andl $1, %eax +.L1485: + testb %al, %al + jne .L1480 + movl -172(%ebp), %ecx + cmpl $2, %edx + movl %ecx, -180(%ebp) + je .L1489 + movl -120(%ebp), %ecx + sall $8, %edx + movzbl (%ecx,%edi), %eax + incl %edi + leal -768(%edx,%eax), %eax + cmpl $-1, %eax + je .L1490 + incl %eax + movl %eax, -180(%ebp) + movl %eax, -172(%ebp) +.L1489: + testl %esi, %esi + je .L1492 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %eax + testl %ecx, %ecx + jne .L1494 + jmp .L1537 +.L1492: + movl -120(%ebp), %eax + movl $31, %ecx + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + addl %eax, %eax +.L1494: + leal -1(%ecx), %esi + movl %ebx, %edx + movl %esi, %ecx + shrl %cl, %edx + andl $1, %edx + jmp .L1496 +.L1537: + movl -120(%ebp), %edx + movl $31, %esi + movl (%edx,%edi), %ebx + addl $4, %edi + movl %ebx, %edx + shrl $31, %edx +.L1496: + addl %eax, %edx + jne .L1497 + movl $1, %edx +.L1499: + addl %edx, %edx + testl %esi, %esi + je .L1500 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %edx + testl %ecx, %ecx + jne .L1502 + jmp .L1538 +.L1500: + movl -120(%ebp), %ecx + movl (%ecx,%edi), %ebx + addl $4, %edi + movl $31, %ecx + movl %ebx, %eax + shrl $31, %eax + addl %eax, %edx +.L1502: + leal -1(%ecx), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + xorl $1, %eax + andl $1, %eax + jmp .L1504 +.L1538: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + xorl $1, %eax + andl $1, %eax +.L1504: + testb %al, %al + jne .L1499 + addl $2, %edx +.L1497: + xorl %eax, %eax + cmpl $3328, -180(%ebp) + seta %al + addl %eax, %edx + movl %edx, -128(%ebp) + movl -164(%ebp), %edx + addl -168(%ebp), %edx + movl %edx, %ecx + subl -180(%ebp), %ecx + movl %ecx, -176(%ebp) + movb (%ecx), %al + movb %al, (%edx) + movl -168(%ebp), %eax + movl $0, -344(%ebp) + incl %eax + movl %eax, -124(%ebp) +.L1506: + movl -344(%ebp), %ecx + movl -176(%ebp), %eax + movl -164(%ebp), %edx + addl -344(%ebp), %edx + movl %edx, -336(%ebp) + movb 1(%ecx,%eax), %cl + movl -168(%ebp), %eax + movb %cl, 1(%eax,%edx) + movl -128(%ebp), %edx + incl -344(%ebp) + cmpl %edx, -344(%ebp) + jne .L1506 + movl -124(%ebp), %ecx + addl %edx, %ecx + movl %ecx, -168(%ebp) + jmp .L1542 +.L1490: + movl %edi, %edx + movl $.LC110, %eax + call print_debug_cp_run + movl -168(%ebp), %edx + movl $.LC111, %eax + call print_debug_cp_run + pushl %eax + pushl $.LC112 + pushl $.LC5 + pushl $7 + call do_printk +#APP + xorl %ebp, %ebp + cli + leal _iseg, %edi + jmp *%edi + +#NO_APP + addl $12, %esp + pushl $.LC113 + pushl $.LC5 + pushl $7 + call do_printk + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L1525: + movl %edi, %edx + movl $.LC114, %eax + call print_initcpu8 + jmp .L1391 +.L1529: + movl %edi, %edx + movl $.LC115, %eax + call print_initcpu8 + jmp .L1428 +.L1530: + movl %esi, %edx + movl $.LC116, %eax + call print_initcpu8 + jmp .L1436 + .size real_main, .-real_main +.globl cache_as_ram_main + .type cache_as_ram_main, @function +cache_as_ram_main: + pushl %ebp + movl %esp, %ebp + popl %ebp + jmp real_main + .size cache_as_ram_main, .-cache_as_ram_main +.globl init_timer + .type init_timer, @function +init_timer: + pushl %ebp + movl %esp, %ebp + movl $196608, -18873568 + movl $11, -18873376 + movl $-1, -18873472 + popl %ebp + ret + .size init_timer, .-init_timer +.globl uart8250_rx_byte + .type uart8250_rx_byte, @function +uart8250_rx_byte: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl 8(%ebp), %ebx +.L1549: + movl %ebx, %ecx + leal 5(%ecx), %edx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + testb $1, %al + je .L1549 + movzwl %bx, %edx +#APP + inb %dx, %al +#NO_APP + popl %ebx + movzbl %al, %eax + popl %ebp + ret + .size uart8250_rx_byte, .-uart8250_rx_byte + .section .rom.data + .align 2 + .type spd_addr.6906, @object + .size spd_addr.6906, 16 +spd_addr.6906: + .value 80 + .value 82 + .value 0 + .value 0 + .value 81 + .value 83 + .value 0 + .value 0 + .align 32 + .type next_fid_a.6702, @object + .size next_fid_a.6702, 144 +next_fid_a.6702: + .byte 0 + .byte 9 + .byte 9 + .byte 8 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 0 + .byte 11 + .byte 11 + .byte 9 + .byte 9 + .byte 10 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 0 + .byte 13 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 12 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 0 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 14 + .byte 15 + .byte 4 + .byte 9 + .byte 9 + .byte 9 + .byte 0 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 4 + .byte 5 + .byte 10 + .byte 10 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 9 + .byte 5 + .byte 11 + .byte 11 + .byte 9 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 10 + .byte 5 + .byte 6 + .byte 12 + .byte 10 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 11 + .byte 6 + .byte 13 + .byte 11 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 12 + .byte 12 + .byte 6 + .byte 7 + .byte 12 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 13 + .byte 13 + .byte 13 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 14 + .byte 14 + .byte 14 + .byte 7 + .byte 14 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .align 32 + .type register_values.6091, @object + .size register_values.6091, 468 +register_values.6091: + .long 790596 + .long 63736 + .long 0 + .long 790604 + .long 63736 + .long 1 + .long 790612 + .long 63736 + .long 2 + .long 790620 + .long 63736 + .long 3 + .long 790628 + .long 63736 + .long 4 + .long 790636 + .long 63736 + .long 5 + .long 790644 + .long 63736 + .long 6 + .long 790652 + .long 63736 + .long 7 + .long 790592 + .long 63740 + .long 0 + .long 790600 + .long 63740 + .long 0 + .long 790608 + .long 63740 + .long 0 + .long 790616 + .long 63740 + .long 0 + .long 790624 + .long 63740 + .long 0 + .long 790632 + .long 63740 + .long 0 + .long 790640 + .long 63740 + .long 0 + .long 790648 + .long 63740 + .long 0 + .long 790660 + .long 72 + .long 0 + .long 790668 + .long 72 + .long 0 + .long 790676 + .long 72 + .long 0 + .long 790684 + .long 72 + .long 0 + .long 790692 + .long 72 + .long 0 + .long 790700 + .long 72 + .long 0 + .long 790708 + .long 72 + .long 0 + .long 790656 + .long 240 + .long 0 + .long 790664 + .long 240 + .long 0 + .long 790672 + .long 240 + .long 0 + .long 790680 + .long 240 + .long 0 + .long 790688 + .long 240 + .long 0 + .long 790696 + .long 240 + .long 0 + .long 790704 + .long 240 + .long 0 + .long 790732 + .long -33550392 + .long 0 + .long 790740 + .long -33550392 + .long 0 + .long 790748 + .long -33550392 + .long 0 + .long 790728 + .long -33550388 + .long 0 + .long 790736 + .long -33550388 + .long 0 + .long 790744 + .long -33550388 + .long 0 + .long 790756 + .long 64648 + .long 0 + .long 790760 + .long 64648 + .long 0 + .long 790764 + .long 64648 + .long 0 + .align 32 + .type console_test.1892, @object + .size console_test.1892, 76 +console_test.1892: + .string "\r\n\r\ncoreboot-2.0.0nf570_Fallback Thu Oct 30 16:44:09 GMT 2008 starting...\r\n" + .type pow2_to_link_width.3139, @object + .size pow2_to_link_width.3139, 6 +pow2_to_link_width.3139: + .byte 7 + .byte 4 + .byte 5 + .byte 0 + .byte 1 + .byte 3 + .type link_width_to_pow2.3138, @object + .size link_width_to_pow2.3138, 8 +link_width_to_pow2.3138: + .byte 3 + .byte 4 + .byte 0 + .byte 5 + .byte 1 + .byte 2 + .byte 0 + .byte 0 + .align 4 + .type C.178.6378, @object + .size C.178.6378, 16 +C.178.6378: + .long 0 + .long 4 + .long 4 + .long 4 + .align 32 + .type ctrl_devport_conf.6223, @object + .size ctrl_devport_conf.6223, 36 +ctrl_devport_conf.6223: + .long 36968 + .long -65281 + .long 10240 + .long 36964 + .long -65281 + .long 9216 + .long 36960 + .long -65281 + .long 8192 + .align 32 + .type ctrl_conf_2.6324, @object + .size ctrl_conf_2.6324, 112 +ctrl_conf_2.6324: + .long 16 + .long 116 + .long -4081 + .long 2512 + .long 16 + .long 32884 + .long -32769 + .long 32768 + .long 32 + .long 9288 + .long -65537 + .long 65536 + .long 32 + .long 10336 + .long -256 + .long 18 + .long 16 + .long 37092 + .long -5242881 + .long 5242880 + .long 34 + .long 9412 + .long -256 + .long 4 + .long 34 + .long 9412 + .long -256 + .long 5 + .align 32 + .type ctrl_conf_master_only.6323, @object + .size ctrl_conf_master_only.6323, 32 +ctrl_conf_master_only.6323: + .long 32 + .long 8320 + .long 251658239 + .long 16777216 + .long 34 + .long 9408 + .long -13 + .long 0 + .align 32 + .type ctrl_conf_mcp55_only.6322, @object + .size ctrl_conf_mcp55_only.6322, 528 +ctrl_conf_mcp55_only.6322: + .long 16 + .long 36928 + .long 0 + .long -880537378 + .long 16 + .long 37088 + .long -257 + .long 0 + .long 16 + .long 37092 + .long -5 + .long 0 + .long 16 + .long 37096 + .long -5650177 + .long 12288 + .long 16 + .long 131136 + .long 0 + .long -880537378 + .long 16 + .long 131320 + .long -49 + .long 16 + .long 16 + .long 65600 + .long 0 + .long -880537378 + .long 16 + .long 69696 + .long 0 + .long -880537378 + .long 16 + .long 69732 + .long -125829121 + .long 83886080 + .long 16 + .long 69752 + .long -4161537 + .long 3538944 + .long 16 + .long 69736 + .long -33501121 + .long 20917248 + .long 16 + .long 69744 + .long -524289 + .long 524288 + .long 16 + .long 69756 + .long -4081 + .long 1392 + .long 16 + .long 69880 + .long -49 + .long 16 + .long 16 + .long 196612 + .long -261 + .long 260 + .long 16 + .long 196668 + .long -167772161 + .long 167772160 + .long 16 + .long 196672 + .long 13172735 + .long 120782848 + .long 16 + .long 196680 + .long -8 + .long 5 + .long 16 + .long 196684 + .long -33357825 + .long 4980736 + .long 16 + .long 196724 + .long -64 + .long 0 + .long 16 + .long 196800 + .long 0 + .long -880537378 + .long 16 + .long 196804 + .long -8 + .long 7 + .long 16 + .long 32888 + .long -1056964609 + .long 419430400 + .long 16 + .long 200768 + .long 0 + .long -880537378 + .long 34 + .long 9445 + .long 0 + .long 104 + .long 34 + .long 9446 + .long 0 + .long 104 + .long 34 + .long 9447 + .long 0 + .long 104 + .long 34 + .long 9448 + .long 0 + .long 104 + .long 34 + .long 9467 + .long 0 + .long 96 + .long 34 + .long 9468 + .long 0 + .long 96 + .long 34 + .long 9429 + .long -13 + .long 8 + .long 34 + .long 9430 + .long -13 + .long 8 + .long 34 + .long 9454 + .long -13 + .long 8 + .align 32 + .type ctrl_conf_1_1.6321, @object + .size ctrl_conf_1_1.6321, 144 +ctrl_conf_1_1.6321: + .long 16 + .long 163904 + .long 0 + .long -880537378 + .long 16 + .long 163920 + .long -4 + .long 3 + .long 16 + .long 163940 + .long -2 + .long 1 + .long 16 + .long 163952 + .long -983041 + .long 262144 + .long 16 + .long 164012 + .long -3841 + .long 256 + .long 16 + .long 163964 + .long -17 + .long 0 + .long 16 + .long 164040 + .long -16711936 + .long 655370 + .long 16 + .long 164048 + .long -251658241 + .long 50331648 + .long 16 + .long 164064 + .long -251658241 + .long 50331648 + .align 32 + .type ctrl_conf_1.6320, @object + .size ctrl_conf_1.6320, 640 +ctrl_conf_1.6320: + .long 32 + .long 8208 + .long 524287 + .long 267878400 + .long 32 + .long 8356 + .long -1179649 + .long 73728 + .long 32 + .long 8364 + .long -513 + .long 512 + .long 32 + .long 8372 + .long -3 + .long 2 + .long 32 + .long 10276 + .long -1057951601 + .long 637665840 + .long 32 + .long 10292 + .long 0 + .long 572662306 + .long 32 + .long 10248 + .long 2147483647 + .long 0 + .long 32 + .long 10284 + .long 2147483647 + .long -2147483648 + .long 32 + .long 10444 + .long -1537 + .long 0 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10444 + .long -1537 + .long 512 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10444 + .long -1537 + .long 1024 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10356 + .long -61451 + .long 61440 + .long 32 + .long 10360 + .long -16711936 + .long 1048592 + .long 32 + .long 10364 + .long -15732481 + .long 5244160 + .long 32 + .long 10368 + .long -25 + .long 0 + .long 32 + .long 10336 + .long -3145729 + .long 3145728 + .long 32 + .long 10384 + .long -65281 + .long 65280 + .long 32 + .long 10396 + .long -16711681 + .long 458752 + .long 16 + .long 64 + .long 0 + .long -880537378 + .long 16 + .long 72 + .long -8979 + .long 8194 + .long 16 + .long 120 + .long -114 + .long 17 + .long 16 + .long 128 + .long -65536 + .long 39203 + .long 16 + .long 136 + .long -2 + .long 0 + .long 16 + .long 140 + .long -65536 + .long 127 + .long 16 + .long 220 + .long -65537 + .long 65536 + .long 16 + .long 32832 + .long 0 + .long -880537378 + .long 16 + .long 32884 + .long -133 + .long 132 + .long 16 + .long 33016 + .long -49 + .long 16 + .long 16 + .long 37060 + .long -2 + .long 1 + .long 16 + .long 37104 + .long 2147483645 + .long 2 + .long 16 + .long 37112 + .long -49 + .long 16 + .long 16 + .long 262208 + .long 0 + .long -880537378 + .long 16 + .long 262248 + .long -256 + .long 255 + .long 16 + .long 262392 + .long -65 + .long 64 + .long 16 + .long 294976 + .long 0 + .long -880537378 + .long 16 + .long 295016 + .long -256 + .long 255 + .long 16 + .long 295160 + .long -65 + .long 64 + .align 32 + .type ctrl_devport_conf_clear.6248, @object + .size ctrl_devport_conf_clear.6248, 36 +ctrl_devport_conf_clear.6248: + .long 36968 + .long -65281 + .long 0 + .long 36964 + .long -65281 + .long 0 + .long 36960 + .long -65281 + .long 0 + .align 32 + .type register_values.3726, @object + .size register_values.3726, 456 +register_values.3726: + .long 790596 + .long 63736 + .long 0 + .long 790604 + .long 63736 + .long 1 + .long 790612 + .long 63736 + .long 2 + .long 790620 + .long 63736 + .long 3 + .long 790628 + .long 63736 + .long 4 + .long 790636 + .long 63736 + .long 5 + .long 790644 + .long 63736 + .long 6 + .long 790652 + .long 63736 + .long 7 + .long 790592 + .long 63740 + .long 0 + .long 790600 + .long 63740 + .long 0 + .long 790608 + .long 63740 + .long 0 + .long 790616 + .long 63740 + .long 0 + .long 790624 + .long 63740 + .long 0 + .long 790632 + .long 63740 + .long 0 + .long 790640 + .long 63740 + .long 0 + .long 790648 + .long 63740 + .long 0 + .long 794688 + .long -536362984 + .long 0 + .long 794692 + .long -536362984 + .long 0 + .long 794696 + .long -536362984 + .long 0 + .long 794700 + .long -536362984 + .long 0 + .long 794704 + .long -536362984 + .long 0 + .long 794708 + .long -536362984 + .long 0 + .long 794712 + .long -536362984 + .long 0 + .long 794716 + .long -536362984 + .long 0 + .long 794720 + .long -536362977 + .long 0 + .long 794724 + .long -536362977 + .long 0 + .long 794728 + .long -536362977 + .long 0 + .long 794732 + .long -536362977 + .long 0 + .long 794744 + .long -524288 + .long 102 + .long 794752 + .long -65536 + .long 0 + .long 794760 + .long 1224 + .long -16777214 + .long 794764 + .long 786575 + .long 131328 + .long 794768 + .long -655284 + .long 16 + .long 794772 + .long 11022080 + .long 32768 + .long 794784 + .long 16776192 + .long -16777216 + .long 798808 + .long -2039584 + .long 0 + .long 798812 + .long 62 + .long 0 + .long 798816 + .long -256 + .long 0 + .type addresses.4189, @object + .size addresses.4189, 24 +addresses.4189: + .byte 2 + .byte 3 + .byte 4 + .byte 5 + .byte 6 + .byte 9 + .byte 11 + .byte 13 + .byte 17 + .byte 18 + .byte 20 + .byte 21 + .byte 23 + .byte 26 + .byte 27 + .byte 28 + .byte 29 + .byte 30 + .byte 36 + .byte 37 + .byte 38 + .byte 41 + .byte 41 + .byte 42 + .type cs_map_aaa.3871, @object + .size cs_map_aaa.3871, 24 +cs_map_aaa.3871: + .byte 0 + .byte 1 + .byte 3 + .byte 0 + .byte 2 + .byte 6 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 0 + .byte 0 + .byte 5 + .byte 8 + .byte 0 + .byte 7 + .byte 9 + .byte 0 + .byte 10 + .byte 11 + .align 2 + .type min_cycle_times.4294, @object + .size min_cycle_times.4294, 8 +min_cycle_times.4294: + .value 592 + .value 768 + .value 885 + .value 1280 + .type latency_indicies.4293, @object + .size latency_indicies.4293, 3 +latency_indicies.4293: + .byte 25 + .byte 23 + .byte 9 + .align 4 + .type fraction.4275, @object + .size fraction.4275, 16 +fraction.4275: + .long 37 + .long 51 + .long 102 + .long 117 + .align 32 + .type speed, @object + .size speed, 120 +speed: + .value 1280 + .byte -56 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 0 + .string "200Mhz\r\n" + .zero 3 + .value 885 + .byte -106 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 1 + .string "266Mhz\r\n" + .zero 3 + .value 768 + .byte 120 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 2 + .string "333Mhz\r\n" + .zero 3 + .value 592 + .byte 100 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 3 + .string "400Mhz\r\n" + .zero 3 + .value 0 + .zero 22 + .align 32 + .type dv_a.4258, @object + .size dv_a.4258, 48 +dv_a.4258: + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -56 + .byte -56 + .byte -56 + .byte 100 + .byte -56 + .byte -90 + .byte -90 + .byte 100 + .byte -56 + .byte -85 + .byte -114 + .byte 100 + .byte -56 + .byte -106 + .byte 125 + .byte 100 + .byte -56 + .byte -100 + .byte -123 + .byte 100 + .byte -56 + .byte -96 + .byte 120 + .byte 100 + .byte -56 + .byte -93 + .byte 127 + .byte 100 + .byte -56 + .byte -106 + .byte -123 + .byte 100 + .byte -56 + .byte -103 + .byte 123 + .byte 100 + .byte -56 + .byte -99 + .byte -128 + .byte 100 + .byte -56 + .byte -96 + .byte 120 + .byte 100 + .type fraction.4394, @object + .size fraction.4394, 7 +fraction.4394: + .byte 0 + .byte 1 + .byte 2 + .byte 2 + .byte 3 + .byte 3 + .byte 0 + .type faw_2k.4810, @object + .size faw_2k.4810, 4 +faw_2k.4810: + .byte 10 + .byte 14 + .byte 17 + .byte 18 + .type faw_1k.4809, @object + .size faw_1k.4809, 4 +faw_1k.4809: + .byte 8 + .byte 10 + .byte 13 + .byte 14 + .type csbase_low_f0_shift.3963, @object + .size csbase_low_f0_shift.3963, 12 +csbase_low_f0_shift.3963: + .byte 6 + .byte 7 + .byte 7 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte 9 + .byte 9 + .byte 8 + .byte 9 + .align 32 + .type TestPatternJD1b.5550, @object + .size TestPatternJD1b.5550, 1152 +TestPatternJD1b.5550: + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long 538976288 + .long 538976288 + .long 538976288 + .long 538976288 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .align 32 + .type TestPatternJD1a.5549, @object + .size TestPatternJD1a.5549, 576 +TestPatternJD1a.5549: + .long 0 + .long 0 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long 538976288 + .long 538976288 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .align 32 + .type TestPattern2.5214, @object + .size TestPattern2.5214, 64 +TestPattern2.5214: + .long 305419896 + .long -2023406815 + .long 591751049 + .long -1737075662 + .long 1496864804 + .long 810116900 + .long 608765845 + .long -1718384845 + .long 1077433922 + .long 944132677 + .long 692265315 + .long 84310164 + .long 305434693 + .long -1737345945 + .long 305690164 + .long 878212643 + .align 32 + .type TestPattern1.5213, @object + .size TestPattern1.5213, 64 +TestPattern1.5213: + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .align 32 + .type TestPattern0.5212, @object + .size TestPattern0.5212, 64 +TestPattern0.5212: + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .align 32 + .type TT_a.5178, @object + .size TT_a.5178, 96 +TT_a.5178: + .value 6250 + .value 6250 + .value 6250 + .value 6250 + .value 5000 + .value 5000 + .value 5000 + .value 2500 + .value 5000 + .value 4166 + .value 4166 + .value 2500 + .value 5000 + .value 4285 + .value 3571 + .value 2500 + .value 5000 + .value 3750 + .value 3125 + .value 2500 + .value 5000 + .value 3888 + .value 3333 + .value 2500 + .value 5000 + .value 4000 + .value 3000 + .value 2500 + .value 5000 + .value 4090 + .value 3181 + .value 2500 + .value 5000 + .value 3750 + .value 3333 + .value 2500 + .value 5000 + .value 3846 + .value 3076 + .value 2500 + .value 5000 + .value 3928 + .value 3214 + .value 2500 + .value 5000 + .value 4000 + .value 3000 + .value 2500 + .align 2 + .type T1000_a.5177, @object + .size T1000_a.5177, 8 +T1000_a.5177: + .value 5000 + .value 3759 + .value 3003 + .value 2500 + .ident "GCC: (GNU) 4.1.3 20080308 (prerelease) (Ubuntu 4.1.2-21ubuntu1)" + .section .note.GNU-stack,"",@progbits +# 5 "crt0_includes.h" 2 +# 39 "crt0.S" 2 Index: targets/dfi/nf570/nf570/fallback/crt0.S =================================================================== --- targets/dfi/nf570/nf570/fallback/crt0.S (revision 0) +++ targets/dfi/nf570/nf570/fallback/crt0.S (revision 0) @@ -0,0 +1,233 @@ +/* -*- asm -*- + * $ $ + * + */ + +/* + * Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer + * + * This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * Originally this code was part of ucl the data compression library + * for upx the ``Ultimate Packer of eXecutables''. + * + * - Converted to gas assembly, and refitted to work with etherboot. + * Eric Biederman 20 Aug 2002 + * - Merged the nrv2b decompressor into crt0.base of coreboot + * Eric Biederman 26 Sept 2002 + */ + + +#include <arch/asm.h> +#include <arch/intel.h> +#include <console/loglevel.h> + +/* + * This is the entry code the code in .reset section + * jumps to this address. + * + */ +.section ".rom.data", "a", @progbits +.section ".rom.text", "ax", @progbits + + intel_chip_post_macro(0x01) /* delay for chipsets */ + +#include "crt0_includes.h" + +#if USE_DCACHE_RAM == 0 +#ifndef CONSOLE_DEBUG_TX_STRING + /* uses: esp, ebx, ax, dx */ +# define __CRT_CONSOLE_TX_STRING(string) \ + mov string, %ebx ; \ + CALLSP(crt_console_tx_string) + +# if defined(TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) +# define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string) +# else +# define CONSOLE_DEBUG_TX_STRING(string) +# endif +#endif + + /* clear boot_complete flag */ + xorl %ebp, %ebp +__main: + CONSOLE_DEBUG_TX_STRING($str_copying_to_ram) + + /* + * Copy data into RAM and clear the BSS. Since these segments + * isn't really that big we just copy/clear using bytes, not + * double words. + */ + intel_chip_post_macro(0x11) /* post 11 */ + + cld /* clear direction flag */ + + /* copy coreboot from it's initial load location to + * the location it is compiled to run at. + * Normally this is copying from FLASH ROM to RAM. + */ +#if !CONFIG_COMPRESS + movl $_liseg, %esi + movl $_iseg, %edi + movl $_eiseg, %ecx + subl %edi, %ecx + movb %cl, %al + shrl $2, %ecx + andb $3, %al + rep movsl + movb %al, %cl + rep movsb +#else + leal 4+_liseg, %esi + leal _iseg, %edi + movl %ebp, %esp /* preserve %ebp */ + movl $-1, %ebp /* last_m_off = -1 */ + jmp dcl1_n2b + +/* ------------- DECOMPRESSION ------------- + + Input: + %esi - source + %edi - dest + %ebp - -1 + cld + + Output: + %eax - 0 + %ecx - 0 +*/ + +.macro getbit bits +.if \bits == 1 + addl %ebx, %ebx + jnz 1f +.endif + movl (%esi), %ebx + subl $-4, %esi /* sets carry flag */ + adcl %ebx, %ebx +1: +.endm + +decompr_literals_n2b: + movsb + +decompr_loop_n2b: + addl %ebx, %ebx + jnz dcl2_n2b +dcl1_n2b: + getbit 32 +dcl2_n2b: + jc decompr_literals_n2b + xorl %eax, %eax + incl %eax /* m_off = 1 */ +loop1_n2b: + getbit 1 + adcl %eax, %eax /* m_off = m_off*2 + getbit() */ + getbit 1 + jnc loop1_n2b /* while(!getbit()) */ + xorl %ecx, %ecx + subl $3, %eax + jb decompr_ebpeax_n2b /* if (m_off == 2) goto decompr_ebpeax_n2b ? */ + shll $8, %eax + movb (%esi), %al /* m_off = (m_off - 3)*256 + src[ilen++] */ + incl %esi + xorl $-1, %eax + jz decompr_end_n2b /* if (m_off == 0xffffffff) goto decomp_end_n2b */ + movl %eax, %ebp /* last_m_off = m_off ?*/ +decompr_ebpeax_n2b: + getbit 1 + adcl %ecx, %ecx /* m_len = getbit() */ + getbit 1 + adcl %ecx, %ecx /* m_len = m_len*2 + getbit()) */ + jnz decompr_got_mlen_n2b /* if (m_len == 0) goto decompr_got_mlen_n2b */ + incl %ecx /* m_len++ */ +loop2_n2b: + getbit 1 + adcl %ecx, %ecx /* m_len = m_len*2 + getbit() */ + getbit 1 + jnc loop2_n2b /* while(!getbit()) */ + incl %ecx + incl %ecx /* m_len += 2 */ +decompr_got_mlen_n2b: + cmpl $-0xd00, %ebp + adcl $1, %ecx /* m_len = m_len + 1 + (last_m_off > 0xd00) */ + movl %esi, %edx + leal (%edi,%ebp), %esi /* m_pos = dst + olen + -m_off */ + rep + movsb /* dst[olen++] = *m_pos++ while(m_len > 0) */ + movl %edx, %esi + jmp decompr_loop_n2b +decompr_end_n2b: + intel_chip_post_macro(0x12) /* post 12 */ + + movl %esp, %ebp +#endif + + CONSOLE_DEBUG_TX_STRING($str_pre_main) + leal _iseg, %edi + jmp *%edi + +.Lhlt: + intel_chip_post_macro(0xee) /* post fe */ + hlt + jmp .Lhlt + +#ifdef __CRT_CONSOLE_TX_STRING + /* Uses esp, ebx, ax, dx */ +crt_console_tx_string: + mov (%ebx), %al + inc %ebx + cmp $0, %al + jne 9f + RETSP +9: +/* Base Address */ +#ifndef TTYS0_BASE +#define TTYS0_BASE 0x3f8 +#endif +/* Data */ +#define TTYS0_RBR (TTYS0_BASE+0x00) + +/* Control */ +#define TTYS0_TBR TTYS0_RBR +#define TTYS0_IER (TTYS0_BASE+0x01) +#define TTYS0_IIR (TTYS0_BASE+0x02) +#define TTYS0_FCR TTYS0_IIR +#define TTYS0_LCR (TTYS0_BASE+0x03) +#define TTYS0_MCR (TTYS0_BASE+0x04) +#define TTYS0_DLL TTYS0_RBR +#define TTYS0_DLM TTYS0_IER + +/* Status */ +#define TTYS0_LSR (TTYS0_BASE+0x05) +#define TTYS0_MSR (TTYS0_BASE+0x06) +#define TTYS0_SCR (TTYS0_BASE+0x07) + + mov %al, %ah +10: mov $TTYS0_LSR, %dx + inb %dx, %al + test $0x20, %al + je 10b + mov $TTYS0_TBR, %dx + mov %ah, %al + outb %al, %dx + + jmp crt_console_tx_string +#endif /* __CRT_CONSOLE_TX_STRING */ + +#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) +.section ".rom.data" +#if CONFIG_COMPRESS +str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n" +#else +str_copying_to_ram: .string "Copying coreboot to RAM.\r\n" +#endif +str_pre_main: .string "Jumping to coreboot.\r\n" +.previous + +#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ + +#endif /* USE_DCACHE_RAM */ Index: targets/dfi/nf570/nf570/fallback/coreboot_ram =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/coreboot_ram ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/ldoptions =================================================================== --- targets/dfi/nf570/nf570/fallback/ldoptions (revision 0) +++ targets/dfi/nf570/nf570/fallback/ldoptions (revision 0) @@ -0,0 +1,130 @@ +HAVE_MOVNTI = 1; +CONFIG_USE_INIT = 0; +HAVE_FALLBACK_BOOT = 1; +HAVE_FAILOVER_BOOT = 1; +ROM_IMAGE_SIZE = 0x20000; +PAYLOAD_SIZE = 0x1f000; +_ROMBASE = 0xfffdf000; +_RESET = 0xfffdf000; +_EXCEPTION_VECTORS = 0xfffdf100; +STACK_SIZE = 0x2000; +HEAP_SIZE = 0x8000; +_RAMBASE = 0x100000; +USE_DCACHE_RAM = 1; +CAR_FAM10 = 0; +DCACHE_RAM_BASE = 0xc8000; +DCACHE_RAM_SIZE = 0x8000; +DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000; +CONFIG_AP_CODE_IN_CAR = 0; +MEM_TRAIN_SEQ = 2; +WAIT_BEFORE_CPUS_INIT = 0; +CONFIG_COMPRESS = 1; +CONFIG_UNCOMPRESSED = 0; +CONFIG_LB_MEM_TOPK = 2048; +HAVE_OPTION_TABLE = 1; +USE_OPTION_TABLE = 0; +LB_CKS_RANGE_START = 49; +LB_CKS_RANGE_END = 122; +LB_CKS_LOC = 123; +DEBUG = 1; +CONFIG_CONSOLE_VGA = 1; +CONFIG_CONSOLE_VGA_MULTI = 0; +CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST = 0; +CONFIG_CONSOLE_BTEXT = 0; +CONFIG_CONSOLE_LOGBUF = 0; +CONFIG_CONSOLE_SROM = 0; +CONFIG_CONSOLE_SERIAL8250 = 1; +CONFIG_USBDEBUG_DIRECT = 0; +DEFAULT_CONSOLE_LOGLEVEL = 8; +MAXIMUM_CONSOLE_LOGLEVEL = 8; +CONFIG_SERIAL_POST = 0; +TTYS0_BASE = 0x3f8; +TTYS0_BAUD = 115200; +TTYS0_LCS = 0x3; +CONFIG_USE_PRINTK_IN_CAR = 1; +MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130; +MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x2b80; +CONFIG_MAX_PCI_BUSES = 255; +CONFIG_SMP = 1; +CONFIG_MAX_CPUS = 2; +CONFIG_MAX_PHYSICAL_CPUS = 1; +CONFIG_LOGICAL_CPUS = 1; +CONFIG_AP_IN_SIPI_WAIT = 0; +SERIAL_CPU_INIT = 1; +APIC_ID_OFFSET = 16; +ENABLE_APIC_EXT_ID = 0; +LIFT_BSP_APIC_ID = 1; +CONFIG_IDE_PAYLOAD = 0; +CONFIG_ROM_PAYLOAD = 1; +CONFIG_ROM_PAYLOAD_START = 0xfffc0000; +CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0; +CONFIG_COMPRESSED_PAYLOAD_LZMA = 0; +CONFIG_PRECOMPRESSED_PAYLOAD = 0; +CONFIG_SERIAL_PAYLOAD = 0; +CONFIG_FS_PAYLOAD = 0; +CONFIG_FS_EXT2 = 0; +CONFIG_FS_ISO9660 = 0; +CONFIG_FS_FAT = 0; +AUTOBOOT_DELAY = 2; +USE_WATCHDOG_ON_BOOT = 0; +CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1; +CONFIG_AGP_PLUGIN_SUPPORT = 1; +CONFIG_CARDBUS_PLUGIN_SUPPORT = 1; +CONFIG_PCIX_PLUGIN_SUPPORT = 1; +CONFIG_PCIEXP_PLUGIN_SUPPORT = 1; +CONFIG_IDE = 0; +IDE_BOOT_DRIVE = 0; +IDE_OFFSET = 0; +PCI_IO_CFG_EXT = 0; +CONFIG_CHIP_NAME = 1; +HAVE_INIT_TIMER = 1; +MAX_REBOOT_CNT = 3; +FAKE_SPDROM = 0; +HAVE_ACPI_TABLES = 0; +ACPI_SSDTX_NUM = 0; +HT_CHAIN_UNITID_BASE = 0; +HT_CHAIN_END_UNITID_BASE = 32; +SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0; +SB_HT_CHAIN_ON_BUS0 = 2; +PCI_BUS_SEGN_BITS = 0; +MMCONF_SUPPORT = 0; +MMCONF_SUPPORT_DEFAULT = 0; +HW_MEM_HOLE_SIZEK = 1048576; +HW_MEM_HOLE_SIZE_AUTO_INC = 0; +CONFIG_VAR_MTRR_HOLE = 1; +K8_HT_FREQ_1G_SUPPORT = 1; +K8_REV_F_SUPPORT = 1; +CBB = 0; +CDB = 24; +HT3_SUPPORT = 0; +EXT_RT_TBL_SUPPORT = 0; +EXT_CONF_SUPPORT = 0; +DIMM_SUPPORT = 0x4; +CPU_SOCKET_TYPE = 17; +CPU_ADDR_BITS = 40; +CONFIG_VGA_ROM_RUN = 0; +CONFIG_PCI_ROM_RUN = 1; +CONFIG_PCI_64BIT_PREF_MEM = 0; +CONFIG_AMDMCT = 0; +K8_MEM_BANK_B_ONLY = 0; +CONFIG_PCIE_CONFIGSPACE_HOLE = 0; +HAVE_MP_TABLE = 1; +HAVE_PIRQ_TABLE = 1; +USE_FALLBACK_IMAGE = 1; +USE_FAILOVER_IMAGE = 0; +HAVE_HARD_RESET = 1; +IRQ_SLOT_COUNT = 11; +CONFIG_IOAPIC = 1; +FALLBACK_SIZE = 0x3f000; +FAILOVER_SIZE = 0x1000; +ROM_SIZE = 0x80000; +ROM_SECTION_SIZE = 0x3f000; +ROM_SECTION_OFFSET = 0x40000; +XIP_ROM_SIZE = 0x40000; +XIP_ROM_BASE = 0xfffc0000; +CONFIG_GDB_STUB = 0; +HAVE_FANCTL = 1; +CONFIG_UDELAY_IO = 0; +CONFIG_UDELAY_TSC = 0; +CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0; +AGP_APERTURE_SIZE = 0x4000000; Index: targets/dfi/nf570/nf570/fallback/Makefile.settings =================================================================== --- targets/dfi/nf570/nf570/fallback/Makefile.settings (revision 0) +++ targets/dfi/nf570/nf570/fallback/Makefile.settings (revision 0) @@ -0,0 +1,316 @@ +# File: dfi/nf570/nf570/fallback/Makefile.settings is autogenerated +TOP:=/home/chris/coreboot-v2 +TARGET_DIR:=dfi/nf570/nf570/fallback + +export ARCH:=i386 +export HAVE_MOVNTI:=1 +export CROSS_COMPILE:= +export CC:=$(CROSS_COMPILE)gcc -m32 +export HOSTCC:=gcc +export OBJCOPY:=$(CROSS_COMPILE)objcopy --gap-fill 0xff +export COREBOOT_VERSION:="2.0.0" +export COREBOOT_BUILD:="$(shell date)" +export COREBOOT_COMPILE_TIME:="$(shell date +%T)" +export COREBOOT_COMPILE_BY:="$(shell whoami)" +export COREBOOT_COMPILE_HOST:="$(shell hostname)" +export COREBOOT_COMPILE_DOMAIN:="$(shell dnsdomainname)" +export COREBOOT_COMPILER:="$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)" +export COREBOOT_LINKER:="$(shell $(CC) -Wl,--version 2>&1 | grep version | tail -n 1)" +export COREBOOT_ASSEMBLER:="$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )" +export CONFIG_USE_INIT:=0 +export HAVE_FALLBACK_BOOT:=1 +export HAVE_FAILOVER_BOOT:=1 +export ROM_IMAGE_SIZE:=0x20000 +export PAYLOAD_SIZE:=0x1f000 +export _ROMBASE:=0xfffdf000 +export _RESET:=0xfffdf000 +export _EXCEPTION_VECTORS:=0xfffdf100 +export STACK_SIZE:=0x2000 +export HEAP_SIZE:=0x8000 +export _RAMBASE:=0x100000 +export USE_DCACHE_RAM:=1 +export CAR_FAM10:=0 +export DCACHE_RAM_BASE:=0xc8000 +export DCACHE_RAM_SIZE:=0x8000 +export DCACHE_RAM_GLOBAL_VAR_SIZE:=0x1000 +export CONFIG_AP_CODE_IN_CAR:=0 +export MEM_TRAIN_SEQ:=2 +export WAIT_BEFORE_CPUS_INIT:=0 +export CONFIG_COMPRESS:=1 +export CONFIG_UNCOMPRESSED:=0 +export CONFIG_LB_MEM_TOPK:=2048 +export HAVE_OPTION_TABLE:=1 +export USE_OPTION_TABLE:=0 +export LB_CKS_RANGE_START:=49 +export LB_CKS_RANGE_END:=122 +export LB_CKS_LOC:=123 +export CRT0:=$(TOP)/src/arch/$(ARCH)/init/crt0.S.lb +export DEBUG:=1 +export CONFIG_CONSOLE_VGA:=1 +export CONFIG_CONSOLE_VGA_MULTI:=0 +export CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST:=0 +export CONFIG_CONSOLE_BTEXT:=0 +export CONFIG_CONSOLE_LOGBUF:=0 +export CONFIG_CONSOLE_SROM:=0 +export CONFIG_CONSOLE_SERIAL8250:=1 +export CONFIG_USBDEBUG_DIRECT:=0 +export DEFAULT_CONSOLE_LOGLEVEL:=8 +export MAXIMUM_CONSOLE_LOGLEVEL:=8 +export CONFIG_SERIAL_POST:=0 +export TTYS0_BASE:=0x3f8 +export TTYS0_BAUD:=115200 +export TTYS0_LCS:=0x3 +export CONFIG_USE_PRINTK_IN_CAR:=1 +export MAINBOARD:=/home/chris/coreboot-v2/src/mainboard/dfi/nf570 +export MAINBOARD_PART_NUMBER:="nf570" +export MAINBOARD_VENDOR:="DFI" +export MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID:=4130 +export MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID:=0x2b80 +export CONFIG_MAX_PCI_BUSES:=255 +export CONFIG_SMP:=1 +export CONFIG_MAX_CPUS:=2 +export CONFIG_MAX_PHYSICAL_CPUS:=1 +export CONFIG_LOGICAL_CPUS:=1 +export CONFIG_AP_IN_SIPI_WAIT:=0 +export SERIAL_CPU_INIT:=1 +export APIC_ID_OFFSET:=16 +export ENABLE_APIC_EXT_ID:=0 +export LIFT_BSP_APIC_ID:=1 +export CONFIG_IDE_PAYLOAD:=0 +export CONFIG_ROM_PAYLOAD:=1 +export CONFIG_ROM_PAYLOAD_START:=0xfffc0000 +export CONFIG_COMPRESSED_PAYLOAD_NRV2B:=0 +export CONFIG_COMPRESSED_PAYLOAD_LZMA:=0 +export CONFIG_PRECOMPRESSED_PAYLOAD:=0 +export CONFIG_SERIAL_PAYLOAD:=0 +export CONFIG_FS_PAYLOAD:=0 +export CONFIG_FS_EXT2:=0 +export CONFIG_FS_ISO9660:=0 +export CONFIG_FS_FAT:=0 +export AUTOBOOT_DELAY:=2 +export AUTOBOOT_CMDLINE:="hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200" +export USE_WATCHDOG_ON_BOOT:=0 +export CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT:=1 +export CONFIG_AGP_PLUGIN_SUPPORT:=1 +export CONFIG_CARDBUS_PLUGIN_SUPPORT:=1 +export CONFIG_PCIX_PLUGIN_SUPPORT:=1 +export CONFIG_PCIEXP_PLUGIN_SUPPORT:=1 +export CONFIG_IDE:=0 +export IDE_BOOT_DRIVE:=0 +export IDE_OFFSET:=0 +export PCI_IO_CFG_EXT:=0 +export CONFIG_CHIP_NAME:=1 +export HAVE_INIT_TIMER:=1 +export MAX_REBOOT_CNT:=3 +export FAKE_SPDROM:=0 +export HAVE_ACPI_TABLES:=0 +export ACPI_SSDTX_NUM:=0 +export HT_CHAIN_UNITID_BASE:=0 +export HT_CHAIN_END_UNITID_BASE:=32 +export SB_HT_CHAIN_UNITID_OFFSET_ONLY:=0 +export SB_HT_CHAIN_ON_BUS0:=2 +export PCI_BUS_SEGN_BITS:=0 +export MMCONF_SUPPORT:=0 +export MMCONF_SUPPORT_DEFAULT:=0 +export HW_MEM_HOLE_SIZEK:=1048576 +export HW_MEM_HOLE_SIZE_AUTO_INC:=0 +export CONFIG_VAR_MTRR_HOLE:=1 +export K8_HT_FREQ_1G_SUPPORT:=1 +export K8_REV_F_SUPPORT:=1 +export CBB:=0 +export CDB:=24 +export HT3_SUPPORT:=0 +export EXT_RT_TBL_SUPPORT:=0 +export EXT_CONF_SUPPORT:=0 +export DIMM_SUPPORT:=0x4 +export CPU_SOCKET_TYPE:=17 +export CPU_ADDR_BITS:=40 +export CONFIG_VGA_ROM_RUN:=0 +export CONFIG_PCI_ROM_RUN:=1 +export CONFIG_PCI_64BIT_PREF_MEM:=0 +export CONFIG_AMDMCT:=0 +export K8_MEM_BANK_B_ONLY:=0 +export CONFIG_PCIE_CONFIGSPACE_HOLE:=0 +export HAVE_MP_TABLE:=1 +export HAVE_PIRQ_TABLE:=1 +export USE_FALLBACK_IMAGE:=1 +export USE_FAILOVER_IMAGE:=0 +export HAVE_HARD_RESET:=1 +export IRQ_SLOT_COUNT:=11 +export CONFIG_IOAPIC:=1 +export FALLBACK_SIZE:=0x3f000 +export FAILOVER_SIZE:=0x1000 +export ROM_SIZE:=0x80000 +export ROM_SECTION_SIZE:=0x3f000 +export ROM_SECTION_OFFSET:=0x40000 +export XIP_ROM_SIZE:=0x40000 +export XIP_ROM_BASE:=0xfffc0000 +export COREBOOT_EXTRA_VERSION:="$(shell cat ../../VERSION)_Fallback" +export MAINBOARD_POWER_ON_AFTER_POWER_FAIL:=MAINBOARD_POWER_ON +export CONFIG_GDB_STUB:=0 +export HAVE_FANCTL:=1 +export CONFIG_UDELAY_IO:=0 +export CONFIG_UDELAY_TSC:=0 +export CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2:=0 +export AGP_APERTURE_SIZE:=0x4000000 + +export VARIABLES := +export VARIABLES += ARCH +export VARIABLES += HAVE_MOVNTI +export VARIABLES += CROSS_COMPILE +export VARIABLES += CC +export VARIABLES += HOSTCC +export VARIABLES += OBJCOPY +export VARIABLES += COREBOOT_VERSION +export VARIABLES += COREBOOT_BUILD +export VARIABLES += COREBOOT_COMPILE_TIME +export VARIABLES += COREBOOT_COMPILE_BY +export VARIABLES += COREBOOT_COMPILE_HOST +export VARIABLES += COREBOOT_COMPILE_DOMAIN +export VARIABLES += COREBOOT_COMPILER +export VARIABLES += COREBOOT_LINKER +export VARIABLES += COREBOOT_ASSEMBLER +export VARIABLES += CONFIG_USE_INIT +export VARIABLES += HAVE_FALLBACK_BOOT +export VARIABLES += HAVE_FAILOVER_BOOT +export VARIABLES += ROM_IMAGE_SIZE +export VARIABLES += PAYLOAD_SIZE +export VARIABLES += _ROMBASE +export VARIABLES += _RESET +export VARIABLES += _EXCEPTION_VECTORS +export VARIABLES += STACK_SIZE +export VARIABLES += HEAP_SIZE +export VARIABLES += _RAMBASE +export VARIABLES += USE_DCACHE_RAM +export VARIABLES += CAR_FAM10 +export VARIABLES += DCACHE_RAM_BASE +export VARIABLES += DCACHE_RAM_SIZE +export VARIABLES += DCACHE_RAM_GLOBAL_VAR_SIZE +export VARIABLES += CONFIG_AP_CODE_IN_CAR +export VARIABLES += MEM_TRAIN_SEQ +export VARIABLES += WAIT_BEFORE_CPUS_INIT +export VARIABLES += CONFIG_COMPRESS +export VARIABLES += CONFIG_UNCOMPRESSED +export VARIABLES += CONFIG_LB_MEM_TOPK +export VARIABLES += HAVE_OPTION_TABLE +export VARIABLES += USE_OPTION_TABLE +export VARIABLES += LB_CKS_RANGE_START +export VARIABLES += LB_CKS_RANGE_END +export VARIABLES += LB_CKS_LOC +export VARIABLES += CRT0 +export VARIABLES += DEBUG +export VARIABLES += CONFIG_CONSOLE_VGA +export VARIABLES += CONFIG_CONSOLE_VGA_MULTI +export VARIABLES += CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST +export VARIABLES += CONFIG_CONSOLE_BTEXT +export VARIABLES += CONFIG_CONSOLE_LOGBUF +export VARIABLES += CONFIG_CONSOLE_SROM +export VARIABLES += CONFIG_CONSOLE_SERIAL8250 +export VARIABLES += CONFIG_USBDEBUG_DIRECT +export VARIABLES += DEFAULT_CONSOLE_LOGLEVEL +export VARIABLES += MAXIMUM_CONSOLE_LOGLEVEL +export VARIABLES += CONFIG_SERIAL_POST +export VARIABLES += TTYS0_BASE +export VARIABLES += TTYS0_BAUD +export VARIABLES += TTYS0_LCS +export VARIABLES += CONFIG_USE_PRINTK_IN_CAR +export VARIABLES += MAINBOARD +export VARIABLES += MAINBOARD_PART_NUMBER +export VARIABLES += MAINBOARD_VENDOR +export VARIABLES += MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +export VARIABLES += MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +export VARIABLES += CONFIG_MAX_PCI_BUSES +export VARIABLES += CONFIG_SMP +export VARIABLES += CONFIG_MAX_CPUS +export VARIABLES += CONFIG_MAX_PHYSICAL_CPUS +export VARIABLES += CONFIG_LOGICAL_CPUS +export VARIABLES += CONFIG_AP_IN_SIPI_WAIT +export VARIABLES += SERIAL_CPU_INIT +export VARIABLES += APIC_ID_OFFSET +export VARIABLES += ENABLE_APIC_EXT_ID +export VARIABLES += LIFT_BSP_APIC_ID +export VARIABLES += CONFIG_IDE_PAYLOAD +export VARIABLES += CONFIG_ROM_PAYLOAD +export VARIABLES += CONFIG_ROM_PAYLOAD_START +export VARIABLES += CONFIG_COMPRESSED_PAYLOAD_NRV2B +export VARIABLES += CONFIG_COMPRESSED_PAYLOAD_LZMA +export VARIABLES += CONFIG_PRECOMPRESSED_PAYLOAD +export VARIABLES += CONFIG_SERIAL_PAYLOAD +export VARIABLES += CONFIG_FS_PAYLOAD +export VARIABLES += CONFIG_FS_EXT2 +export VARIABLES += CONFIG_FS_ISO9660 +export VARIABLES += CONFIG_FS_FAT +export VARIABLES += AUTOBOOT_DELAY +export VARIABLES += AUTOBOOT_CMDLINE +export VARIABLES += USE_WATCHDOG_ON_BOOT +export VARIABLES += CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT +export VARIABLES += CONFIG_AGP_PLUGIN_SUPPORT +export VARIABLES += CONFIG_CARDBUS_PLUGIN_SUPPORT +export VARIABLES += CONFIG_PCIX_PLUGIN_SUPPORT +export VARIABLES += CONFIG_PCIEXP_PLUGIN_SUPPORT +export VARIABLES += CONFIG_IDE +export VARIABLES += IDE_BOOT_DRIVE +export VARIABLES += IDE_OFFSET +export VARIABLES += PCI_IO_CFG_EXT +export VARIABLES += CONFIG_CHIP_NAME +export VARIABLES += HAVE_INIT_TIMER +export VARIABLES += MAX_REBOOT_CNT +export VARIABLES += FAKE_SPDROM +export VARIABLES += HAVE_ACPI_TABLES +export VARIABLES += ACPI_SSDTX_NUM +export VARIABLES += HT_CHAIN_UNITID_BASE +export VARIABLES += HT_CHAIN_END_UNITID_BASE +export VARIABLES += SB_HT_CHAIN_UNITID_OFFSET_ONLY +export VARIABLES += SB_HT_CHAIN_ON_BUS0 +export VARIABLES += PCI_BUS_SEGN_BITS +export VARIABLES += MMCONF_SUPPORT +export VARIABLES += MMCONF_SUPPORT_DEFAULT +export VARIABLES += HW_MEM_HOLE_SIZEK +export VARIABLES += HW_MEM_HOLE_SIZE_AUTO_INC +export VARIABLES += CONFIG_VAR_MTRR_HOLE +export VARIABLES += K8_HT_FREQ_1G_SUPPORT +export VARIABLES += K8_REV_F_SUPPORT +export VARIABLES += CBB +export VARIABLES += CDB +export VARIABLES += HT3_SUPPORT +export VARIABLES += EXT_RT_TBL_SUPPORT +export VARIABLES += EXT_CONF_SUPPORT +export VARIABLES += DIMM_SUPPORT +export VARIABLES += CPU_SOCKET_TYPE +export VARIABLES += CPU_ADDR_BITS +export VARIABLES += CONFIG_VGA_ROM_RUN +export VARIABLES += CONFIG_PCI_ROM_RUN +export VARIABLES += CONFIG_PCI_64BIT_PREF_MEM +export VARIABLES += CONFIG_AMDMCT +export VARIABLES += K8_MEM_BANK_B_ONLY +export VARIABLES += CONFIG_PCIE_CONFIGSPACE_HOLE +export VARIABLES += HAVE_MP_TABLE +export VARIABLES += HAVE_PIRQ_TABLE +export VARIABLES += USE_FALLBACK_IMAGE +export VARIABLES += USE_FAILOVER_IMAGE +export VARIABLES += HAVE_HARD_RESET +export VARIABLES += IRQ_SLOT_COUNT +export VARIABLES += CONFIG_IOAPIC +export VARIABLES += FALLBACK_SIZE +export VARIABLES += FAILOVER_SIZE +export VARIABLES += ROM_SIZE +export VARIABLES += ROM_SECTION_SIZE +export VARIABLES += ROM_SECTION_OFFSET +export VARIABLES += XIP_ROM_SIZE +export VARIABLES += XIP_ROM_BASE +export VARIABLES += COREBOOT_EXTRA_VERSION +export VARIABLES += MAINBOARD_POWER_ON_AFTER_POWER_FAIL +export VARIABLES += CONFIG_GDB_STUB +export VARIABLES += HAVE_FANCTL +export VARIABLES += CONFIG_UDELAY_IO +export VARIABLES += CONFIG_UDELAY_TSC +export VARIABLES += CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +export VARIABLES += AGP_APERTURE_SIZE + + + +Makefile.settings: /home/chris/coreboot-v2/targets/dfi/nf570/nf570/config.py /home/chris/coreboot-v2/targets/dfi/nf570/Config.lb + (cd /home/chris/coreboot-v2/targets ; export PYTHONPATH=/home/chris/coreboot-v2/util/newconfig ; python dfi/nf570/nf570/config.py dfi/nf570/Config.lb /home/chris/coreboot-v2) + +DISTRO_CFLAGS+=-fno-stack-protector +DISTRO_LFLAGS+= -Wl,--build-id=none Index: targets/dfi/nf570/nf570/fallback/coreboot =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/coreboot ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/coreboot.strip =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/coreboot.strip ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/fallback/Makefile =================================================================== --- targets/dfi/nf570/nf570/fallback/Makefile (revision 0) +++ targets/dfi/nf570/nf570/fallback/Makefile (revision 0) @@ -0,0 +1,725 @@ +# File: dfi/nf570/nf570/fallback/Makefile is autogenerated + +all: coreboot.rom + +.PHONY: all + +# Get the value of TOP, VARIABLES, and several other variables. +include Makefile.settings + +# Function to create an item like -Di586 or -DCONFIG_MAX_CPUS='1' or -Ui686 +D_item = $(if $(subst undefined,,$(origin $1)),-D$1$(if $($1),='$($1)',),-U$1) + +# Compute the value of CPUFLAGS here during make's first pass. +CPUFLAGS := $(foreach _var_,$(VARIABLES),$(call D_item,$(_var_))) + + CPP:= $(CC) -x assembler-with-cpp -DASSEMBLY -E + LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name) + GCC_INC_DIR := $(shell LC_ALL=C $(CC) -print-search-dirs | sed -ne "s/install: (.*)/\1include/gp") + CPPFLAGS := -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS) + CFLAGS := $(CPU_OPT) $(DISTRO_CFLAGS) $(CPPFLAGS) -Os -nostdinc -nostdlib -fno-builtin -Wall + HOSTCFLAGS:= -Os -Wall + COREBOOT_RAM-$(CONFIG_COMPRESS):=coreboot_ram.nrv2b + COREBOOT_RAM-$(CONFIG_UNCOMPRESSED):=coreboot_ram.bin + COREBOOT_APC:= + COREBOOT_RAM_ROM:=coreboot_ram.rom + .PHONY : crt0.s + .PHONY : version.o +PAYLOAD:=/boot/filo.elf + PAYLOAD-1:=payload + PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_NRV2B):=payload.nrv2b + PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_LZMA):=payload.lzma + + +# object dependencies (objectrules:) +INIT-OBJECTS := +OBJECTS := +DRIVER := + +SOURCES := +OBJECTS += malloc.o +SOURCES += /home/chris/coreboot-v2/src/lib/malloc.c +OBJECTS += cache.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/cache/cache.c +OBJECTS += pci_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_ops.c +OBJECTS += amd_mtrr.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/mtrr/amd_mtrr.c +OBJECTS += lapic.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/lapic.c +OBJECTS += smbus_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/smbus_ops.c +OBJECTS += memset.o +SOURCES += /home/chris/coreboot-v2/src/lib/memset.c +OBJECTS += pci_ops_auto.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_auto.c +OBJECTS += superio.o +SOURCES += /home/chris/coreboot-v2/src/superio/ite/it8716f/superio.c +OBJECTS += lapic_cpu_init.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c +OBJECTS += fallback_boot.o +SOURCES += /home/chris/coreboot-v2/src/lib/fallback_boot.c +OBJECTS += model_fxx_update_microcode.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_update_microcode.c +OBJECTS += mptable.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/mptable.c +OBJECTS += pciexp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pciexp_device.c +OBJECTS += tables.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/tables.c +OBJECTS += keyboard.o +SOURCES += /home/chris/coreboot-v2/src/pc80/keyboard.c +OBJECTS += microcode.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/microcode/microcode.c +OBJECTS += pnp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pnp_device.c +OBJECTS += printk.o +SOURCES += /home/chris/coreboot-v2/src/console/printk.c +OBJECTS += irq_tables.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/irq_tables.c +OBJECTS += pcix_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pcix_device.c +OBJECTS += get_bus_conf.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/get_bus_conf.c +OBJECTS += decode.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/decode.c +OBJECTS += pci_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_device.c +OBJECTS += console.o +SOURCES += /home/chris/coreboot-v2/src/console/console.c +OBJECTS += amd_sibling.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/dualcore/amd_sibling.c +OBJECTS += northbridge.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c +OBJECTS += elfboot.o +SOURCES += /home/chris/coreboot-v2/src/boot/elfboot.c +OBJECTS += hardwaremain.o +SOURCES += /home/chris/coreboot-v2/src/boot/hardwaremain.c +OBJECTS += boot.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/boot.c +OBJECTS += i8259.o +SOURCES += /home/chris/coreboot-v2/src/pc80/i8259.c +OBJECTS += delay.o +SOURCES += /home/chris/coreboot-v2/src/lib/delay.c +OBJECTS += get_sblk_pci1234.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/get_sblk_pci1234.c +OBJECTS += version.o +SOURCES += /home/chris/coreboot-v2/src/lib/version.c +OBJECTS += pci_ops_mmconf.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_mmconf.c +OBJECTS += memcmp.o +SOURCES += /home/chris/coreboot-v2/src/lib/memcmp.c +OBJECTS += secondary.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S +OBJECTS += isa-dma.o +SOURCES += /home/chris/coreboot-v2/src/pc80/isa-dma.c +OBJECTS += mcp55_reset.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_reset.c +OBJECTS += pcibios.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/pcbios/pcibios.c +OBJECTS += hypertransport.o +SOURCES += /home/chris/coreboot-v2/src/devices/hypertransport.c +OBJECTS += vtxprintf.o +SOURCES += /home/chris/coreboot-v2/src/console/vtxprintf.c +OBJECTS += ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/ops.c +OBJECTS += prim_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/prim_ops.c +OBJECTS += root_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/root_device.c +OBJECTS += cardbus_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/cardbus_device.c +OBJECTS += uart8250.o +SOURCES += /home/chris/coreboot-v2/src/lib/uart8250.c +OBJECTS += sys.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/sys.c +OBJECTS += fanctl.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/fanctl.c +OBJECTS += device_util.o +SOURCES += /home/chris/coreboot-v2/src/devices/device_util.c +OBJECTS += socket_AM2.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/socket_AM2/socket_AM2.c +OBJECTS += ./option_table.o +SOURCES += ./option_table.c +OBJECTS += compute_ip_checksum.o +SOURCES += /home/chris/coreboot-v2/src/lib/compute_ip_checksum.c +OBJECTS += device.o +SOURCES += /home/chris/coreboot-v2/src/devices/device.c +OBJECTS += mtrr.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/mtrr/mtrr.c +OBJECTS += processor_name.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/processor_name.c +OBJECTS += exception.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/exception.c +OBJECTS += memcpy.o +SOURCES += /home/chris/coreboot-v2/src/lib/memcpy.c +OBJECTS += agp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/agp_device.c +OBJECTS += clog2.o +SOURCES += /home/chris/coreboot-v2/src/lib/clog2.c +OBJECTS += pirq_routing.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/pirq_routing.c +OBJECTS += apic_timer.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/apic_timer.c +OBJECTS += memmove.o +SOURCES += /home/chris/coreboot-v2/src/lib/memmove.c +OBJECTS += pci_rom.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_rom.c +OBJECTS += pgtbl.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/pae/pgtbl.c +OBJECTS += pci_ops_conf2.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_conf2.c +OBJECTS += pci_ops_conf1.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_conf1.c +OBJECTS += mc146818rtc.o +SOURCES += /home/chris/coreboot-v2/src/pc80/mc146818rtc.c +OBJECTS += fpu.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/fpu.c +OBJECTS += coreboot_table.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/coreboot_table.c +OBJECTS += rom_stream.o +SOURCES += /home/chris/coreboot-v2/src/stream/rom_stream.c +OBJECTS += debug.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/debug.c +OBJECTS += c_start.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/c_start.S +OBJECTS += ops2.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/ops2.c +OBJECTS += biosemu.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/biosemu.c +OBJECTS += vsprintf.o +SOURCES += /home/chris/coreboot-v2/src/console/vsprintf.c +OBJECTS += cpu.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/cpu.c +OBJECTS += mpspec.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/smp/mpspec.c +OBJECTS += static.o +SOURCES += static.c +DRIVER += mcp55_aza.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_aza.c +DRIVER += mcp55_ht.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_ht.c +DRIVER += mcp55_pci.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_pci.c +DRIVER += uart8250_console.o +SOURCES += /home/chris/coreboot-v2/src/console/uart8250_console.c +DRIVER += mcp55_ide.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_ide.c +DRIVER += vga_console.o +SOURCES += /home/chris/coreboot-v2/src/console/vga_console.c +DRIVER += mainboard.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/mainboard.c +DRIVER += mcp55_lpc.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_lpc.c +DRIVER += mcp55_nic.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_nic.c +DRIVER += mcp55_pcie.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_pcie.c +DRIVER += mcp55_usb2.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_usb2.c +DRIVER += mcp55_sata.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_sata.c +DRIVER += mcp55.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55.c +DRIVER += mcp55_usb.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_usb.c +DRIVER += misc_control.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/misc_control.c +DRIVER += model_fxx_init.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_init.c +DRIVER += mcp55_smbus.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_smbus.c + +# ldscript.ld dependencies: +LDSUBSCRIPTS-1 := +LDSUBSCRIPTS-1 += $(TOP)/src/arch/i386/init/ldscript.lb +LDSUBSCRIPTS-1 += $(TOP)/src//cpu/x86/32bit/reset32.lds +LDSUBSCRIPTS-1 += $(TOP)/src//southbridge/nvidia/mcp55/id.lds + +# Dependencies for crt0_includes.h +CRT0_INCLUDES:= +CRT0_INCLUDES += $(TOP)/src/cpu/x86/32bit/entry32.inc +CRT0_INCLUDES += $(TOP)/src/cpu/x86/32bit/reset32.inc +CRT0_INCLUDES += $(TOP)/src/southbridge/nvidia/mcp55/id.inc +CRT0_INCLUDES += $(TOP)/src/cpu/amd/car/cache_as_ram.inc +CRT0_INCLUDES += ./cache_as_ram_auto.inc + +# userdefines: + +# mainrulelist: +# From makerule or docipl commands: + +# initobjectrules: + +# objectrules: +malloc.o: $(TOP)/src/lib/malloc.c + $(CC) -c $(CFLAGS) -o $@ $< +cache.o: $(TOP)/src/cpu/x86/cache/cache.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops.o: $(TOP)/src/devices/pci_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +amd_mtrr.o: $(TOP)/src/cpu/amd/mtrr/amd_mtrr.c + $(CC) -c $(CFLAGS) -o $@ $< +lapic.o: $(TOP)/src/cpu/x86/lapic/lapic.c + $(CC) -c $(CFLAGS) -o $@ $< +smbus_ops.o: $(TOP)/src/devices/smbus_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +memset.o: $(TOP)/src/lib/memset.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_auto.o: $(TOP)/src/arch/i386/lib/pci_ops_auto.c + $(CC) -c $(CFLAGS) -o $@ $< +superio.o: $(TOP)/src/superio/ite/it8716f/superio.c + $(CC) -c $(CFLAGS) -o $@ $< +lapic_cpu_init.o: $(TOP)/src/cpu/x86/lapic/lapic_cpu_init.c + $(CC) -c $(CFLAGS) -o $@ $< +fallback_boot.o: $(TOP)/src/lib/fallback_boot.c + $(CC) -c $(CFLAGS) -o $@ $< +model_fxx_update_microcode.o: $(TOP)/src/cpu/amd/model_fxx/model_fxx_update_microcode.c + $(CC) -c $(CFLAGS) -o $@ $< +mptable.o: $(TOP)/src/mainboard/dfi/nf570/mptable.c + $(CC) -c $(CFLAGS) -o $@ $< +pciexp_device.o: $(TOP)/src/devices/pciexp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +tables.o: $(TOP)/src/arch/i386/boot/tables.c + $(CC) -c $(CFLAGS) -o $@ $< +keyboard.o: $(TOP)/src/pc80/keyboard.c + $(CC) -c $(CFLAGS) -o $@ $< +microcode.o: $(TOP)/src/cpu/amd/microcode/microcode.c + $(CC) -c $(CFLAGS) -o $@ $< +pnp_device.o: $(TOP)/src/devices/pnp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +printk.o: $(TOP)/src/console/printk.c + $(CC) -c $(CFLAGS) -o $@ $< +irq_tables.o: $(TOP)/src/mainboard/dfi/nf570/irq_tables.c + $(CC) -c $(CFLAGS) -o $@ $< +pcix_device.o: $(TOP)/src/devices/pcix_device.c + $(CC) -c $(CFLAGS) -o $@ $< +get_bus_conf.o: $(TOP)/src/mainboard/dfi/nf570/get_bus_conf.c + $(CC) -c $(CFLAGS) -o $@ $< +decode.o: $(TOP)/src/devices/emulator/x86emu/decode.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_device.o: $(TOP)/src/devices/pci_device.c + $(CC) -c $(CFLAGS) -o $@ $< +console.o: $(TOP)/src/console/console.c + $(CC) -c $(CFLAGS) -o $@ $< +amd_sibling.o: $(TOP)/src/cpu/amd/dualcore/amd_sibling.c + $(CC) -c $(CFLAGS) -o $@ $< +northbridge.o: $(TOP)/src/northbridge/amd/amdk8/northbridge.c + $(CC) -c $(CFLAGS) -o $@ $< +elfboot.o: $(TOP)/src/boot/elfboot.c + $(CC) -c $(CFLAGS) -o $@ $< +hardwaremain.o: $(TOP)/src/boot/hardwaremain.c + $(CC) -c $(CFLAGS) -o $@ $< +boot.o: $(TOP)/src/arch/i386/boot/boot.c + $(CC) -c $(CFLAGS) -o $@ $< +i8259.o: $(TOP)/src/pc80/i8259.c + $(CC) -c $(CFLAGS) -o $@ $< +delay.o: $(TOP)/src/lib/delay.c + $(CC) -c $(CFLAGS) -o $@ $< +get_sblk_pci1234.o: $(TOP)/src/northbridge/amd/amdk8/get_sblk_pci1234.c + $(CC) -c $(CFLAGS) -o $@ $< +version.o: $(TOP)/src/lib/version.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_mmconf.o: $(TOP)/src/arch/i386/lib/pci_ops_mmconf.c + $(CC) -c $(CFLAGS) -o $@ $< +memcmp.o: $(TOP)/src/lib/memcmp.c + $(CC) -c $(CFLAGS) -o $@ $< +secondary.o: secondary.s + $(CC) -c $(CPU_OPT) -o $@ $< +secondary.s: $(TOP)/src/cpu/x86/lapic/secondary.S + $(CPP) $(CPPFLAGS) $< >$@.new && mv $@.new $@ +isa-dma.o: $(TOP)/src/pc80/isa-dma.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_reset.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_reset.c + $(CC) -c $(CFLAGS) -o $@ $< +pcibios.o: $(TOP)/src/devices/emulator/pcbios/pcibios.c + $(CC) -c $(CFLAGS) -o $@ $< +hypertransport.o: $(TOP)/src/devices/hypertransport.c + $(CC) -c $(CFLAGS) -o $@ $< +vtxprintf.o: $(TOP)/src/console/vtxprintf.c + $(CC) -c $(CFLAGS) -o $@ $< +ops.o: $(TOP)/src/devices/emulator/x86emu/ops.c + $(CC) -c $(CFLAGS) -o $@ $< +prim_ops.o: $(TOP)/src/devices/emulator/x86emu/prim_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +root_device.o: $(TOP)/src/devices/root_device.c + $(CC) -c $(CFLAGS) -o $@ $< +cardbus_device.o: $(TOP)/src/devices/cardbus_device.c + $(CC) -c $(CFLAGS) -o $@ $< +uart8250.o: $(TOP)/src/lib/uart8250.c + $(CC) -c $(CFLAGS) -o $@ $< +sys.o: $(TOP)/src/devices/emulator/x86emu/sys.c + $(CC) -c $(CFLAGS) -o $@ $< +fanctl.o: $(TOP)/src/mainboard/dfi/nf570/fanctl.c + $(CC) -c $(CFLAGS) -o $@ $< +device_util.o: $(TOP)/src/devices/device_util.c + $(CC) -c $(CFLAGS) -o $@ $< +socket_AM2.o: $(TOP)/src/cpu/amd/socket_AM2/socket_AM2.c + $(CC) -c $(CFLAGS) -o $@ $< +./option_table.o: ./option_table.c + $(CC) -c $(CFLAGS) -o $@ $< +compute_ip_checksum.o: $(TOP)/src/lib/compute_ip_checksum.c + $(CC) -c $(CFLAGS) -o $@ $< +device.o: $(TOP)/src/devices/device.c + $(CC) -c $(CFLAGS) -o $@ $< +mtrr.o: $(TOP)/src/cpu/x86/mtrr/mtrr.c + $(CC) -c $(CFLAGS) -o $@ $< +processor_name.o: $(TOP)/src/cpu/amd/model_fxx/processor_name.c + $(CC) -c $(CFLAGS) -o $@ $< +exception.o: $(TOP)/src/arch/i386/lib/exception.c + $(CC) -c $(CFLAGS) -o $@ $< +memcpy.o: $(TOP)/src/lib/memcpy.c + $(CC) -c $(CFLAGS) -o $@ $< +agp_device.o: $(TOP)/src/devices/agp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +clog2.o: $(TOP)/src/lib/clog2.c + $(CC) -c $(CFLAGS) -o $@ $< +pirq_routing.o: $(TOP)/src/arch/i386/boot/pirq_routing.c + $(CC) -c $(CFLAGS) -o $@ $< +apic_timer.o: $(TOP)/src/cpu/amd/model_fxx/apic_timer.c + $(CC) -c $(CFLAGS) -o $@ $< +memmove.o: $(TOP)/src/lib/memmove.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_rom.o: $(TOP)/src/devices/pci_rom.c + $(CC) -c $(CFLAGS) -o $@ $< +pgtbl.o: $(TOP)/src/cpu/x86/pae/pgtbl.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_conf2.o: $(TOP)/src/arch/i386/lib/pci_ops_conf2.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_conf1.o: $(TOP)/src/arch/i386/lib/pci_ops_conf1.c + $(CC) -c $(CFLAGS) -o $@ $< +mc146818rtc.o: $(TOP)/src/pc80/mc146818rtc.c + $(CC) -c $(CFLAGS) -o $@ $< +fpu.o: $(TOP)/src/devices/emulator/x86emu/fpu.c + $(CC) -c $(CFLAGS) -o $@ $< +coreboot_table.o: $(TOP)/src/arch/i386/boot/coreboot_table.c + $(CC) -c $(CFLAGS) -o $@ $< +rom_stream.o: $(TOP)/src/stream/rom_stream.c + $(CC) -c $(CFLAGS) -o $@ $< +debug.o: $(TOP)/src/devices/emulator/x86emu/debug.c + $(CC) -c $(CFLAGS) -o $@ $< +c_start.o: c_start.s + $(CC) -c $(CPU_OPT) -o $@ $< +c_start.s: $(TOP)/src/arch/i386/lib/c_start.S + $(CPP) $(CPPFLAGS) $< >$@.new && mv $@.new $@ +ops2.o: $(TOP)/src/devices/emulator/x86emu/ops2.c + $(CC) -c $(CFLAGS) -o $@ $< +biosemu.o: $(TOP)/src/devices/emulator/biosemu.c + $(CC) -c $(CFLAGS) -o $@ $< +vsprintf.o: $(TOP)/src/console/vsprintf.c + $(CC) -c $(CFLAGS) -o $@ $< +cpu.o: $(TOP)/src/arch/i386/lib/cpu.c + $(CC) -c $(CFLAGS) -o $@ $< +mpspec.o: $(TOP)/src/arch/i386/smp/mpspec.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_aza.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_aza.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_ht.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_ht.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_pci.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_pci.c + $(CC) -c $(CFLAGS) -o $@ $< +uart8250_console.o: $(TOP)/src/console/uart8250_console.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_ide.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_ide.c + $(CC) -c $(CFLAGS) -o $@ $< +vga_console.o: $(TOP)/src/console/vga_console.c + $(CC) -c $(CFLAGS) -o $@ $< +mainboard.o: $(TOP)/src/mainboard/dfi/nf570/mainboard.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_lpc.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_lpc.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_nic.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_nic.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_pcie.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_pcie.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_usb2.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_usb2.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_sata.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_sata.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_usb.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_usb.c + $(CC) -c $(CFLAGS) -o $@ $< +misc_control.o: $(TOP)/src/northbridge/amd/amdk8/misc_control.c + $(CC) -c $(CFLAGS) -o $@ $< +model_fxx_init.o: $(TOP)/src/cpu/amd/model_fxx/model_fxx_init.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_smbus.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_smbus.c + $(CC) -c $(CFLAGS) -o $@ $< +static.o: static.c + $(CC) -c $(CFLAGS) -o $@ $< + +# Remember the automatically generated files +GENERATED:= +GENERATED += Makefile +GENERATED += nsuperio.c +GENERATED += static.c +GENERATED += corebootDoc.config +GENERATED += crt0_includes.h + +echo: + @echo ACPI_SSDTX_NUM='$(ACPI_SSDTX_NUM)' + @echo AGP_APERTURE_SIZE='$(AGP_APERTURE_SIZE)' + @echo AMD_UCODE_PATCH_FILE='$(AMD_UCODE_PATCH_FILE)' + @echo APIC_ID_OFFSET='$(APIC_ID_OFFSET)' + @echo ARCH='$(ARCH)' + @echo AUTOBOOT_CMDLINE='$(AUTOBOOT_CMDLINE)' + @echo AUTOBOOT_DELAY='$(AUTOBOOT_DELAY)' + @echo CAR_FAM10='$(CAR_FAM10)' + @echo CBB='$(CBB)' + @echo CC='$(CC)' + @echo CDB='$(CDB)' + @echo CONFIG_AGP_PLUGIN_SUPPORT='$(CONFIG_AGP_PLUGIN_SUPPORT)' + @echo CONFIG_AMDMCT='$(CONFIG_AMDMCT)' + @echo CONFIG_AP_CODE_IN_CAR='$(CONFIG_AP_CODE_IN_CAR)' + @echo CONFIG_AP_IN_SIPI_WAIT='$(CONFIG_AP_IN_SIPI_WAIT)' + @echo CONFIG_BRIQ_7400='$(CONFIG_BRIQ_7400)' + @echo CONFIG_BRIQ_750FX='$(CONFIG_BRIQ_750FX)' + @echo CONFIG_CARDBUS_PLUGIN_SUPPORT='$(CONFIG_CARDBUS_PLUGIN_SUPPORT)' + @echo CONFIG_CHIP_CONFIGURE='$(CONFIG_CHIP_CONFIGURE)' + @echo CONFIG_CHIP_NAME='$(CONFIG_CHIP_NAME)' + @echo CONFIG_COMPRESS='$(CONFIG_COMPRESS)' + @echo CONFIG_COMPRESSED_PAYLOAD_LZMA='$(CONFIG_COMPRESSED_PAYLOAD_LZMA)' + @echo CONFIG_COMPRESSED_PAYLOAD_NRV2B='$(CONFIG_COMPRESSED_PAYLOAD_NRV2B)' + @echo CONFIG_CONSOLE_BTEXT='$(CONFIG_CONSOLE_BTEXT)' + @echo CONFIG_CONSOLE_LOGBUF='$(CONFIG_CONSOLE_LOGBUF)' + @echo CONFIG_CONSOLE_SERIAL8250='$(CONFIG_CONSOLE_SERIAL8250)' + @echo CONFIG_CONSOLE_SROM='$(CONFIG_CONSOLE_SROM)' + @echo CONFIG_CONSOLE_VGA='$(CONFIG_CONSOLE_VGA)' + @echo CONFIG_CONSOLE_VGA_MULTI='$(CONFIG_CONSOLE_VGA_MULTI)' + @echo CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST='$(CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST)' + @echo CONFIG_FS_EXT2='$(CONFIG_FS_EXT2)' + @echo CONFIG_FS_FAT='$(CONFIG_FS_FAT)' + @echo CONFIG_FS_ISO9660='$(CONFIG_FS_ISO9660)' + @echo CONFIG_FS_PAYLOAD='$(CONFIG_FS_PAYLOAD)' + @echo CONFIG_GDB_STUB='$(CONFIG_GDB_STUB)' + @echo CONFIG_GFXUMA='$(CONFIG_GFXUMA)' + @echo CONFIG_GX1_VIDEO='$(CONFIG_GX1_VIDEO)' + @echo CONFIG_GX1_VIDEOMODE='$(CONFIG_GX1_VIDEOMODE)' + @echo CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT='$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT)' + @echo CONFIG_IDE='$(CONFIG_IDE)' + @echo CONFIG_IDE_PAYLOAD='$(CONFIG_IDE_PAYLOAD)' + @echo CONFIG_IOAPIC='$(CONFIG_IOAPIC)' + @echo CONFIG_LB_MEM_TOPK='$(CONFIG_LB_MEM_TOPK)' + @echo CONFIG_LOGICAL_CPUS='$(CONFIG_LOGICAL_CPUS)' + @echo CONFIG_MAX_CPUS='$(CONFIG_MAX_CPUS)' + @echo CONFIG_MAX_PCI_BUSES='$(CONFIG_MAX_PCI_BUSES)' + @echo CONFIG_MAX_PHYSICAL_CPUS='$(CONFIG_MAX_PHYSICAL_CPUS)' + @echo CONFIG_PCIBIOS_IRQ='$(CONFIG_PCIBIOS_IRQ)' + @echo CONFIG_PCIEXP_PLUGIN_SUPPORT='$(CONFIG_PCIEXP_PLUGIN_SUPPORT)' + @echo CONFIG_PCIE_CONFIGSPACE_HOLE='$(CONFIG_PCIE_CONFIGSPACE_HOLE)' + @echo CONFIG_PCIX_PLUGIN_SUPPORT='$(CONFIG_PCIX_PLUGIN_SUPPORT)' + @echo CONFIG_PCI_64BIT_PREF_MEM='$(CONFIG_PCI_64BIT_PREF_MEM)' + @echo CONFIG_PCI_ROM_RUN='$(CONFIG_PCI_ROM_RUN)' + @echo CONFIG_PRECOMPRESSED_PAYLOAD='$(CONFIG_PRECOMPRESSED_PAYLOAD)' + @echo CONFIG_ROM_PAYLOAD='$(CONFIG_ROM_PAYLOAD)' + @echo CONFIG_ROM_PAYLOAD_START='$(CONFIG_ROM_PAYLOAD_START)' + @echo CONFIG_SANDPOINT_ALTIMUS='$(CONFIG_SANDPOINT_ALTIMUS)' + @echo CONFIG_SANDPOINT_GYRUS='$(CONFIG_SANDPOINT_GYRUS)' + @echo CONFIG_SANDPOINT_TALUS='$(CONFIG_SANDPOINT_TALUS)' + @echo CONFIG_SANDPOINT_UNITY='$(CONFIG_SANDPOINT_UNITY)' + @echo CONFIG_SANDPOINT_VALIS='$(CONFIG_SANDPOINT_VALIS)' + @echo CONFIG_SERIAL_PAYLOAD='$(CONFIG_SERIAL_PAYLOAD)' + @echo CONFIG_SERIAL_POST='$(CONFIG_SERIAL_POST)' + @echo CONFIG_SMP='$(CONFIG_SMP)' + @echo CONFIG_SPLASH_GRAPHIC='$(CONFIG_SPLASH_GRAPHIC)' + @echo CONFIG_SYS_CLK_FREQ='$(CONFIG_SYS_CLK_FREQ)' + @echo CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2='$(CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2)' + @echo CONFIG_UDELAY_IO='$(CONFIG_UDELAY_IO)' + @echo CONFIG_UDELAY_TSC='$(CONFIG_UDELAY_TSC)' + @echo CONFIG_UNCOMPRESSED='$(CONFIG_UNCOMPRESSED)' + @echo CONFIG_USBDEBUG_DIRECT='$(CONFIG_USBDEBUG_DIRECT)' + @echo CONFIG_USE_INIT='$(CONFIG_USE_INIT)' + @echo CONFIG_USE_PRINTK_IN_CAR='$(CONFIG_USE_PRINTK_IN_CAR)' + @echo CONFIG_VAR_MTRR_HOLE='$(CONFIG_VAR_MTRR_HOLE)' + @echo CONFIG_VGA_ROM_RUN='$(CONFIG_VGA_ROM_RUN)' + @echo CONFIG_VIDEO_MB='$(CONFIG_VIDEO_MB)' + @echo COREBOOT_ASSEMBLER='$(COREBOOT_ASSEMBLER)' + @echo COREBOOT_BUILD='$(COREBOOT_BUILD)' + @echo COREBOOT_COMPILER='$(COREBOOT_COMPILER)' + @echo COREBOOT_COMPILE_BY='$(COREBOOT_COMPILE_BY)' + @echo COREBOOT_COMPILE_DOMAIN='$(COREBOOT_COMPILE_DOMAIN)' + @echo COREBOOT_COMPILE_HOST='$(COREBOOT_COMPILE_HOST)' + @echo COREBOOT_COMPILE_TIME='$(COREBOOT_COMPILE_TIME)' + @echo COREBOOT_EXTRA_VERSION='$(COREBOOT_EXTRA_VERSION)' + @echo COREBOOT_LINKER='$(COREBOOT_LINKER)' + @echo COREBOOT_VERSION='$(COREBOOT_VERSION)' + @echo CPU_ADDR_BITS='$(CPU_ADDR_BITS)' + @echo CPU_OPT='$(CPU_OPT)' + @echo CPU_SOCKET_TYPE='$(CPU_SOCKET_TYPE)' + @echo CROSS_COMPILE='$(CROSS_COMPILE)' + @echo CRT0='$(CRT0)' + @echo DCACHE_RAM_BASE='$(DCACHE_RAM_BASE)' + @echo DCACHE_RAM_GLOBAL_VAR_SIZE='$(DCACHE_RAM_GLOBAL_VAR_SIZE)' + @echo DCACHE_RAM_SIZE='$(DCACHE_RAM_SIZE)' + @echo DEBUG='$(DEBUG)' + @echo DEFAULT_CONSOLE_LOGLEVEL='$(DEFAULT_CONSOLE_LOGLEVEL)' + @echo DIMM_SUPPORT='$(DIMM_SUPPORT)' + @echo EMBEDDED_RAM_SIZE='$(EMBEDDED_RAM_SIZE)' + @echo ENABLE_APIC_EXT_ID='$(ENABLE_APIC_EXT_ID)' + @echo EXT_CONF_SUPPORT='$(EXT_CONF_SUPPORT)' + @echo EXT_RT_TBL_SUPPORT='$(EXT_RT_TBL_SUPPORT)' + @echo FAILOVER_SIZE='$(FAILOVER_SIZE)' + @echo FAKE_SPDROM='$(FAKE_SPDROM)' + @echo FALLBACK_SIZE='$(FALLBACK_SIZE)' + @echo HAVE_ACPI_TABLES='$(HAVE_ACPI_TABLES)' + @echo HAVE_FAILOVER_BOOT='$(HAVE_FAILOVER_BOOT)' + @echo HAVE_FALLBACK_BOOT='$(HAVE_FALLBACK_BOOT)' + @echo HAVE_FANCTL='$(HAVE_FANCTL)' + @echo HAVE_HARD_RESET='$(HAVE_HARD_RESET)' + @echo HAVE_INIT_TIMER='$(HAVE_INIT_TIMER)' + @echo HAVE_MOVNTI='$(HAVE_MOVNTI)' + @echo HAVE_MP_TABLE='$(HAVE_MP_TABLE)' + @echo HAVE_OPTION_TABLE='$(HAVE_OPTION_TABLE)' + @echo HAVE_PIRQ_TABLE='$(HAVE_PIRQ_TABLE)' + @echo HAVE_SMI_HANDLER='$(HAVE_SMI_HANDLER)' + @echo HEAP_SIZE='$(HEAP_SIZE)' + @echo HOSTCC='$(HOSTCC)' + @echo HT3_SUPPORT='$(HT3_SUPPORT)' + @echo HT_CHAIN_END_UNITID_BASE='$(HT_CHAIN_END_UNITID_BASE)' + @echo HT_CHAIN_UNITID_BASE='$(HT_CHAIN_UNITID_BASE)' + @echo HW_MEM_HOLE_SIZEK='$(HW_MEM_HOLE_SIZEK)' + @echo HW_MEM_HOLE_SIZE_AUTO_INC='$(HW_MEM_HOLE_SIZE_AUTO_INC)' + @echo IDE_BOOT_DRIVE='$(IDE_BOOT_DRIVE)' + @echo IDE_OFFSET='$(IDE_OFFSET)' + @echo IDE_SWAB='$(IDE_SWAB)' + @echo INTEL_PPRO_MTRR='$(INTEL_PPRO_MTRR)' + @echo IRQ_SLOT_COUNT='$(IRQ_SLOT_COUNT)' + @echo ISA_IO_BASE='$(ISA_IO_BASE)' + @echo ISA_MEM_BASE='$(ISA_MEM_BASE)' + @echo K8_HT_FREQ_1G_SUPPORT='$(K8_HT_FREQ_1G_SUPPORT)' + @echo K8_MEM_BANK_B_ONLY='$(K8_MEM_BANK_B_ONLY)' + @echo K8_REV_F_SUPPORT='$(K8_REV_F_SUPPORT)' + @echo LB_CKS_LOC='$(LB_CKS_LOC)' + @echo LB_CKS_RANGE_END='$(LB_CKS_RANGE_END)' + @echo LB_CKS_RANGE_START='$(LB_CKS_RANGE_START)' + @echo LIFT_BSP_APIC_ID='$(LIFT_BSP_APIC_ID)' + @echo MAINBOARD='$(MAINBOARD)' + @echo MAINBOARD_PART_NUMBER='$(MAINBOARD_PART_NUMBER)' + @echo MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID='$(MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID)' + @echo MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID='$(MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID)' + @echo MAINBOARD_POWER_ON_AFTER_POWER_FAIL='$(MAINBOARD_POWER_ON_AFTER_POWER_FAIL)' + @echo MAINBOARD_VENDOR='$(MAINBOARD_VENDOR)' + @echo MAXIMUM_CONSOLE_LOGLEVEL='$(MAXIMUM_CONSOLE_LOGLEVEL)' + @echo MAX_REBOOT_CNT='$(MAX_REBOOT_CNT)' + @echo MEMORY_HOLE='$(MEMORY_HOLE)' + @echo MEM_TRAIN_SEQ='$(MEM_TRAIN_SEQ)' + @echo MMCONF_SUPPORT='$(MMCONF_SUPPORT)' + @echo MMCONF_SUPPORT_DEFAULT='$(MMCONF_SUPPORT_DEFAULT)' + @echo NO_POST='$(NO_POST)' + @echo OBJCOPY='$(OBJCOPY)' + @echo PAYLOAD_SIZE='$(PAYLOAD_SIZE)' + @echo PCIC0_CFGADDR='$(PCIC0_CFGADDR)' + @echo PCIC0_CFGDATA='$(PCIC0_CFGDATA)' + @echo PCI_BUS_SEGN_BITS='$(PCI_BUS_SEGN_BITS)' + @echo PCI_IO_CFG_EXT='$(PCI_IO_CFG_EXT)' + @echo PIRQ_ROUTE='$(PIRQ_ROUTE)' + @echo PNP_CFGADDR='$(PNP_CFGADDR)' + @echo PNP_CFGDATA='$(PNP_CFGDATA)' + @echo ROM_IMAGE_SIZE='$(ROM_IMAGE_SIZE)' + @echo ROM_SECTION_OFFSET='$(ROM_SECTION_OFFSET)' + @echo ROM_SECTION_SIZE='$(ROM_SECTION_SIZE)' + @echo ROM_SIZE='$(ROM_SIZE)' + @echo SB_HT_CHAIN_ON_BUS0='$(SB_HT_CHAIN_ON_BUS0)' + @echo SB_HT_CHAIN_UNITID_OFFSET_ONLY='$(SB_HT_CHAIN_UNITID_OFFSET_ONLY)' + @echo SERIAL_CPU_INIT='$(SERIAL_CPU_INIT)' + @echo STACK_SIZE='$(STACK_SIZE)' + @echo TTYS0_BASE='$(TTYS0_BASE)' + @echo TTYS0_BAUD='$(TTYS0_BAUD)' + @echo TTYS0_DIV='$(TTYS0_DIV)' + @echo TTYS0_LCS='$(TTYS0_LCS)' + @echo USE_DCACHE_RAM='$(USE_DCACHE_RAM)' + @echo USE_FAILOVER_IMAGE='$(USE_FAILOVER_IMAGE)' + @echo USE_FALLBACK_IMAGE='$(USE_FALLBACK_IMAGE)' + @echo USE_OPTION_TABLE='$(USE_OPTION_TABLE)' + @echo USE_WATCHDOG_ON_BOOT='$(USE_WATCHDOG_ON_BOOT)' + @echo WAIT_BEFORE_CPUS_INIT='$(WAIT_BEFORE_CPUS_INIT)' + @echo XIP_ROM_BASE='$(XIP_ROM_BASE)' + @echo XIP_ROM_SIZE='$(XIP_ROM_SIZE)' + @echo _EXCEPTION_VECTORS='$(_EXCEPTION_VECTORS)' + @echo _IO_BASE='$(_IO_BASE)' + @echo _RAMBASE='$(_RAMBASE)' + @echo _RAMSTART='$(_RAMSTART)' + @echo _RESET='$(_RESET)' + @echo _ROMBASE='$(_ROMBASE)' + @echo _ROMSTART='$(_ROMSTART)' +all: coreboot.rom +coreboot_ram.o: $(DRIVER) coreboot.a $(LIBGCC_FILE_NAME) + $(CC) $(DISTRO_LFLAGS) -nostdlib -r -o $@ c_start.o $(DRIVER) coreboot.a $(LIBGCC_FILE_NAME) +coreboot_ram: coreboot_ram.o $(TOP)/src/config/coreboot_ram.ld ldoptions + $(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/coreboot_ram.ld coreboot_ram.o + $(CROSS_COMPILE)nm -n coreboot_ram | sort > coreboot_ram.map +coreboot.strip: coreboot + $(OBJCOPY) -O binary coreboot coreboot.strip +coreboot_ram.bin: coreboot_ram + $(OBJCOPY) -O binary $< $@ +coreboot.rom: coreboot.strip buildrom $(PAYLOAD-1) + ./buildrom $< $@ $(PAYLOAD-1) $(ROM_IMAGE_SIZE) $(ROM_SECTION_SIZE) +etags: $(SOURCES) + etags $(SOURCES) +payload: $(PAYLOAD) + cp $< $@ +nrv2b: $(TOP)/util/nrv2b/nrv2b.c + $(HOSTCC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG -DBITSIZE=32 -DENDIAN=0 $< -o $@ +ldscript.ld: ldoptions $(LDSUBSCRIPTS-1) + echo '/*ldoptions*/' > $@; cat ldoptions >> $@ ; for file in $(LDSUBSCRIPTS-1) ; do echo /* $$file */ >> $@; cat $$file >> $@ ; done +payload.lzma: $(PAYLOAD) + lzma e $(PAYLOAD) $@ +option_table.c: build_opt_tbl $(MAINBOARD)/cmos.layout + ./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout --header option_table.h +../romcc: $(TOP)/util/romcc/romcc.c + $(HOSTCC) -g $(HOSTCFLAGS) $< -o romcc.tmpfile + mv romcc.tmpfile $@ +option_table.h: build_opt_tbl $(MAINBOARD)/cmos.layout + ./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout --header option_table.h +build_opt_tbl: $(TOP)/util/options/build_opt_tbl.c $(TOP)/src/include/pc80/mc146818rtc.h $(TOP)/src/include/boot/coreboot_tables.h Makefile.settings Makefile + $(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) $< -o $@ +corebootDoc.config: $(TOP)/src/config/corebootDoc.config + cat $(TOP)/src/config/corebootDoc.config > corebootDoc.config + echo 'INPUT=$(SOURCES)' >> corebootDoc.config +coreboot_ram.rom: $(COREBOOT_RAM-1) + cp $(COREBOOT_RAM-1) coreboot_ram.rom +raminit_test: $(TOP)/src/northbridge/amd/amdk8/raminit_test.c $(TOP)/src/northbridge/amd/amdk8/raminit.c + $(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@ +tags: $(SOURCES) + ctags $(SOURCES) +floppy: all + mcopy -o coreboot.rom a: +crt0.S: $(CRT0) + cp $< $@ +coreboot_ram.nrv2b: coreboot_ram.bin nrv2b + ./nrv2b e $< $@ +coreboot: crt0.o $(INIT-OBJECTS) $(COREBOOT_APC) $(COREBOOT_RAM_ROM) ldscript.ld + $(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o $(INIT-OBJECTS) + $(CROSS_COMPILE)nm -n coreboot | sort > coreboot.map +coreboot.a: $(OBJECTS) + rm -f coreboot.a + $(CROSS_COMPILE)ar cr coreboot.a $(OBJECTS) +documentation: corebootDoc.config + doxygen corebootDoc.config +crt0.s: crt0.S $(CRT0_INCLUDES) + $(CPP) $(CPPFLAGS) -I. -I$(TOP)/src $< > $@.new && mv $@.new $@ +crt0.o: crt0.s + @$(CC) -c $(CPU_OPT) -o $@ $< +clean: + rm -f coreboot.* *~ + rm -f coreboot + rm -f ldscript.ld + rm -f a.out *.s *.l *.o *.E *.inc + rm -f TAGS tags romcc* + rm -f docipl buildrom* chips.c *chip.c coreboot_apc* coreboot_ram* coreboot_pay* + rm -f build_opt_tbl* nrv2b* option_table.c crt0.S + rm -f romimage payload.* +payload.nrv2b: $(PAYLOAD) nrv2b + ./nrv2b e $(PAYLOAD) $@ +./cache_as_ram_auto.inc: $(MAINBOARD)/cache_as_ram_auto.c option_table.h + $(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@ + perl -e 's/.rodata/.rom.data/g' -pi $@ + perl -e 's/.text/.section .rom.text/g' -pi $@ +buildrom: $(TOP)/util/buildrom/buildrom.c + $(HOSTCC) -o $@ $< + + +Makefile: /home/chris/coreboot-v2/targets/dfi/nf570/nf570/config.py /home/chris/coreboot-v2/targets/dfi/nf570/Config.lb + (cd /home/chris/coreboot-v2/targets ; export PYTHONPATH=/home/chris/coreboot-v2/util/newconfig ; python dfi/nf570/nf570/config.py dfi/nf570/Config.lb /home/chris/coreboot-v2) + Index: targets/dfi/nf570/nf570/fallback/buildrom =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/fallback/buildrom ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/failover/build_opt_tbl =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/failover/build_opt_tbl ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/failover/ldscript.ld =================================================================== --- targets/dfi/nf570/nf570/failover/ldscript.ld (revision 0) +++ targets/dfi/nf570/nf570/failover/ldscript.ld (revision 0) @@ -0,0 +1,267 @@ +/*ldoptions*/ +HAVE_MOVNTI = 1; +CONFIG_USE_INIT = 0; +HAVE_FALLBACK_BOOT = 1; +HAVE_FAILOVER_BOOT = 1; +ROM_IMAGE_SIZE = 0x1000; +PAYLOAD_SIZE = 0x0; +_ROMBASE = 0xfffff000; +_RESET = 0xfffff000; +_EXCEPTION_VECTORS = 0xfffff100; +STACK_SIZE = 0x2000; +HEAP_SIZE = 0x8000; +_RAMBASE = 0x100000; +USE_DCACHE_RAM = 1; +CAR_FAM10 = 0; +DCACHE_RAM_BASE = 0xc8000; +DCACHE_RAM_SIZE = 0x8000; +DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000; +CONFIG_AP_CODE_IN_CAR = 0; +MEM_TRAIN_SEQ = 2; +WAIT_BEFORE_CPUS_INIT = 0; +CONFIG_COMPRESS = 1; +CONFIG_UNCOMPRESSED = 0; +CONFIG_LB_MEM_TOPK = 2048; +HAVE_OPTION_TABLE = 1; +USE_OPTION_TABLE = 0; +LB_CKS_RANGE_START = 49; +LB_CKS_RANGE_END = 122; +LB_CKS_LOC = 123; +DEBUG = 1; +CONFIG_CONSOLE_VGA = 1; +CONFIG_CONSOLE_VGA_MULTI = 0; +CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST = 0; +CONFIG_CONSOLE_BTEXT = 0; +CONFIG_CONSOLE_LOGBUF = 0; +CONFIG_CONSOLE_SROM = 0; +CONFIG_CONSOLE_SERIAL8250 = 1; +CONFIG_USBDEBUG_DIRECT = 0; +DEFAULT_CONSOLE_LOGLEVEL = 8; +MAXIMUM_CONSOLE_LOGLEVEL = 8; +CONFIG_SERIAL_POST = 0; +TTYS0_BASE = 0x3f8; +TTYS0_BAUD = 115200; +TTYS0_LCS = 0x3; +CONFIG_USE_PRINTK_IN_CAR = 1; +MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130; +MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x2b80; +CONFIG_MAX_PCI_BUSES = 255; +CONFIG_SMP = 1; +CONFIG_MAX_CPUS = 2; +CONFIG_MAX_PHYSICAL_CPUS = 1; +CONFIG_LOGICAL_CPUS = 1; +CONFIG_AP_IN_SIPI_WAIT = 0; +SERIAL_CPU_INIT = 1; +APIC_ID_OFFSET = 16; +ENABLE_APIC_EXT_ID = 0; +LIFT_BSP_APIC_ID = 1; +CONFIG_IDE_PAYLOAD = 0; +CONFIG_ROM_PAYLOAD = 1; +CONFIG_ROM_PAYLOAD_START = 0xfffff000; +CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0; +CONFIG_COMPRESSED_PAYLOAD_LZMA = 0; +CONFIG_PRECOMPRESSED_PAYLOAD = 0; +CONFIG_SERIAL_PAYLOAD = 0; +CONFIG_FS_PAYLOAD = 0; +CONFIG_FS_EXT2 = 0; +CONFIG_FS_ISO9660 = 0; +CONFIG_FS_FAT = 0; +AUTOBOOT_DELAY = 2; +USE_WATCHDOG_ON_BOOT = 0; +CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1; +CONFIG_AGP_PLUGIN_SUPPORT = 1; +CONFIG_CARDBUS_PLUGIN_SUPPORT = 1; +CONFIG_PCIX_PLUGIN_SUPPORT = 1; +CONFIG_PCIEXP_PLUGIN_SUPPORT = 1; +CONFIG_IDE = 0; +IDE_BOOT_DRIVE = 0; +IDE_OFFSET = 0; +PCI_IO_CFG_EXT = 0; +CONFIG_CHIP_NAME = 1; +HAVE_INIT_TIMER = 1; +MAX_REBOOT_CNT = 3; +FAKE_SPDROM = 0; +HAVE_ACPI_TABLES = 0; +ACPI_SSDTX_NUM = 0; +HT_CHAIN_UNITID_BASE = 0; +HT_CHAIN_END_UNITID_BASE = 32; +SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0; +SB_HT_CHAIN_ON_BUS0 = 2; +PCI_BUS_SEGN_BITS = 0; +MMCONF_SUPPORT = 0; +MMCONF_SUPPORT_DEFAULT = 0; +HW_MEM_HOLE_SIZEK = 1048576; +HW_MEM_HOLE_SIZE_AUTO_INC = 0; +CONFIG_VAR_MTRR_HOLE = 1; +K8_HT_FREQ_1G_SUPPORT = 1; +K8_REV_F_SUPPORT = 1; +CBB = 0; +CDB = 24; +HT3_SUPPORT = 0; +EXT_RT_TBL_SUPPORT = 0; +EXT_CONF_SUPPORT = 0; +DIMM_SUPPORT = 0x4; +CPU_SOCKET_TYPE = 17; +CPU_ADDR_BITS = 40; +CONFIG_VGA_ROM_RUN = 0; +CONFIG_PCI_ROM_RUN = 1; +CONFIG_PCI_64BIT_PREF_MEM = 0; +CONFIG_AMDMCT = 0; +K8_MEM_BANK_B_ONLY = 0; +CONFIG_PCIE_CONFIGSPACE_HOLE = 0; +HAVE_MP_TABLE = 1; +HAVE_PIRQ_TABLE = 1; +USE_FALLBACK_IMAGE = 0; +USE_FAILOVER_IMAGE = 1; +HAVE_HARD_RESET = 1; +IRQ_SLOT_COUNT = 11; +CONFIG_IOAPIC = 1; +FALLBACK_SIZE = 0x3f000; +FAILOVER_SIZE = 0x1000; +ROM_SIZE = 0x80000; +ROM_SECTION_SIZE = 0x1000; +ROM_SECTION_OFFSET = 0x7f000; +XIP_ROM_SIZE = 0x1000; +XIP_ROM_BASE = 0xfffff000; +CONFIG_GDB_STUB = 0; +HAVE_FANCTL = 1; +CONFIG_UDELAY_IO = 0; +CONFIG_UDELAY_TSC = 0; +CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0; +AGP_APERTURE_SIZE = 0x4000000; +/* /home/chris/coreboot-v2/src/arch/i386/init/ldscript_failover.lb */ +/* + * Memory map: + * + * _RAMBASE + * : data segment + * : bss segment + * : heap + * : stack + * _ROMBASE + * : coreboot text + * : readonly text + */ +/* + * Bootstrap code for the STPC Consumer + * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. + * + */ + +/* + * Written by Johan Rydberg, based on work by Daniel Kahlin. + * Rewritten by Eric Biederman + */ +/* + * We use ELF as output format. So that we can + * debug the code in some form. + */ +OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") +OUTPUT_ARCH(i386) + +/* +ENTRY(_start) +*/ + +TARGET(binary) +SECTIONS +{ + . = _ROMBASE; + + /* This section might be better named .setup */ + .rom . : { + _rom = .; + *(.rom.text); + *(.rom.data); + *(.rom.data.*); + . = ALIGN(16); + _erom = .; + } + + _lrom = LOADADDR(.rom); + _elrom = LOADADDR(.rom) + SIZEOF(.rom); + + /DISCARD/ : { + *(.comment) + *(.note) + } +} +/* /home/chris/coreboot-v2/src//cpu/x86/16bit/entry16.lds */ + gdtptr16_offset = gdtptr16 & 0xffff; + _start_offset = _start & 0xffff; +/* /home/chris/coreboot-v2/src//cpu/x86/16bit/reset16.lds */ +/* + * _ROMTOP : The top of the rom used where we + * need to put the reset vector. + */ + +SECTIONS { + /* Trigger an error if I have an unuseable start address */ + _bogus = ASSERT(_start >= 0xffff0000, "_start to low please decrease ROM_IMAGE_SIZE"); + _ROMTOP = 0xfffffff0; + . = _ROMTOP; + .reset . : { + *(.reset) + . = 15 ; + BYTE(0x00); + } +} +/* /home/chris/coreboot-v2/src//southbridge/nvidia/mcp55/id.lds */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghai.lu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +SECTIONS { + . = (_ROMBASE + ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start); + .id (.): { + *(.id) + } +} +/* /home/chris/coreboot-v2/src//southbridge/nvidia/mcp55/romstrap.lds */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghai.lu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +SECTIONS { + . = (_ROMBASE + ROM_IMAGE_SIZE - 0x10) - (__romstrap_end - __romstrap_start); + .romstrap (.): { + *(.romstrap) + } +} +/* /home/chris/coreboot-v2/src//arch/i386/lib/failover_failover.lds */ + __fallback_image = (CONFIG_ROM_PAYLOAD_START & 0xfffffff0) - 8; + __normal_image = ((CONFIG_ROM_PAYLOAD_START - FALLBACK_SIZE) & 0xfffffff0) - 8; Index: targets/dfi/nf570/nf570/failover/crt0_includes.h =================================================================== --- targets/dfi/nf570/nf570/failover/crt0_includes.h (revision 0) +++ targets/dfi/nf570/nf570/failover/crt0_includes.h (revision 0) @@ -0,0 +1,7 @@ +#include <cpu/x86/16bit/entry16.inc> +#include <cpu/x86/32bit/entry32.inc> +#include <cpu/x86/16bit/reset16.inc> +#include <southbridge/nvidia/mcp55/id.inc> +#include <southbridge/nvidia/mcp55/romstrap.inc> +#include <cpu/amd/car/cache_as_ram.inc> +#include <./cache_as_ram_auto.inc> Index: targets/dfi/nf570/nf570/failover/cache_as_ram_auto.inc =================================================================== --- targets/dfi/nf570/nf570/failover/cache_as_ram_auto.inc (revision 0) +++ targets/dfi/nf570/nf570/failover/cache_as_ram_auto.inc (revision 0) @@ -0,0 +1,298 @@ + .file "cache_as_ram_auto.c" + .section .rom.text +.globl failover_process + .type failover_process, @function +failover_process: + pushl %ebp + movb $48, %al + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $4, %esp +#APP + outb %al, $112 + inb $113, %al +#NO_APP + movl $2, %esi + andl %eax, %esi + cmpl $0, 12(%ebp) + jne .L2 + movl $27, %ecx +#APP + rdmsr +#NO_APP + testb $1, %ah + jne .L4 +.L2: + testl %esi, %esi + jmp .L23 +.L4: + movl $3320, %ebx + movl $-2147481480, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3327, %ecx + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl $-2147481480, %eax +#APP + outl %eax, %dx +#NO_APP + orl $32, %edi + movl %edi, %edx + movzbl %dl, %eax + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl $-2147481440, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %cl + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl $-2147481440, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147481436, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl $-2147481436, %eax +#APP + outl %eax, %dx +#NO_APP + orl $65536, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147481464, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $-1, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outb %al, %dx +#NO_APP + movl $-2147481460, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + movl $-2147481460, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl $-2147481456, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl $-2147481456, %eax +#APP + outl %eax, %dx +#NO_APP + orw $32767, %di + movl %ecx, %edx + movzwl %di, %eax +#APP + outw %ax, %dx +#NO_APP + movl $-2147434388, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $48, %eax + cmpl $16, %eax + jne .L7 + testl %esi, %esi + jne .L5 +.L7: + movb $13, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + testb %al, %al + jns .L9 + movb $49, %cl + xorl %edx, %edx +.L11: + movb %cl, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + movzbl %al, %eax + incl %ecx + addl %eax, %edx + cmpb $123, %cl + jne .L11 + movb $123, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + movzbl %al, %ecx + movb $124, %al + sall $8, %ecx +#APP + outb %al, $112 + inb $113, %al +#NO_APP + andl $65535, %edx + movzbl %al, %eax + xorl $65535, %edx + orl %eax, %ecx + cmpl %ecx, %edx + je .L13 +.L9: + movb $48, %dl + movb %dl, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + movb %al, %cl + movb %dl, %al + andl $12, %ecx +#APP + outb %al, $112 +#NO_APP + orl $48, %ecx + movl %ecx, %eax + andl $60, %eax +#APP + outb %al, $113 +#NO_APP +.L13: + movb $48, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + testb $1, %al + je .L14 + andl $15, %eax +.L14: + movb %al, %dl + andl $-4, %edx + movb %dl, %al + shrb $4, %al + cmpb $2, %al + ja .L16 + orl $2, %edx + movb %dl, %al + shrb $4, %al + cmpb $2, %al + ja .L16 + leal 16(%edx), %eax + jmp .L19 +.L16: + movb %dl, %al + andl $-4, %eax +.L19: + movzbl %al, %edx + movb $48, %al +#APP + outb %al, $112 +#NO_APP + movb %dl, %al +#APP + outb %al, $113 +#NO_APP + andb $2, %dl +.L23: + je .L6 +.L5: + movl 8(%ebp), %eax + movl 12(%ebp), %ebx +#APP + jmp __normal_image +#NO_APP +.L6: + movl 8(%ebp), %eax + movl 12(%ebp), %ebx +#APP + jmp __fallback_image +#NO_APP + popl %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size failover_process, .-failover_process +.globl cache_as_ram_main + .type cache_as_ram_main, @function +cache_as_ram_main: + pushl %ebp + movl %esp, %ebp + popl %ebp + jmp failover_process + .size cache_as_ram_main, .-cache_as_ram_main + .ident "GCC: (GNU) 4.1.3 20080308 (prerelease) (Ubuntu 4.1.2-21ubuntu1)" + .section .note.GNU-stack,"",@progbits Index: targets/dfi/nf570/nf570/failover/coreboot.map =================================================================== --- targets/dfi/nf570/nf570/failover/coreboot.map (revision 0) +++ targets/dfi/nf570/nf570/failover/coreboot.map (revision 0) @@ -0,0 +1,169 @@ +00000000 A ACPI_SSDTX_NUM +00000000 A CAR_FAM10 +00000000 A CBB +00000000 A CONFIG_AMDMCT +00000000 A CONFIG_AP_CODE_IN_CAR +00000000 A CONFIG_AP_IN_SIPI_WAIT +00000000 A CONFIG_COMPRESSED_PAYLOAD_LZMA +00000000 A CONFIG_COMPRESSED_PAYLOAD_NRV2B +00000000 A CONFIG_CONSOLE_BTEXT +00000000 A CONFIG_CONSOLE_LOGBUF +00000000 A CONFIG_CONSOLE_SROM +00000000 A CONFIG_CONSOLE_VGA_MULTI +00000000 A CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST +00000000 A CONFIG_FS_EXT2 +00000000 A CONFIG_FS_FAT +00000000 A CONFIG_FS_ISO9660 +00000000 A CONFIG_FS_PAYLOAD +00000000 A CONFIG_GDB_STUB +00000000 A CONFIG_IDE +00000000 A CONFIG_IDE_PAYLOAD +00000000 A CONFIG_PCI_64BIT_PREF_MEM +00000000 A CONFIG_PCIE_CONFIGSPACE_HOLE +00000000 A CONFIG_PRECOMPRESSED_PAYLOAD +00000000 A CONFIG_SERIAL_PAYLOAD +00000000 A CONFIG_SERIAL_POST +00000000 A CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +00000000 A CONFIG_UDELAY_IO +00000000 A CONFIG_UDELAY_TSC +00000000 A CONFIG_UNCOMPRESSED +00000000 A CONFIG_USBDEBUG_DIRECT +00000000 A CONFIG_USE_INIT +00000000 A CONFIG_VGA_ROM_RUN +00000000 A ENABLE_APIC_EXT_ID +00000000 A EXT_CONF_SUPPORT +00000000 A EXT_RT_TBL_SUPPORT +00000000 A FAKE_SPDROM +00000000 A HAVE_ACPI_TABLES +00000000 A HT3_SUPPORT +00000000 A HT_CHAIN_UNITID_BASE +00000000 A HW_MEM_HOLE_SIZE_AUTO_INC +00000000 A IDE_BOOT_DRIVE +00000000 A IDE_OFFSET +00000000 A K8_MEM_BANK_B_ONLY +00000000 A MMCONF_SUPPORT +00000000 A MMCONF_SUPPORT_DEFAULT +00000000 A PAYLOAD_SIZE +00000000 A PCI_BUS_SEGN_BITS +00000000 A PCI_IO_CFG_EXT +00000000 A SB_HT_CHAIN_UNITID_OFFSET_ONLY +00000000 A USE_FALLBACK_IMAGE +00000000 A USE_OPTION_TABLE +00000000 A USE_WATCHDOG_ON_BOOT +00000000 A WAIT_BEFORE_CPUS_INIT +00000001 A _bogus +00000001 A CONFIG_AGP_PLUGIN_SUPPORT +00000001 A CONFIG_CARDBUS_PLUGIN_SUPPORT +00000001 A CONFIG_CHIP_NAME +00000001 A CONFIG_COMPRESS +00000001 A CONFIG_CONSOLE_SERIAL8250 +00000001 A CONFIG_CONSOLE_VGA +00000001 A CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT +00000001 A CONFIG_IOAPIC +00000001 A CONFIG_LOGICAL_CPUS +00000001 A CONFIG_MAX_PHYSICAL_CPUS +00000001 A CONFIG_PCIEXP_PLUGIN_SUPPORT +00000001 A CONFIG_PCI_ROM_RUN +00000001 A CONFIG_PCIX_PLUGIN_SUPPORT +00000001 A CONFIG_ROM_PAYLOAD +00000001 A CONFIG_SMP +00000001 A CONFIG_USE_PRINTK_IN_CAR +00000001 A CONFIG_VAR_MTRR_HOLE +00000001 A DEBUG +00000001 A HAVE_FAILOVER_BOOT +00000001 A HAVE_FALLBACK_BOOT +00000001 A HAVE_FANCTL +00000001 A HAVE_HARD_RESET +00000001 A HAVE_INIT_TIMER +00000001 A HAVE_MOVNTI +00000001 A HAVE_MP_TABLE +00000001 A HAVE_OPTION_TABLE +00000001 A HAVE_PIRQ_TABLE +00000001 A K8_HT_FREQ_1G_SUPPORT +00000001 A K8_REV_F_SUPPORT +00000001 A LIFT_BSP_APIC_ID +00000001 A SERIAL_CPU_INIT +00000001 A USE_DCACHE_RAM +00000001 A USE_FAILOVER_IMAGE +00000002 A AUTOBOOT_DELAY +00000002 A CONFIG_MAX_CPUS +00000002 A MEM_TRAIN_SEQ +00000002 A SB_HT_CHAIN_ON_BUS0 +00000003 A MAX_REBOOT_CNT +00000003 A TTYS0_LCS +00000004 A DIMM_SUPPORT +00000008 A DEFAULT_CONSOLE_LOGLEVEL +00000008 A MAXIMUM_CONSOLE_LOGLEVEL +0000000b A IRQ_SLOT_COUNT +00000010 A APIC_ID_OFFSET +00000011 A CPU_SOCKET_TYPE +00000018 A CDB +00000020 A HT_CHAIN_END_UNITID_BASE +00000028 A CPU_ADDR_BITS +00000031 A LB_CKS_RANGE_START +0000007a A LB_CKS_RANGE_END +0000007b A LB_CKS_LOC +000000ff A CONFIG_MAX_PCI_BUSES +000003f8 A TTYS0_BASE +00000800 A CONFIG_LB_MEM_TOPK +00001000 A DCACHE_RAM_GLOBAL_VAR_SIZE +00001000 A FAILOVER_SIZE +00001000 A ROM_IMAGE_SIZE +00001000 A ROM_SECTION_SIZE +00001000 A XIP_ROM_SIZE +00001022 A MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +00002000 A STACK_SIZE +00002b80 A MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +00008000 A DCACHE_RAM_SIZE +00008000 A HEAP_SIZE +0000f004 A _start_offset +0000f03c A gdtptr16_offset +0001c200 A TTYS0_BAUD +0003f000 A FALLBACK_SIZE +0007f000 A ROM_SECTION_OFFSET +00080000 A ROM_SIZE +000c8000 A DCACHE_RAM_BASE +00100000 A HW_MEM_HOLE_SIZEK +00100000 A _RAMBASE +04000000 A AGP_APERTURE_SIZE +fffbfff8 A __normal_image +ffffeff8 A __fallback_image +fffff000 A CONFIG_ROM_PAYLOAD_START +fffff000 A _lrom +fffff000 A _RESET +fffff000 A _ROMBASE +fffff000 A XIP_ROM_BASE +fffff000 T _rom +fffff004 T _start +fffff03c T gdtptr16 +fffff042 T _estart +fffff044 t gdt +fffff044 T gdtptr +fffff05c t gdt_end +fffff05c T protected_start +fffff06b t __protected_start +fffff083 t cache_as_ram_setup +fffff095 t enable_fixed_mtrr_dram_modify +fffff0af t clear_fixed_var_mtrr +fffff0bc t clear_fixed_var_mtrr_out +fffff100 A _EXCEPTION_VECTORS +fffff162 t fixed_mtrr_msr +fffff18e t var_mtrr_msr +fffff1ce t var_iorr_msr +fffff1de t mem_top +fffff1ea t cache_as_ram_setup_out +fffff1ea T failover_process +fffff3b1 T cache_as_ram_main +fffff3c0 A _elrom +fffff3c0 T _erom +ffffff6a R __id_start +ffffff6a r vendor +ffffff6e r part +ffffff80 R __id_end +ffffffa0 R __romstrap_start +ffffffa0 r rstables +ffffffb0 r linkedlist +ffffffe0 r rspointers +fffffff0 A _ROMTOP +fffffff0 R reset_vector +fffffff0 R __romstrap_end Index: targets/dfi/nf570/nf570/failover/option_table.c =================================================================== --- targets/dfi/nf570/nf570/failover/option_table.c (revision 0) +++ targets/dfi/nf570/nf570/failover/option_table.c (revision 0) @@ -0,0 +1,179 @@ +unsigned char option_table[] = { + 0xc8,0x00,0x00,0x00,0xf0,0x06,0x00,0x00,0x0c,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x28,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x80,0x01,0x00,0x00,0x72,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x72,0x65,0x73,0x65, + 0x72,0x76,0x65,0x64,0x5f,0x6d,0x65,0x6d,0x6f,0x72, + 0x79,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0x80,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x04,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74, + 0x5f,0x6f,0x70,0x74,0x69,0x6f,0x6e,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0x81,0x01,0x00,0x00, + 0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x6c,0x61,0x73,0x74,0x5f,0x62,0x6f,0x6f, + 0x74,0x00,0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00, + 0x00,0x00,0x82,0x01,0x00,0x00,0x01,0x00,0x00,0x00, + 0x65,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x45,0x43, + 0x43,0x5f,0x6d,0x65,0x6d,0x6f,0x72,0x79,0x00,0x00, + 0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0x84,0x01, + 0x00,0x00,0x04,0x00,0x00,0x00,0x72,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x72,0x65,0x62,0x6f,0x6f,0x74, + 0x5f,0x62,0x69,0x74,0x73,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x88,0x01,0x00,0x00,0x03,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x05,0x00,0x00,0x00, + 0x62,0x61,0x75,0x64,0x5f,0x72,0x61,0x74,0x65,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0x8b,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x68,0x77,0x5f,0x73, + 0x63,0x72,0x75,0x62,0x62,0x65,0x72,0x00,0xc9,0x00, + 0x00,0x00,0x30,0x00,0x00,0x00,0x8c,0x01,0x00,0x00, + 0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x69,0x6e,0x74,0x65,0x72,0x6c,0x65,0x61, + 0x76,0x65,0x5f,0x63,0x68,0x69,0x70,0x5f,0x73,0x65, + 0x6c,0x65,0x63,0x74,0x73,0x00,0xc9,0x00,0x00,0x00, + 0x28,0x00,0x00,0x00,0x8d,0x01,0x00,0x00,0x02,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x08,0x00,0x00,0x00, + 0x6d,0x61,0x78,0x5f,0x6d,0x65,0x6d,0x5f,0x63,0x6c, + 0x6f,0x63,0x6b,0x00,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x8f,0x01,0x00,0x00,0x01,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x02,0x00,0x00,0x00, + 0x64,0x75,0x61,0x6c,0x5f,0x63,0x6f,0x72,0x65,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x2c,0x00,0x00,0x00, + 0x90,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x70,0x6f,0x77,0x65, + 0x72,0x5f,0x6f,0x6e,0x5f,0x61,0x66,0x74,0x65,0x72, + 0x5f,0x66,0x61,0x69,0x6c,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x9c,0x01,0x00,0x00,0x04,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x64,0x65,0x62,0x75,0x67,0x5f,0x6c,0x65,0x76,0x65, + 0x6c,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0xa0,0x01,0x00,0x00,0x04,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74, + 0x5f,0x66,0x69,0x72,0x73,0x74,0x00,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0xa4,0x01,0x00,0x00, + 0x04,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x07,0x00, + 0x00,0x00,0x62,0x6f,0x6f,0x74,0x5f,0x73,0x65,0x63, + 0x6f,0x6e,0x64,0x00,0xc9,0x00,0x00,0x00,0x24,0x00, + 0x00,0x00,0xa8,0x01,0x00,0x00,0x04,0x00,0x00,0x00, + 0x65,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x62,0x6f, + 0x6f,0x74,0x5f,0x74,0x68,0x69,0x72,0x64,0x00,0x00, + 0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0xac,0x01, + 0x00,0x00,0x04,0x00,0x00,0x00,0x68,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74,0x5f,0x69, + 0x6e,0x64,0x65,0x78,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x28,0x00,0x00,0x00,0xb0,0x01,0x00,0x00,0x08,0x00, + 0x00,0x00,0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x62,0x6f,0x6f,0x74,0x5f,0x63,0x6f,0x75,0x6e,0x74, + 0x64,0x6f,0x77,0x6e,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0xb8,0x01,0x00,0x00,0x04,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x73,0x6c,0x6f,0x77,0x5f,0x63,0x70,0x75,0x00,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x1c,0x00,0x00,0x00, + 0xbc,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x6e,0x6d,0x69,0x00, + 0xc9,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0xbd,0x01, + 0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x69,0x6f,0x6d,0x6d,0x75,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0xd8,0x02,0x00,0x00,0x00,0x01,0x00,0x00,0x68,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x75,0x73,0x65,0x72, + 0x5f,0x64,0x61,0x74,0x61,0x00,0x00,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0xd8,0x03,0x00,0x00, + 0x10,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x63,0x68,0x65,0x63,0x6b,0x5f,0x73,0x75, + 0x6d,0x00,0x00,0x00,0xc9,0x00,0x00,0x00,0x28,0x00, + 0x00,0x00,0xe8,0x03,0x00,0x00,0x18,0x00,0x00,0x00, + 0x72,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x72,0x65, + 0x73,0x65,0x72,0x76,0x65,0x64,0x5f,0x6d,0x65,0x6d, + 0x6f,0x72,0x79,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x44,0x69,0x73,0x61,0x62,0x6c,0x65,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x45,0x6e,0x61,0x62,0x6c,0x65, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x45,0x6e, + 0x61,0x62,0x6c,0x65,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x44,0x69,0x73,0x61,0x62,0x6c,0x65,0x00, + 0xca,0x00,0x00,0x00,0x1c,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x46,0x61,0x6c,0x6c, + 0x62,0x61,0x63,0x6b,0x00,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x04,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x4e,0x6f,0x72,0x6d,0x61,0x6c, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x31,0x31, + 0x35,0x32,0x30,0x30,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x35,0x37,0x36,0x30,0x30,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00, + 0x00,0x00,0x02,0x00,0x00,0x00,0x33,0x38,0x34,0x30, + 0x30,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x05,0x00,0x00,0x00,0x03,0x00,0x00,0x00, + 0x31,0x39,0x32,0x30,0x30,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00, + 0x04,0x00,0x00,0x00,0x39,0x36,0x30,0x30,0x00,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x05,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x34,0x38, + 0x30,0x30,0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x06,0x00, + 0x00,0x00,0x32,0x34,0x30,0x30,0x00,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x31,0x32,0x30,0x30, + 0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x06,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x4e,0x6f,0x74,0x69,0x63,0x65,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x07,0x00,0x00,0x00,0x49,0x6e,0x66,0x6f,0x00,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x06,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x44,0x65, + 0x62,0x75,0x67,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x06,0x00,0x00,0x00,0x09,0x00, + 0x00,0x00,0x53,0x70,0x65,0x77,0x00,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x07,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x4e,0x65,0x74,0x77, + 0x6f,0x72,0x6b,0x00,0xca,0x00,0x00,0x00,0x14,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x48,0x44,0x44,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x02,0x00,0x00,0x00, + 0x46,0x6c,0x6f,0x70,0x70,0x79,0x00,0x00,0xca,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0x07,0x00,0x00,0x00, + 0x08,0x00,0x00,0x00,0x46,0x61,0x6c,0x6c,0x62,0x61, + 0x63,0x6b,0x5f,0x4e,0x65,0x74,0x77,0x6f,0x72,0x6b, + 0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x20,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x46,0x61,0x6c,0x6c,0x62,0x61,0x63,0x6b,0x5f,0x48, + 0x44,0x44,0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x20,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x0a,0x00, + 0x00,0x00,0x46,0x61,0x6c,0x6c,0x62,0x61,0x63,0x6b, + 0x5f,0x46,0x6c,0x6f,0x70,0x70,0x79,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x32,0x30,0x30,0x4d,0x68,0x7a, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x31,0x36, + 0x36,0x4d,0x68,0x7a,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x02,0x00, + 0x00,0x00,0x31,0x33,0x33,0x4d,0x68,0x7a,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x08,0x00, + 0x00,0x00,0x03,0x00,0x00,0x00,0x31,0x30,0x30,0x4d, + 0x68,0x7a,0x00,0x00,0xca,0x00,0x00,0x00,0x14,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x6f,0x66,0x66,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x38,0x37,0x2e,0x35,0x25,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x02,0x00,0x00,0x00,0x37,0x35,0x2e,0x30,0x25,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x09,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x36,0x32, + 0x2e,0x35,0x25,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x35,0x30,0x2e,0x30,0x25,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00, + 0x00,0x00,0x05,0x00,0x00,0x00,0x33,0x37,0x2e,0x35, + 0x25,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x32,0x35,0x2e,0x30,0x25,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x07,0x00,0x00,0x00,0x31,0x32,0x2e,0x35,0x25,0x00, + 0x00,0x00,0xcc,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x88,0x01,0x00,0x00,0xd7,0x03,0x00,0x00,0xd8,0x03, + 0x00,0x00,0x01,0x00,0x00,0x00}; Index: targets/dfi/nf570/nf570/failover/option_table.h =================================================================== --- targets/dfi/nf570/nf570/failover/option_table.h (revision 0) +++ targets/dfi/nf570/nf570/failover/option_table.h (revision 0) @@ -0,0 +1,40 @@ +#define CMOS_VSTART_boot_option 384 +#define CMOS_VLEN_boot_option 1 +#define CMOS_VSTART_last_boot 385 +#define CMOS_VLEN_last_boot 1 +#define CMOS_VSTART_ECC_memory 386 +#define CMOS_VLEN_ECC_memory 1 +#define CMOS_VSTART_baud_rate 392 +#define CMOS_VLEN_baud_rate 3 +#define CMOS_VSTART_hw_scrubber 395 +#define CMOS_VLEN_hw_scrubber 1 +#define CMOS_VSTART_interleave_chip_selects 396 +#define CMOS_VLEN_interleave_chip_selects 1 +#define CMOS_VSTART_max_mem_clock 397 +#define CMOS_VLEN_max_mem_clock 2 +#define CMOS_VSTART_dual_core 399 +#define CMOS_VLEN_dual_core 1 +#define CMOS_VSTART_power_on_after_fail 400 +#define CMOS_VLEN_power_on_after_fail 1 +#define CMOS_VSTART_debug_level 412 +#define CMOS_VLEN_debug_level 4 +#define CMOS_VSTART_boot_first 416 +#define CMOS_VLEN_boot_first 4 +#define CMOS_VSTART_boot_second 420 +#define CMOS_VLEN_boot_second 4 +#define CMOS_VSTART_boot_third 424 +#define CMOS_VLEN_boot_third 4 +#define CMOS_VSTART_boot_index 428 +#define CMOS_VLEN_boot_index 4 +#define CMOS_VSTART_boot_countdown 432 +#define CMOS_VLEN_boot_countdown 8 +#define CMOS_VSTART_slow_cpu 440 +#define CMOS_VLEN_slow_cpu 4 +#define CMOS_VSTART_nmi 444 +#define CMOS_VLEN_nmi 1 +#define CMOS_VSTART_iommu 445 +#define CMOS_VLEN_iommu 1 +#define CMOS_VSTART_user_data 728 +#define CMOS_VLEN_user_data 256 +#define CMOS_VSTART_check_sum 984 +#define CMOS_VLEN_check_sum 16 Index: targets/dfi/nf570/nf570/failover/coreboot.rom =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/failover/coreboot.rom ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/failover/static.c =================================================================== --- targets/dfi/nf570/nf570/failover/static.c (revision 0) +++ targets/dfi/nf570/nf570/failover/static.c (revision 0) @@ -0,0 +1,808 @@ +#include <device/device.h> +#include <device/pci.h> +#include "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/chip.h" +#include "/home/chris/coreboot-v2/src/cpu/amd/socket_AM2/chip.h" +#include "/home/chris/coreboot-v2/src/mainboard/dfi/nf570/chip.h" +#include "/home/chris/coreboot-v2/src/superio/ite/it8716f/chip.h" +#include "/home/chris/coreboot-v2/src/northbridge/amd/amdk8/chip.h" +#include "/home/chris/coreboot-v2/src/northbridge/amd/amdk8/root_complex/chip.h" +struct device _dev3; +struct device _dev6; +struct device _dev5; +struct device _dev8; +struct device _dev60; +struct device _dev61; +struct device _dev62; +struct device _dev63; +struct device _dev64; +struct device _dev10; +struct device _dev11; +struct device _dev24; +struct device _dev41; +struct device _dev44; +struct device _dev45; +struct device _dev46; +struct device _dev47; +struct device _dev48; +struct device _dev49; +struct device _dev50; +struct device _dev51; +struct device _dev52; +struct device _dev53; +struct device _dev54; +struct device _dev55; +struct device _dev56; +struct device _dev57; +struct device _dev58; +struct device _dev59; +struct device _dev13; +struct device _dev14; +struct device _dev15; +struct device _dev16; +struct device _dev17; +struct device _dev18; +struct device _dev19; +struct device _dev20; +struct device _dev21; +struct device _dev22; +struct device _dev23; +struct device _dev26; +struct device _dev28; +struct device _dev30; +struct device _dev32; +struct device _dev34; +struct device _dev36; +struct device _dev38; +struct device _dev40; +struct device _dev43; +struct mainboard_dfi_nf570_config mainboard_dfi_nf570_info_0; +struct device **last_dev_p = &_dev64.next; +struct device dev_root = { + .ops = &default_dev_ops_root, + .bus = &dev_root.link[0], + .path = { .type = DEVICE_PATH_ROOT }, + .enabled = 1, + .links = 1, + .on_mainboard = 1, + .link = { + [0] = { + .dev=&dev_root, + .link = 0, + .children = &_dev3, + }, + }, + .chip_ops = &mainboard_dfi_nf570_ops, + .chip_info = &mainboard_dfi_nf570_info_0, + .next = &_dev3, +}; +struct northbridge_amd_amdk8_root_complex_config northbridge_amd_amdk8_root_complex_info_2; +struct device _dev3 = { + .ops = 0, + .bus = &dev_root.link[0], + .path = {.type=DEVICE_PATH_APIC_CLUSTER,.u={.apic_cluster={ .cluster = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev3, + .children = &_dev5, + }, + }, + .links = 1, + .sibling = &_dev6, + .chip_ops = &northbridge_amd_amdk8_root_complex_ops, + .chip_info = &northbridge_amd_amdk8_root_complex_info_2, + .next=&_dev5 +}; +struct device _dev6 = { + .ops = 0, + .bus = &dev_root.link[0], + .path = {.type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev6, + .children = &_dev8, + }, + }, + .links = 1, + .chip_ops = &northbridge_amd_amdk8_root_complex_ops, + .chip_info = &northbridge_amd_amdk8_root_complex_info_2, + .next=&_dev8 +}; +struct cpu_amd_socket_AM2_config cpu_amd_socket_AM2_info_4; +struct device _dev5 = { + .ops = 0, + .bus = &_dev3.link[0], + .path = {.type=DEVICE_PATH_APIC,.u={.apic={ .apic_id = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &cpu_amd_socket_AM2_ops, + .chip_info = &cpu_amd_socket_AM2_info_4, + .next=&_dev6 +}; +struct northbridge_amd_amdk8_config northbridge_amd_amdk8_info_7; +struct device _dev8 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev8, + .children = &_dev10, + }, + [1] = { + .link = 1, + .dev = &_dev8, + }, + [2] = { + .link = 2, + .dev = &_dev8, + }, + }, + .links = 3, + .sibling = &_dev62, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev10 +}; +struct device _dev62 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev63, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev63 +}; +struct device _dev63 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,2)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev64, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev64 +}; +struct device _dev64 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,3)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, +}; +struct southbridge_nvidia_mcp55_config southbridge_nvidia_mcp55_info_9 = { + .ide0_enable = 1, + .sata0_enable = 1, + .sata1_enable = 1, + .mac_eeprom_addr = 0x51, + .mac_eeprom_smbus = 3, +}; + +struct device _dev10 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x0,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev11, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev11 +}; +struct device _dev11 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x1,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev11, + .children = &_dev13, + }, + }, + .links = 1, + .sibling = &_dev24, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev13 +}; +struct device _dev24 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x1,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev24, + .children = &_dev26, + }, + [1] = { + .link = 1, + .dev = &_dev24, + .children = &_dev43, + }, + }, + .links = 2, + .sibling = &_dev44, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev26 +}; +struct device _dev44 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x2,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev45, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev45 +}; +struct device _dev45 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x2,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev46, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev46 +}; +struct device _dev46 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x4,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev47, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev47 +}; +struct device _dev47 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev48, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev48 +}; +struct device _dev48 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev49, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev49 +}; +struct device _dev49 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,2)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev50, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev50 +}; +struct device _dev50 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x6,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev51, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev51 +}; +struct device _dev51 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x6,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev52, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev52 +}; +struct device _dev52 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x8,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev53, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev53 +}; +struct device _dev53 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x9,0)}}}, + .enabled = 0, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev54, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev54 +}; +struct device _dev54 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xa,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev55, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev55 +}; +struct device _dev55 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xb,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev56, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev56 +}; +struct device _dev56 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xc,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev57, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev57 +}; +struct device _dev57 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xd,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev58, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev58 +}; +struct device _dev58 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xe,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev59, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev59 +}; +struct device _dev59 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xf,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev62 +}; +struct superio_ite_it8716f_config superio_ite_it8716f_info_12; +struct device _dev13 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x0 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 4, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x23, .base=0x11}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x3f0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x6}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_DRQ, .index=0x74, .base=0x2}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev14, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev14 +}; +struct device _dev14 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x1 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x3f8}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x4}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev15, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev15 +}; +struct device _dev15 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x2 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x2f8}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x3}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev16, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev16 +}; +struct device _dev16 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x3 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x378}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x7}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev17, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev17 +}; +struct device _dev17 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x4 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 3, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x290}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x230}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x9}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev18, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev18 +}; +struct device _dev18 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x5 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 3, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x60}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x64}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x1}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev19, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev19 +}; +struct device _dev19 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x6 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 1, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0xc}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev20, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev20 +}; +struct device _dev20 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x7 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 13, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x25, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x26, .base=0x43}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x27, .base=0x20}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x29, .base=0x81}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x800}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x64, .base=0x820}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x72, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xb8, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xbc, .base=0x1}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc1, .base=0x43}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc2, .base=0x20}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc9, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xf6, .base=0x28}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev21, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev21 +}; +struct device _dev21 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x8 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x300}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0xa}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev22, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev22 +}; +struct device _dev22 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x9 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 1, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x220}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev23, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev23 +}; +struct device _dev23 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0xa }}}, + .enabled = 0, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev24 +}; +struct device _dev26 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x50 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev28, + .next=&_dev28 +}; +struct device _dev28 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x51 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev30, + .next=&_dev30 +}; +struct device _dev30 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x52 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev32, + .next=&_dev32 +}; +struct device _dev32 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x53 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev34, + .next=&_dev34 +}; +struct device _dev34 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x54 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev36, + .next=&_dev36 +}; +struct device _dev36 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x55 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev38, + .next=&_dev38 +}; +struct device _dev38 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x56 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev40, + .next=&_dev40 +}; +struct device _dev40 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x57 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .next=&_dev43 +}; +struct device _dev43 = { + .ops = 0, + .bus = &_dev24.link[1], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x51 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .next=&_dev44 +}; Index: targets/dfi/nf570/nf570/failover/crt0.S =================================================================== --- targets/dfi/nf570/nf570/failover/crt0.S (revision 0) +++ targets/dfi/nf570/nf570/failover/crt0.S (revision 0) @@ -0,0 +1,233 @@ +/* -*- asm -*- + * $ $ + * + */ + +/* + * Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer + * + * This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * Originally this code was part of ucl the data compression library + * for upx the ``Ultimate Packer of eXecutables''. + * + * - Converted to gas assembly, and refitted to work with etherboot. + * Eric Biederman 20 Aug 2002 + * - Merged the nrv2b decompressor into crt0.base of coreboot + * Eric Biederman 26 Sept 2002 + */ + + +#include <arch/asm.h> +#include <arch/intel.h> +#include <console/loglevel.h> + +/* + * This is the entry code the code in .reset section + * jumps to this address. + * + */ +.section ".rom.data", "a", @progbits +.section ".rom.text", "ax", @progbits + + intel_chip_post_macro(0x01) /* delay for chipsets */ + +#include "crt0_includes.h" + +#if USE_DCACHE_RAM == 0 +#ifndef CONSOLE_DEBUG_TX_STRING + /* uses: esp, ebx, ax, dx */ +# define __CRT_CONSOLE_TX_STRING(string) \ + mov string, %ebx ; \ + CALLSP(crt_console_tx_string) + +# if defined(TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) +# define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string) +# else +# define CONSOLE_DEBUG_TX_STRING(string) +# endif +#endif + + /* clear boot_complete flag */ + xorl %ebp, %ebp +__main: + CONSOLE_DEBUG_TX_STRING($str_copying_to_ram) + + /* + * Copy data into RAM and clear the BSS. Since these segments + * isn't really that big we just copy/clear using bytes, not + * double words. + */ + intel_chip_post_macro(0x11) /* post 11 */ + + cld /* clear direction flag */ + + /* copy coreboot from it's initial load location to + * the location it is compiled to run at. + * Normally this is copying from FLASH ROM to RAM. + */ +#if !CONFIG_COMPRESS + movl $_liseg, %esi + movl $_iseg, %edi + movl $_eiseg, %ecx + subl %edi, %ecx + movb %cl, %al + shrl $2, %ecx + andb $3, %al + rep movsl + movb %al, %cl + rep movsb +#else + leal 4+_liseg, %esi + leal _iseg, %edi + movl %ebp, %esp /* preserve %ebp */ + movl $-1, %ebp /* last_m_off = -1 */ + jmp dcl1_n2b + +/* ------------- DECOMPRESSION ------------- + + Input: + %esi - source + %edi - dest + %ebp - -1 + cld + + Output: + %eax - 0 + %ecx - 0 +*/ + +.macro getbit bits +.if \bits == 1 + addl %ebx, %ebx + jnz 1f +.endif + movl (%esi), %ebx + subl $-4, %esi /* sets carry flag */ + adcl %ebx, %ebx +1: +.endm + +decompr_literals_n2b: + movsb + +decompr_loop_n2b: + addl %ebx, %ebx + jnz dcl2_n2b +dcl1_n2b: + getbit 32 +dcl2_n2b: + jc decompr_literals_n2b + xorl %eax, %eax + incl %eax /* m_off = 1 */ +loop1_n2b: + getbit 1 + adcl %eax, %eax /* m_off = m_off*2 + getbit() */ + getbit 1 + jnc loop1_n2b /* while(!getbit()) */ + xorl %ecx, %ecx + subl $3, %eax + jb decompr_ebpeax_n2b /* if (m_off == 2) goto decompr_ebpeax_n2b ? */ + shll $8, %eax + movb (%esi), %al /* m_off = (m_off - 3)*256 + src[ilen++] */ + incl %esi + xorl $-1, %eax + jz decompr_end_n2b /* if (m_off == 0xffffffff) goto decomp_end_n2b */ + movl %eax, %ebp /* last_m_off = m_off ?*/ +decompr_ebpeax_n2b: + getbit 1 + adcl %ecx, %ecx /* m_len = getbit() */ + getbit 1 + adcl %ecx, %ecx /* m_len = m_len*2 + getbit()) */ + jnz decompr_got_mlen_n2b /* if (m_len == 0) goto decompr_got_mlen_n2b */ + incl %ecx /* m_len++ */ +loop2_n2b: + getbit 1 + adcl %ecx, %ecx /* m_len = m_len*2 + getbit() */ + getbit 1 + jnc loop2_n2b /* while(!getbit()) */ + incl %ecx + incl %ecx /* m_len += 2 */ +decompr_got_mlen_n2b: + cmpl $-0xd00, %ebp + adcl $1, %ecx /* m_len = m_len + 1 + (last_m_off > 0xd00) */ + movl %esi, %edx + leal (%edi,%ebp), %esi /* m_pos = dst + olen + -m_off */ + rep + movsb /* dst[olen++] = *m_pos++ while(m_len > 0) */ + movl %edx, %esi + jmp decompr_loop_n2b +decompr_end_n2b: + intel_chip_post_macro(0x12) /* post 12 */ + + movl %esp, %ebp +#endif + + CONSOLE_DEBUG_TX_STRING($str_pre_main) + leal _iseg, %edi + jmp *%edi + +.Lhlt: + intel_chip_post_macro(0xee) /* post fe */ + hlt + jmp .Lhlt + +#ifdef __CRT_CONSOLE_TX_STRING + /* Uses esp, ebx, ax, dx */ +crt_console_tx_string: + mov (%ebx), %al + inc %ebx + cmp $0, %al + jne 9f + RETSP +9: +/* Base Address */ +#ifndef TTYS0_BASE +#define TTYS0_BASE 0x3f8 +#endif +/* Data */ +#define TTYS0_RBR (TTYS0_BASE+0x00) + +/* Control */ +#define TTYS0_TBR TTYS0_RBR +#define TTYS0_IER (TTYS0_BASE+0x01) +#define TTYS0_IIR (TTYS0_BASE+0x02) +#define TTYS0_FCR TTYS0_IIR +#define TTYS0_LCR (TTYS0_BASE+0x03) +#define TTYS0_MCR (TTYS0_BASE+0x04) +#define TTYS0_DLL TTYS0_RBR +#define TTYS0_DLM TTYS0_IER + +/* Status */ +#define TTYS0_LSR (TTYS0_BASE+0x05) +#define TTYS0_MSR (TTYS0_BASE+0x06) +#define TTYS0_SCR (TTYS0_BASE+0x07) + + mov %al, %ah +10: mov $TTYS0_LSR, %dx + inb %dx, %al + test $0x20, %al + je 10b + mov $TTYS0_TBR, %dx + mov %ah, %al + outb %al, %dx + + jmp crt_console_tx_string +#endif /* __CRT_CONSOLE_TX_STRING */ + +#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) +.section ".rom.data" +#if CONFIG_COMPRESS +str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n" +#else +str_copying_to_ram: .string "Copying coreboot to RAM.\r\n" +#endif +str_pre_main: .string "Jumping to coreboot.\r\n" +.previous + +#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ + +#endif /* USE_DCACHE_RAM */ Index: targets/dfi/nf570/nf570/failover/crt0.s =================================================================== --- targets/dfi/nf570/nf570/failover/crt0.s (revision 0) +++ targets/dfi/nf570/nf570/failover/crt0.s (revision 0) @@ -0,0 +1,699 @@ +# 1 "crt0.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "crt0.S" +# 24 "crt0.S" +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/asm.h" 1 +# 25 "crt0.S" 2 +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/intel.h" 1 +# 26 "crt0.S" 2 +# 1 "/home/chris/coreboot-v2/src/include/console/loglevel.h" 1 +# 27 "crt0.S" 2 + + + + + + +.section ".rom.data", "a", @progbits +.section ".rom.text", "ax", @progbits + + movb $0x01, %al ; outb %al, $0x80 + +# 1 "crt0_includes.h" 1 +# 1 "/home/chris/coreboot-v2/src/cpu/x86/16bit/entry16.inc" 1 +# 29 "/home/chris/coreboot-v2/src/cpu/x86/16bit/entry16.inc" +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/rom_segs.h" 1 +# 30 "/home/chris/coreboot-v2/src/cpu/x86/16bit/entry16.inc" 2 +.code16 +.globl _start +.type _start, @function + +_start: + cli + + movl %eax, %ebp + + + + + + + + xorl %eax, %eax + movl %eax, %cr3 +# 94 "/home/chris/coreboot-v2/src/cpu/x86/16bit/entry16.inc" + movw %cs, %ax + shlw $4, %ax + movw $gdtptr16_offset, %bx + subw %ax, %bx + data32 lgdt %cs:(%bx) + + movl %cr0, %eax + andl $0x7FFAFFD1, %eax + orl $0x60000001, %eax + movl %eax, %cr0 + + + movl %ebp, %eax + + + data32 ljmp $0x08, $__protected_start + + + + + +.align 4 +.globl gdtptr16 +gdtptr16: + .word gdt_end - gdt -1 + .long gdt + +.globl _estart +_estart: + .code32 +# 2 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/cpu/x86/32bit/entry32.inc" 1 + + + + + + .code32 + + .align 4 +.globl gdtptr + + + + +gdt: +gdtptr: + .word gdt_end - gdt -1 + .long gdt + .word 0 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0xcf, 0x00 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x93, 0xcf, 0x00 + +gdt_end: +# 42 "/home/chris/coreboot-v2/src/cpu/x86/32bit/entry32.inc" + .align 4 +.globl protected_start +protected_start: + + lgdt %cs:gdtptr + ljmp $0x08, $__protected_start + +__protected_start: + + movl %eax, %ebp + + movb $0x10, %al ; outb %al, $0x80 + + movw $0x10, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + + + movl %ebp, %eax +# 3 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/cpu/x86/16bit/reset16.inc" 1 + .section ".reset" + .code16 +.globl reset_vector +reset_vector: + .byte 0xe9 + .int _start - ( . + 2 ) + + + + + + + . = 0x8; + .code32 + jmp protected_start + .previous +# 4 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/id.inc" 1 +# 22 "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/id.inc" + .section ".id", "a", @progbits + + .globl __id_start +__id_start: +vendor: + .asciz "DFI" +part: + .asciz "nf570" +.long __id_end + 0x80 - vendor +.long __id_end + 0x80 - part +.long 0x0 + 0x1000 + .globl __id_end + +__id_end: +.previous +# 5 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/romstrap.inc" 1 +# 22 "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/romstrap.inc" + .section ".romstrap", "a", @progbits + + + .globl __romstrap_start +__romstrap_start: +rstables: + .long 0x2b16d065 + .long 0x0 + .long 0x0 + .long linkedlist + +linkedlist: + .long 0x0003001C + .long 0x08000000 + .long 0x00000000 + .long 0xFFFFFFFF + + .long 0xFFFFFFFF + .long 0xFFFFFFFF + .long 0xFFFFFFFF + .long 0xFFFFFFFF + + .long 0x81543266 + .long 0x000000E0 + + .long 0x002309CE + .long 0x00E08100 + +rspointers: + .long rstables + .long rstables + .long rstables + .long rstables + + .globl __romstrap_end + +__romstrap_end: +.previous +# 6 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 1 +# 31 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" +# 1 "/home/chris/coreboot-v2/src/include/cpu/x86/mtrr.h" 1 +# 32 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 2 +# 1 "/home/chris/coreboot-v2/src/include/cpu/amd/mtrr.h" 1 +# 33 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 2 + + + movl %eax, %ebp + + + +cache_as_ram_setup: + + movb $0xA0, %al + outb %al, $0x80 + + + + + + movl $0x2ff, %ecx + rdmsr + andl $(1 << 11), %eax + movl %eax, %ebx +# 101 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" +enable_fixed_mtrr_dram_modify: + movl $0xC0010010, %ecx + rdmsr + andl $(~((1 << 18) | (1 << 20))), %eax + orl $(1 << 19), %eax + wrmsr + + + xorl %edx, %edx + movl $fixed_mtrr_msr, %esi + +clear_fixed_var_mtrr: + lodsl (%esi), %eax + testl %eax, %eax + jz clear_fixed_var_mtrr_out + + movl %eax, %ecx + xorl %eax, %eax + wrmsr + + jmp clear_fixed_var_mtrr +clear_fixed_var_mtrr_out: + + + + + + + +.macro extractmask segs, reg +.if \segs <= 0 + + + + + xorl \reg, \reg +# 147 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" +.elseif \segs == 1 + movl $0x06000000, \reg +.elseif \segs == 2 + movl $0x06060000, \reg +.elseif \segs == 3 + movl $0x06060600, \reg +.elseif \segs >= 4 + movl $0x06060606, \reg + +.endif +.endm + + + + +.macro simplemask carsize, windowoffset + .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000) - 4) + extractmask gas_bug_workaround, %eax + .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000)) + extractmask gas_bug_workaround, %edx + + + + + +.endm +# 192 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movl $0x269, %ecx + simplemask 0x8000, 0 + wrmsr + + + movl $0xC001001A, %ecx + xorl %edx, %edx + movl $(((2048 << 10) + 0x007fffff) & ~0x007fffff) , %eax + wrmsr +# 216 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movl $0x202, %ecx + xorl %edx, %edx + movl $(0xfffff000 | 6), %eax + wrmsr + + movl $0x203, %ecx + movl $((1 << (40 - 32)) - 1), %edx + movl $(~(0x1000 - 1) | 0x800), %eax + wrmsr + + + + + movl $0x2ff, %ecx + xorl %edx, %edx + + movl $0x00000c00, %eax + wrmsr + + + movl $0xC0010010, %ecx + rdmsr + orl $((1 << 20) | (1 << 18)), %eax + wrmsr + + + movb $0xA1, %al + outb %al, $0x80 + + + movl %cr0, %eax + andl $0x9fffffff, %eax + movl %eax, %cr0 +# 259 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movb $0xA2, %al + outb %al, $0x80 + + + + cld + movl $(0xd0000 - 0x8000), %esi + movl $(0x8000 >> 2), %ecx + rep lodsl + + movl $(0xd0000 - 0x8000), %edi + movl $(0x8000 >> 2), %ecx + xorl %eax, %eax + rep stosl + + + + + movl $((0xd0000 - 0x8000) + 0x8000 - 0x1000), %eax + movl %eax, %esp + + movb $0xA3, %al + outb %al, $0x80 +# 331 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movb $0xA5, %al + outb %al, $0x80 + + + movl %ebp, %eax + + + movl %esp, %ebp + pushl %ebx + pushl %eax + call cache_as_ram_main + + + movb $0xAF, %al + outb %al, $0x80 + +fixed_mtrr_msr: + .long 0x250, 0x258, 0x259 + .long 0x268, 0x269, 0x26A + .long 0x26B, 0x26C, 0x26D + .long 0x26E, 0x26F +var_mtrr_msr: + .long 0x200, 0x201, 0x202, 0x203 + .long 0x204, 0x205, 0x206, 0x207 + .long 0x208, 0x209, 0x20A, 0x20B + .long 0x20C, 0x20D, 0x20E, 0x20F +var_iorr_msr: + .long 0xC0010016, 0xC0010017, 0xC0010018, 0xC0010019 +mem_top: + .long 0xC001001A, 0xC001001D + .long 0x000 + +cache_as_ram_setup_out: +# 7 "crt0_includes.h" 2 +# 1 "././cache_as_ram_auto.inc" 1 + .file "cache_as_ram_auto.c" + .section .rom.text +.globl failover_process + .type failover_process, @function +failover_process: + pushl %ebp + movb $48, %al + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $4, %esp +#APP + outb %al, $112 + inb $113, %al +#NO_APP + movl $2, %esi + andl %eax, %esi + cmpl $0, 12(%ebp) + jne .L2 + movl $27, %ecx +#APP + rdmsr +#NO_APP + testb $1, %ah + jne .L4 +.L2: + testl %esi, %esi + jmp .L23 +.L4: + movl $3320, %ebx + movl $-2147481480, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3327, %ecx + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl $-2147481480, %eax +#APP + outl %eax, %dx +#NO_APP + orl $32, %edi + movl %edi, %edx + movzbl %dl, %eax + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl $-2147481440, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %cl + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl $-2147481440, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147481436, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl $-2147481436, %eax +#APP + outl %eax, %dx +#NO_APP + orl $65536, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147481464, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $-1, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outb %al, %dx +#NO_APP + movl $-2147481460, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + movl $-2147481460, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl $-2147481456, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl $-2147481456, %eax +#APP + outl %eax, %dx +#NO_APP + orw $32767, %di + movl %ecx, %edx + movzwl %di, %eax +#APP + outw %ax, %dx +#NO_APP + movl $-2147434388, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $48, %eax + cmpl $16, %eax + jne .L7 + testl %esi, %esi + jne .L5 +.L7: + movb $13, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + testb %al, %al + jns .L9 + movb $49, %cl + xorl %edx, %edx +.L11: + movb %cl, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + movzbl %al, %eax + incl %ecx + addl %eax, %edx + cmpb $123, %cl + jne .L11 + movb $123, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + movzbl %al, %ecx + movb $124, %al + sall $8, %ecx +#APP + outb %al, $112 + inb $113, %al +#NO_APP + andl $65535, %edx + movzbl %al, %eax + xorl $65535, %edx + orl %eax, %ecx + cmpl %ecx, %edx + je .L13 +.L9: + movb $48, %dl + movb %dl, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + movb %al, %cl + movb %dl, %al + andl $12, %ecx +#APP + outb %al, $112 +#NO_APP + orl $48, %ecx + movl %ecx, %eax + andl $60, %eax +#APP + outb %al, $113 +#NO_APP +.L13: + movb $48, %al +#APP + outb %al, $112 + inb $113, %al +#NO_APP + testb $1, %al + je .L14 + andl $15, %eax +.L14: + movb %al, %dl + andl $-4, %edx + movb %dl, %al + shrb $4, %al + cmpb $2, %al + ja .L16 + orl $2, %edx + movb %dl, %al + shrb $4, %al + cmpb $2, %al + ja .L16 + leal 16(%edx), %eax + jmp .L19 +.L16: + movb %dl, %al + andl $-4, %eax +.L19: + movzbl %al, %edx + movb $48, %al +#APP + outb %al, $112 +#NO_APP + movb %dl, %al +#APP + outb %al, $113 +#NO_APP + andb $2, %dl +.L23: + je .L6 +.L5: + movl 8(%ebp), %eax + movl 12(%ebp), %ebx +#APP + jmp __normal_image +#NO_APP +.L6: + movl 8(%ebp), %eax + movl 12(%ebp), %ebx +#APP + jmp __fallback_image +#NO_APP + popl %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size failover_process, .-failover_process +.globl cache_as_ram_main + .type cache_as_ram_main, @function +cache_as_ram_main: + pushl %ebp + movl %esp, %ebp + popl %ebp + jmp failover_process + .size cache_as_ram_main, .-cache_as_ram_main + .ident "GCC: (GNU) 4.1.3 20080308 (prerelease) (Ubuntu 4.1.2-21ubuntu1)" + .section .note.GNU-stack,"",@progbits +# 7 "crt0_includes.h" 2 +# 39 "crt0.S" 2 Index: targets/dfi/nf570/nf570/failover/ldoptions =================================================================== --- targets/dfi/nf570/nf570/failover/ldoptions (revision 0) +++ targets/dfi/nf570/nf570/failover/ldoptions (revision 0) @@ -0,0 +1,130 @@ +HAVE_MOVNTI = 1; +CONFIG_USE_INIT = 0; +HAVE_FALLBACK_BOOT = 1; +HAVE_FAILOVER_BOOT = 1; +ROM_IMAGE_SIZE = 0x1000; +PAYLOAD_SIZE = 0x0; +_ROMBASE = 0xfffff000; +_RESET = 0xfffff000; +_EXCEPTION_VECTORS = 0xfffff100; +STACK_SIZE = 0x2000; +HEAP_SIZE = 0x8000; +_RAMBASE = 0x100000; +USE_DCACHE_RAM = 1; +CAR_FAM10 = 0; +DCACHE_RAM_BASE = 0xc8000; +DCACHE_RAM_SIZE = 0x8000; +DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000; +CONFIG_AP_CODE_IN_CAR = 0; +MEM_TRAIN_SEQ = 2; +WAIT_BEFORE_CPUS_INIT = 0; +CONFIG_COMPRESS = 1; +CONFIG_UNCOMPRESSED = 0; +CONFIG_LB_MEM_TOPK = 2048; +HAVE_OPTION_TABLE = 1; +USE_OPTION_TABLE = 0; +LB_CKS_RANGE_START = 49; +LB_CKS_RANGE_END = 122; +LB_CKS_LOC = 123; +DEBUG = 1; +CONFIG_CONSOLE_VGA = 1; +CONFIG_CONSOLE_VGA_MULTI = 0; +CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST = 0; +CONFIG_CONSOLE_BTEXT = 0; +CONFIG_CONSOLE_LOGBUF = 0; +CONFIG_CONSOLE_SROM = 0; +CONFIG_CONSOLE_SERIAL8250 = 1; +CONFIG_USBDEBUG_DIRECT = 0; +DEFAULT_CONSOLE_LOGLEVEL = 8; +MAXIMUM_CONSOLE_LOGLEVEL = 8; +CONFIG_SERIAL_POST = 0; +TTYS0_BASE = 0x3f8; +TTYS0_BAUD = 115200; +TTYS0_LCS = 0x3; +CONFIG_USE_PRINTK_IN_CAR = 1; +MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130; +MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x2b80; +CONFIG_MAX_PCI_BUSES = 255; +CONFIG_SMP = 1; +CONFIG_MAX_CPUS = 2; +CONFIG_MAX_PHYSICAL_CPUS = 1; +CONFIG_LOGICAL_CPUS = 1; +CONFIG_AP_IN_SIPI_WAIT = 0; +SERIAL_CPU_INIT = 1; +APIC_ID_OFFSET = 16; +ENABLE_APIC_EXT_ID = 0; +LIFT_BSP_APIC_ID = 1; +CONFIG_IDE_PAYLOAD = 0; +CONFIG_ROM_PAYLOAD = 1; +CONFIG_ROM_PAYLOAD_START = 0xfffff000; +CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0; +CONFIG_COMPRESSED_PAYLOAD_LZMA = 0; +CONFIG_PRECOMPRESSED_PAYLOAD = 0; +CONFIG_SERIAL_PAYLOAD = 0; +CONFIG_FS_PAYLOAD = 0; +CONFIG_FS_EXT2 = 0; +CONFIG_FS_ISO9660 = 0; +CONFIG_FS_FAT = 0; +AUTOBOOT_DELAY = 2; +USE_WATCHDOG_ON_BOOT = 0; +CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1; +CONFIG_AGP_PLUGIN_SUPPORT = 1; +CONFIG_CARDBUS_PLUGIN_SUPPORT = 1; +CONFIG_PCIX_PLUGIN_SUPPORT = 1; +CONFIG_PCIEXP_PLUGIN_SUPPORT = 1; +CONFIG_IDE = 0; +IDE_BOOT_DRIVE = 0; +IDE_OFFSET = 0; +PCI_IO_CFG_EXT = 0; +CONFIG_CHIP_NAME = 1; +HAVE_INIT_TIMER = 1; +MAX_REBOOT_CNT = 3; +FAKE_SPDROM = 0; +HAVE_ACPI_TABLES = 0; +ACPI_SSDTX_NUM = 0; +HT_CHAIN_UNITID_BASE = 0; +HT_CHAIN_END_UNITID_BASE = 32; +SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0; +SB_HT_CHAIN_ON_BUS0 = 2; +PCI_BUS_SEGN_BITS = 0; +MMCONF_SUPPORT = 0; +MMCONF_SUPPORT_DEFAULT = 0; +HW_MEM_HOLE_SIZEK = 1048576; +HW_MEM_HOLE_SIZE_AUTO_INC = 0; +CONFIG_VAR_MTRR_HOLE = 1; +K8_HT_FREQ_1G_SUPPORT = 1; +K8_REV_F_SUPPORT = 1; +CBB = 0; +CDB = 24; +HT3_SUPPORT = 0; +EXT_RT_TBL_SUPPORT = 0; +EXT_CONF_SUPPORT = 0; +DIMM_SUPPORT = 0x4; +CPU_SOCKET_TYPE = 17; +CPU_ADDR_BITS = 40; +CONFIG_VGA_ROM_RUN = 0; +CONFIG_PCI_ROM_RUN = 1; +CONFIG_PCI_64BIT_PREF_MEM = 0; +CONFIG_AMDMCT = 0; +K8_MEM_BANK_B_ONLY = 0; +CONFIG_PCIE_CONFIGSPACE_HOLE = 0; +HAVE_MP_TABLE = 1; +HAVE_PIRQ_TABLE = 1; +USE_FALLBACK_IMAGE = 0; +USE_FAILOVER_IMAGE = 1; +HAVE_HARD_RESET = 1; +IRQ_SLOT_COUNT = 11; +CONFIG_IOAPIC = 1; +FALLBACK_SIZE = 0x3f000; +FAILOVER_SIZE = 0x1000; +ROM_SIZE = 0x80000; +ROM_SECTION_SIZE = 0x1000; +ROM_SECTION_OFFSET = 0x7f000; +XIP_ROM_SIZE = 0x1000; +XIP_ROM_BASE = 0xfffff000; +CONFIG_GDB_STUB = 0; +HAVE_FANCTL = 1; +CONFIG_UDELAY_IO = 0; +CONFIG_UDELAY_TSC = 0; +CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0; +AGP_APERTURE_SIZE = 0x4000000; Index: targets/dfi/nf570/nf570/failover/Makefile.settings =================================================================== --- targets/dfi/nf570/nf570/failover/Makefile.settings (revision 0) +++ targets/dfi/nf570/nf570/failover/Makefile.settings (revision 0) @@ -0,0 +1,316 @@ +# File: dfi/nf570/nf570/failover/Makefile.settings is autogenerated +TOP:=/home/chris/coreboot-v2 +TARGET_DIR:=dfi/nf570/nf570/failover + +export ARCH:=i386 +export HAVE_MOVNTI:=1 +export CROSS_COMPILE:= +export CC:=$(CROSS_COMPILE)gcc -m32 +export HOSTCC:=gcc +export OBJCOPY:=$(CROSS_COMPILE)objcopy --gap-fill 0xff +export COREBOOT_VERSION:="2.0.0" +export COREBOOT_BUILD:="$(shell date)" +export COREBOOT_COMPILE_TIME:="$(shell date +%T)" +export COREBOOT_COMPILE_BY:="$(shell whoami)" +export COREBOOT_COMPILE_HOST:="$(shell hostname)" +export COREBOOT_COMPILE_DOMAIN:="$(shell dnsdomainname)" +export COREBOOT_COMPILER:="$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)" +export COREBOOT_LINKER:="$(shell $(CC) -Wl,--version 2>&1 | grep version | tail -n 1)" +export COREBOOT_ASSEMBLER:="$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )" +export CONFIG_USE_INIT:=0 +export HAVE_FALLBACK_BOOT:=1 +export HAVE_FAILOVER_BOOT:=1 +export ROM_IMAGE_SIZE:=0x1000 +export PAYLOAD_SIZE:=0x0 +export _ROMBASE:=0xfffff000 +export _RESET:=0xfffff000 +export _EXCEPTION_VECTORS:=0xfffff100 +export STACK_SIZE:=0x2000 +export HEAP_SIZE:=0x8000 +export _RAMBASE:=0x100000 +export USE_DCACHE_RAM:=1 +export CAR_FAM10:=0 +export DCACHE_RAM_BASE:=0xc8000 +export DCACHE_RAM_SIZE:=0x8000 +export DCACHE_RAM_GLOBAL_VAR_SIZE:=0x1000 +export CONFIG_AP_CODE_IN_CAR:=0 +export MEM_TRAIN_SEQ:=2 +export WAIT_BEFORE_CPUS_INIT:=0 +export CONFIG_COMPRESS:=1 +export CONFIG_UNCOMPRESSED:=0 +export CONFIG_LB_MEM_TOPK:=2048 +export HAVE_OPTION_TABLE:=1 +export USE_OPTION_TABLE:=0 +export LB_CKS_RANGE_START:=49 +export LB_CKS_RANGE_END:=122 +export LB_CKS_LOC:=123 +export CRT0:=$(TOP)/src/arch/$(ARCH)/init/crt0.S.lb +export DEBUG:=1 +export CONFIG_CONSOLE_VGA:=1 +export CONFIG_CONSOLE_VGA_MULTI:=0 +export CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST:=0 +export CONFIG_CONSOLE_BTEXT:=0 +export CONFIG_CONSOLE_LOGBUF:=0 +export CONFIG_CONSOLE_SROM:=0 +export CONFIG_CONSOLE_SERIAL8250:=1 +export CONFIG_USBDEBUG_DIRECT:=0 +export DEFAULT_CONSOLE_LOGLEVEL:=8 +export MAXIMUM_CONSOLE_LOGLEVEL:=8 +export CONFIG_SERIAL_POST:=0 +export TTYS0_BASE:=0x3f8 +export TTYS0_BAUD:=115200 +export TTYS0_LCS:=0x3 +export CONFIG_USE_PRINTK_IN_CAR:=1 +export MAINBOARD:=/home/chris/coreboot-v2/src/mainboard/dfi/nf570 +export MAINBOARD_PART_NUMBER:="nf570" +export MAINBOARD_VENDOR:="DFI" +export MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID:=4130 +export MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID:=0x2b80 +export CONFIG_MAX_PCI_BUSES:=255 +export CONFIG_SMP:=1 +export CONFIG_MAX_CPUS:=2 +export CONFIG_MAX_PHYSICAL_CPUS:=1 +export CONFIG_LOGICAL_CPUS:=1 +export CONFIG_AP_IN_SIPI_WAIT:=0 +export SERIAL_CPU_INIT:=1 +export APIC_ID_OFFSET:=16 +export ENABLE_APIC_EXT_ID:=0 +export LIFT_BSP_APIC_ID:=1 +export CONFIG_IDE_PAYLOAD:=0 +export CONFIG_ROM_PAYLOAD:=1 +export CONFIG_ROM_PAYLOAD_START:=0xfffff000 +export CONFIG_COMPRESSED_PAYLOAD_NRV2B:=0 +export CONFIG_COMPRESSED_PAYLOAD_LZMA:=0 +export CONFIG_PRECOMPRESSED_PAYLOAD:=0 +export CONFIG_SERIAL_PAYLOAD:=0 +export CONFIG_FS_PAYLOAD:=0 +export CONFIG_FS_EXT2:=0 +export CONFIG_FS_ISO9660:=0 +export CONFIG_FS_FAT:=0 +export AUTOBOOT_DELAY:=2 +export AUTOBOOT_CMDLINE:="hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200" +export USE_WATCHDOG_ON_BOOT:=0 +export CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT:=1 +export CONFIG_AGP_PLUGIN_SUPPORT:=1 +export CONFIG_CARDBUS_PLUGIN_SUPPORT:=1 +export CONFIG_PCIX_PLUGIN_SUPPORT:=1 +export CONFIG_PCIEXP_PLUGIN_SUPPORT:=1 +export CONFIG_IDE:=0 +export IDE_BOOT_DRIVE:=0 +export IDE_OFFSET:=0 +export PCI_IO_CFG_EXT:=0 +export CONFIG_CHIP_NAME:=1 +export HAVE_INIT_TIMER:=1 +export MAX_REBOOT_CNT:=3 +export FAKE_SPDROM:=0 +export HAVE_ACPI_TABLES:=0 +export ACPI_SSDTX_NUM:=0 +export HT_CHAIN_UNITID_BASE:=0 +export HT_CHAIN_END_UNITID_BASE:=32 +export SB_HT_CHAIN_UNITID_OFFSET_ONLY:=0 +export SB_HT_CHAIN_ON_BUS0:=2 +export PCI_BUS_SEGN_BITS:=0 +export MMCONF_SUPPORT:=0 +export MMCONF_SUPPORT_DEFAULT:=0 +export HW_MEM_HOLE_SIZEK:=1048576 +export HW_MEM_HOLE_SIZE_AUTO_INC:=0 +export CONFIG_VAR_MTRR_HOLE:=1 +export K8_HT_FREQ_1G_SUPPORT:=1 +export K8_REV_F_SUPPORT:=1 +export CBB:=0 +export CDB:=24 +export HT3_SUPPORT:=0 +export EXT_RT_TBL_SUPPORT:=0 +export EXT_CONF_SUPPORT:=0 +export DIMM_SUPPORT:=0x4 +export CPU_SOCKET_TYPE:=17 +export CPU_ADDR_BITS:=40 +export CONFIG_VGA_ROM_RUN:=0 +export CONFIG_PCI_ROM_RUN:=1 +export CONFIG_PCI_64BIT_PREF_MEM:=0 +export CONFIG_AMDMCT:=0 +export K8_MEM_BANK_B_ONLY:=0 +export CONFIG_PCIE_CONFIGSPACE_HOLE:=0 +export HAVE_MP_TABLE:=1 +export HAVE_PIRQ_TABLE:=1 +export USE_FALLBACK_IMAGE:=0 +export USE_FAILOVER_IMAGE:=1 +export HAVE_HARD_RESET:=1 +export IRQ_SLOT_COUNT:=11 +export CONFIG_IOAPIC:=1 +export FALLBACK_SIZE:=0x3f000 +export FAILOVER_SIZE:=0x1000 +export ROM_SIZE:=0x80000 +export ROM_SECTION_SIZE:=0x1000 +export ROM_SECTION_OFFSET:=0x7f000 +export XIP_ROM_SIZE:=0x1000 +export XIP_ROM_BASE:=0xfffff000 +export COREBOOT_EXTRA_VERSION:="$(shell cat ../../VERSION)_Failover" +export MAINBOARD_POWER_ON_AFTER_POWER_FAIL:=MAINBOARD_POWER_ON +export CONFIG_GDB_STUB:=0 +export HAVE_FANCTL:=1 +export CONFIG_UDELAY_IO:=0 +export CONFIG_UDELAY_TSC:=0 +export CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2:=0 +export AGP_APERTURE_SIZE:=0x4000000 + +export VARIABLES := +export VARIABLES += ARCH +export VARIABLES += HAVE_MOVNTI +export VARIABLES += CROSS_COMPILE +export VARIABLES += CC +export VARIABLES += HOSTCC +export VARIABLES += OBJCOPY +export VARIABLES += COREBOOT_VERSION +export VARIABLES += COREBOOT_BUILD +export VARIABLES += COREBOOT_COMPILE_TIME +export VARIABLES += COREBOOT_COMPILE_BY +export VARIABLES += COREBOOT_COMPILE_HOST +export VARIABLES += COREBOOT_COMPILE_DOMAIN +export VARIABLES += COREBOOT_COMPILER +export VARIABLES += COREBOOT_LINKER +export VARIABLES += COREBOOT_ASSEMBLER +export VARIABLES += CONFIG_USE_INIT +export VARIABLES += HAVE_FALLBACK_BOOT +export VARIABLES += HAVE_FAILOVER_BOOT +export VARIABLES += ROM_IMAGE_SIZE +export VARIABLES += PAYLOAD_SIZE +export VARIABLES += _ROMBASE +export VARIABLES += _RESET +export VARIABLES += _EXCEPTION_VECTORS +export VARIABLES += STACK_SIZE +export VARIABLES += HEAP_SIZE +export VARIABLES += _RAMBASE +export VARIABLES += USE_DCACHE_RAM +export VARIABLES += CAR_FAM10 +export VARIABLES += DCACHE_RAM_BASE +export VARIABLES += DCACHE_RAM_SIZE +export VARIABLES += DCACHE_RAM_GLOBAL_VAR_SIZE +export VARIABLES += CONFIG_AP_CODE_IN_CAR +export VARIABLES += MEM_TRAIN_SEQ +export VARIABLES += WAIT_BEFORE_CPUS_INIT +export VARIABLES += CONFIG_COMPRESS +export VARIABLES += CONFIG_UNCOMPRESSED +export VARIABLES += CONFIG_LB_MEM_TOPK +export VARIABLES += HAVE_OPTION_TABLE +export VARIABLES += USE_OPTION_TABLE +export VARIABLES += LB_CKS_RANGE_START +export VARIABLES += LB_CKS_RANGE_END +export VARIABLES += LB_CKS_LOC +export VARIABLES += CRT0 +export VARIABLES += DEBUG +export VARIABLES += CONFIG_CONSOLE_VGA +export VARIABLES += CONFIG_CONSOLE_VGA_MULTI +export VARIABLES += CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST +export VARIABLES += CONFIG_CONSOLE_BTEXT +export VARIABLES += CONFIG_CONSOLE_LOGBUF +export VARIABLES += CONFIG_CONSOLE_SROM +export VARIABLES += CONFIG_CONSOLE_SERIAL8250 +export VARIABLES += CONFIG_USBDEBUG_DIRECT +export VARIABLES += DEFAULT_CONSOLE_LOGLEVEL +export VARIABLES += MAXIMUM_CONSOLE_LOGLEVEL +export VARIABLES += CONFIG_SERIAL_POST +export VARIABLES += TTYS0_BASE +export VARIABLES += TTYS0_BAUD +export VARIABLES += TTYS0_LCS +export VARIABLES += CONFIG_USE_PRINTK_IN_CAR +export VARIABLES += MAINBOARD +export VARIABLES += MAINBOARD_PART_NUMBER +export VARIABLES += MAINBOARD_VENDOR +export VARIABLES += MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +export VARIABLES += MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +export VARIABLES += CONFIG_MAX_PCI_BUSES +export VARIABLES += CONFIG_SMP +export VARIABLES += CONFIG_MAX_CPUS +export VARIABLES += CONFIG_MAX_PHYSICAL_CPUS +export VARIABLES += CONFIG_LOGICAL_CPUS +export VARIABLES += CONFIG_AP_IN_SIPI_WAIT +export VARIABLES += SERIAL_CPU_INIT +export VARIABLES += APIC_ID_OFFSET +export VARIABLES += ENABLE_APIC_EXT_ID +export VARIABLES += LIFT_BSP_APIC_ID +export VARIABLES += CONFIG_IDE_PAYLOAD +export VARIABLES += CONFIG_ROM_PAYLOAD +export VARIABLES += CONFIG_ROM_PAYLOAD_START +export VARIABLES += CONFIG_COMPRESSED_PAYLOAD_NRV2B +export VARIABLES += CONFIG_COMPRESSED_PAYLOAD_LZMA +export VARIABLES += CONFIG_PRECOMPRESSED_PAYLOAD +export VARIABLES += CONFIG_SERIAL_PAYLOAD +export VARIABLES += CONFIG_FS_PAYLOAD +export VARIABLES += CONFIG_FS_EXT2 +export VARIABLES += CONFIG_FS_ISO9660 +export VARIABLES += CONFIG_FS_FAT +export VARIABLES += AUTOBOOT_DELAY +export VARIABLES += AUTOBOOT_CMDLINE +export VARIABLES += USE_WATCHDOG_ON_BOOT +export VARIABLES += CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT +export VARIABLES += CONFIG_AGP_PLUGIN_SUPPORT +export VARIABLES += CONFIG_CARDBUS_PLUGIN_SUPPORT +export VARIABLES += CONFIG_PCIX_PLUGIN_SUPPORT +export VARIABLES += CONFIG_PCIEXP_PLUGIN_SUPPORT +export VARIABLES += CONFIG_IDE +export VARIABLES += IDE_BOOT_DRIVE +export VARIABLES += IDE_OFFSET +export VARIABLES += PCI_IO_CFG_EXT +export VARIABLES += CONFIG_CHIP_NAME +export VARIABLES += HAVE_INIT_TIMER +export VARIABLES += MAX_REBOOT_CNT +export VARIABLES += FAKE_SPDROM +export VARIABLES += HAVE_ACPI_TABLES +export VARIABLES += ACPI_SSDTX_NUM +export VARIABLES += HT_CHAIN_UNITID_BASE +export VARIABLES += HT_CHAIN_END_UNITID_BASE +export VARIABLES += SB_HT_CHAIN_UNITID_OFFSET_ONLY +export VARIABLES += SB_HT_CHAIN_ON_BUS0 +export VARIABLES += PCI_BUS_SEGN_BITS +export VARIABLES += MMCONF_SUPPORT +export VARIABLES += MMCONF_SUPPORT_DEFAULT +export VARIABLES += HW_MEM_HOLE_SIZEK +export VARIABLES += HW_MEM_HOLE_SIZE_AUTO_INC +export VARIABLES += CONFIG_VAR_MTRR_HOLE +export VARIABLES += K8_HT_FREQ_1G_SUPPORT +export VARIABLES += K8_REV_F_SUPPORT +export VARIABLES += CBB +export VARIABLES += CDB +export VARIABLES += HT3_SUPPORT +export VARIABLES += EXT_RT_TBL_SUPPORT +export VARIABLES += EXT_CONF_SUPPORT +export VARIABLES += DIMM_SUPPORT +export VARIABLES += CPU_SOCKET_TYPE +export VARIABLES += CPU_ADDR_BITS +export VARIABLES += CONFIG_VGA_ROM_RUN +export VARIABLES += CONFIG_PCI_ROM_RUN +export VARIABLES += CONFIG_PCI_64BIT_PREF_MEM +export VARIABLES += CONFIG_AMDMCT +export VARIABLES += K8_MEM_BANK_B_ONLY +export VARIABLES += CONFIG_PCIE_CONFIGSPACE_HOLE +export VARIABLES += HAVE_MP_TABLE +export VARIABLES += HAVE_PIRQ_TABLE +export VARIABLES += USE_FALLBACK_IMAGE +export VARIABLES += USE_FAILOVER_IMAGE +export VARIABLES += HAVE_HARD_RESET +export VARIABLES += IRQ_SLOT_COUNT +export VARIABLES += CONFIG_IOAPIC +export VARIABLES += FALLBACK_SIZE +export VARIABLES += FAILOVER_SIZE +export VARIABLES += ROM_SIZE +export VARIABLES += ROM_SECTION_SIZE +export VARIABLES += ROM_SECTION_OFFSET +export VARIABLES += XIP_ROM_SIZE +export VARIABLES += XIP_ROM_BASE +export VARIABLES += COREBOOT_EXTRA_VERSION +export VARIABLES += MAINBOARD_POWER_ON_AFTER_POWER_FAIL +export VARIABLES += CONFIG_GDB_STUB +export VARIABLES += HAVE_FANCTL +export VARIABLES += CONFIG_UDELAY_IO +export VARIABLES += CONFIG_UDELAY_TSC +export VARIABLES += CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +export VARIABLES += AGP_APERTURE_SIZE + + + +Makefile.settings: /home/chris/coreboot-v2/targets/dfi/nf570/nf570/config.py /home/chris/coreboot-v2/targets/dfi/nf570/Config.lb + (cd /home/chris/coreboot-v2/targets ; export PYTHONPATH=/home/chris/coreboot-v2/util/newconfig ; python dfi/nf570/nf570/config.py dfi/nf570/Config.lb /home/chris/coreboot-v2) + +DISTRO_CFLAGS+=-fno-stack-protector +DISTRO_LFLAGS+= -Wl,--build-id=none Index: targets/dfi/nf570/nf570/failover/coreboot =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/failover/coreboot ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/failover/coreboot.strip =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/failover/coreboot.strip ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/failover/Makefile =================================================================== --- targets/dfi/nf570/nf570/failover/Makefile (revision 0) +++ targets/dfi/nf570/nf570/failover/Makefile (revision 0) @@ -0,0 +1,731 @@ +# File: dfi/nf570/nf570/failover/Makefile is autogenerated + +all: coreboot.rom + +.PHONY: all + +# Get the value of TOP, VARIABLES, and several other variables. +include Makefile.settings + +# Function to create an item like -Di586 or -DCONFIG_MAX_CPUS='1' or -Ui686 +D_item = $(if $(subst undefined,,$(origin $1)),-D$1$(if $($1),='$($1)',),-U$1) + +# Compute the value of CPUFLAGS here during make's first pass. +CPUFLAGS := $(foreach _var_,$(VARIABLES),$(call D_item,$(_var_))) + + CPP:= $(CC) -x assembler-with-cpp -DASSEMBLY -E + LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name) + GCC_INC_DIR := $(shell LC_ALL=C $(CC) -print-search-dirs | sed -ne "s/install: (.*)/\1include/gp") + CPPFLAGS := -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS) + CFLAGS := $(CPU_OPT) $(DISTRO_CFLAGS) $(CPPFLAGS) -Os -nostdinc -nostdlib -fno-builtin -Wall + HOSTCFLAGS:= -Os -Wall + COREBOOT_RAM-$(CONFIG_COMPRESS):=coreboot_ram.nrv2b + COREBOOT_RAM-$(CONFIG_UNCOMPRESSED):=coreboot_ram.bin + COREBOOT_APC:= + COREBOOT_RAM_ROM:=coreboot_ram.rom + .PHONY : crt0.s + .PHONY : version.o + PAYLOAD-1:=payload + PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_NRV2B):=payload.nrv2b + PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_LZMA):=payload.lzma + COREBOOT_APC:= + COREBOOT_RAM_ROM:= + + +# object dependencies (objectrules:) +INIT-OBJECTS := +OBJECTS := +DRIVER := + +SOURCES := +OBJECTS += malloc.o +SOURCES += /home/chris/coreboot-v2/src/lib/malloc.c +OBJECTS += cache.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/cache/cache.c +OBJECTS += pci_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_ops.c +OBJECTS += amd_mtrr.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/mtrr/amd_mtrr.c +OBJECTS += lapic.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/lapic.c +OBJECTS += smbus_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/smbus_ops.c +OBJECTS += memset.o +SOURCES += /home/chris/coreboot-v2/src/lib/memset.c +OBJECTS += pci_ops_auto.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_auto.c +OBJECTS += superio.o +SOURCES += /home/chris/coreboot-v2/src/superio/ite/it8716f/superio.c +OBJECTS += lapic_cpu_init.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c +OBJECTS += fallback_boot.o +SOURCES += /home/chris/coreboot-v2/src/lib/fallback_boot.c +OBJECTS += model_fxx_update_microcode.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_update_microcode.c +OBJECTS += mptable.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/mptable.c +OBJECTS += pciexp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pciexp_device.c +OBJECTS += tables.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/tables.c +OBJECTS += keyboard.o +SOURCES += /home/chris/coreboot-v2/src/pc80/keyboard.c +OBJECTS += microcode.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/microcode/microcode.c +OBJECTS += pnp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pnp_device.c +OBJECTS += printk.o +SOURCES += /home/chris/coreboot-v2/src/console/printk.c +OBJECTS += irq_tables.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/irq_tables.c +OBJECTS += pcix_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pcix_device.c +OBJECTS += get_bus_conf.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/get_bus_conf.c +OBJECTS += decode.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/decode.c +OBJECTS += pci_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_device.c +OBJECTS += console.o +SOURCES += /home/chris/coreboot-v2/src/console/console.c +OBJECTS += amd_sibling.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/dualcore/amd_sibling.c +OBJECTS += northbridge.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c +OBJECTS += elfboot.o +SOURCES += /home/chris/coreboot-v2/src/boot/elfboot.c +OBJECTS += hardwaremain.o +SOURCES += /home/chris/coreboot-v2/src/boot/hardwaremain.c +OBJECTS += boot.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/boot.c +OBJECTS += i8259.o +SOURCES += /home/chris/coreboot-v2/src/pc80/i8259.c +OBJECTS += delay.o +SOURCES += /home/chris/coreboot-v2/src/lib/delay.c +OBJECTS += get_sblk_pci1234.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/get_sblk_pci1234.c +OBJECTS += version.o +SOURCES += /home/chris/coreboot-v2/src/lib/version.c +OBJECTS += pci_ops_mmconf.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_mmconf.c +OBJECTS += memcmp.o +SOURCES += /home/chris/coreboot-v2/src/lib/memcmp.c +OBJECTS += secondary.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S +OBJECTS += isa-dma.o +SOURCES += /home/chris/coreboot-v2/src/pc80/isa-dma.c +OBJECTS += mcp55_reset.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_reset.c +OBJECTS += pcibios.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/pcbios/pcibios.c +OBJECTS += hypertransport.o +SOURCES += /home/chris/coreboot-v2/src/devices/hypertransport.c +OBJECTS += vtxprintf.o +SOURCES += /home/chris/coreboot-v2/src/console/vtxprintf.c +OBJECTS += ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/ops.c +OBJECTS += prim_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/prim_ops.c +OBJECTS += root_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/root_device.c +OBJECTS += cardbus_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/cardbus_device.c +OBJECTS += uart8250.o +SOURCES += /home/chris/coreboot-v2/src/lib/uart8250.c +OBJECTS += sys.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/sys.c +OBJECTS += fanctl.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/fanctl.c +OBJECTS += device_util.o +SOURCES += /home/chris/coreboot-v2/src/devices/device_util.c +OBJECTS += socket_AM2.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/socket_AM2/socket_AM2.c +OBJECTS += ./option_table.o +SOURCES += ./option_table.c +OBJECTS += compute_ip_checksum.o +SOURCES += /home/chris/coreboot-v2/src/lib/compute_ip_checksum.c +OBJECTS += device.o +SOURCES += /home/chris/coreboot-v2/src/devices/device.c +OBJECTS += mtrr.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/mtrr/mtrr.c +OBJECTS += processor_name.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/processor_name.c +OBJECTS += exception.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/exception.c +OBJECTS += memcpy.o +SOURCES += /home/chris/coreboot-v2/src/lib/memcpy.c +OBJECTS += agp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/agp_device.c +OBJECTS += clog2.o +SOURCES += /home/chris/coreboot-v2/src/lib/clog2.c +OBJECTS += pirq_routing.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/pirq_routing.c +OBJECTS += apic_timer.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/apic_timer.c +OBJECTS += memmove.o +SOURCES += /home/chris/coreboot-v2/src/lib/memmove.c +OBJECTS += pci_rom.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_rom.c +OBJECTS += pgtbl.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/pae/pgtbl.c +OBJECTS += pci_ops_conf2.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_conf2.c +OBJECTS += pci_ops_conf1.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_conf1.c +OBJECTS += mc146818rtc.o +SOURCES += /home/chris/coreboot-v2/src/pc80/mc146818rtc.c +OBJECTS += fpu.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/fpu.c +OBJECTS += coreboot_table.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/coreboot_table.c +OBJECTS += rom_stream.o +SOURCES += /home/chris/coreboot-v2/src/stream/rom_stream.c +OBJECTS += debug.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/debug.c +OBJECTS += c_start.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/c_start.S +OBJECTS += ops2.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/ops2.c +OBJECTS += biosemu.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/biosemu.c +OBJECTS += vsprintf.o +SOURCES += /home/chris/coreboot-v2/src/console/vsprintf.c +OBJECTS += cpu.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/cpu.c +OBJECTS += mpspec.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/smp/mpspec.c +OBJECTS += static.o +SOURCES += static.c +DRIVER += mcp55_aza.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_aza.c +DRIVER += mcp55_ht.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_ht.c +DRIVER += mcp55_pci.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_pci.c +DRIVER += uart8250_console.o +SOURCES += /home/chris/coreboot-v2/src/console/uart8250_console.c +DRIVER += mcp55_ide.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_ide.c +DRIVER += vga_console.o +SOURCES += /home/chris/coreboot-v2/src/console/vga_console.c +DRIVER += mainboard.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/mainboard.c +DRIVER += mcp55_lpc.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_lpc.c +DRIVER += mcp55_nic.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_nic.c +DRIVER += mcp55_pcie.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_pcie.c +DRIVER += mcp55_usb2.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_usb2.c +DRIVER += mcp55_sata.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_sata.c +DRIVER += mcp55.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55.c +DRIVER += mcp55_usb.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_usb.c +DRIVER += misc_control.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/misc_control.c +DRIVER += model_fxx_init.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_init.c +DRIVER += mcp55_smbus.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_smbus.c + +# ldscript.ld dependencies: +LDSUBSCRIPTS-1 := +LDSUBSCRIPTS-1 += $(TOP)/src/arch/i386/init/ldscript_failover.lb +LDSUBSCRIPTS-1 += $(TOP)/src//cpu/x86/16bit/entry16.lds +LDSUBSCRIPTS-1 += $(TOP)/src//cpu/x86/16bit/reset16.lds +LDSUBSCRIPTS-1 += $(TOP)/src//southbridge/nvidia/mcp55/id.lds +LDSUBSCRIPTS-1 += $(TOP)/src//southbridge/nvidia/mcp55/romstrap.lds +LDSUBSCRIPTS-1 += $(TOP)/src//arch/i386/lib/failover_failover.lds + +# Dependencies for crt0_includes.h +CRT0_INCLUDES:= +CRT0_INCLUDES += $(TOP)/src/cpu/x86/16bit/entry16.inc +CRT0_INCLUDES += $(TOP)/src/cpu/x86/32bit/entry32.inc +CRT0_INCLUDES += $(TOP)/src/cpu/x86/16bit/reset16.inc +CRT0_INCLUDES += $(TOP)/src/southbridge/nvidia/mcp55/id.inc +CRT0_INCLUDES += $(TOP)/src/southbridge/nvidia/mcp55/romstrap.inc +CRT0_INCLUDES += $(TOP)/src/cpu/amd/car/cache_as_ram.inc +CRT0_INCLUDES += ./cache_as_ram_auto.inc + +# userdefines: + +# mainrulelist: +# From makerule or docipl commands: + +# initobjectrules: + +# objectrules: +malloc.o: $(TOP)/src/lib/malloc.c + $(CC) -c $(CFLAGS) -o $@ $< +cache.o: $(TOP)/src/cpu/x86/cache/cache.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops.o: $(TOP)/src/devices/pci_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +amd_mtrr.o: $(TOP)/src/cpu/amd/mtrr/amd_mtrr.c + $(CC) -c $(CFLAGS) -o $@ $< +lapic.o: $(TOP)/src/cpu/x86/lapic/lapic.c + $(CC) -c $(CFLAGS) -o $@ $< +smbus_ops.o: $(TOP)/src/devices/smbus_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +memset.o: $(TOP)/src/lib/memset.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_auto.o: $(TOP)/src/arch/i386/lib/pci_ops_auto.c + $(CC) -c $(CFLAGS) -o $@ $< +superio.o: $(TOP)/src/superio/ite/it8716f/superio.c + $(CC) -c $(CFLAGS) -o $@ $< +lapic_cpu_init.o: $(TOP)/src/cpu/x86/lapic/lapic_cpu_init.c + $(CC) -c $(CFLAGS) -o $@ $< +fallback_boot.o: $(TOP)/src/lib/fallback_boot.c + $(CC) -c $(CFLAGS) -o $@ $< +model_fxx_update_microcode.o: $(TOP)/src/cpu/amd/model_fxx/model_fxx_update_microcode.c + $(CC) -c $(CFLAGS) -o $@ $< +mptable.o: $(TOP)/src/mainboard/dfi/nf570/mptable.c + $(CC) -c $(CFLAGS) -o $@ $< +pciexp_device.o: $(TOP)/src/devices/pciexp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +tables.o: $(TOP)/src/arch/i386/boot/tables.c + $(CC) -c $(CFLAGS) -o $@ $< +keyboard.o: $(TOP)/src/pc80/keyboard.c + $(CC) -c $(CFLAGS) -o $@ $< +microcode.o: $(TOP)/src/cpu/amd/microcode/microcode.c + $(CC) -c $(CFLAGS) -o $@ $< +pnp_device.o: $(TOP)/src/devices/pnp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +printk.o: $(TOP)/src/console/printk.c + $(CC) -c $(CFLAGS) -o $@ $< +irq_tables.o: $(TOP)/src/mainboard/dfi/nf570/irq_tables.c + $(CC) -c $(CFLAGS) -o $@ $< +pcix_device.o: $(TOP)/src/devices/pcix_device.c + $(CC) -c $(CFLAGS) -o $@ $< +get_bus_conf.o: $(TOP)/src/mainboard/dfi/nf570/get_bus_conf.c + $(CC) -c $(CFLAGS) -o $@ $< +decode.o: $(TOP)/src/devices/emulator/x86emu/decode.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_device.o: $(TOP)/src/devices/pci_device.c + $(CC) -c $(CFLAGS) -o $@ $< +console.o: $(TOP)/src/console/console.c + $(CC) -c $(CFLAGS) -o $@ $< +amd_sibling.o: $(TOP)/src/cpu/amd/dualcore/amd_sibling.c + $(CC) -c $(CFLAGS) -o $@ $< +northbridge.o: $(TOP)/src/northbridge/amd/amdk8/northbridge.c + $(CC) -c $(CFLAGS) -o $@ $< +elfboot.o: $(TOP)/src/boot/elfboot.c + $(CC) -c $(CFLAGS) -o $@ $< +hardwaremain.o: $(TOP)/src/boot/hardwaremain.c + $(CC) -c $(CFLAGS) -o $@ $< +boot.o: $(TOP)/src/arch/i386/boot/boot.c + $(CC) -c $(CFLAGS) -o $@ $< +i8259.o: $(TOP)/src/pc80/i8259.c + $(CC) -c $(CFLAGS) -o $@ $< +delay.o: $(TOP)/src/lib/delay.c + $(CC) -c $(CFLAGS) -o $@ $< +get_sblk_pci1234.o: $(TOP)/src/northbridge/amd/amdk8/get_sblk_pci1234.c + $(CC) -c $(CFLAGS) -o $@ $< +version.o: $(TOP)/src/lib/version.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_mmconf.o: $(TOP)/src/arch/i386/lib/pci_ops_mmconf.c + $(CC) -c $(CFLAGS) -o $@ $< +memcmp.o: $(TOP)/src/lib/memcmp.c + $(CC) -c $(CFLAGS) -o $@ $< +secondary.o: secondary.s + $(CC) -c $(CPU_OPT) -o $@ $< +secondary.s: $(TOP)/src/cpu/x86/lapic/secondary.S + $(CPP) $(CPPFLAGS) $< >$@.new && mv $@.new $@ +isa-dma.o: $(TOP)/src/pc80/isa-dma.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_reset.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_reset.c + $(CC) -c $(CFLAGS) -o $@ $< +pcibios.o: $(TOP)/src/devices/emulator/pcbios/pcibios.c + $(CC) -c $(CFLAGS) -o $@ $< +hypertransport.o: $(TOP)/src/devices/hypertransport.c + $(CC) -c $(CFLAGS) -o $@ $< +vtxprintf.o: $(TOP)/src/console/vtxprintf.c + $(CC) -c $(CFLAGS) -o $@ $< +ops.o: $(TOP)/src/devices/emulator/x86emu/ops.c + $(CC) -c $(CFLAGS) -o $@ $< +prim_ops.o: $(TOP)/src/devices/emulator/x86emu/prim_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +root_device.o: $(TOP)/src/devices/root_device.c + $(CC) -c $(CFLAGS) -o $@ $< +cardbus_device.o: $(TOP)/src/devices/cardbus_device.c + $(CC) -c $(CFLAGS) -o $@ $< +uart8250.o: $(TOP)/src/lib/uart8250.c + $(CC) -c $(CFLAGS) -o $@ $< +sys.o: $(TOP)/src/devices/emulator/x86emu/sys.c + $(CC) -c $(CFLAGS) -o $@ $< +fanctl.o: $(TOP)/src/mainboard/dfi/nf570/fanctl.c + $(CC) -c $(CFLAGS) -o $@ $< +device_util.o: $(TOP)/src/devices/device_util.c + $(CC) -c $(CFLAGS) -o $@ $< +socket_AM2.o: $(TOP)/src/cpu/amd/socket_AM2/socket_AM2.c + $(CC) -c $(CFLAGS) -o $@ $< +./option_table.o: ./option_table.c + $(CC) -c $(CFLAGS) -o $@ $< +compute_ip_checksum.o: $(TOP)/src/lib/compute_ip_checksum.c + $(CC) -c $(CFLAGS) -o $@ $< +device.o: $(TOP)/src/devices/device.c + $(CC) -c $(CFLAGS) -o $@ $< +mtrr.o: $(TOP)/src/cpu/x86/mtrr/mtrr.c + $(CC) -c $(CFLAGS) -o $@ $< +processor_name.o: $(TOP)/src/cpu/amd/model_fxx/processor_name.c + $(CC) -c $(CFLAGS) -o $@ $< +exception.o: $(TOP)/src/arch/i386/lib/exception.c + $(CC) -c $(CFLAGS) -o $@ $< +memcpy.o: $(TOP)/src/lib/memcpy.c + $(CC) -c $(CFLAGS) -o $@ $< +agp_device.o: $(TOP)/src/devices/agp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +clog2.o: $(TOP)/src/lib/clog2.c + $(CC) -c $(CFLAGS) -o $@ $< +pirq_routing.o: $(TOP)/src/arch/i386/boot/pirq_routing.c + $(CC) -c $(CFLAGS) -o $@ $< +apic_timer.o: $(TOP)/src/cpu/amd/model_fxx/apic_timer.c + $(CC) -c $(CFLAGS) -o $@ $< +memmove.o: $(TOP)/src/lib/memmove.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_rom.o: $(TOP)/src/devices/pci_rom.c + $(CC) -c $(CFLAGS) -o $@ $< +pgtbl.o: $(TOP)/src/cpu/x86/pae/pgtbl.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_conf2.o: $(TOP)/src/arch/i386/lib/pci_ops_conf2.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_conf1.o: $(TOP)/src/arch/i386/lib/pci_ops_conf1.c + $(CC) -c $(CFLAGS) -o $@ $< +mc146818rtc.o: $(TOP)/src/pc80/mc146818rtc.c + $(CC) -c $(CFLAGS) -o $@ $< +fpu.o: $(TOP)/src/devices/emulator/x86emu/fpu.c + $(CC) -c $(CFLAGS) -o $@ $< +coreboot_table.o: $(TOP)/src/arch/i386/boot/coreboot_table.c + $(CC) -c $(CFLAGS) -o $@ $< +rom_stream.o: $(TOP)/src/stream/rom_stream.c + $(CC) -c $(CFLAGS) -o $@ $< +debug.o: $(TOP)/src/devices/emulator/x86emu/debug.c + $(CC) -c $(CFLAGS) -o $@ $< +c_start.o: c_start.s + $(CC) -c $(CPU_OPT) -o $@ $< +c_start.s: $(TOP)/src/arch/i386/lib/c_start.S + $(CPP) $(CPPFLAGS) $< >$@.new && mv $@.new $@ +ops2.o: $(TOP)/src/devices/emulator/x86emu/ops2.c + $(CC) -c $(CFLAGS) -o $@ $< +biosemu.o: $(TOP)/src/devices/emulator/biosemu.c + $(CC) -c $(CFLAGS) -o $@ $< +vsprintf.o: $(TOP)/src/console/vsprintf.c + $(CC) -c $(CFLAGS) -o $@ $< +cpu.o: $(TOP)/src/arch/i386/lib/cpu.c + $(CC) -c $(CFLAGS) -o $@ $< +mpspec.o: $(TOP)/src/arch/i386/smp/mpspec.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_aza.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_aza.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_ht.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_ht.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_pci.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_pci.c + $(CC) -c $(CFLAGS) -o $@ $< +uart8250_console.o: $(TOP)/src/console/uart8250_console.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_ide.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_ide.c + $(CC) -c $(CFLAGS) -o $@ $< +vga_console.o: $(TOP)/src/console/vga_console.c + $(CC) -c $(CFLAGS) -o $@ $< +mainboard.o: $(TOP)/src/mainboard/dfi/nf570/mainboard.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_lpc.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_lpc.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_nic.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_nic.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_pcie.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_pcie.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_usb2.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_usb2.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_sata.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_sata.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_usb.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_usb.c + $(CC) -c $(CFLAGS) -o $@ $< +misc_control.o: $(TOP)/src/northbridge/amd/amdk8/misc_control.c + $(CC) -c $(CFLAGS) -o $@ $< +model_fxx_init.o: $(TOP)/src/cpu/amd/model_fxx/model_fxx_init.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_smbus.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_smbus.c + $(CC) -c $(CFLAGS) -o $@ $< +static.o: static.c + $(CC) -c $(CFLAGS) -o $@ $< + +# Remember the automatically generated files +GENERATED:= +GENERATED += Makefile +GENERATED += nsuperio.c +GENERATED += static.c +GENERATED += corebootDoc.config +GENERATED += crt0_includes.h + +echo: + @echo ACPI_SSDTX_NUM='$(ACPI_SSDTX_NUM)' + @echo AGP_APERTURE_SIZE='$(AGP_APERTURE_SIZE)' + @echo AMD_UCODE_PATCH_FILE='$(AMD_UCODE_PATCH_FILE)' + @echo APIC_ID_OFFSET='$(APIC_ID_OFFSET)' + @echo ARCH='$(ARCH)' + @echo AUTOBOOT_CMDLINE='$(AUTOBOOT_CMDLINE)' + @echo AUTOBOOT_DELAY='$(AUTOBOOT_DELAY)' + @echo CAR_FAM10='$(CAR_FAM10)' + @echo CBB='$(CBB)' + @echo CC='$(CC)' + @echo CDB='$(CDB)' + @echo CONFIG_AGP_PLUGIN_SUPPORT='$(CONFIG_AGP_PLUGIN_SUPPORT)' + @echo CONFIG_AMDMCT='$(CONFIG_AMDMCT)' + @echo CONFIG_AP_CODE_IN_CAR='$(CONFIG_AP_CODE_IN_CAR)' + @echo CONFIG_AP_IN_SIPI_WAIT='$(CONFIG_AP_IN_SIPI_WAIT)' + @echo CONFIG_BRIQ_7400='$(CONFIG_BRIQ_7400)' + @echo CONFIG_BRIQ_750FX='$(CONFIG_BRIQ_750FX)' + @echo CONFIG_CARDBUS_PLUGIN_SUPPORT='$(CONFIG_CARDBUS_PLUGIN_SUPPORT)' + @echo CONFIG_CHIP_CONFIGURE='$(CONFIG_CHIP_CONFIGURE)' + @echo CONFIG_CHIP_NAME='$(CONFIG_CHIP_NAME)' + @echo CONFIG_COMPRESS='$(CONFIG_COMPRESS)' + @echo CONFIG_COMPRESSED_PAYLOAD_LZMA='$(CONFIG_COMPRESSED_PAYLOAD_LZMA)' + @echo CONFIG_COMPRESSED_PAYLOAD_NRV2B='$(CONFIG_COMPRESSED_PAYLOAD_NRV2B)' + @echo CONFIG_CONSOLE_BTEXT='$(CONFIG_CONSOLE_BTEXT)' + @echo CONFIG_CONSOLE_LOGBUF='$(CONFIG_CONSOLE_LOGBUF)' + @echo CONFIG_CONSOLE_SERIAL8250='$(CONFIG_CONSOLE_SERIAL8250)' + @echo CONFIG_CONSOLE_SROM='$(CONFIG_CONSOLE_SROM)' + @echo CONFIG_CONSOLE_VGA='$(CONFIG_CONSOLE_VGA)' + @echo CONFIG_CONSOLE_VGA_MULTI='$(CONFIG_CONSOLE_VGA_MULTI)' + @echo CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST='$(CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST)' + @echo CONFIG_FS_EXT2='$(CONFIG_FS_EXT2)' + @echo CONFIG_FS_FAT='$(CONFIG_FS_FAT)' + @echo CONFIG_FS_ISO9660='$(CONFIG_FS_ISO9660)' + @echo CONFIG_FS_PAYLOAD='$(CONFIG_FS_PAYLOAD)' + @echo CONFIG_GDB_STUB='$(CONFIG_GDB_STUB)' + @echo CONFIG_GFXUMA='$(CONFIG_GFXUMA)' + @echo CONFIG_GX1_VIDEO='$(CONFIG_GX1_VIDEO)' + @echo CONFIG_GX1_VIDEOMODE='$(CONFIG_GX1_VIDEOMODE)' + @echo CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT='$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT)' + @echo CONFIG_IDE='$(CONFIG_IDE)' + @echo CONFIG_IDE_PAYLOAD='$(CONFIG_IDE_PAYLOAD)' + @echo CONFIG_IOAPIC='$(CONFIG_IOAPIC)' + @echo CONFIG_LB_MEM_TOPK='$(CONFIG_LB_MEM_TOPK)' + @echo CONFIG_LOGICAL_CPUS='$(CONFIG_LOGICAL_CPUS)' + @echo CONFIG_MAX_CPUS='$(CONFIG_MAX_CPUS)' + @echo CONFIG_MAX_PCI_BUSES='$(CONFIG_MAX_PCI_BUSES)' + @echo CONFIG_MAX_PHYSICAL_CPUS='$(CONFIG_MAX_PHYSICAL_CPUS)' + @echo CONFIG_PCIBIOS_IRQ='$(CONFIG_PCIBIOS_IRQ)' + @echo CONFIG_PCIEXP_PLUGIN_SUPPORT='$(CONFIG_PCIEXP_PLUGIN_SUPPORT)' + @echo CONFIG_PCIE_CONFIGSPACE_HOLE='$(CONFIG_PCIE_CONFIGSPACE_HOLE)' + @echo CONFIG_PCIX_PLUGIN_SUPPORT='$(CONFIG_PCIX_PLUGIN_SUPPORT)' + @echo CONFIG_PCI_64BIT_PREF_MEM='$(CONFIG_PCI_64BIT_PREF_MEM)' + @echo CONFIG_PCI_ROM_RUN='$(CONFIG_PCI_ROM_RUN)' + @echo CONFIG_PRECOMPRESSED_PAYLOAD='$(CONFIG_PRECOMPRESSED_PAYLOAD)' + @echo CONFIG_ROM_PAYLOAD='$(CONFIG_ROM_PAYLOAD)' + @echo CONFIG_ROM_PAYLOAD_START='$(CONFIG_ROM_PAYLOAD_START)' + @echo CONFIG_SANDPOINT_ALTIMUS='$(CONFIG_SANDPOINT_ALTIMUS)' + @echo CONFIG_SANDPOINT_GYRUS='$(CONFIG_SANDPOINT_GYRUS)' + @echo CONFIG_SANDPOINT_TALUS='$(CONFIG_SANDPOINT_TALUS)' + @echo CONFIG_SANDPOINT_UNITY='$(CONFIG_SANDPOINT_UNITY)' + @echo CONFIG_SANDPOINT_VALIS='$(CONFIG_SANDPOINT_VALIS)' + @echo CONFIG_SERIAL_PAYLOAD='$(CONFIG_SERIAL_PAYLOAD)' + @echo CONFIG_SERIAL_POST='$(CONFIG_SERIAL_POST)' + @echo CONFIG_SMP='$(CONFIG_SMP)' + @echo CONFIG_SPLASH_GRAPHIC='$(CONFIG_SPLASH_GRAPHIC)' + @echo CONFIG_SYS_CLK_FREQ='$(CONFIG_SYS_CLK_FREQ)' + @echo CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2='$(CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2)' + @echo CONFIG_UDELAY_IO='$(CONFIG_UDELAY_IO)' + @echo CONFIG_UDELAY_TSC='$(CONFIG_UDELAY_TSC)' + @echo CONFIG_UNCOMPRESSED='$(CONFIG_UNCOMPRESSED)' + @echo CONFIG_USBDEBUG_DIRECT='$(CONFIG_USBDEBUG_DIRECT)' + @echo CONFIG_USE_INIT='$(CONFIG_USE_INIT)' + @echo CONFIG_USE_PRINTK_IN_CAR='$(CONFIG_USE_PRINTK_IN_CAR)' + @echo CONFIG_VAR_MTRR_HOLE='$(CONFIG_VAR_MTRR_HOLE)' + @echo CONFIG_VGA_ROM_RUN='$(CONFIG_VGA_ROM_RUN)' + @echo CONFIG_VIDEO_MB='$(CONFIG_VIDEO_MB)' + @echo COREBOOT_ASSEMBLER='$(COREBOOT_ASSEMBLER)' + @echo COREBOOT_BUILD='$(COREBOOT_BUILD)' + @echo COREBOOT_COMPILER='$(COREBOOT_COMPILER)' + @echo COREBOOT_COMPILE_BY='$(COREBOOT_COMPILE_BY)' + @echo COREBOOT_COMPILE_DOMAIN='$(COREBOOT_COMPILE_DOMAIN)' + @echo COREBOOT_COMPILE_HOST='$(COREBOOT_COMPILE_HOST)' + @echo COREBOOT_COMPILE_TIME='$(COREBOOT_COMPILE_TIME)' + @echo COREBOOT_EXTRA_VERSION='$(COREBOOT_EXTRA_VERSION)' + @echo COREBOOT_LINKER='$(COREBOOT_LINKER)' + @echo COREBOOT_VERSION='$(COREBOOT_VERSION)' + @echo CPU_ADDR_BITS='$(CPU_ADDR_BITS)' + @echo CPU_OPT='$(CPU_OPT)' + @echo CPU_SOCKET_TYPE='$(CPU_SOCKET_TYPE)' + @echo CROSS_COMPILE='$(CROSS_COMPILE)' + @echo CRT0='$(CRT0)' + @echo DCACHE_RAM_BASE='$(DCACHE_RAM_BASE)' + @echo DCACHE_RAM_GLOBAL_VAR_SIZE='$(DCACHE_RAM_GLOBAL_VAR_SIZE)' + @echo DCACHE_RAM_SIZE='$(DCACHE_RAM_SIZE)' + @echo DEBUG='$(DEBUG)' + @echo DEFAULT_CONSOLE_LOGLEVEL='$(DEFAULT_CONSOLE_LOGLEVEL)' + @echo DIMM_SUPPORT='$(DIMM_SUPPORT)' + @echo EMBEDDED_RAM_SIZE='$(EMBEDDED_RAM_SIZE)' + @echo ENABLE_APIC_EXT_ID='$(ENABLE_APIC_EXT_ID)' + @echo EXT_CONF_SUPPORT='$(EXT_CONF_SUPPORT)' + @echo EXT_RT_TBL_SUPPORT='$(EXT_RT_TBL_SUPPORT)' + @echo FAILOVER_SIZE='$(FAILOVER_SIZE)' + @echo FAKE_SPDROM='$(FAKE_SPDROM)' + @echo FALLBACK_SIZE='$(FALLBACK_SIZE)' + @echo HAVE_ACPI_TABLES='$(HAVE_ACPI_TABLES)' + @echo HAVE_FAILOVER_BOOT='$(HAVE_FAILOVER_BOOT)' + @echo HAVE_FALLBACK_BOOT='$(HAVE_FALLBACK_BOOT)' + @echo HAVE_FANCTL='$(HAVE_FANCTL)' + @echo HAVE_HARD_RESET='$(HAVE_HARD_RESET)' + @echo HAVE_INIT_TIMER='$(HAVE_INIT_TIMER)' + @echo HAVE_MOVNTI='$(HAVE_MOVNTI)' + @echo HAVE_MP_TABLE='$(HAVE_MP_TABLE)' + @echo HAVE_OPTION_TABLE='$(HAVE_OPTION_TABLE)' + @echo HAVE_PIRQ_TABLE='$(HAVE_PIRQ_TABLE)' + @echo HAVE_SMI_HANDLER='$(HAVE_SMI_HANDLER)' + @echo HEAP_SIZE='$(HEAP_SIZE)' + @echo HOSTCC='$(HOSTCC)' + @echo HT3_SUPPORT='$(HT3_SUPPORT)' + @echo HT_CHAIN_END_UNITID_BASE='$(HT_CHAIN_END_UNITID_BASE)' + @echo HT_CHAIN_UNITID_BASE='$(HT_CHAIN_UNITID_BASE)' + @echo HW_MEM_HOLE_SIZEK='$(HW_MEM_HOLE_SIZEK)' + @echo HW_MEM_HOLE_SIZE_AUTO_INC='$(HW_MEM_HOLE_SIZE_AUTO_INC)' + @echo IDE_BOOT_DRIVE='$(IDE_BOOT_DRIVE)' + @echo IDE_OFFSET='$(IDE_OFFSET)' + @echo IDE_SWAB='$(IDE_SWAB)' + @echo INTEL_PPRO_MTRR='$(INTEL_PPRO_MTRR)' + @echo IRQ_SLOT_COUNT='$(IRQ_SLOT_COUNT)' + @echo ISA_IO_BASE='$(ISA_IO_BASE)' + @echo ISA_MEM_BASE='$(ISA_MEM_BASE)' + @echo K8_HT_FREQ_1G_SUPPORT='$(K8_HT_FREQ_1G_SUPPORT)' + @echo K8_MEM_BANK_B_ONLY='$(K8_MEM_BANK_B_ONLY)' + @echo K8_REV_F_SUPPORT='$(K8_REV_F_SUPPORT)' + @echo LB_CKS_LOC='$(LB_CKS_LOC)' + @echo LB_CKS_RANGE_END='$(LB_CKS_RANGE_END)' + @echo LB_CKS_RANGE_START='$(LB_CKS_RANGE_START)' + @echo LIFT_BSP_APIC_ID='$(LIFT_BSP_APIC_ID)' + @echo MAINBOARD='$(MAINBOARD)' + @echo MAINBOARD_PART_NUMBER='$(MAINBOARD_PART_NUMBER)' + @echo MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID='$(MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID)' + @echo MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID='$(MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID)' + @echo MAINBOARD_POWER_ON_AFTER_POWER_FAIL='$(MAINBOARD_POWER_ON_AFTER_POWER_FAIL)' + @echo MAINBOARD_VENDOR='$(MAINBOARD_VENDOR)' + @echo MAXIMUM_CONSOLE_LOGLEVEL='$(MAXIMUM_CONSOLE_LOGLEVEL)' + @echo MAX_REBOOT_CNT='$(MAX_REBOOT_CNT)' + @echo MEMORY_HOLE='$(MEMORY_HOLE)' + @echo MEM_TRAIN_SEQ='$(MEM_TRAIN_SEQ)' + @echo MMCONF_SUPPORT='$(MMCONF_SUPPORT)' + @echo MMCONF_SUPPORT_DEFAULT='$(MMCONF_SUPPORT_DEFAULT)' + @echo NO_POST='$(NO_POST)' + @echo OBJCOPY='$(OBJCOPY)' + @echo PAYLOAD_SIZE='$(PAYLOAD_SIZE)' + @echo PCIC0_CFGADDR='$(PCIC0_CFGADDR)' + @echo PCIC0_CFGDATA='$(PCIC0_CFGDATA)' + @echo PCI_BUS_SEGN_BITS='$(PCI_BUS_SEGN_BITS)' + @echo PCI_IO_CFG_EXT='$(PCI_IO_CFG_EXT)' + @echo PIRQ_ROUTE='$(PIRQ_ROUTE)' + @echo PNP_CFGADDR='$(PNP_CFGADDR)' + @echo PNP_CFGDATA='$(PNP_CFGDATA)' + @echo ROM_IMAGE_SIZE='$(ROM_IMAGE_SIZE)' + @echo ROM_SECTION_OFFSET='$(ROM_SECTION_OFFSET)' + @echo ROM_SECTION_SIZE='$(ROM_SECTION_SIZE)' + @echo ROM_SIZE='$(ROM_SIZE)' + @echo SB_HT_CHAIN_ON_BUS0='$(SB_HT_CHAIN_ON_BUS0)' + @echo SB_HT_CHAIN_UNITID_OFFSET_ONLY='$(SB_HT_CHAIN_UNITID_OFFSET_ONLY)' + @echo SERIAL_CPU_INIT='$(SERIAL_CPU_INIT)' + @echo STACK_SIZE='$(STACK_SIZE)' + @echo TTYS0_BASE='$(TTYS0_BASE)' + @echo TTYS0_BAUD='$(TTYS0_BAUD)' + @echo TTYS0_DIV='$(TTYS0_DIV)' + @echo TTYS0_LCS='$(TTYS0_LCS)' + @echo USE_DCACHE_RAM='$(USE_DCACHE_RAM)' + @echo USE_FAILOVER_IMAGE='$(USE_FAILOVER_IMAGE)' + @echo USE_FALLBACK_IMAGE='$(USE_FALLBACK_IMAGE)' + @echo USE_OPTION_TABLE='$(USE_OPTION_TABLE)' + @echo USE_WATCHDOG_ON_BOOT='$(USE_WATCHDOG_ON_BOOT)' + @echo WAIT_BEFORE_CPUS_INIT='$(WAIT_BEFORE_CPUS_INIT)' + @echo XIP_ROM_BASE='$(XIP_ROM_BASE)' + @echo XIP_ROM_SIZE='$(XIP_ROM_SIZE)' + @echo _EXCEPTION_VECTORS='$(_EXCEPTION_VECTORS)' + @echo _IO_BASE='$(_IO_BASE)' + @echo _RAMBASE='$(_RAMBASE)' + @echo _RAMSTART='$(_RAMSTART)' + @echo _RESET='$(_RESET)' + @echo _ROMBASE='$(_ROMBASE)' + @echo _ROMSTART='$(_ROMSTART)' +all: coreboot.rom +coreboot_ram.o: $(DRIVER) coreboot.a $(LIBGCC_FILE_NAME) + $(CC) $(DISTRO_LFLAGS) -nostdlib -r -o $@ c_start.o $(DRIVER) coreboot.a $(LIBGCC_FILE_NAME) +coreboot_ram: coreboot_ram.o $(TOP)/src/config/coreboot_ram.ld ldoptions + $(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/coreboot_ram.ld coreboot_ram.o + $(CROSS_COMPILE)nm -n coreboot_ram | sort > coreboot_ram.map +coreboot.strip: coreboot + $(OBJCOPY) -O binary coreboot coreboot.strip +coreboot_ram.bin: coreboot_ram + $(OBJCOPY) -O binary $< $@ +coreboot.rom: coreboot.strip + cp $< $@ +etags: $(SOURCES) + etags $(SOURCES) +payload: $(PAYLOAD) + cp $< $@ +nrv2b: $(TOP)/util/nrv2b/nrv2b.c + $(HOSTCC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG -DBITSIZE=32 -DENDIAN=0 $< -o $@ +ldscript.ld: ldoptions $(LDSUBSCRIPTS-1) + echo '/*ldoptions*/' > $@; cat ldoptions >> $@ ; for file in $(LDSUBSCRIPTS-1) ; do echo /* $$file */ >> $@; cat $$file >> $@ ; done +payload.lzma: $(PAYLOAD) + lzma e $(PAYLOAD) $@ +option_table.c: build_opt_tbl $(MAINBOARD)/cmos.layout + ./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout --header option_table.h +../romcc: $(TOP)/util/romcc/romcc.c + $(HOSTCC) -g $(HOSTCFLAGS) $< -o romcc.tmpfile + mv romcc.tmpfile $@ +option_table.h: build_opt_tbl $(MAINBOARD)/cmos.layout + ./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout --header option_table.h +build_opt_tbl: $(TOP)/util/options/build_opt_tbl.c $(TOP)/src/include/pc80/mc146818rtc.h $(TOP)/src/include/boot/coreboot_tables.h Makefile.settings Makefile + $(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) $< -o $@ +corebootDoc.config: $(TOP)/src/config/corebootDoc.config + cat $(TOP)/src/config/corebootDoc.config > corebootDoc.config + echo 'INPUT=$(SOURCES)' >> corebootDoc.config +coreboot_ram.rom: $(COREBOOT_RAM-1) + cp $(COREBOOT_RAM-1) coreboot_ram.rom +raminit_test: $(TOP)/src/northbridge/amd/amdk8/raminit_test.c $(TOP)/src/northbridge/amd/amdk8/raminit.c + $(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@ +tags: $(SOURCES) + ctags $(SOURCES) +floppy: all + mcopy -o coreboot.rom a: +crt0.S: $(CRT0) + cp $< $@ +coreboot_ram.nrv2b: coreboot_ram.bin nrv2b + ./nrv2b e $< $@ +coreboot: crt0.o $(INIT-OBJECTS) $(COREBOOT_APC) $(COREBOOT_RAM_ROM) ldscript.ld + $(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o $(INIT-OBJECTS) + $(CROSS_COMPILE)nm -n coreboot | sort > coreboot.map +coreboot.a: $(OBJECTS) + rm -f coreboot.a + $(CROSS_COMPILE)ar cr coreboot.a $(OBJECTS) +documentation: corebootDoc.config + doxygen corebootDoc.config +crt0.s: crt0.S $(CRT0_INCLUDES) + $(CPP) $(CPPFLAGS) -I. -I$(TOP)/src $< > $@.new && mv $@.new $@ +crt0.o: crt0.s + @$(CC) -c $(CPU_OPT) -o $@ $< +clean: + rm -f coreboot.* *~ + rm -f coreboot + rm -f ldscript.ld + rm -f a.out *.s *.l *.o *.E *.inc + rm -f TAGS tags romcc* + rm -f docipl buildrom* chips.c *chip.c coreboot_apc* coreboot_ram* coreboot_pay* + rm -f build_opt_tbl* nrv2b* option_table.c crt0.S + rm -f romimage payload.* +payload.nrv2b: $(PAYLOAD) nrv2b + ./nrv2b e $(PAYLOAD) $@ +./cache_as_ram_auto.inc: $(MAINBOARD)/cache_as_ram_auto.c option_table.h + $(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@ + perl -e 's/.rodata/.rom.data/g' -pi $@ + perl -e 's/.text/.section .rom.text/g' -pi $@ +buildrom: $(TOP)/util/buildrom/buildrom.c + $(HOSTCC) -o $@ $< + + +Makefile: /home/chris/coreboot-v2/targets/dfi/nf570/nf570/config.py /home/chris/coreboot-v2/targets/dfi/nf570/Config.lb + (cd /home/chris/coreboot-v2/targets ; export PYTHONPATH=/home/chris/coreboot-v2/util/newconfig ; python dfi/nf570/nf570/config.py dfi/nf570/Config.lb /home/chris/coreboot-v2) + Index: targets/dfi/nf570/nf570/normal/ldscript.ld =================================================================== --- targets/dfi/nf570/nf570/normal/ldscript.ld (revision 0) +++ targets/dfi/nf570/nf570/normal/ldscript.ld (revision 0) @@ -0,0 +1,242 @@ +/*ldoptions*/ +HAVE_MOVNTI = 1; +CONFIG_USE_INIT = 0; +HAVE_FALLBACK_BOOT = 1; +HAVE_FAILOVER_BOOT = 1; +ROM_IMAGE_SIZE = 0x20000; +PAYLOAD_SIZE = 0x20000; +_ROMBASE = 0xfffa0000; +_RESET = 0xfffa0000; +_EXCEPTION_VECTORS = 0xfffa0100; +STACK_SIZE = 0x2000; +HEAP_SIZE = 0x8000; +_RAMBASE = 0x100000; +USE_DCACHE_RAM = 1; +CAR_FAM10 = 0; +DCACHE_RAM_BASE = 0xc8000; +DCACHE_RAM_SIZE = 0x8000; +DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000; +CONFIG_AP_CODE_IN_CAR = 0; +MEM_TRAIN_SEQ = 2; +WAIT_BEFORE_CPUS_INIT = 0; +CONFIG_COMPRESS = 1; +CONFIG_UNCOMPRESSED = 0; +CONFIG_LB_MEM_TOPK = 2048; +HAVE_OPTION_TABLE = 1; +USE_OPTION_TABLE = 1; +LB_CKS_RANGE_START = 49; +LB_CKS_RANGE_END = 122; +LB_CKS_LOC = 123; +DEBUG = 1; +CONFIG_CONSOLE_VGA = 1; +CONFIG_CONSOLE_VGA_MULTI = 0; +CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST = 0; +CONFIG_CONSOLE_BTEXT = 0; +CONFIG_CONSOLE_LOGBUF = 0; +CONFIG_CONSOLE_SROM = 0; +CONFIG_CONSOLE_SERIAL8250 = 1; +CONFIG_USBDEBUG_DIRECT = 0; +DEFAULT_CONSOLE_LOGLEVEL = 8; +MAXIMUM_CONSOLE_LOGLEVEL = 8; +CONFIG_SERIAL_POST = 0; +TTYS0_BASE = 0x3f8; +TTYS0_BAUD = 115200; +TTYS0_LCS = 0x3; +CONFIG_USE_PRINTK_IN_CAR = 1; +MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130; +MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x2b80; +CONFIG_MAX_PCI_BUSES = 255; +CONFIG_SMP = 1; +CONFIG_MAX_CPUS = 2; +CONFIG_MAX_PHYSICAL_CPUS = 1; +CONFIG_LOGICAL_CPUS = 1; +CONFIG_AP_IN_SIPI_WAIT = 0; +SERIAL_CPU_INIT = 1; +APIC_ID_OFFSET = 16; +ENABLE_APIC_EXT_ID = 0; +LIFT_BSP_APIC_ID = 1; +CONFIG_IDE_PAYLOAD = 0; +CONFIG_ROM_PAYLOAD = 1; +CONFIG_ROM_PAYLOAD_START = 0xfff80000; +CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0; +CONFIG_COMPRESSED_PAYLOAD_LZMA = 0; +CONFIG_PRECOMPRESSED_PAYLOAD = 0; +CONFIG_SERIAL_PAYLOAD = 0; +CONFIG_FS_PAYLOAD = 0; +CONFIG_FS_EXT2 = 0; +CONFIG_FS_ISO9660 = 0; +CONFIG_FS_FAT = 0; +AUTOBOOT_DELAY = 2; +USE_WATCHDOG_ON_BOOT = 0; +CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1; +CONFIG_AGP_PLUGIN_SUPPORT = 1; +CONFIG_CARDBUS_PLUGIN_SUPPORT = 1; +CONFIG_PCIX_PLUGIN_SUPPORT = 1; +CONFIG_PCIEXP_PLUGIN_SUPPORT = 1; +CONFIG_IDE = 0; +IDE_BOOT_DRIVE = 0; +IDE_OFFSET = 0; +PCI_IO_CFG_EXT = 0; +CONFIG_CHIP_NAME = 1; +HAVE_INIT_TIMER = 1; +MAX_REBOOT_CNT = 3; +FAKE_SPDROM = 0; +HAVE_ACPI_TABLES = 0; +ACPI_SSDTX_NUM = 0; +HT_CHAIN_UNITID_BASE = 0; +HT_CHAIN_END_UNITID_BASE = 32; +SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0; +SB_HT_CHAIN_ON_BUS0 = 2; +PCI_BUS_SEGN_BITS = 0; +MMCONF_SUPPORT = 0; +MMCONF_SUPPORT_DEFAULT = 0; +HW_MEM_HOLE_SIZEK = 1048576; +HW_MEM_HOLE_SIZE_AUTO_INC = 0; +CONFIG_VAR_MTRR_HOLE = 1; +K8_HT_FREQ_1G_SUPPORT = 1; +K8_REV_F_SUPPORT = 1; +CBB = 0; +CDB = 24; +HT3_SUPPORT = 0; +EXT_RT_TBL_SUPPORT = 0; +EXT_CONF_SUPPORT = 0; +DIMM_SUPPORT = 0x4; +CPU_SOCKET_TYPE = 17; +CPU_ADDR_BITS = 40; +CONFIG_VGA_ROM_RUN = 0; +CONFIG_PCI_ROM_RUN = 1; +CONFIG_PCI_64BIT_PREF_MEM = 0; +CONFIG_AMDMCT = 0; +K8_MEM_BANK_B_ONLY = 0; +CONFIG_PCIE_CONFIGSPACE_HOLE = 0; +HAVE_MP_TABLE = 1; +HAVE_PIRQ_TABLE = 1; +USE_FALLBACK_IMAGE = 0; +USE_FAILOVER_IMAGE = 0; +HAVE_HARD_RESET = 1; +IRQ_SLOT_COUNT = 11; +CONFIG_IOAPIC = 1; +FALLBACK_SIZE = 0x3f000; +FAILOVER_SIZE = 0x1000; +ROM_SIZE = 0x80000; +ROM_SECTION_SIZE = 0x40000; +ROM_SECTION_OFFSET = 0x0; +XIP_ROM_SIZE = 0x40000; +XIP_ROM_BASE = 0xfff80000; +CONFIG_GDB_STUB = 0; +HAVE_FANCTL = 1; +CONFIG_UDELAY_IO = 0; +CONFIG_UDELAY_TSC = 0; +CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0; +AGP_APERTURE_SIZE = 0x4000000; +/* /home/chris/coreboot-v2/src/arch/i386/init/ldscript.lb */ +/* + * Memory map: + * + * _RAMBASE + * : data segment + * : bss segment + * : heap + * : stack + * _ROMBASE + * : coreboot text + * : readonly text + */ +/* + * Bootstrap code for the STPC Consumer + * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. + * + */ + +/* + * Written by Johan Rydberg, based on work by Daniel Kahlin. + * Rewritten by Eric Biederman + */ +/* + * We use ELF as output format. So that we can + * debug the code in some form. + */ +OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") +OUTPUT_ARCH(i386) + +/* +ENTRY(_start) +*/ + +TARGET(binary) +INPUT(coreboot_ram.rom) +SECTIONS +{ + . = _ROMBASE; + + .ram . : { + _ram = . ; + coreboot_ram.rom(*) + _eram = . ; + } + + /* This section might be better named .setup */ + .rom . : { + _rom = .; + *(.rom.text); + *(.rom.data); + *(.rom.data.*); + . = ALIGN(16); + _erom = .; + } + + _lrom = LOADADDR(.rom); + _elrom = LOADADDR(.rom) + SIZEOF(.rom); + _iseg = _RAMBASE; + _eiseg = _iseg + SIZEOF(.ram); + _liseg = _ram; + _eliseg = _eram; + + /DISCARD/ : { + *(.comment) + *(.note) + } +} +/* /home/chris/coreboot-v2/src//cpu/x86/32bit/reset32.lds */ +/* + * _ROMTOP : The top of the rom used where we + * need to put the reset vector. + */ + +SECTIONS { + _ROMTOP = _ROMBASE + ROM_IMAGE_SIZE - 0x10; + . = _ROMTOP; + .reset (.): { + *(.reset) + . = 15 ; + BYTE(0x00); + } +} +/* /home/chris/coreboot-v2/src//southbridge/nvidia/mcp55/id.lds */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghai.lu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +SECTIONS { + . = (_ROMBASE + ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start); + .id (.): { + *(.id) + } +} Index: targets/dfi/nf570/nf570/normal/coreboot_ram.bin =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/coreboot_ram.bin ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/build_opt_tbl =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/build_opt_tbl ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/crt0_includes.h =================================================================== --- targets/dfi/nf570/nf570/normal/crt0_includes.h (revision 0) +++ targets/dfi/nf570/nf570/normal/crt0_includes.h (revision 0) @@ -0,0 +1,5 @@ +#include <cpu/x86/32bit/entry32.inc> +#include <cpu/x86/32bit/reset32.inc> +#include <southbridge/nvidia/mcp55/id.inc> +#include <cpu/amd/car/cache_as_ram.inc> +#include <./cache_as_ram_auto.inc> Index: targets/dfi/nf570/nf570/normal/cache_as_ram_auto.inc =================================================================== --- targets/dfi/nf570/nf570/normal/cache_as_ram_auto.inc (revision 0) +++ targets/dfi/nf570/nf570/normal/cache_as_ram_auto.inc (revision 0) @@ -0,0 +1,13310 @@ + .file "cache_as_ram_auto.c" + .section .rom.text + .type read_option, @function +read_option: + pushl %ebp + movl %eax, %ecx + shrl $3, %eax + movl %esp, %ebp + movzbl %al, %eax + pushl %ebx + movl %edx, %ebx +#APP + outb %al, $112 + inb $113, %al +#NO_APP + andl $7, %ecx + movzbl %al, %eax + shrl %cl, %eax + movl $1, %edx + movb %bl, %cl + sall %cl, %edx + popl %ebx + decl %edx + popl %ebp + andl %edx, %eax + ret + .size read_option, .-read_option +.globl uart8250_tx_byte + .type uart8250_tx_byte, @function +uart8250_tx_byte: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + movb 12(%ebp), %bl +.L4: + movl %esi, %edi + leal 5(%edi), %ecx + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + testb $32, %al + je .L4 + movzbl %bl, %eax + movzwl %si, %edx +#APP + outb %al, %dx +#NO_APP +.L6: + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + testb $64, %al + je .L6 + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size uart8250_tx_byte, .-uart8250_tx_byte +.globl uart8250_can_rx_byte + .type uart8250_can_rx_byte, @function +uart8250_can_rx_byte: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + addl $5, %edx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + popl %ebp + andl $1, %eax + ret + .size uart8250_can_rx_byte, .-uart8250_can_rx_byte +.globl uart8250_init + .type uart8250_init, @function +uart8250_init: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + movzwl 8(%ebp), %ecx + pushl %edi + pushl %esi + pushl %ebx + leal 1(%ecx), %ebx + movl %ebx, %edx +#APP + outb %al, %dx +#NO_APP + leal 2(%ecx), %edx + movb $1, %al + movzwl %dx, %edx +#APP + outb %al, %dx +#NO_APP + leal 4(%ecx), %edx + movb $3, %al + movzwl %dx, %edx +#APP + outb %al, %dx +#NO_APP + movb 16(%ebp), %al + leal 3(%ecx), %edi + movl %edi, %edx + andl $127, %eax + movl %eax, %esi + orl $-128, %eax + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + movzbl 12(%ebp), %eax + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl 12(%ebp), %edx + movzbl %dh, %eax + movl %ebx, %edx +#APP + outb %al, %dx +#NO_APP + movl %esi, %edx + movzbl %dl, %eax + movl %edi, %edx +#APP + outb %al, %dx +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size uart8250_init, .-uart8250_init +.globl init_uart8250 + .type init_uart8250, @function +init_uart8250: + pushl %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + pushl %ebx + movl 8(%ebp), %ecx + movl (%eax), %edx + movl $115200, %eax + testl %edx, %edx + je .L20 + movl %edx, %ebx + xorl %edx, %edx + divl %ebx +.L20: + cmpl $1016, %ecx + je .L23 + pushl $3 + pushl %eax + pushl %ecx + call uart8250_init + addl $12, %esp +.L23: + movl -4(%ebp), %ebx + leave + ret + .size init_uart8250, .-init_uart8250 + .type skip_atoi, @function +skip_atoi: + pushl %ebp + xorl %ecx, %ecx + movl %esp, %ebp + pushl %esi + movl %eax, %esi + pushl %ebx + jmp .L25 +.L26: + imull $10, %ecx, %eax + movsbl %dl,%edx + leal -48(%eax,%edx), %ecx + leal 1(%ebx), %eax + movl %eax, (%esi) +.L25: + movl (%esi), %ebx + movb (%ebx), %dl + leal -48(%edx), %eax + cmpb $9, %al + jbe .L26 + popl %ebx + movl %ecx, %eax + popl %esi + popl %ebp + ret + .size skip_atoi, .-skip_atoi + .section .rom.data.str1.1,"aMS",@progbits,1 +.LC0: + .string "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ" +.LC1: + .string "0123456789abcdefghijklmnopqrstuvwxyz" + .section .rom.text + .type number, @function +number: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $188, %esp + movl 20(%ebp), %edi + movl %edx, %ecx + movl %eax, -160(%ebp) + movl 12(%ebp), %esi + movl $.LC0, -120(%ebp) + testl $64, %edi + jne .L32 + movl $.LC1, -120(%ebp) +.L32: + testl $16, %edi + je .L33 + andl $-2, %edi +.L33: + movl 8(%ebp), %eax + movl $0, -112(%ebp) + subl $2, %eax + cmpl $34, %eax + ja .L37 + movl %edi, %eax + andl $1, %eax + cmpl $1, %eax + sbbl %eax, %eax + andl $-16, %eax + addl $48, %eax + testl $2, %edi + movb %al, -152(%ebp) + je .L41 + testl %ebx, %ebx + jns .L43 + negl %ecx + adcl $0, %ebx + decl %esi + negl %ebx + movb $45, -121(%ebp) + jmp .L45 +.L43: + testl $4, %edi + je .L46 + decl %esi + movb $43, -121(%ebp) + jmp .L45 +.L46: + testl $8, %edi + je .L41 + decl %esi + movb $32, -121(%ebp) + jmp .L45 +.L41: + movb $0, -121(%ebp) +.L45: + movl %edi, %edx + andl $32, %edx + movl %edx, -156(%ebp) + je .L49 + cmpl $16, 8(%ebp) + jne .L51 + subl $2, %esi + jmp .L49 +.L51: + xorl %eax, %eax + cmpl $8, 8(%ebp) + sete %al + subl %eax, %esi +.L49: + movl %ebx, %eax + orl %ecx, %eax + movl $0, -116(%ebp) + jne .L57 + movb $48, -90(%ebp) + movl $1, -116(%ebp) + jmp .L56 +.L57: + movl %ecx, %eax + movl %ebx, %edx + movl %edx, %ecx + xorl %edx, %edx + testl %ecx, %ecx + movl %eax, -176(%ebp) + je .L60 + movl %ecx, %eax + xorl %edx, %edx + divl 8(%ebp) + movl %eax, %ecx +.L60: + movl -176(%ebp), %eax +#APP + divl 8(%ebp) +#NO_APP + movl %edx, -172(%ebp) + movl %ecx, %edx + movl %eax, %ecx + movl %edx, %ebx + movl -172(%ebp), %eax + movl -120(%ebp), %edx + movb (%edx,%eax), %dl + movl -116(%ebp), %eax + movb %dl, -90(%ebp,%eax) + movl %ebx, %edx + incl %eax + orl %ecx, %edx + movl %eax, -116(%ebp) + jne .L57 +.L56: + movl -116(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -108(%ebp) + cmpl %edx, %eax + jge .L61 + movl %edx, -108(%ebp) +.L61: + subl -108(%ebp), %esi + testl $17, %edi + movl $0, -112(%ebp) + movl %esi, %eax + je .L65 + jmp .L64 +.L66: + subl $12, %esp + pushl $32 + call *-160(%ebp) + movl %ebx, %eax + addl $16, %esp +.L65: + testl %eax, %eax + leal -1(%eax), %ebx + jg .L66 + subl %eax, %esi + movl %esi, -112(%ebp) + movl %ebx, %esi +.L64: + cmpb $0, -121(%ebp) + je .L68 + movzbl -121(%ebp), %eax + subl $12, %esp + pushl %eax + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L68: + cmpl $0, -156(%ebp) + je .L70 + cmpl $8, 8(%ebp) + jne .L72 + subl $12, %esp + pushl $48 + call *-160(%ebp) + incl -112(%ebp) + jmp .L90 +.L72: + cmpl $16, 8(%ebp) + jne .L70 + subl $12, %esp + pushl $48 + call *-160(%ebp) + movl -120(%ebp), %edx + movzbl 33(%edx), %eax + movl %eax, (%esp) + call *-160(%ebp) + addl $2, -112(%ebp) +.L90: + addl $16, %esp +.L70: + andl $16, %edi + movl %esi, %eax + je .L77 + jmp .L75 +.L78: + movzbl -152(%ebp), %eax + subl $12, %esp + pushl %eax + call *-160(%ebp) + movl %ebx, %eax + addl $16, %esp + incl -112(%ebp) +.L77: + testl %eax, %eax + leal -1(%eax), %ebx + jg .L78 + movl %ebx, %esi +.L75: + movl -108(%ebp), %ebx + jmp .L80 +.L81: + subl $12, %esp + decl %ebx + pushl $48 + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L80: + cmpl %ebx, -116(%ebp) + jl .L81 + jmp .L89 +.L83: + decl -116(%ebp) + subl $12, %esp + movl -116(%ebp), %edx + movzbl -90(%ebp,%edx), %eax + pushl %eax + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L89: + cmpl $0, -116(%ebp) + jg .L83 + movl %esi, %ebx + jmp .L85 +.L86: + subl $12, %esp + decl %ebx + pushl $32 + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L85: + testl %ebx, %ebx + jg .L86 +.L37: + movl -112(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size number, .-number + .section .rom.data.str1.1 +.LC2: + .string "<NULL>" + .section .rom.text +.globl vtxprintf + .type vtxprintf, @function +vtxprintf: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl 16(%ebp), %esi + movl $0, -20(%ebp) + jmp .L92 +.L93: + cmpb $37, %al + movl $0, -28(%ebp) + je .L200 + subl $12, %esp + movzbl %al, %eax + jmp .L196 +.L200: + movl 12(%ebp), %ecx + incl %ecx + movl %ecx, 12(%ebp) + movb (%ecx), %dl + cmpb $43, %dl + je .L101 + jg .L104 + cmpb $32, %dl + je .L99 + cmpb $35, %dl + jne .L98 + jmp .L100 +.L104: + cmpb $45, %dl + je .L102 + cmpb $48, %dl + jne .L98 + jmp .L103 +.L102: + orl $16, -28(%ebp) + jmp .L200 +.L101: + orl $4, -28(%ebp) + jmp .L200 +.L99: + orl $8, -28(%ebp) + jmp .L200 +.L100: + orl $32, -28(%ebp) + jmp .L200 +.L103: + orl $1, -28(%ebp) + jmp .L200 +.L98: + leal -48(%edx), %eax + cmpb $9, %al + ja .L105 + leal 12(%ebp), %eax + call skip_atoi + movl %eax, %edi + jmp .L107 +.L105: + orl $-1, %edi + cmpb $42, %dl + jne .L107 + movl (%esi), %edi + leal 1(%ecx), %eax + movl %eax, 12(%ebp) + leal 4(%esi), %eax + movl %eax, %esi + testl %edi, %edi + jns .L107 + orl $16, -28(%ebp) + negl %edi +.L107: + movl 12(%ebp), %edx + movl $-1, -24(%ebp) + cmpb $46, (%edx) + jne .L114 + leal 1(%edx), %eax + movl %eax, 12(%ebp) + movb 1(%edx), %cl + leal -48(%ecx), %eax + cmpb $9, %al + ja .L115 + leal 12(%ebp), %eax + call skip_atoi + movl %eax, -24(%ebp) + jmp .L117 +.L115: + cmpb $42, %cl + jne .L118 + leal 2(%edx), %eax + movl %eax, 12(%ebp) + movl (%esi), %eax + addl $4, %esi + movl %eax, -24(%ebp) +.L117: + cmpl $0, -24(%ebp) + jns .L114 +.L118: + movl $0, -24(%ebp) +.L114: + movl 12(%ebp), %ecx + movb (%ecx), %dl + cmpb $104, %dl + je .L120 + cmpb $108, %dl + je .L120 + orl $-1, %ebx + cmpb $76, %dl + jne .L123 +.L120: + leal 1(%ecx), %eax + movl %eax, 12(%ebp) + cmpb $108, 1(%ecx) + je .L124 + movsbl %dl,%ebx + jmp .L123 +.L124: + leal 2(%ecx), %eax + movl $76, %ebx + movl %eax, 12(%ebp) +.L123: + movl 12(%ebp), %eax + movb (%eax), %al + cmpb $110, %al + je .L131 + jg .L137 + cmpb $99, %al + je .L129 + jg .L138 + cmpb $37, %al + je .L127 + cmpb $88, %al + jne .L126 + jmp .L128 +.L138: + cmpb $100, %al + je .L130 + cmpb $105, %al + jne .L126 + jmp .L130 +.L137: + cmpb $115, %al + je .L134 + jg .L139 + cmpb $111, %al + je .L132 + cmpb $112, %al + jne .L126 + jmp .L133 +.L139: + cmpb $117, %al + je .L135 + cmpb $120, %al + movl $16, -36(%ebp) + je .L140 + jmp .L126 +.L129: + testb $16, -28(%ebp) + movl %edi, %ebx + je .L143 + jmp .L141 +.L144: + subl $12, %esp + pushl $32 + call *8(%ebp) + addl $16, %esp +.L143: + decl %ebx + testl %ebx, %ebx + jg .L144 + movl -20(%ebp), %eax + addl %edi, %eax + movl %ebx, %edi + subl %ebx, %eax + decl %eax + movl %eax, -20(%ebp) +.L141: + movzbl (%esi), %eax + subl $12, %esp + pushl %eax + call *8(%ebp) + movl -20(%ebp), %ebx + jmp .L191 +.L147: + subl $12, %esp + pushl $32 + call *8(%ebp) +.L191: + decl %edi + addl $16, %esp + incl %ebx + testl %edi, %edi + jg .L147 + movl %ebx, -20(%ebp) + jmp .L199 +.L134: + movl (%esi), %edx + testl %edx, %edx + movl %edx, -32(%ebp) + jne .L149 + movl $.LC2, -32(%ebp) +.L149: + movl $0, -16(%ebp) + jmp .L151 +.L152: + incl -16(%ebp) +.L151: + movl -16(%ebp), %ecx + movl -32(%ebp), %eax + cmpb $0, (%ecx,%eax) + je .L153 + movl -24(%ebp), %edx + cmpl %edx, %ecx + jne .L152 +.L153: + testb $16, -28(%ebp) + movl %edi, %eax + je .L157 + jmp .L155 +.L158: + subl $12, %esp + pushl $32 + call *8(%ebp) + movl %ebx, %eax + addl $16, %esp + incl -20(%ebp) +.L157: + cmpl %eax, -16(%ebp) + leal -1(%eax), %ebx + jl .L158 + movl %ebx, %edi +.L155: + xorl %ebx, %ebx + jmp .L160 +.L161: + movl -32(%ebp), %ecx + subl $12, %esp + movzbl (%ebx,%ecx), %eax + incl %ebx + pushl %eax + call *8(%ebp) + addl $16, %esp + incl -20(%ebp) +.L160: + cmpl -16(%ebp), %ebx + jl .L161 + movl %edi, %ebx + jmp .L163 +.L164: + subl $12, %esp + decl %ebx + pushl $32 + call *8(%ebp) + addl $16, %esp + incl -20(%ebp) +.L163: + cmpl %ebx, -16(%ebp) + jl .L164 + jmp .L199 +.L133: + cmpl $-1, %edi + jne .L166 + orl $1, -28(%ebp) + movl $8, %edi +.L166: + movl (%esi), %edx + leal 4(%esi), %ebx + xorl %ecx, %ecx + pushl -28(%ebp) + pushl -24(%ebp) + pushl %edi + pushl $16 + jmp .L197 +.L131: + cmpl $76, %ebx + jne .L168 + movl -20(%ebp), %eax + movl (%esi), %ecx + cltd + movl %eax, (%ecx) + movl %edx, 4(%ecx) +.L199: + addl $4, %esi + jmp .L97 +.L168: + movl (%esi), %eax + leal 4(%esi), %edx + movl -20(%ebp), %ecx + movl %edx, %esi + movl %ecx, (%eax) + jmp .L97 +.L127: + subl $12, %esp + pushl $37 + jmp .L198 +.L132: + movl $8, -36(%ebp) + jmp .L140 +.L128: + orl $64, -28(%ebp) + movl $16, -36(%ebp) + jmp .L140 +.L130: + orl $2, -28(%ebp) + jmp .L135 +.L126: + subl $12, %esp + pushl $37 + call *8(%ebp) + movl 12(%ebp), %eax + addl $16, %esp + incl -20(%ebp) + movb (%eax), %dl + testb %dl, %dl + je .L172 + subl $12, %esp + movzbl %dl, %eax +.L196: + pushl %eax +.L198: + call *8(%ebp) + incl -20(%ebp) + jmp .L194 +.L172: + decl %eax + movl %eax, 12(%ebp) + jmp .L97 +.L135: + movl $10, -36(%ebp) +.L140: + cmpl $76, %ebx + jne .L174 + movl (%esi), %edx + leal 8(%esi), %ebx + movl 4(%esi), %ecx + jmp .L176 +.L174: + cmpl $108, %ebx + jne .L177 + leal 4(%esi), %ebx + jmp .L192 +.L177: + cmpl $104, %ebx + jne .L179 + xorl %ecx, %ecx + movzwl (%esi), %edx + testb $2, -28(%ebp) + leal 4(%esi), %ebx + je .L176 + movswl %dx,%edx + movl %edx, %ecx + jmp .L193 +.L179: + testb $2, -28(%ebp) + leal 4(%esi), %edx + je .L182 + movl (%esi), %eax + movl %edx, %ebx + movl %eax, %ecx + movl %eax, %edx +.L193: + sarl $31, %ecx + jmp .L176 +.L182: + movl %edx, %ebx +.L192: + movl (%esi), %edx + xorl %ecx, %ecx +.L176: + pushl -28(%ebp) + pushl -24(%ebp) + pushl %edi + pushl -36(%ebp) +.L197: + movl 8(%ebp), %eax + movl %ebx, %esi + call number + addl %eax, -20(%ebp) +.L194: + addl $16, %esp +.L97: + incl 12(%ebp) +.L92: + movl 12(%ebp), %eax + movb (%eax), %al + testb %al, %al + jne .L93 + movl -20(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size vtxprintf, .-vtxprintf +.globl console_tx_byte + .type console_tx_byte, @function +console_tx_byte: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movb 8(%ebp), %bl + cmpb $10, %bl + jne .L202 + pushl $13 + pushl $1016 + call uart8250_tx_byte + popl %ecx + popl %eax +.L202: + movzbl %bl, %eax + pushl %eax + pushl $1016 + call uart8250_tx_byte + movl -4(%ebp), %ebx + popl %eax + popl %edx + leave + ret + .size console_tx_byte, .-console_tx_byte +.globl udelay + .type udelay, @function +udelay: + pushl %ebp + movl %esp, %ebp + imull $200, 8(%ebp), %ecx + pushl %ebx + movl -18873456, %edx +.L206: + movl -18873456, %eax + movl %edx, %ebx + subl %eax, %ebx + cmpl %ecx, %ebx + jb .L206 + popl %ebx + popl %ebp + ret + .size udelay, .-udelay +.globl mdelay + .type mdelay, @function +mdelay: + pushl %ebp + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + xorl %ebx, %ebx + jmp .L212 +.L213: + pushl $1000 + incl %ebx + call udelay + popl %eax +.L212: + cmpl %esi, %ebx + jne .L213 + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size mdelay, .-mdelay +.globl delay + .type delay, @function +delay: + pushl %ebp + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + xorl %ebx, %ebx + jmp .L217 +.L218: + pushl $1000 + incl %ebx + call mdelay + popl %eax +.L217: + cmpl %esi, %ebx + jne .L218 + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size delay, .-delay +.globl memcpy + .type memcpy, @function +memcpy: + pushl %ebp + xorl %edx, %edx + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %ecx + pushl %ebx + movl 12(%ebp), %esi + movl 16(%ebp), %ebx + jmp .L222 +.L223: + movb (%edx,%esi), %al + movb %al, (%edx,%ecx) + incl %edx +.L222: + cmpl %ebx, %edx + jne .L223 + popl %ebx + movl %ecx, %eax + popl %esi + popl %ebp + ret + .size memcpy, .-memcpy + .type setup_resource_map_offset, @function +setup_resource_map_offset: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + subl $16, %esp + movl %edx, -16(%ebp) + movl %ecx, -20(%ebp) + jmp .L227 +.L228: + movl (%esi,%edi,4), %edx + movl $3320, %ecx + movl %edx, %eax + andl $4095, %edx + andl $-4096, %eax + addl -20(%ebp), %eax + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -28(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl 4(%esi,%edi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -24(%ebp) + movl -28(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl 8(%ebp), %eax + movl %ebx, %edx + addl 8(%esi,%edi,4), %eax + orl %eax, -24(%ebp) + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %edi +.L227: + cmpl -16(%ebp), %edi + jl .L228 + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size setup_resource_map_offset, .-setup_resource_map_offset + .type setup_resource_map_x_offset, @function +setup_resource_map_x_offset: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + subl $16, %esp + movl %edx, -16(%ebp) + movl %ecx, -20(%ebp) + jmp .L232 +.L233: + movl (%esi,%edi,4), %eax + cmpl $32, %eax + je .L236 + cmpl $34, %eax + je .L237 + cmpl $16, %eax + jne .L234 + movl 4(%esi,%edi,4), %edx + movl $3320, %ecx + movl %edx, %eax + andl $4095, %edx + andl $-4096, %eax + addl -20(%ebp), %eax + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -28(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl 8(%esi,%edi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -24(%ebp) + movl -28(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl 12(%esi,%edi,4), %eax + movl %ebx, %edx + orl %eax, -24(%ebp) + movl -24(%ebp), %eax + jmp .L240 +.L237: + movl 8(%ebp), %edx + addl 4(%esi,%edi,4), %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax + andl 8(%esi,%edi,4), %eax + orl 12(%esi,%edi,4), %eax + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + jmp .L234 +.L236: + movl 8(%ebp), %edx + addl 4(%esi,%edi,4), %edx +#APP + inl %dx, %eax +#NO_APP + andl 8(%esi,%edi,4), %eax + orl 12(%esi,%edi,4), %eax +.L240: +#APP + outl %eax, %dx +#NO_APP +.L234: + addl $4, %edi +.L232: + cmpl -16(%ebp), %edi + jl .L233 + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size setup_resource_map_x_offset, .-setup_resource_map_x_offset + .type soft_reset, @function +soft_reset: + pushl %ebp + movl $-2147434388, %eax + movl %esp, %ebp + movl $3320, %edx + pushl %ebx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl $-2147434388, %ecx + movl %eax, %ebx + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-33, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $2, %al + movb $-7, %dl +#APP + outb %al, %dx +#NO_APP + movb $6, %al +#APP + outb %al, %dx +#NO_APP + popl %ebx + popl %ebp + ret + .size soft_reset, .-soft_reset + .type spd_read_byte, @function +spd_read_byte: + pushl %ebp + addl %eax, %eax + movl %esp, %ebp + orl $1, %eax + pushl %esi + movl $4098, %ecx + pushl %ebx + movzbl %al, %eax + movl %edx, %ebx + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl $-128, %esi + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movzbl %bl, %ecx + movb $3, %dl + movb %cl, %al +#APP + outb %al, %dx +#NO_APP + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movb $7, %cl + xorb %dl, %dl + movb %cl, %al +#APP + outb %al, %dx +#NO_APP + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movl $1000000, %ecx +.L244: + movb $-128, %al +#APP + outb %al, $128 +#NO_APP + movl $4097, %edx +#APP + inb %dx, %al +#NO_APP + testb %al, %al + jne .L245 + decl %ecx + jne .L244 + movl $-3, %edx + jmp .L248 +.L245: +#APP + inb %dx, %al +#NO_APP + movl $4100, %edx + movb %al, %bl +#APP + inb %dx, %al +#NO_APP + andl $-128, %ebx + orl $-1, %edx + cmpb $-128, %bl + jne .L248 + movzbl %al, %edx +.L248: + popl %ebx + movl %edx, %eax + popl %esi + popl %ebp + ret + .size spd_read_byte, .-spd_read_byte + .type get_nodes, @function +get_nodes: + pushl %ebp + movl $-2147434400, %eax + movl %esp, %ebp + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $4, %eax + popl %ebp + andl $7, %eax + incl %eax + ret + .size get_nodes, .-get_nodes + .type ht_lookup_slave_capability, @function +ht_lookup_slave_capability: + pushl %ebp + movl $3320, %ecx + movl %esp, %ebp + movl %ecx, %edx + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + shrl $4, %ebx + subl $4, %esp + movl %ebx, %esi + orl $14, %esi + movl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + andl $127, %eax + xorl %edi, %edi + cmpb $1, %al + ja .L265 + jmp .L257 +.L260: + movl %edi, %eax + movl %ebx, %edx + movzbl %al, %esi + movl $3320, %ecx + orl %esi, %edx + movl %edx, %eax + andl $2147483644, %eax + movl %edx, -16(%ebp) + orl $-2147483648, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -16(%ebp), %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + cmpb $8, %al + jne .L261 + leal 2(%esi), %eax + movl %ecx, %edx + orl %ebx, %eax + movl %eax, -16(%ebp) + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -16(%ebp), %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + shrw $13, %ax + je .L263 +.L261: + incl %esi + orl %ebx, %esi +.L266: + movl %esi, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + movl %eax, %edi +.L265: + movl %edi, %edx + testb %dl, %dl + jne .L260 + jmp .L263 +.L257: + movl %ebx, %esi + orl $52, %esi + jmp .L266 +.L263: + movl %edi, %edx + movzbl %dl, %eax + popl %edx + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size ht_lookup_slave_capability, .-ht_lookup_slave_capability + .type ht_read_freq_cap, @function +ht_read_freq_cap: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movzbl %dl, %esi + shrl $4, %edi + orl %edi, %esi + movl %esi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + andl $2147483644, %edi + movl %eax, %esi + orl $-2147483648, %edi + movl %eax, %ecx + andw $32767, %si + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $1951404066, %eax + je .L274 + cmpl $1951666210, %eax + jne .L271 +.L274: + movl %ecx, %eax + andl $32735, %eax + jmp .L270 +.L271: + movzwl %si, %eax +.L270: + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size ht_read_freq_cap, .-ht_read_freq_cap + .type ht_read_width_cap, @function +ht_read_width_cap: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movzbl %dl, %esi + shrl $4, %edi + orl %edi, %esi + movl %esi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + andl $2147483644, %edi + movb %al, %cl + orl $-2147483648, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $71758, %eax + jne .L276 + movl %ecx, %eax + andl $119, %eax + cmpl $17, %eax + jne .L276 + andl $-120, %ecx +.L276: + popl %ebx + movzbl %cl, %eax + popl %esi + popl %edi + popl %ebp + ret + .size ht_read_width_cap, .-ht_read_width_cap + .type pci_read_config32_index_wait, @function +pci_read_config32_index_wait: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %edx, %edi + pushl %esi + movl %ecx, %esi + pushl %ebx + movl %eax, %ebx + shrl $4, %ebx + movl %ebx, %ecx + orl %edx, %ecx + movl $3320, %edx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1073741825, %esi + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L281: + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testl %eax, %eax + jns .L281 + leal 4(%edi), %eax + movb $-8, %dl + orl %eax, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size pci_read_config32_index_wait, .-pci_read_config32_index_wait + .type pci_write_config32_index_wait, @function +pci_write_config32_index_wait: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl %ecx, %esi + movl %edx, %ecx + shrl $4, %edi + addl $4, %ecx + orl %edi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + subl $4, %esp + movl %ecx, %eax + movl %edx, -16(%ebp) + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl 8(%ebp), %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + orl -16(%ebp), %edi + movl %ebx, %edx + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1073741824, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L287: + movl $3320, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testl %eax, %eax + jns .L287 + popl %ecx + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size pci_write_config32_index_wait, .-pci_write_config32_index_wait +.globl memory_end_k + .type memory_end_k, @function +memory_end_k: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + xorl %esi, %esi + pushl %ebx + subl $4, %esp + movl $0, -16(%ebp) + jmp .L293 +.L294: + movl 8(%ebp), %eax + movl $3320, %edx + movl -16(%ebp), %edi + movl 8(%eax), %ecx + sall $3, %edi + leal 64(%edi), %eax + shrl $4, %ecx + orl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $3, %eax + cmpl $3, %eax + jne .L295 + leal 68(%edi), %eax + movb $-8, %dl + orl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + leal 65536(%eax), %esi + xorw %si, %si + shrl $2, %esi +.L295: + incl -16(%ebp) +.L293: + movl 12(%ebp), %eax + cmpl %eax, -16(%ebp) + jne .L294 + popl %ebx + movl %esi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size memory_end_k, .-memory_end_k + .type convert_to_linear, @function +convert_to_linear: + movl %eax, %edx + andl $15, %edx + pushl %ebp + cmpl $9, %edx + movl %esp, %ebp + ja .L300 + sall $4, %eax + jmp .L302 +.L300: + andl $240, %eax + sall $4, %eax + orl fraction.4292-40(,%edx,4), %eax +.L302: + popl %ebp + ret + .size convert_to_linear, .-convert_to_linear + .type update_dimm_TT_1_4, @function +update_dimm_TT_1_4: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $12, %esp + movl 8(%ebp), %edi + movl %edx, -20(%ebp) + movl $1, %edx + movzwl 20(%eax,%ecx,2), %esi + movl %eax, -16(%ebp) + movl %edx, %eax + sall %cl, %eax + testl %eax, %edi + jne .L305 + leal 4(%ebx), %ecx + sall %cl, %edx + testl %edx, %edi + je .L305 + movl -16(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L305: + movl 16(%ebp), %edx + movl %esi, %eax + orl $-1, %edi + call spd_read_byte + testl %eax, %eax + js .L310 + movl -20(%ebp), %ecx + imull $10, %eax, %edx + movl 32(%ebp), %esi + movzbl 2(%ecx), %ebx + leal -1(%edx,%ebx), %edx + movl %edx, %eax + cltd + idivl %ebx + cmpl %eax, %esi + jae .L311 + movl %eax, %esi +.L311: + xorl %edi, %edi + cmpl 36(%ebp), %esi + ja .L310 + movl -16(%ebp), %ecx + movl $3320, %edx + movl 12(%ebp), %eax + movl 12(%ecx), %ecx + shrl $4, %ecx + orl %eax, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, -24(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movb 20(%ebp), %cl + movl %eax, %ebx + movw $1, %di + shrl %cl, %eax + andl 24(%ebp), %eax + addl 28(%ebp), %eax + cmpl %esi, %eax + jae .L310 + sall %cl, 24(%ebp) + movb $-8, %dl + notl 24(%ebp) + andl 24(%ebp), %ebx + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + subl 28(%ebp), %esi + movb $-4, %dl + sall %cl, %esi + orl %esi, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L310: + addl $12, %esp + movl %edi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size update_dimm_TT_1_4, .-update_dimm_TT_1_4 + .type Get_MCTSysAddr, @function +Get_MCTSysAddr: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl (%eax), %ebx + leal (%edx,%ebx,8), %eax + movl 728(%ecx,%eax,4), %edx + movl 696(%ecx,%ebx,4), %eax + andl $-16, %edx + xorw %ax, %ax + addl %eax, %edx + movl 984(%ecx,%ebx,4), %eax + testb $1, %al + je .L318 + movl %eax, %ecx + andl $-16777216, %ecx + shrl $10, %ecx + leal 0(,%ecx,4), %eax + cmpl %eax, %edx + jb .L318 + cmpl $16777215, %edx + ja .L318 + movl $4194304, %eax + subl %ecx, %eax + leal (%edx,%eax,4), %edx +.L318: + popl %ebx + popl %ebp + leal 4096(%edx), %eax + ret + .size Get_MCTSysAddr, .-Get_MCTSysAddr + .type Get_RcvrSysAddr, @function +Get_RcvrSysAddr: + pushl %ebp + movl %ecx, %edx + movl %esp, %ebp + movl 8(%ebp), %ecx + popl %ebp + jmp Get_MCTSysAddr + .size Get_RcvrSysAddr, .-Get_RcvrSysAddr + .type set_wrap32dis, @function +set_wrap32dis: + pushl %ebp + movl $-1073676267, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + orl $131072, %eax +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size set_wrap32dis, .-set_wrap32dis + .type clear_wrap32dis, @function +clear_wrap32dis: + pushl %ebp + movl $-1073676267, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + andl $-131073, %eax +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size clear_wrap32dis, .-clear_wrap32dis + .type Write1LTestPattern, @function +Write1LTestPattern: + pushl %ebp + decl %edx + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + je .L331 + movl %ecx, %esi +.L331: + movl %edi, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + sall $8, %edi + movl $16, %edx + movl $4, %ecx + movl %edi, %eax + movl %esi, %ebx +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size Write1LTestPattern, .-Write1LTestPattern + .type Read1LTestPattern, @function +Read1LTestPattern: + pushl %ebp + movl %eax, %edx + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + movl $-1073741568, %ebx + shrl $24, %edx + movl %ebx, %ecx + movl %edi, %eax +#APP + wrmsr +#NO_APP + sall $8, %esi + movl %esi, %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size Read1LTestPattern, .-Read1LTestPattern + .type CompareTestPatternQW0, @function +CompareTestPatternQW0: + pushl %ebp + movl %esp, %ebp + cmpl $1, 20(%ebp) + pushl %edi + movl %eax, %edi + pushl %esi + movl 16(%ebp), %esi + pushl %ebx + movl %edx, %ebx + jne .L340 + decl %ecx + movl 12(%ebp), %esi + je .L340 + movl 8(%ebp), %esi +.L340: + movl %ebx, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + movl %ebx, %eax + sall $8, %eax + cmpl $0, 24(%ebp) + je .L341 + decl %edi + jne .L341 + addl $8, %eax + addl $8, %esi +.L341: +#APP + movl %fs:(%eax), %ebx + +#NO_APP + cmpl (%esi), %ebx + movl $1, %edx + jne .L345 + addl $4, %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + xorl %edx, %edx + cmpl 4(%esi), %ebx + setne %dl +.L345: + cmpl $2, 20(%ebp) + jne .L346 + testl %edx, %edx + sete %al + movzbl %al, %edx +.L346: + popl %ebx + movl %edx, %eax + popl %esi + popl %edi + popl %ebp + ret + .size CompareTestPatternQW0, .-CompareTestPatternQW0 + .type SetMaxAL_RcvrDly, @function +SetMaxAL_RcvrDly: + pushl %ebp + movl %esp, %ebp + leal 19(%edx), %ecx + movl $20, %edx + pushl %edi + movl %eax, %edi + pushl %esi + movl %ecx, %eax + movl %edx, %esi + xorl %edx, %edx + divl %esi + movl 12(%edi), %esi + movl $3320, %edx + pushl %ebx + orl $2368, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %eax, %ebx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + andb $15, %cl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 6(%ebx), %eax + movb $-4, %dl + sall $4, %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size SetMaxAL_RcvrDly, .-SetMaxAL_RcvrDly + .type SetTargetWTIO, @function +SetTargetWTIO: + pushl %ebp + movl %eax, %edx + movl %esp, %ebp + movl $-1073676266, %ecx + sall $8, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + movl $-67106816, %eax + movb $23, %cl + movl $255, %edx +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size SetTargetWTIO, .-SetTargetWTIO + .type proc_IOCLFLUSH, @function +proc_IOCLFLUSH: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %eax, %ebx + call SetTargetWTIO + movl %ebx, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + sall $8, %ebx + movl %ebx, %eax +#APP + clflush %fs:(%eax) + +#NO_APP + movl $-1073676265, %ecx + xorl %eax, %eax + xorl %edx, %edx +#APP + wrmsr +#NO_APP + popl %ebx + popl %ebp + ret + .size proc_IOCLFLUSH, .-proc_IOCLFLUSH + .type ResetDCTWrPtr, @function +ResetDCTWrPtr: + pushl %ebp + movl $16, %ecx + movl %esp, %ebp + movl $152, %edx + pushl %esi + pushl %ebx + movl %eax, %ebx + movl 12(%eax), %eax + call pci_read_config32_index_wait + movl 12(%ebx), %esi + movl $16, %ecx + movl $152, %edx + pushl %eax + movl %esi, %eax + call pci_write_config32_index_wait + movl 12(%ebx), %eax + movl $48, %ecx + movl $152, %edx + call pci_read_config32_index_wait + movl 12(%ebx), %ebx + movl $48, %ecx + movl $152, %edx + pushl %eax + movl %ebx, %eax + call pci_write_config32_index_wait + popl %esi + popl %eax + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size ResetDCTWrPtr, .-ResetDCTWrPtr + .type SetDQSDelayCSR, @function +SetDQSDelayCSR: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $8, %esp + movl 12(%ebp), %eax + sall $5, %edx + movl %eax, -16(%ebp) + movl %ecx, %eax + shrl $2, %eax + leal 1(%eax,%edx), %eax + movl 8(%ebp), %edx + leal (%eax,%edx,4), %esi + jmp .L358 +.L359: + subl $4, %ebx +.L358: + cmpl $3, %ebx + ja .L359 + movl 12(%edi), %eax + movl %esi, %ecx + movl $152, %edx + sall $3, %ebx + call pci_read_config32_index_wait + movzbl -16(%ebp),%edx + movb %bl, %cl + movl $63, -20(%ebp) + sall %cl, -20(%ebp) + notl -20(%ebp) + andl %eax, -20(%ebp) + sall %cl, %edx + movl 12(%edi), %eax + movl %esi, %ecx + orl -20(%ebp), %edx + movl %edx, 8(%ebp) + movl $152, %edx + popl %ebx + popl %esi + popl %ebx + popl %esi + popl %edi + popl %ebp + jmp pci_write_config32_index_wait + .size SetDQSDelayCSR, .-SetDQSDelayCSR + .type SetDQSDelayAllCSR, @function +SetDQSDelayAllCSR: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl $1, %esi + pushl %ebx + subl $4, %esp + movl %eax, -16(%ebp) + movzbl 8(%ebp),%eax + leal (%ecx,%edx,8), %edx + leal 0(,%edx,4), %edi + movl %eax, %ebx + sall $8, %ebx + orl %eax, %ebx + sall $16, %eax + orl %eax, %ebx + sall $8, %eax + orl %eax, %ebx +.L363: + movl -16(%ebp), %edx + leal (%edi,%esi), %ecx + incl %esi + movl 12(%edx), %eax + movl $152, %edx + pushl %ebx + call pci_write_config32_index_wait + cmpl $3, %esi + popl %eax + jne .L363 + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size SetDQSDelayAllCSR, .-SetDQSDelayAllCSR + .type save_dqs_delay, @function +save_dqs_delay: + imull $18, %eax, %eax + pushl %ebp + movl %esp, %ebp + leal (%ecx,%ecx,8), %ecx + addl %eax, %ecx + movl 12(%ebp), %eax + addl 8(%ebp), %ecx + movb %al, (%ecx,%edx) + popl %ebp + ret + .size save_dqs_delay, .-save_dqs_delay + .type FlushDQSTestPattern_L18, @function +FlushDQSTestPattern_L18: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + leal 896(%eax), %edx + pushl %ebx + leal 640(%eax), %esi + subl $12, %esp + leal 1152(%eax), %ecx + leal 128(%eax), %ebx + movl %ecx, -20(%ebp) + leal 384(%eax), %edi + movl %edx, %ecx + movl %ebx, -24(%ebp) + movl %esi, %ebx + movl -24(%ebp), %eax + movl %edx, -16(%ebp) + movl -20(%ebp), %edx +#APP + clflush %fs:-128(%eax) + clflush %fs:-64(%eax) + clflush %fs:(%eax) + clflush %fs:64(%eax) + clflush %fs:-128(%edi) + clflush %fs:-64(%edi) + clflush %fs:(%edi) + clflush %fs:64(%edi) + clflush %fs:-128(%ebx) + clflush %fs:-64(%ebx) + clflush %fs:(%ebx) + clflush %fs:64(%ebx) + clflush %fs:-128(%ecx) + clflush %fs:-64(%ecx) + clflush %fs:(%ecx) + clflush %fs:64(%ecx) + clflush %fs:-128(%edx) + clflush %fs:-64(%edx) + +#NO_APP + addl $12, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size FlushDQSTestPattern_L18, .-FlushDQSTestPattern_L18 + .type TrainDQSPos, @function +TrainDQSPos: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $268, %esp + movl %eax, -264(%ebp) + xorl %eax, %eax + movl %edx, -268(%ebp) + movl %ecx, -272(%ebp) +.L373: + movl $255, -204(%ebp,%eax,4) + incl %eax + cmpl $48, %eax + jne .L373 + imull $9, 8(%ebp), %eax + xorl %edx, %edx + movl $0, -252(%ebp) + leal 36(,%eax,4), %eax + movl %eax, -236(%ebp) +.L375: + movl -264(%ebp), %ecx + movl -252(%ebp), %ebx + movl (%ecx), %eax + movl 20(%ebp), %ecx + leal (%ebx,%eax,8), %eax + testb $1, 728(%ecx,%eax,4) + je .L376 + movl -264(%ebp), %eax + movl %ebx, %edx + call Get_MCTSysAddr + movl $-1073741568, %ecx + movl %eax, -248(%ebp) + movl -248(%ebp), %edx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + cmpl $1, -272(%ebp) + movl $0, -216(%ebp) + jne .L426 + movl -248(%ebp), %eax + movl $16, %edx + movl -236(%ebp), %ecx + movl 12(%ebp), %ebx + sall $8, %eax +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP +.L426: + movl -216(%ebp), %eax + movl -204(%ebp,%eax,4), %eax + testl %eax, %eax + movl %eax, -208(%ebp) + je .L381 + pushl -216(%ebp) + movl -264(%ebp), %eax + movl -272(%ebp), %ecx + movl -268(%ebp), %edx + call SetDQSDelayAllCSR + cmpl $0, -272(%ebp) + popl %eax + jne .L383 + movl -248(%ebp), %eax + movl $16, %edx + movl -236(%ebp), %ecx + movl 12(%ebp), %ebx + sall $8, %eax +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP +.L383: + movl -248(%ebp), %eax + sall $8, %eax + cmpl $0, 8(%ebp) + movl %eax, -212(%ebp) + leal 640(%eax), %ebx + leal 128(%eax), %esi + leal 384(%eax), %edi + jne .L385 + xorl %eax, %eax + movl %esi, %ecx + movl %edi, %edx +#APP + movl %fs:-128(%ecx), %eax + movl %fs:-64(%ecx), %eax + movl %fs:(%ecx), %eax + movl %fs:64(%ecx), %eax + movl %fs:-128(%edx), %eax + movl %fs:-64(%edx), %eax + movl %fs:(%edx), %eax + movl %fs:64(%edx), %eax + movl %fs:-128(%ebx), %eax + +#NO_APP + movl 12(%ebp), %ebx + movl -212(%ebp), %eax + movl %ebx, -280(%ebp) + movl %eax, -276(%ebp) + jmp .L387 +.L385: + movl -212(%ebp), %ecx + xorl %eax, %eax + movl -212(%ebp), %edx + addl $896, %ecx + addl $1152, %edx +#APP + movl %fs:-128(%esi), %eax + movl %fs:-64(%esi), %eax + movl %fs:(%esi), %eax + movl %fs:64(%esi), %eax + movl %fs:-128(%edi), %eax + movl %fs:-64(%edi), %eax + movl %fs:(%edi), %eax + movl %fs:64(%edi), %eax + movl %fs:-128(%ebx), %eax + movl %fs:-64(%ebx), %eax + movl %fs:(%ebx), %eax + movl %fs:64(%ebx), %eax + movl %fs:-128(%ecx), %eax + movl %fs:-64(%ecx), %eax + movl %fs:(%ecx), %eax + movl %fs:64(%ecx), %eax + movl %fs:-128(%edx), %eax + movl %fs:-64(%edx), %eax + +#NO_APP + movl 12(%ebp), %edx + movl -212(%ebp), %ecx + cmpl $0, -268(%ebp) + movl %edx, -280(%ebp) + movl %ecx, -276(%ebp) + je .L387 + movl %ecx, %ebx + addl $8, %edx + addl $8, %ebx + movl %ebx, -276(%ebp) + movl %edx, -280(%ebp) +.L387: + movl $255, -220(%ebp) + xorl %edi, %edi + movl $0, -224(%ebp) +.L390: + movl -276(%ebp), %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + movl -280(%ebp), %eax + xorl %esi, %esi + movl %ebx, -232(%ebp) + movl (%eax), %eax + movl %eax, -228(%ebp) +.L391: + movl -232(%ebp), %edx + movl %esi, %ecx + movl -228(%ebp), %eax + shrl %cl, %edx + shrl %cl, %eax + cmpb %dl, %al + je .L392 + movl $-2, %eax + movl %edi, %ecx + roll %cl, %eax + andl %eax, -220(%ebp) +.L392: + incl %edi + addl $8, %esi + andl $7, %edi + cmpl $32, %esi + jne .L391 + testl %edi, %edi + jne .L395 + cmpl $1, 8(%ebp) + jne .L395 + addl $8, -276(%ebp) + addl $8, -280(%ebp) +.L395: + incl -224(%ebp) + cmpl $144, -224(%ebp) + je .L398 + addl $4, -276(%ebp) + addl $4, -280(%ebp) + jmp .L390 +.L398: + movl -248(%ebp), %eax + call SetTargetWTIO + cmpl $0, 8(%ebp) + jne .L400 + movl -212(%ebp), %ebx + movl -212(%ebp), %ecx + movl -212(%ebp), %eax + addl $640, %ebx + subl $-128, %ecx + addl $384, %eax +#APP + clflush %fs:-128(%ecx) + clflush %fs:-64(%ecx) + clflush %fs:(%ecx) + clflush %fs:64(%ecx) + clflush %fs:-128(%eax) + clflush %fs:-64(%eax) + clflush %fs:(%eax) + clflush %fs:64(%eax) + clflush %fs:-128(%ebx) + +#NO_APP + jmp .L402 +.L400: + movl -212(%ebp), %eax + call FlushDQSTestPattern_L18 +.L402: + movl -220(%ebp), %ebx + movl $-1073676265, %ecx + andl %ebx, -208(%ebp) + movl -208(%ebp), %edx + movl -216(%ebp), %eax + movl %edx, -204(%ebp,%eax,4) + xorl %eax, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP +.L381: + incl -216(%ebp) + cmpl $48, -216(%ebp) + jne .L426 + movl $1, %edx +.L376: + incl -252(%ebp) + cmpl $8, -252(%ebp) + jne .L375 + testl %edx, %edx + movl $0, -256(%ebp) + je .L407 + jmp .L405 +.L408: + movb -260(%ebp), %cl + movl $1, %eax + movl -276(%ebp), %edx + sall %cl, %eax + testl %eax, -204(%ebp,%edx,4) + jne .L409 + movl $1, -244(%ebp) + jmp .L411 +.L409: + cmpl $1, -244(%ebp) + jne .L412 + movl -276(%ebp), %esi + movl $0, -244(%ebp) + movl %esi, -240(%ebp) + jmp .L411 +.L412: + movl -276(%ebp), %edx + movl %edi, %eax + subl -240(%ebp), %edx + subl %ebx, %eax + movl -276(%ebp), %esi + movl $0, -244(%ebp) + cmpl %eax, %edx + jbe .L411 + movl -240(%ebp), %ebx + movl %esi, %edi +.L411: + incl -276(%ebp) + cmpl $48, -276(%ebp) + jne .L408 + testl %esi, %esi + jne .L417 + orl $14, -256(%ebp) + jmp .L419 +.L417: + movl %edi, %edx + subl %ebx, %edx + cmpl $2, %edx + ja .L420 + orl $15, -256(%ebp) + jmp .L419 +.L420: + movl %edx, %eax + movl -260(%ebp), %ecx + andl $1, %eax + cmpl $1, %eax + movl -264(%ebp), %eax + sbbl $-1, %ebx + shrl %edx + addl %edx, %ebx + movl -268(%ebp), %edx + pushl %ebx + movzbl %bl, %ebx + pushl -272(%ebp) + call SetDQSDelayCSR + movl -272(%ebp), %ecx + pushl %ebx + movl -260(%ebp), %edx + pushl 16(%ebp) + movl -268(%ebp), %eax + call save_dqs_delay + addl $16, %esp +.L419: + incl -260(%ebp) + cmpl $8, -260(%ebp) + je .L407 + jmp .L424 +.L405: + movl $0, -240(%ebp) + movl $0, -260(%ebp) + movl $0, -256(%ebp) +.L424: + xorl %edi, %edi + xorl %ebx, %ebx + xorl %esi, %esi + movl $0, -276(%ebp) + movl $1, -244(%ebp) + jmp .L408 +.L407: + movl -256(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size TrainDQSPos, .-TrainDQSPos + .type get_dqs_delay, @function +get_dqs_delay: + imull $18, %eax, %eax + pushl %ebp + movl %esp, %ebp + leal (%ecx,%ecx,8), %ecx + addl %eax, %ecx + addl 8(%ebp), %ecx + popl %ebp + movzbl (%ecx,%edx), %eax + ret + .size get_dqs_delay, .-get_dqs_delay +.globl read_nb_cfg_54 + .type read_nb_cfg_54, @function +read_nb_cfg_54: + pushl %ebp + movl $-1073676257, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + shrl $22, %edx + popl %ebp + andl $1, %edx + movl %edx, %eax + ret + .size read_nb_cfg_54, .-read_nb_cfg_54 +.globl get_node_core_id + .type get_node_core_id, @function +get_node_core_id: + pushl %ebp + movl %esp, %ebp + cmpl $0, 12(%ebp) + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + je .L443 + movl $1, %eax +#APP + cpuid +#NO_APP + shrl $24, %ebx + movl %ebx, %edx + movl %ebx, %eax + andl $15, %edx + andl $1, %eax + shrl %edx + jmp .L445 +.L443: + movl $1, %eax +#APP + cpuid +#NO_APP + shrl $24, %ebx + movl %ebx, %eax + movl %ebx, %edx + andl $15, %eax + andl $7, %edx + shrl $3, %eax +.L445: + movl %eax, 4(%esi) + movl %esi, %eax + movl %edx, (%esi) + popl %ebx + popl %esi + popl %ebp + ret $4 + .size get_node_core_id, .-get_node_core_id + .type clear_init_ram, @function +clear_init_ram: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + movl $516096, %ecx + pushl %edi + xorl %edi, %edi +#APP + cld + rep; stosl + +#NO_APP + popl %edi + popl %ebp + ret + .size clear_init_ram, .-clear_init_ram + .type set_init_ram_access, @function +set_init_ram_access: + pushl %ebp + movl $512, %ecx + movl %esp, %ebp + movl $6, %eax + xorl %edx, %edx +#APP + wrmsr +#NO_APP + movl $-2095104, %eax + movb $1, %cl + movb $-1, %dl +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size set_init_ram_access, .-set_init_ram_access + .type for_each_ap, @function +for_each_ap: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl %edx, -32(%ebp) + movl %ecx, -36(%ebp) + movl %eax, -28(%ebp) + call get_nodes + xorl %ecx, %ecx + movl $1, %edx + movl %eax, -24(%ebp) + movl $399, %eax + call read_option + testl %eax, %eax + setne %al + xorl %edi, %edi + movzbl %al, %eax + movl %eax, -40(%ebp) + call read_nb_cfg_54 + movl %eax, -20(%ebp) + jmp .L452 +.L453: + leal 24(%edi), %ecx + movl $3320, %edx + andl $31, %ecx + sall $11, %ecx + orb $3, %ch + movl %ecx, %eax + orl $-2147483416, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $12, %ebx + andl $3, %ebx + cmpl $0, -20(%ebp) + je .L454 + testl %ebx, %ebx + jne .L454 + orl $-2147483396, %ecx + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + andl $1048320, %eax + cmpl $265984, %eax + sete %al + movzbl %al, %eax + testl %eax, %eax + je .L454 + movb $1, %bl + jmp .L458 +.L454: + xorl %eax, %eax +.L458: + orl -40(%ebp), %eax + jne .L459 + cmpl $1, -32(%ebp) + movl %ebx, -16(%ebp) + jne .L461 +.L459: + movl $0, -16(%ebp) +.L461: + cmpl $2, -32(%ebp) + sete %al + movzbl %al, %esi + leal 1(%ebx), %eax + movl %edi, %ebx + imull %eax, %ebx + jmp .L462 +.L463: + cmpl $0, -20(%ebp) + movl %edi, %edx + movl $8, %eax + je .L466 + movl %ebx, %edx + movb $1, %al +.L466: + imull %esi, %eax + leal (%edx,%eax), %eax + cmpl -28(%ebp), %eax + je .L467 + pushl %edx + pushl %edx + pushl 8(%ebp) + pushl %eax + call *-36(%ebp) + addl $16, %esp +.L467: + incl %esi +.L462: + cmpl -16(%ebp), %esi + jbe .L463 + incl %edi +.L452: + cmpl -24(%ebp), %edi + jne .L453 + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size for_each_ap, .-for_each_ap + .type lapic_remote_read, @function +lapic_remote_read: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %eax, %ebx +.L473: + movl -18873600, %eax + testb $16, %ah + jne .L473 + sarl $4, %edx + orb $3, %dh + sall $24, %ebx + movl %ebx, -18873584 + movl %edx, -18873600 + xorl %edx, %edx +.L475: + movl -18873600, %eax + testb $16, %ah + je .L476 + cmpl $1000, %edx + je .L476 + incl %edx + jmp .L475 +.L476: + xorl %edx, %edx +.L479: + movl -18873600, %eax + andl $196608, %eax + cmpl $65536, %eax + jne .L480 + cmpl $1000, %edx + je .L482 + incl %edx + jmp .L479 +.L480: + cmpl $131072, %eax + jne .L482 + movl -18874176, %eax + movl %eax, (%ecx) + xorl %eax, %eax + jmp .L485 +.L482: + orl $-1, %eax +.L485: + popl %ebx + popl %ebp + ret + .size lapic_remote_read, .-lapic_remote_read + .type wait_cpu_state, @function +wait_cpu_state: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl %edx, %esi + pushl %ebx + movl $1999999, %ebx + subl $16, %esp + movl $0, -16(%ebp) +.L490: + leal -16(%ebp), %ecx + movl $896, %edx + movl %edi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L491 + movzbl -16(%ebp),%eax + cmpl %esi, %eax + jne .L491 + xorl %eax, %eax + jmp .L494 +.L491: + decl %ebx + jne .L490 + movl -16(%ebp), %eax + testl %eax, %eax + jne .L494 + movb $1, %al +.L494: + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size wait_cpu_state, .-wait_cpu_state + .type store_ap_apicid, @function +store_ap_apicid: + pushl %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + movl 8(%ebp), %ecx + movl (%eax), %edx + movl %ecx, 4(%eax,%edx,4) + incl %edx + movl %edx, (%eax) + popl %ebp + ret + .size store_ap_apicid, .-store_ap_apicid +.globl do_printk + .type do_printk, @function +do_printk: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + subl $24, %esp + cmpl $7, 8(%ebp) + jg .L505 + leal 16(%ebp), %eax + pushl %ecx + pushl %eax + pushl 12(%ebp) + movl %eax, -4(%ebp) + pushl $console_tx_byte + call vtxprintf + addl $16, %esp +.L505: + leave + ret + .size do_printk, .-do_printk + .section .rom.data.str1.1 +.LC3: + .string "wrong apicid, we want change %x, but it is %x\r\n" +.LC4: + .string "set vid failed for apicid =" +.LC5: + .string "%s" +.LC6: + .string "%02x" +.LC7: + .string "\r\n" +.LC8: + .string "set fid failed for apicid =" + .section .rom.text + .type set_fidvid, @function +set_fidvid: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %edx, %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl %eax, -32(%ebp) + movl -18874336, %eax + movl %ecx, -36(%ebp) + shrl $24, %eax + cmpl %eax, -32(%ebp) + je .L508 + pushl %eax + pushl -32(%ebp) + pushl $.LC3 + jmp .L544 +.L508: + movl %edx, %eax + movl $-1073676222, %ecx + shrl $8, %eax + shrl $16, %edx + andl $63, %eax + andl $63, %edx + movl %eax, -24(%ebp) + movl %edx, -28(%ebp) +#APP + rdmsr +#NO_APP + movl %eax, %esi + movl %eax, %ecx + movl %edx, %eax + andl $63, %esi + andl $63, %eax + movl %edx, %ebx + cmpl -28(%ebp), %eax + jne .L512 + cmpl -24(%ebp), %esi + je .L510 +.L512: + movl %ecx, %edi + shrl $16, %edi + andl $63, %edi + cmpl $41, %edi + jbe .L513 + shrl $8, %ecx + andl $63, %ecx + leal 10(%ecx), %edi + cmpl $41, %edi + jbe .L513 + movl $12, %edi +.L513: + shrl $8, %ebx + movl %esi, %eax + orl $65536, %eax + andl $16128, %ebx + orl %eax, %ebx + movl $-1073676223, %ecx + movl $1, %edx + movl %ebx, %eax +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L516: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + movl %edx, %ecx + jns .L517 + incl %ebx + cmpl $100000, %ebx + jne .L516 +.L517: + andl $63, %ecx + movl %ecx, -16(%ebp) + movl $8, -20(%ebp) + jmp .L519 +.L520: + cmpl $8, %esi + jbe .L521 + cmpl $8, -24(%ebp) + jbe .L521 + cmpl -24(%ebp), %esi + leal 2(%esi), %edx + jb .L525 + leal -2(%esi), %edx + jmp .L525 +.L521: + movl %esi, %eax + movl -24(%ebp), %edx + shrl %eax + imull $12, %eax, %eax + shrl %edx + movzbl next_fid_a.6719(%eax,%edx), %eax + testl %eax, %eax + jle .L526 + leal -8(%eax,%eax), %edx +.L525: + cmpl %edi, %edx + ja .L526 + movl -16(%ebp), %eax + orl $65536, %edx + movl $-1073676223, %ecx + sall $8, %eax + orl %edx, %eax + movl $20000, %edx +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L529: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + jns .L530 + incl %ebx + cmpl $100000, %ebx + jne .L529 +.L530: + decl -20(%ebp) + movl %eax, %esi + andl $63, %esi +.L519: + cmpl -24(%ebp), %esi + je .L526 + cmpl $0, -20(%ebp) + jne .L520 +.L526: + movl -28(%ebp), %eax + movl $-1073676223, %ecx + movl $1, %edx + sall $8, %eax + orl $65536, %eax + orl %esi, %eax +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L533: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + movl %edx, %ecx + jns .L534 + incl %ebx + cmpl $100000, %ebx + jne .L533 +.L534: + movl %ecx, %edx + movl %esi, %eax + andl $63, %edx + movl %edx, %edi + sall $16, %edi + sall $8, %eax + orl %eax, %edi + cmpl $0, -36(%ebp) + je .L510 + cmpl %edx, -28(%ebp) + je .L537 + pushl %eax + pushl $.LC4 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -32(%ebp) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L537: + cmpl %esi, -24(%ebp) + je .L510 + pushl %ebx + pushl $.LC8 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -32(%ebp) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 +.L544: + pushl $3 + call do_printk + addl $16, %esp +.L510: + leal -12(%ebp), %esp + movl %edi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size set_fidvid, .-set_fidvid + .section .rom.data.str1.1 +.LC9: + .string "%s%02x" + .section .rom.text + .type print_initcpu8_nocr, @function +print_initcpu8_nocr: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC9 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_initcpu8_nocr, .-print_initcpu8_nocr + .section .rom.data.str1.1 +.LC10: + .string "*" +.LC11: + .string "%s%08x\r\n" +.LC12: + .string " " + .section .rom.text + .type wait_ap_started, @function +wait_ap_started: + pushl %ebp + movl $51, %edx + movl %esp, %ebp + pushl %esi + pushl %ebx + movl 8(%ebp), %ebx + movl %ebx, %eax + call wait_cpu_state + testl %eax, %eax + movl %eax, %esi + je .L548 + movl %ebx, %edx + movl $.LC10, %eax + call print_initcpu8_nocr + pushl %esi + pushl $.LC10 + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret +.L548: + leal -8(%ebp), %esp + movl %ebx, %edx + popl %ebx + movl $.LC12, %eax + popl %esi + popl %ebp + jmp print_initcpu8_nocr + .size wait_ap_started, .-wait_ap_started + .section .rom.data.str1.1 +.LC13: + .string "%s%02x\r\n" + .section .rom.text + .type print_initcpu8, @function +print_initcpu8: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC13 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_initcpu8, .-print_initcpu8 + .type print_debug_pcar, @function +print_debug_pcar: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_debug_pcar, .-print_debug_pcar + .type print_debug_cp_run, @function +print_debug_cp_run: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_debug_cp_run, .-print_debug_cp_run + .section .rom.data.str1.1 +.LC14: + .string "mcp55_num:" + .section .rom.text + .type mcp55_early_setup_x, @function +mcp55_early_setup_x: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + xorl %esi, %esi + pushl %ebx + xorl %ebx, %ebx + subl $112, %esp + pushl $16 + pushl $C.181.6395 + leal -76(%ebp), %eax + pushl %eax + call memcpy + addl $16, %esp +.L559: + xorl %ecx, %ecx +.L560: + movl %ebx, %eax + movl $3320, %edx + sall $20, %eax + movl %eax, -112(%ebp) + movl %ecx, %eax + andl $31, %eax + sall $15, %eax + orl %eax, -112(%ebp) + shrl $4, -112(%ebp) + orl $-2147483648, -112(%ebp) + movl -112(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57217246, %eax + jne .L561 + movl %ebx, -28(%ebp) + movl %ecx, -44(%ebp) + movl %edi, -60(%ebp) + movl $1, -108(%ebp) + jmp .L563 +.L561: + incl %ecx + cmpl $32, %ecx + jne .L560 + incl %esi + addl $64, %ebx + addl $16384, %edi + cmpl $4, %esi + jne .L559 + movl $0, -108(%ebp) +.L563: + pushl %ebx + xorl %ebx, %ebx + pushl $.LC14 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl -108(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L566 +.L567: + movl -28(%ebp,%ebx,4), %ecx + movl $9, %edx + movl -44(%ebp,%ebx,4), %eax + pushl -60(%ebp,%ebx,4) + incl %ebx + andl $4095, %ecx + andl $31, %eax + sall $15, %eax + sall $20, %ecx + orl %eax, %ecx + movl $ctrl_devport_conf.6240, %eax + call setup_resource_map_offset + popl %ecx +.L566: + cmpl -108(%ebp), %ebx + jne .L567 + movl $0, -104(%ebp) + jmp .L569 +.L570: + movl -104(%ebp), %eax + movl -60(%ebp,%eax,4), %edx + movl -76(%ebp,%eax,4), %esi + movl -44(%ebp,%eax,4), %eax + movl %edx, -100(%ebp) + addl $10240, %edx + movl %edx, -88(%ebp) + movl -104(%ebp), %edx + movl %eax, %ebx + incl %ebx + movl %eax, -84(%ebp) + andl $31, %ebx + movl -28(%ebp,%edx,4), %edx + sall $15, %ebx + movl %edx, -80(%ebp) + sall $20, %edx + movl %edx, %eax + orb $16, %ah + orl %eax, %ebx + shrl $4, %ebx + orl $-2147483420, %ebx + movl %edx, -92(%ebp) + movl %ebx, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1008, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edi, %edi + movl $0, -96(%ebp) +.L571: + movl -88(%ebp), %ecx + leal 204(%ecx), %edx +#APP + inl %dx, %eax +#NO_APP + andb $249, %ah + orl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 48(%ecx), %edx +#APP + inl %dx, %eax +#NO_APP + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP +.L572: +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L572 + incl -96(%ebp) + addl $512, %edi + cmpl $3, -96(%ebp) + jne .L571 + movl -88(%ebp), %edx + addw $204, %dx +#APP + inl %dx, %eax +#NO_APP + andl $-369, %eax + orb $1, %ah + sall $4, %esi + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edx, %edx +.L575: + movb $1, %al +#APP + outb %al, $128 +#NO_APP + incl %edx + cmpl $32768, %edx + jne .L575 + movl $3320, %edi + movl %ebx, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1009, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edx, %edx +.L577: + movb $-24, %al +#APP + outb %al, $128 +#NO_APP + incl %edx + cmpl $32768, %edx + jne .L577 + movl -84(%ebp), %ebx + movw $160, %dx + movl $ctrl_conf_1.6337, %eax + pushl -100(%ebp) + xorl %esi, %esi + andl $31, %ebx + sall $15, %ebx + orl -92(%ebp), %ebx + movl %ebx, %ecx + call setup_resource_map_x_offset + popl %edx +.L579: + movl %esi, %ecx + movl $ctrl_conf_1_1.6338, %eax + pushl -100(%ebp) + andl $7, %ecx + sall $12, %ecx + movl $36, %edx + orl %ebx, %ecx + incl %esi + call setup_resource_map_x_offset + cmpl $3, %esi + popl %eax + jne .L579 + cmpl $0, -80(%ebp) + jne .L581 + pushl -100(%ebp) + movl $ctrl_conf_mcp55_only.6339, %eax + movl %ebx, %ecx + movl $132, %edx + call setup_resource_map_x_offset + cmpl $1, -108(%ebp) + popl %eax + jbe .L581 + pushl -100(%ebp) + movl $ctrl_conf_master_only.6340, %eax + movl %ebx, %ecx + movl $8, %edx + call setup_resource_map_x_offset + popl %eax +.L581: + pushl -100(%ebp) + movl $ctrl_conf_2.6341, %eax + movl %ebx, %ecx + movl $28, %edx + call setup_resource_map_x_offset + incl -104(%ebp) + popl %eax +.L569: + movl -108(%ebp), %eax + cmpl %eax, -104(%ebp) + jne .L570 + xorl %ebx, %ebx + jmp .L585 +.L586: + movl -28(%ebp,%ebx,4), %ecx + movl $9, %edx + movl -44(%ebp,%ebx,4), %eax + pushl -60(%ebp,%ebx,4) + incl %ebx + andl $4095, %ecx + andl $31, %eax + sall $15, %eax + sall $20, %ecx + orl %eax, %ecx + movl $ctrl_devport_conf_clear.6265, %eax + call setup_resource_map_offset + popl %eax +.L585: + cmpl -108(%ebp), %ebx + jne .L586 + leal -12(%ebp), %esp + xorl %eax, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size mcp55_early_setup_x, .-mcp55_early_setup_x + .section .rom.data.str1.1 +.LC15: + .string "No memory!!\r\n" + .section .rom.text +.globl sdram_no_memory + .type sdram_no_memory, @function +sdram_no_memory: + pushl %ebp + movl %esp, %ebp + subl $12, %esp + pushl $.LC15 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L604: +#APP + hlt +#NO_APP + jmp .L604 + .size sdram_no_memory, .-sdram_no_memory + .type print_debug_sdram_8, @function +print_debug_sdram_8: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %edx, %ebx + subl $8, %esp + pushl %eax + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + movl -4(%ebp), %ebx + leave + ret + .size print_debug_sdram_8, .-print_debug_sdram_8 + .section .rom.data.str1.1 +.LC16: + .string " CTLRMaxDelay=%02x" + .section .rom.text + .type train_DqsRcvrEn, @function +train_DqsRcvrEn: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + pushl %ebx + subl $380, %esp + movl (%eax), %eax + movl %edx, -380(%ebp) + movl %ecx, -384(%ebp) + movl %eax, %edx + imull $48, %eax, %eax + sall $4, %edx + leal 1304(%ecx,%edx), %edx + movl %edx, -320(%ebp) + movb 51(%eax,%ecx), %al + cmpl $1, -380(%ebp) + movb %al, -305(%ebp) + movzbl %al, %eax + movl %eax, -376(%ebp) + jne .L609 + movl $1, %ebx +.L611: + movl 12(%edi), %eax + movl %ebx, %ecx + movl $152, %edx + pushl $0 + call pci_write_config32_index_wait + movl 12(%edi), %eax + leal 32(%ebx), %ecx + pushl $0 + movl $152, %edx + incl %ebx + call pci_write_config32_index_wait + cmpl $4, %ebx + popl %eax + popl %edx + jne .L611 + movb $5, %bl +.L613: + movl 12(%edi), %eax + movl %ebx, %ecx + movl $152, %edx + pushl $791621423 + call pci_write_config32_index_wait + movl 12(%edi), %eax + leal 32(%ebx), %ecx + pushl $791621423 + movl $152, %edx + incl %ebx + call pci_write_config32_index_wait + cmpl $8, %ebx + popl %esi + popl %eax + jne .L613 +.L609: +#APP + movl %cr4, %eax +#NO_APP + orb $2, %ah +#APP + movl %eax, %cr4 +#NO_APP + call set_wrap32dis + movl 12(%edi), %esi + movl $3320, %edx + shrl $4, %esi + movl %esi, %ecx + andl $268435452, %ecx + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -296(%ebp) + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -296(%ebp), %eax + movl %ebx, %edx + andl $-524289, %eax +#APP + outl %eax, %dx +#NO_APP + cmpl $1, -380(%ebp) + jne .L614 + movl %esi, %ecx + movb $-8, %dl + andl $268435452, %ecx + orl $-2147483528, %ecx + movl %ecx, -388(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + movl -388(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $262144, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP +.L614: + movl %esi, %eax + movl $3320, %edx + andl $268435452, %eax + orl $-2147483500, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl $-1073676222, %ecx + andl $7, %ebx +#APP + rdmsr +#NO_APP + andl $63, %eax + shrl %eax + cmpl $12, %eax + jle .L616 + movzwl T1000_a.5194(%ebx,%ebx), %eax + jmp .L618 +.L616: + leal (%ebx,%eax,4), %eax + movzwl TT_a.5195(%eax,%eax), %eax +.L618: + leal -268(%ebp), %ecx + xorl %edx, %edx + andl $-16, %ecx + movzwl %ax, %eax + movl %ecx, -312(%ebp) + subl $-128, %ecx + cmpl $1, -380(%ebp) + movl %eax, -336(%ebp) + movl %ecx, -316(%ebp) + jne .L623 +.L621: + movl TestPattern0.5229(,%edx,4), %eax + movl -312(%ebp), %ecx + movl %eax, (%ecx,%edx,4) + movl TestPattern1.5230(,%edx,4), %eax + movl %eax, 128(%ecx,%edx,4) + incl %edx + cmpl $16, %edx + je .L622 + jmp .L621 +.L623: + movl TestPattern2.5231(,%edx,4), %eax + movl -312(%ebp), %ecx + movl %eax, (%ecx,%edx,4) + movl %eax, 128(%ecx,%edx,4) + incl %edx + cmpl $16, %edx + jne .L623 +.L622: + imull $48, (%edi), %eax + movl -384(%ebp), %edx + movl $0, -372(%ebp) + movl 8(%eax,%edx), %eax + testb $15, %al + jne .L626 + testb $-16, %al + setne %al + movzbl %al, %eax + movl %eax, -372(%ebp) +.L626: + movl -372(%ebp), %ecx + movl $0, -328(%ebp) + movl $0, -332(%ebp) + movl $0, -292(%ebp) + sall $3, %ecx + movl %ecx, -300(%ebp) + movl $0, -364(%ebp) + jmp .L627 +.L628: + movl -324(%ebp), %eax + shrl %eax + cmpb $0, -305(%ebp) + leal (%eax,%eax,2), %eax + leal 16(%eax), %edx + movl %edx, -368(%ebp) + je .L629 + cmpl $0, -372(%ebp) + je .L631 + movl 12(%edi), %eax + movl %edx, %ecx + movl $152, %edx + call pci_read_config32_index_wait + andl $255, %eax + movl %eax, -364(%ebp) + jmp .L631 +.L629: + cmpl $0, -372(%ebp) + je .L631 + addl $48, %eax + movl %eax, -368(%ebp) +.L631: + movl (%edi), %eax + movl -324(%ebp), %ecx + movl -384(%ebp), %edx + leal 0(,%eax,8), %ebx + leal (%ebx,%ecx), %eax + testb $1, 728(%edx,%eax,4) + je .L634 + pushl %edx + movl -372(%ebp), %edx + movl %edi, %eax + call Get_RcvrSysAddr + movl -384(%ebp), %edx + popl %ecx + movl -304(%ebp), %ecx + movl %eax, -356(%ebp) + addl $16384, %eax + movl %eax, -288(%ebp) + leal (%ebx,%ecx), %eax + testb $1, 728(%edx,%eax,4) + je .L636 + pushl %edx + movl -372(%ebp), %edx + movl %edi, %eax + call Get_RcvrSysAddr + movl -312(%ebp), %ecx + popl %edx + xorl %edx, %edx + pushl -316(%ebp) + movl %eax, -360(%ebp) + addl $16384, %eax + movl %eax, -292(%ebp) + movl -356(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + movl $1, %edx + pushl -316(%ebp) + movl -288(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + xorl %edx, %edx + pushl -316(%ebp) + movl -360(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + movl $1, %edx + pushl -316(%ebp) + movl -292(%ebp), %eax + call Write1LTestPattern + addl $16, %esp + movl $1, -344(%ebp) +.L638: + xorl %esi, %esi + cmpl $1, -380(%ebp) + je .L641 + movl -320(%ebp), %eax + movl -300(%ebp), %ecx + addl -304(%ebp), %eax + movzbl -1(%ecx,%eax), %esi +.L641: + movl $1, -340(%ebp) + jmp .L642 +.L643: + testl $1, %esi + movl $1, -348(%ebp) + movl $0, -352(%ebp) + jne .L646 + movl $0, -348(%ebp) + movl $1, -352(%ebp) +.L646: + movl 12(%edi), %eax + movl $152, %edx + movl -368(%ebp), %ecx + pushl %esi + call pci_write_config32_index_wait + cmpb $0, -305(%ebp) + popl %eax + je .L647 + movl -368(%ebp), %ecx + movl $152, %edx + movl 12(%edi), %eax + pushl %esi + addl $32, %ecx + call pci_write_config32_index_wait + popl %eax +.L647: + movl %esi, %edx + movl %edi, %eax + call SetMaxAL_RcvrDly + movl -356(%ebp), %eax + call Read1LTestPattern + movl -348(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -356(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5231 + pushl $TestPattern1.5230 + pushl $TestPattern0.5229 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -356(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + movl -288(%ebp), %eax + call Read1LTestPattern + movl -352(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -288(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5231 + pushl $TestPattern1.5230 + pushl $TestPattern0.5229 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -288(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + cmpl $0, -344(%ebp) + je .L652 + movl -360(%ebp), %eax + call Read1LTestPattern + movl -348(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -360(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5231 + pushl $TestPattern1.5230 + pushl $TestPattern0.5229 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -360(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + movl -292(%ebp), %eax + call Read1LTestPattern + movl -352(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -292(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5231 + pushl $TestPattern1.5230 + pushl $TestPattern0.5229 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -292(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + je .L652 +.L649: + movl $1, -340(%ebp) +.L655: + movl -288(%ebp), %eax + incl %esi + movl -356(%ebp), %edx + movl -360(%ebp), %ecx + movl %eax, -356(%ebp) + movl -292(%ebp), %eax + movl %edx, -288(%ebp) + movl %ecx, -292(%ebp) + movl %eax, -360(%ebp) +.L642: + cmpl $174, %esi + jbe .L643 + jmp .L684 +.L657: + cmpl $174, %esi + jbe .L658 +.L659: + orl $13, -328(%ebp) + movl $174, %esi +.L658: + cmpl $2, -380(%ebp) + jne .L660 + movl -320(%ebp), %eax + movl -300(%ebp), %edx + addl -304(%ebp), %eax + movzbl -1(%edx,%eax), %eax + addl %eax, %esi + shrl %esi +.L660: + movl -320(%ebp), %eax + movl %esi, %ecx + movl -300(%ebp), %edx + addl -304(%ebp), %eax + movb %cl, -1(%edx,%eax) + movl 12(%edi), %eax + movl $152, %edx + movl -368(%ebp), %ecx + pushl %esi + call pci_write_config32_index_wait + cmpb $0, -305(%ebp) + popl %eax + je .L662 + movl -368(%ebp), %ecx + movl $152, %edx + movl 12(%edi), %eax + pushl %esi + addl $32, %ecx + call pci_write_config32_index_wait + cmpl $0, -372(%ebp) + popl %ebx + je .L662 + movl 12(%edi), %eax + movl $152, %edx + pushl -364(%ebp) + movl -368(%ebp), %ecx + call pci_write_config32_index_wait + cmpl -364(%ebp), %esi + popl %ecx + jbe .L665 + movl %esi, %eax + subl -364(%ebp), %eax + jmp .L667 +.L665: + movl -364(%ebp), %eax + subl %esi, %eax +.L667: + imull $50, %eax, %eax + cmpl -336(%ebp), %eax + jbe .L662 + orl $12, -328(%ebp) +.L662: + cmpl -332(%ebp), %esi + jbe .L634 + movl %esi, -332(%ebp) +.L634: + addl $2, -324(%ebp) + addl $2, -304(%ebp) +.L670: + cmpl $7, -324(%ebp) + ja .L672 + cmpl $0, -328(%ebp) + je .L628 +.L672: + incl -372(%ebp) + addl $8, -300(%ebp) +.L627: + cmpl $1, -372(%ebp) + ja .L673 + cmpl $0, -328(%ebp) + jne .L673 + movl $0, -324(%ebp) + movl $1, -304(%ebp) + jmp .L670 +.L673: + movl -332(%ebp), %edx + movl %edi, %eax + call SetMaxAL_RcvrDly + movl %edi, %eax + call ResetDCTWrPtr + movl 12(%edi), %ebx + movl $3320, %edx + shrl $4, %ebx + movl %ebx, %ecx + andl $268435452, %ecx + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $524288, -296(%ebp) + andl $-524289, %edi + orl -296(%ebp), %edi + movl %esi, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + cmpl $1, -380(%ebp) + jne .L675 + andl $268435452, %ebx + movl $3320, %edi + orl $-2147483528, %ebx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-262145, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L675 +.L636: + pushl -316(%ebp) + xorl %edx, %edx + movl -312(%ebp), %ecx + movl -356(%ebp), %eax + call Write1LTestPattern + movl -288(%ebp), %eax + movl $1, %edx + pushl -316(%ebp) + movl -312(%ebp), %ecx + call Write1LTestPattern + popl %eax + popl %edx + movl $0, -344(%ebp) + jmp .L638 +.L652: + cmpl $1, -340(%ebp) + je .L657 + movl $0, -340(%ebp) + jmp .L655 +.L684: + movl $11, -328(%ebp) + jmp .L659 +.L675: + call clear_wrap32dis +#APP + movl %cr4, %eax +#NO_APP + andb $253, %ah +#APP + movl %eax, %cr4 +#NO_APP + pushl %esi + pushl -332(%ebp) + pushl $.LC16 + pushl $7 + call do_printk + addl $16, %esp + xorl %eax, %eax + cmpl $174, -332(%ebp) + sete %al + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size train_DqsRcvrEn, .-train_DqsRcvrEn + .section .rom.data.str1.1 +.LC17: + .string "disabling dimm" + .section .rom.text + .type disable_dimm, @function +disable_dimm: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + subl $16, %esp + pushl $.LC17 + pushl $.LC5 + pushl $7 + movl %edx, -20(%ebp) + movl %ecx, -24(%ebp) + call do_printk + addl $12, %esp + pushl -20(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl -24(%ebp), %eax + addl $16, %esp + movl (%eax), %eax + testb $15, %al + movl %eax, -16(%ebp) + jne .L686 + testb $-16, %al + je .L686 + movl -20(%ebp), %esi + movl 12(%ebx), %edi + movl $3320, %ebx + movl %ebx, %edx + addl %esi, %esi + shrl $4, %edi + leal 80(,%esi,4), %eax + orl %edi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal 84(,%esi,4), %esi + orl %esi, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax + jmp .L692 +.L686: + movl 12(%ebx), %esi + movl $3320, %ebx + movl -20(%ebp), %ecx + movl %ebx, %edx + shrl $4, %esi + leal 64(,%ecx,8), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -20(%ebp), %edi + movl %ebx, %edx + addl %edi, %edi + leal 68(,%edi,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + imull $5, -20(%ebp), %eax + movl -24(%ebp), %ecx + cmpb $4, 8(%eax,%ecx) + jne .L689 + leal 80(,%edi,4), %eax + movl %ebx, %edx + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal 84(,%edi,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +.L692: + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP +.L689: + movb -20(%ebp), %cl + movl $-2, %eax + movl -24(%ebp), %edx + roll %cl, %eax + andl -16(%ebp), %eax + movl %eax, (%edx) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size disable_dimm, .-disable_dimm + .type print_raminit, @function +print_raminit: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_raminit, .-print_raminit + .type print_linkn_in, @function +print_linkn_in: + pushl %ebp + movzbl %dl, %edx + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC13 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_linkn_in, .-print_linkn_in + .section .rom.data.str1.1 +.LC18: + .string "SBLink=" +.LC19: + .string "NC node|link=" +.LC20: + .string "\tbusn=" +.LC21: + .string "Detected error on Hypertransport Link\n" +.LC22: + .string "udev=" +.LC23: + .string "%08x" +.LC24: + .string "\tupos=" +.LC25: + .string "\tuoffs=" +.LC26: + .string "\tHT link capability not found\r\n" + .section .rom.text + .type ht_setup_chains_x, @function +ht_setup_chains_x: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl $3320, %esi + pushl %ebx + subl $188, %esp + movl %eax, -176(%ebp) + call get_nodes + movl %esi, %edx + movb %al, -137(%ebp) + movl $-2147434396, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl $.LC18, %eax + shrl $8, %ebx + movl %ebx, %edx + andl $3, %ebx + andl $3, %edx + call print_linkn_in + movl -176(%ebp), %eax + movzbl -137(%ebp), %edx + movl %ebx, 1832(%eax) + movl %edx, 1432(%eax) + movl $0, 1836(%eax) + movl $-2147434016, %eax + movl %edx, -172(%ebp) + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + movl %edi, %edx + sall $8, %eax + orl $1056964611, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434044, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + sall $4, %ebx + movl %edi, %edx + orb $48, %bh + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434048, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $51, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $228, %edi + movl $204, %esi +.L698: + movl %edi, %eax + movl $3320, %ebx + andl $2147483644, %eax + movl %ebx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ebx, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + leal -4(%esi), %eax + movl %ebx, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $4, %edi + addl $8, %esi + cmpl $240, %edi + jne .L698 + movb $64, -138(%ebp) + movl $4, -136(%ebp) + movl $0, -48(%ebp) + jmp .L700 +.L701: + movzbl %al, %eax + movl %eax, -32(%ebp) + addl $24, %eax + andl $31, %eax + sall $15, %eax + movl %eax, -128(%ebp) + movl -136(%ebp), %eax + movl $0, -56(%ebp) + movl $152, -52(%ebp) + sall $12, %eax + addl $12288, %eax + movl %eax, -184(%ebp) +.L702: + movl -128(%ebp), %eax + movl $3320, %edx + shrl $4, %eax + orl -52(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $23, %eax + cmpl $7, %eax + jne .L703 + movb -32(%ebp), %dl + xorl %edi, %edi + movl $224, %ebx + movb -56(%ebp), %al + sall $4, %edx + andl $15, %eax + orl %eax, %edx + movl $.LC19, %eax + movzbl %dl, %edx + call print_linkn_in + movl -56(%ebp), %eax + movl -32(%ebp), %esi + sall $8, %eax + sall $4, %esi + orl $3, %eax + orl %eax, %esi +.L705: + movl %ebx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movzwl %ax,%ecx + movl %eax, %edx + movl %esi, %eax + andl $65535, %eax + cmpl %eax, %ecx + je .L706 + testl %ecx, %ecx + je .L706 + incl %edi + addl $4, %ebx + movl %edi, %edx + cmpb $4, %dl + jne .L705 + jmp .L710 +.L706: + andl $15, %edx + cmpl $3, %edx + je .L703 + movzbl -138(%ebp), %ebx + movl $.LC20, %eax + andl $255, %edi + movl %ebx, %edx + call print_linkn_in + leal 224(,%edi,4), %eax + movl $3320, %ecx + orl $-2147434240, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + addl $63, %ebx + sall $16, %eax + movb $-4, %dl + sall $24, %ebx + orl %ebx, %eax + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 0(,%edi,8), %ebx + movl %ecx, %edx + leal 196(%ebx), %eax + addb $64, -138(%ebp) + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl -56(%ebp), %eax + movb $-4, %dl + sall $4, %eax + orl -32(%ebp), %eax + orl -184(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + leal 192(%ebx), %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl -136(%ebp), %eax + movb $-4, %dl + sall $12, %eax + orl $3, %eax +#APP + outl %eax, %dx +#NO_APP + addl $4, -136(%ebp) + addl $16384, -184(%ebp) +.L703: + incl -56(%ebp) + addl $32, -52(%ebp) + cmpl $3, -56(%ebp) + jne .L702 +.L710: + incl -48(%ebp) +.L700: + movl -172(%ebp), %ebx + cmpl %ebx, -48(%ebp) + movb -48(%ebp), %al + jne .L701 + movb $1, -168(%ebp) + jmp .L713 +.L714: + movb -168(%ebp), %al + movl $224, %esi + leal 24(%eax), %ebx + andl $31, %ebx + sall $15, %ebx + orb $16, %bh +.L715: + movl %esi, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %ebx, %edi + movl %ecx, %edx + shrl $4, %edi + movl %eax, -36(%ebp) + movl %edi, %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -36(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $4, %esi + cmpl $240, %esi + jne .L715 + movl $196, %ebx +.L717: + movl %ebx, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -40(%ebp) + movl %edi, %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -40(%ebp), %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + addl $8, %ebx + cmpl $228, %ebx + jne .L717 + movb $-64, %bl +.L719: + movl %ebx, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -44(%ebp) + movl %edi, %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -44(%ebp), %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + addl $8, %ebx + cmpl $224, %ebx + jne .L719 + incb -168(%ebp) +.L713: + movb -137(%ebp), %bl + cmpb %bl, -168(%ebp) + jb .L714 + movb $0, -129(%ebp) + movl $224, %ecx +.L722: + movl %ecx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $15, %eax + cmpl $1, %eax + sbbb $-1, -129(%ebp) + addl $4, %ecx + cmpl $240, %ecx + jne .L722 + movl -176(%ebp), %edx + movzbl -129(%ebp), %eax + movb $0, -121(%ebp) + movl $0, 1820(%edx) + movl %eax, 1824(%edx) + jmp .L726 +.L727: + movzbl -121(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + leal 224(,%eax,4), %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %eax, %edi + andl $240, %eax + andl $3840, %edi + shrl $4, %eax + addl $24, %eax + movl %eax, %edx + andl $31, %edx + sall $15, %edx + shrl $3, %edi + movl %edx, -96(%ebp) + shrl $4, %edx + movl %edx, -196(%ebp) + leal 148(%edi), %edx + orl %edx, -196(%ebp) + movl %ecx, %edx + orl $-2147483648, -196(%ebp) + movl -196(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -192(%ebp) + movl %ecx, %edx + movl -196(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ebx, %edx + andl $-16776961, -192(%ebp) + xorw %ax, %ax + shrl $8, %eax + orl %eax, -192(%ebp) + movl -192(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $16711680, %esi + movl %esi, %ebx + shrl $16, %ebx + leal -128(%edi), %esi + movb %bl, -120(%ebp) + movb $0, -88(%ebp) + movl $67504394, -92(%ebp) + jmp .L768 +.L729: + movzbl -25(%ebp), %esi + movl %edi, %eax + movl %ecx, -96(%ebp) + movb %al, -88(%ebp) +.L768: + movl %esi, %edx + movl -96(%ebp), %ebx + movzbl %dl, %edx + movl %edx, -60(%ebp) + movl -92(%ebp), %edx + shrl $4, %ebx + shrl $24, %edx + addl -60(%ebp), %edx + orl %edx, %ebx + movl $3320, %edx + movl %ebx, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + andl $2, %eax + leal 3324(%eax), %ebx + movl %ebx, %edx +#APP + inw %dx, %ax +#NO_APP + movzwl %ax, %edx + movl %eax, %edi + testb $64, %dl + jne .L730 + andl $272, %edx + je .L732 + movl %ecx, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + orw $272, %di + movl %ebx, %edx + movzwl %di, %eax +#APP + outw %ax, %dx +#NO_APP + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + testl $272, %edi + je .L732 + pushl %ebx + pushl $.LC21 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp + jmp .L735 +.L732: + testw $32, %di + je .L768 +.L735: + movzbl -120(%ebp), %ebx + movl $3320, %edx + sall $20, %ebx + movl %ebx, -64(%ebp) + shrl $4, %ebx + movl %ebx, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edx + leal -1(%eax), %eax + cmpl $-3, %eax + ja .L730 + cmpl $65535, %edx + je .L730 + cmpl $-65536, %edx + je .L730 + movl -64(%ebp), %eax + call ht_lookup_slave_capability + testb %al, %al + movb %al, -25(%ebp) + jne .L738 + pushl %ecx + pushl $.LC22 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -96(%ebp) + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC24 + pushl $.LC5 + pushl $3 + call do_printk + movl %esi, %edx + addl $12, %esp + movzbl %dl, %eax + pushl %eax + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC25 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -92(%ebp) + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC26 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp + jmp .L730 +.L738: + movzbl -25(%ebp), %eax + movl %ebx, %edi + movl $3320, %ebx + movl %ebx, %edx + movl %eax, %esi + addl $2, %esi + orl %esi, %edi + movl %edi, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %eax, -180(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx + andl $2, %edx + addw $3324, %dx + movw %dx, -186(%ebp) +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + movb -88(%ebp), %al + movl %ebx, %edx + andl $-32, %edi + andl $31, %eax + orl %eax, %edi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movzwl %di, %eax + movw -186(%ebp), %dx +#APP + outw %ax, %dx +#NO_APP + movb -88(%ebp), %cl + shrw $5, %di + movb -88(%ebp), %dl + movl %edi, %eax + andl $31, %eax + andl $31, %ecx + sall $15, %ecx + orl -64(%ebp), %ecx + leal (%edx,%eax), %edi + movl %ebx, %edx + movl %ecx, %eax + shrl $4, %eax + orl %esi, %eax + movl %eax, -192(%ebp) + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -192(%ebp), %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + movl -176(%ebp), %ebx + testb $4, %ah + movl 1820(%ebx), %eax + je .L740 + imull $24, %eax, %eax + leal 1424(%eax,%ebx), %eax + movl -96(%ebp), %ebx + leal 12(%eax), %edx + movl %ecx, 12(%edx) + movl $134877458, 20(%edx) + movl %ebx, 12(%eax) + movl -60(%ebp), %eax + movl -92(%ebp), %ebx + movl $67505422, -92(%ebp) + movl %eax, 4(%edx) + movl -180(%ebp), %eax + movl %ebx, 8(%edx) + movl %eax, 16(%edx) + movl -176(%ebp), %edx + incl 1820(%edx) +.L742: + movl %edi, %ebx + cmpb %bl, -88(%ebp) + jne .L729 +.L730: + incb -121(%ebp) +.L726: + movb -129(%ebp), %al + cmpb %al, -121(%ebp) + jne .L727 + movl -176(%ebp), %edx + movl 1836(%edx), %ecx + andl $4095, %ecx + sall $20, %ecx + movl %ecx, %ebx + orl $1044480, %ebx + jmp .L744 +.L745: + movl %ecx, %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57217246, %eax + je .L746 + addl $4096, %ecx +.L744: + cmpl %ebx, %ecx + jbe .L745 + orl $-1, %ecx +.L746: + movl -176(%ebp), %ebx + shrl $15, %ecx + andl $31, %ecx + movl %ecx, 1828(%ebx) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L740: + movl -176(%ebp), %edx + imull $24, %eax, %eax + movl -96(%ebp), %ebx + leal 1424(%eax,%edx), %eax + leal 12(%eax), %edx + movl %ebx, 12(%eax) + movl -60(%ebp), %eax + movl -92(%ebp), %ebx + movl %ecx, 12(%edx) + movl $67505422, 20(%edx) + movl %eax, 4(%edx) + movl -180(%ebp), %eax + movl %ebx, 8(%edx) + movl $134877458, -92(%ebp) + movl %eax, 16(%edx) + movl -176(%ebp), %edx + incl 1820(%edx) + jmp .L742 + .size ht_setup_chains_x, .-ht_setup_chains_x + .type die, @function +die: + pushl %ebp + movl %esp, %ebp + subl $12, %esp + pushl %eax + pushl $.LC5 + pushl $0 + call do_printk + addl $16, %esp +.L770: +#APP + hlt +#NO_APP + jmp .L770 + .size die, .-die + .section .rom.data.str1.1 +.LC27: + .string " Unknown\r\n" + .section .rom.text + .type set_TT, @function +set_TT: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + subl $12, %esp + movl 28(%ebp), %esi + cmpl 20(%ebp), %esi + movl %ecx, -16(%ebp) + movl 12(%ebp), %edi + jb .L775 + cmpl 24(%ebp), %esi + jbe .L773 +.L775: + pushl %eax + pushl 32(%ebp) + pushl $.LC5 + pushl $3 + call do_printk + movl $.LC27, %eax + call die + addl $16, %esp +.L773: + movl 12(%ebx), %ebx + movl $3320, %edx + movl -16(%ebp), %eax + movl %ebx, -20(%ebp) + shrl $4, -20(%ebp) + orl %eax, -20(%ebp) + andl $2147483644, -20(%ebp) + orl $-2147483648, -20(%ebp) + movl -20(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movb 8(%ebp), %cl + movb $-8, %dl + sall %cl, %edi + notl %edi + andl %edi, %eax + movl %eax, -24(%ebp) + movl -20(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + subl 16(%ebp), %esi + movl %ebx, %edx + sall %cl, %esi + orl %esi, -24(%ebp) + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size set_TT, .-set_TT + .section .rom.data.str1.1 +.LC28: + .string "No memory?" +.LC29: + .string "RAM: 0x" +.LC30: + .string " KB\r\n" + .section .rom.text + .type set_top_mem, @function +set_top_mem: + pushl %ebp + testl %eax, %eax + movl %esp, %ebp + pushl %esi + movl %edx, %esi + pushl %ebx + movl %eax, %ebx + jne .L778 + movl $.LC28, %eax + call die + pushl %eax + pushl $.LC29 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $0 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC30 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L780 +.L778: + pushl %eax + pushl $.LC29 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC30 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + cmpl $4194304, %ebx + jbe .L781 + movl %ebx, %eax + movl $-1073676259, %ecx + shrl $22, %ebx + sall $10, %eax + movl %ebx, %edx +#APP + wrmsr +#NO_APP + jmp .L783 +.L781: + cmpl $4128767, %ebx + jbe .L780 +.L783: + testl %esi, %esi + movl %esi, %ebx + jne .L780 + movl $4128768, %ebx +.L780: + movl %ebx, %eax + movl $-1073676262, %ecx + shrl $22, %ebx + sall $10, %eax + movl %ebx, %edx +#APP + wrmsr +#NO_APP + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size set_top_mem, .-set_top_mem + .section .rom.data.str1.1 +.LC31: + .string "No memory for this cpu\r\n" +.LC32: + .string "Bad RANK Size --\r\n" +.LC33: + .string "Bad SPD value\r\n" +.LC34: + .string "Registered\r\n" +.LC35: + .string "Unbuffered\r\n" +.LC36: + .string "min_cycle_time to low" +.LC37: + .string "spd_set_dram_timing dimm_err!\n" +.LC38: + .string "TrwtTO" +.LC39: + .string "Twrrd" +.LC40: + .string "Twrwr" +.LC41: + .string "Trdrd" +.LC42: + .string "FourActWindow" +.LC43: + .string "DcqBypassMax" +.LC44: + .string "set_ecc spd_device: 0x%x\n" +.LC45: + .string "RdWrQByp" +.LC46: + .string "Interleaved\r\n" +.LC47: + .string "Interleaving disabled\r\n" +.LC48: + .string "Unrecoverable error reading SPD data. No qualified DIMMs?" + .section .rom.text + .type sdram_set_spd_registers, @function +sdram_set_spd_registers: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $236, %esp + movl %eax, -200(%ebp) + movl (%eax), %eax + cmpb $0, (%edx,%eax) + je .L1082 + imull $48, %eax, %eax + xorl %ebx, %ebx + xorl %esi, %esi + leal 8(%edx,%eax), %eax + movl %eax, -196(%ebp) +.L790: + movl -200(%ebp), %edx + movw 20(%edx,%esi,2), %ax + testw %ax, %ax + je .L791 + movzwl %ax, %eax + movl $2, %edx + call spd_read_byte + cmpl $8, %eax + jne .L791 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, %ebx +.L791: + movl -200(%ebp), %edx + movw 28(%edx,%esi,2), %ax + testw %ax, %ax + je .L794 + movzwl %ax, %eax + movl $2, %edx + call spd_read_byte + cmpl $8, %eax + jne .L794 + leal 4(%esi), %ecx + movb $1, %al + sall %cl, %eax + orl %eax, %ebx +.L794: + incl %esi + cmpl $4, %esi + jne .L790 + movl -196(%ebp), %ecx + testb %bl, %bl + movl %ebx, (%ecx) + jne .L798 + pushl %eax + pushl $.LC31 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1082 +.L798: + movl %ebx, %eax + shrl $4, %ebx + andl $15, %eax + andl $15, %ebx + cmpl %ebx, %eax + jne .L800 + movl -200(%ebp), %ebx + movl $3320, %edx + movl 16(%ebx), %eax + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + movl $0, -184(%ebp) + jne .L803 + jmp .L800 +.L804: + movb -184(%ebp), %cl + movl $1, %eax + movl -196(%ebp), %ebx + sall %cl, %eax + testl %eax, (%ebx) + je .L805 + movzwl %dx, %edx + movl -184(%ebp), %eax + xorl %edi, %edi + movl %edx, -188(%ebp) + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %eax + movl %eax, -192(%ebp) +.L807: + movzbl addresses.4206(%edi), %ebx + movl -188(%ebp), %eax + movl %ebx, %edx + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + js .L808 + movl -192(%ebp), %eax + movl %ebx, %edx + call spd_read_byte + testl %eax, %eax + js .L808 + cmpl %eax, %esi + jne .L800 + incl %edi + cmpl $24, %edi + jne .L807 +.L805: + incl -184(%ebp) + cmpl $4, -184(%ebp) + je .L812 +.L803: + movl -184(%ebp), %ecx + movl -200(%ebp), %ebx + movw 20(%ebx,%ecx,2), %dx + testw %dx, %dx + jne .L804 +.L812: + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %edi + orl $2304, %edi + shrl $4, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1025, %esi + movl %ebx, %edx + orl $2048, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + movl (%ecx), %eax + movb $1, 43(%ecx) + jmp .L813 +.L800: + movl -196(%ebp), %ebx + movl (%ebx), %ecx + movb $0, 43(%ebx) + movb $0, 44(%ebx) + movl %ecx, %edx + movl %ecx, %eax + shrl $4, %edx + andl $15, %eax + andl $15, %edx + cmpl %edx, %eax + je .L814 + testl %edx, %edx + je .L816 + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %esi + shrl $4, %esi + movl %esi, %ebx + andl $268435452, %ebx + orl $-2147483488, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $16, %edi + movb $-4, %dl + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %ebx + movl %ecx, %edx + andl $268435452, %ebx + orl $-2147483504, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, -248(%ebp) + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -248(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + movb $1, 44(%ecx) + jmp .L816 +.L814: + movl -196(%ebp), %ebx + andb $15, %cl + movl %ecx, (%ebx) +.L816: + movl -196(%ebp), %edx + movl (%edx), %eax +.L813: + movl -196(%ebp), %ecx + movl %eax, (%ecx) + incl %eax + je .L818 + movl $0, -180(%ebp) + movl $2, -48(%ebp) + movl $84, -216(%ebp) + movl $80, -220(%ebp) + movl $68, -224(%ebp) + movl $84, -228(%ebp) + movl $80, -232(%ebp) + movl %ecx, -236(%ebp) +.L820: + movl -180(%ebp), %ebx + movl -200(%ebp), %eax + movl -196(%ebp), %edx + movb -180(%ebp), %cl + movw 20(%eax,%ebx,2), %si + movl (%edx), %ebx + movl $1, %edx + movl %edx, %eax + sall %cl, %eax + testl %eax, %ebx + je .L821 + movzwl %si, %ebx + jmp .L823 +.L821: + movl -180(%ebp), %ecx + addl $4, %ecx + sall %cl, %edx + testl %edx, %ebx + je .L824 + movl -180(%ebp), %eax + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx +.L823: + movl -236(%ebp), %eax + movl -180(%ebp), %ecx + movl -236(%ebp), %edx + addl $4, %eax + movl %eax, -152(%ebp) + movl %ecx, -156(%ebp) + movb $0, 4(%edx) + movl $3, %edx + movb $0, 1(%eax) + movb $0, 2(%eax) + movb $0, 4(%eax) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + testb %al, %al + je .L828 + movl -152(%ebp), %ecx + movl $4, %edx + addb %al, (%ecx) + movb %al, 1(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + testb %al, %al + je .L828 + movl -152(%ebp), %ecx + movl $17, %edx + addb %al, (%ecx) + movb %al, 2(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax + je .L828 +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -152(%ebp), %edx + addb %al, (%edx) + movb %al, 3(%edx) + movl $6, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax + cmpl $72, %eax + je .L836 + cmpl $64, %eax + jne .L828 +.L836: +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -236(%ebp), %ecx + movl $5, %edx + addb 4(%ecx), %al + subl $3, %eax + movb %al, 4(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $7, %eax + cmpl $1, %eax + leal 1(%eax), %edx + jbe .L839 + cmpl $4, %edx + jne .L828 +.L839: + movl -152(%ebp), %eax + movb %dl, 4(%eax) + movl $31, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + cmpl $4, %eax + jg .L841 + addl $8, %eax +.L841: + movl -236(%ebp), %ecx + leal 22(%eax), %edx + movzbl 4(%ecx), %eax + cmpl %eax, %edx + je .L843 + pushl %eax + pushl $.LC32 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L828: + movl $.LC33, %eax + call die +.L826: + movl -152(%ebp), %ebx + movb $0, (%ebx) + movb $0, 1(%ebx) + movb $0, 2(%ebx) + movb $0, 3(%ebx) + movb $0, 4(%ebx) +.L843: + movl -152(%ebp), %eax + movb (%eax), %al + testb %al, %al + movb %al, -173(%ebp) + je .L845 + xorl %ebx, %ebx + cmpb $26, %al + jbe .L849 + movzbl %al, %ecx + movb $1, %bl + subl $8, %ecx + sall %cl, %ebx + orl $1, %ebx +.L849: + movl -152(%ebp), %edx + movb 4(%edx), %dl + movb %dl, -157(%ebp) + xorl %edx, %edx + cmpb $1, -157(%ebp) + jbe .L852 + movzbl -173(%ebp), %ecx + movb $1, %dl + subl $8, %ecx + sall %cl, %edx + orl $1, %edx +.L852: + movl -196(%ebp), %ecx + movb 43(%ecx), %cl + testb %cl, %cl + movb %cl, -158(%ebp) + je .L853 + leal (%ebx,%ebx), %eax + andl $1, %ebx + orl %eax, %ebx + leal (%edx,%edx), %eax + andl $1, %edx + orl %eax, %edx +.L853: + movl %ebx, %esi + movl -196(%ebp), %ebx + movl %edx, %edi + andl $536346625, %esi + andl $536346625, %edi + movl (%ebx), %ebx + movl %ebx, -164(%ebp) + andl $15, %ebx + movl %ebx, -168(%ebp) + jne .L855 + testb $-16, -164(%ebp) + je .L855 + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %ebx + movl -232(%ebp), %eax + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + orl -228(%ebp), %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, %eax + jmp .L1117 +.L855: + movl -200(%ebp), %ecx + movl -180(%ebp), %edx + movl 12(%ecx), %ebx + movl $3320, %ecx + leal 64(,%edx,8), %eax + movl %ecx, %edx + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -224(%ebp), %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + cmpb $4, -157(%ebp) + jne .L858 + movl -220(%ebp), %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + orl -216(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +.L1117: + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP +.L858: + testl %esi, %esi + je .L860 + cmpl $0, -168(%ebp) + jne .L862 + testb $-16, -164(%ebp) + je .L862 + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %edi + orl $2560, %edi + shrl $4, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movb $-8, %dl + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb -180(%ebp), %cl + movl $-1577058304, %eax + movl %ebx, %edx + shrl %cl, %eax + notl %eax + andl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L865 +.L862: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %ecx + shrl $4, %ecx + movl %ecx, %ebx + andl $268435452, %ebx + orl $-2147483512, %ebx + movl %ecx, -172(%ebp) + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movb -180(%ebp), %cl + movl $-1577058304, %edi + movl %edi, %esi + shrl %cl, %esi + notl %esi + andl %esi, %eax + cmpb $4, -157(%ebp) + movl %eax, -240(%ebp) + jne .L866 + movb -48(%ebp), %cl + movl %edi, %eax + shrl %cl, %eax + notl %eax + andl %eax, -240(%ebp) +.L866: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + cmpb $0, -158(%ebp) + je .L860 + movl -172(%ebp), %ebx + movb $-8, %dl + andl $268435452, %ebx + orl $-2147483488, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl %esi, %eax + cmpb $4, -157(%ebp) + movl %eax, -240(%ebp) + jne .L869 + movb -48(%ebp), %cl + shrl %cl, %edi + notl %edi + andl %edi, %eax + movl %eax, -240(%ebp) +.L869: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP +.L860: + cmpl $0, -168(%ebp) + jne .L871 + testb $-16, -164(%ebp) + je .L871 +.L865: + movl -48(%ebp), %edx + movl %edx, -156(%ebp) +.L871: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %esi + orl $2048, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl -156(%ebp), %edi + movl $15, %edx + movl %eax, %ebx + movl %edx, %eax + sall $2, %edi + movl %edi, %ecx + sall %cl, %eax + notl %eax + andl %eax, %ebx + cmpb $4, -157(%ebp) + jne .L873 + leal 8(%edi), %ecx + sall %cl, %edx + notl %edx + andl %edx, %ebx +.L873: + cmpb $26, -173(%ebp) + jbe .L875 + movl -152(%ebp), %eax + movl -152(%ebp), %ecx + movzbl 1(%eax), %eax + movl %eax, -248(%ebp) + movzbl 3(%ecx), %edx + leal (%eax,%eax,2), %eax + movzbl 2(%ecx), %ecx + imull $12, %edx, %edx + leal cs_map_aaa.3888(%eax,%edx), %eax + movzbl -72(%eax,%ecx), %edx + movl %edi, %ecx + movl %edx, %eax + sall %cl, %eax + orl %eax, %ebx + cmpb $4, -157(%ebp) + jne .L875 + leal 8(%edi), %ecx + sall %cl, %edx + orl %edx, %ebx +.L875: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L824: + incl -180(%ebp) + addl $5, -236(%ebp) + addl $8, -232(%ebp) + addl $8, -228(%ebp) + addl $8, -224(%ebp) + addl $8, -220(%ebp) + addl $8, -216(%ebp) + incl -48(%ebp) + cmpl $4, -180(%ebp) + jne .L820 + movl -196(%ebp), %edx + movl (%edx), %eax + incl %eax + je .L818 + xorl %ebx, %ebx + movl $0, -148(%ebp) +.L880: + movl -196(%ebp), %edx + movl -200(%ebp), %ecx + movl (%edx), %esi + movl $1, %edx + movw 20(%ecx,%ebx,2), %ax + movl %edx, %edi + movb %bl, %cl + sall %cl, %edi + testl %edi, %esi + je .L881 + movzwl %ax, %eax + jmp .L883 +.L881: + leal 4(%ebx), %ecx + sall %cl, %edx + testl %edx, %esi + je .L884 + movl -200(%ebp), %edx + movzwl 28(%edx,%ebx,2), %eax +.L883: + movl $20, %edx + call spd_read_byte + testl %eax, %eax + js .L1001 + andl $63, %eax + cmpl $1, %eax + je .L889 + cmpl $16, %eax + jne .L884 +.L889: + orl %edi, -148(%ebp) +.L884: + incl %ebx + cmpl $4, %ebx + jne .L880 + movl -200(%ebp), %ecx + movl 16(%ecx), %eax + movl $3320, %ecx + movl %ecx, %edx + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -200(%ebp), %ebx + movl %ecx, %edx + movl 12(%ebx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -196(%ebp), %ebx + movl %eax, %ecx + andl $-65537, %ecx + movb $1, 41(%ebx) + cmpl $0, -148(%ebp) + jne .L891 + orl $65536, %ecx + movb $0, 41(%ebx) +.L891: + movl -200(%ebp), %edx + movl 12(%edx), %eax + movl $3320, %edx + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + cmpb $0, 41(%edx) + je .L893 + pushl %eax + pushl $.LC34 + jmp .L1118 +.L893: + pushl %eax + pushl $.LC35 +.L1118: + pushl $.LC5 + pushl $7 + call do_printk + movl -196(%ebp), %ecx + addl $16, %esp + movl (%ecx), %eax + incl %eax + je .L818 + movl -200(%ebp), %ebx + movl $3320, %edx + movl 16(%ebx), %eax + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $5, %eax + xorl %ecx, %ecx + andl $3, %eax + movl $2, %edx + movzwl min_cycle_times.4311(%eax,%eax), %ebx + movl $397, %eax + call read_option + movzwl min_cycle_times.4311(%eax,%eax), %eax + cmpl %ebx, %eax + movl %eax, -128(%ebp) + jae .L897 + movl %ebx, -128(%ebp) +.L897: + movl $3, -132(%ebp) + movl $0, -52(%ebp) +.L898: + movl -196(%ebp), %ecx + movl -52(%ebp), %eax + movl -200(%ebp), %edx + movl (%ecx), %ebx + movb -52(%ebp), %cl + movw 20(%edx,%eax,2), %si + movl $1, %edx + movl %edx, %eax + sall %cl, %eax + testl %eax, %ebx + je .L899 + movzwl %si, %esi + movl %esi, -144(%ebp) + jmp .L901 +.L899: + movl -52(%ebp), %ecx + addl $4, %ecx + sall %cl, %edx + testl %edx, %ebx + je .L902 + movl -52(%ebp), %ebx + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %ebx + movl %ebx, -144(%ebp) +.L901: + movl -144(%ebp), %eax + movl $18, %edx + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + jle .L902 +#APP + bsrl %eax, %edi + jnz 1f + movl $-1, %edi + 1: + +#NO_APP + leal -2(%edi), %ebx + movl $1280, -136(%ebp) + movl $6, -140(%ebp) +.L905: + leal -3(%ebx), %eax + cmpl $3, %eax + ja .L906 + movl %esi, %eax + movb %bl, %cl + sarl %cl, %eax + testb $1, %al + je .L906 + movl %edi, %eax + negl %eax + movzbl latency_indicies.4310+2(%ebx,%eax), %edx + movl -144(%ebp), %eax + call spd_read_byte + testl %eax, %eax + js .L845 + call convert_to_linear + cmpl -128(%ebp), %eax + jb .L906 + cmpl -136(%ebp), %eax + jl .L912 + jne .L906 + cmpl %ebx, -140(%ebp) + jle .L906 +.L912: + movl %eax, -136(%ebp) + movl %ebx, -140(%ebp) +.L906: + cmpl %edi, %ebx + je .L916 + incl %ebx + jmp .L905 +.L916: + cmpl $6, -140(%ebp) + jg .L902 + movl -136(%ebp), %ebx + cmpl %ebx, -128(%ebp) + jae .L919 + movl %ebx, -128(%ebp) +.L919: + movl -132(%ebp), %eax + cmpl %eax, -140(%ebp) + jbe .L902 + movl -140(%ebp), %edx + movl %edx, -132(%ebp) +.L902: + incl -52(%ebp) + cmpl $4, -52(%ebp) + jne .L898 + xorl %edi, %edi +.L922: + movl -196(%ebp), %eax + movl $1, %edx + movl -200(%ebp), %ecx + movl (%eax), %ebx + movl %edx, %eax + movw 20(%ecx,%edi,2), %si + movl %edi, %ecx + sall %cl, %eax + testl %eax, %ebx + je .L923 + movzwl %si, %esi + jmp .L925 +.L923: + leal 4(%edi), %ecx + sall %cl, %edx + testl %edx, %ebx + je .L926 + movl -200(%ebp), %ebx + movzwl 28(%ebx,%edi,2), %esi +.L925: + movl $18, %edx + movl %esi, %eax + call spd_read_byte + cmpl $0, %eax + movl %eax, %edx + jl .L845 + je .L926 +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + xorl %ebx, %ebx + leal -2(%eax), %ecx +.L930: + movl %edx, %eax + sarl %cl, %eax + testb $1, %al + je .L931 + cmpl -132(%ebp), %ecx + je .L933 +.L931: + incl %ebx + cmpl $3, %ebx + je .L934 + incl %ecx + jmp .L930 +.L933: + movzbl latency_indicies.4310(%ebx), %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L845 + call convert_to_linear + cmpl -128(%ebp), %eax + jbe .L926 +.L934: + movl -196(%ebp), %ecx + movl %edi, %edx + movl -200(%ebp), %eax + call disable_dimm + movl -196(%ebp), %edx + movl %eax, (%edx) +.L926: + incl %edi + cmpl $4, %edi + jne .L922 + movl $speed, %edx + jmp .L938 +.L939: + movzwl 24(%edi), %eax + leal 24(%edi), %edx + cmpl %eax, -128(%ebp) + ja .L940 +.L938: + cmpw $0, (%edx) + movl %edx, %edi + jne .L939 + movl $.LC36, %eax + call die +.L940: + movl -200(%ebp), %ecx + movl 12(%ecx), %ebx + orl $2368, %ebx + shrl $4, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, -248(%ebp) + movl $3320, %ebx + movl -248(%ebp), %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-8, %ecx + movl %esi, %edx + orl 8(%edi), %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + pushl %eax + leal 12(%edi), %eax + pushl %eax + pushl $.LC5 + pushl $7 + call do_printk + movl -200(%ebp), %ecx + movl %ebx, %edx + movl 12(%ecx), %eax + orl $2176, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -248(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl -132(%ebp), %eax + andl $-8, %ecx + movl %esi, %edx + decl %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + addl $16, %esp + movl (%ecx), %eax + incl %eax + je .L818 +.L909: + movl 8(%edi), %eax + movl -196(%ebp), %edx + movb %al, 45(%edx) + leal -36(%ebp), %eax + pushl $24 + pushl %edi + pushl %eax + call memcpy + movl 8(%edi), %ebx + movl $-1073676222, %ecx + movzbl -34(%ebp), %esi +#APP + rdmsr +#NO_APP + andl $63, %eax + addl $12, %esp + shrl %eax + cmpl $12, %eax + jle .L943 + movl %esi, %ecx + movzbl %cl, %eax + jmp .L945 +.L943: + cmpl $3, %ebx + jle .L946 + movl %esi, %ebx + movzbl %bl, %eax + jmp .L945 +.L946: + movzbl dv_a.4275(%ebx,%eax,4), %eax +.L945: + movb %al, -34(%ebp) + movl $0, -124(%ebp) + movl $4, -56(%ebp) +.L948: + movl -196(%ebp), %eax + movl $1, %edi + movb -124(%ebp), %cl + movl $1, -240(%ebp) + movl (%eax), %edx + sall %cl, %edi + movl %edx, %esi + andl %edi, %esi + jne .L949 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L951 +.L949: + movl -124(%ebp), %eax + testl %esi, %esi + movl -200(%ebp), %ecx + movzwl 20(%ecx,%eax,2), %ebx + jne .L952 + movb -56(%ebp), %cl + sall %cl, -240(%ebp) + testl %edx, -240(%ebp) + je .L952 + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx +.L952: + movl $41, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + js .L969 + movl $40, %edx + movl %ebx, %eax + call spd_read_byte + movzbl -34(%ebp), %edx + movl %edx, %ebx + sarl $4, %eax + andl $7, %eax + movzbl fraction.4411(%eax), %eax + leal (%eax,%esi,4), %eax + imull $10, %eax, %eax + leal -1(%eax,%edx), %ecx + movl %ecx, %eax + cltd + idivl %ebx + cmpl $10, %eax + movl %eax, %esi + ja .L957 + movl $11, %esi + jmp .L959 +.L957: + xorl %ebx, %ebx + cmpl $26, %eax + ja .L961 +.L959: + movl -200(%ebp), %eax + movl $3320, %edx + movl 12(%eax), %ecx + orl $2176, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $16, %eax + andl $15, %eax + addl $11, %eax + cmpl %esi, %eax + jae .L962 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal -11(%esi), %eax + andl $-983041, %ebx + sall $16, %eax + movb $-4, %dl + orl %eax, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L962 +.L1112: + pushl $5 + movl -196(%ebp), %edx + pushl $2 + movl -124(%ebp), %ecx + pushl $2 + movl -200(%ebp), %eax + pushl $3 + pushl $22 + pushl $28 + pushl $136 + pushl (%edx) + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + movl -196(%ebp), %ecx + movl -124(%ebp), %ebx + movl -200(%ebp), %eax + movl (%ecx), %edx + movzwl 20(%eax,%ebx,2), %esi + testl %edi, %edx + jne .L966 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L966 + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L966: + movl $30, %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L969 + sall $2, %eax + movzbl -34(%ebp), %edx + imull $10, %eax, %eax + movl %edx, %ebx + leal -1(%eax,%edx), %ecx + movl %ecx, %eax + cltd + idivl %ebx + cmpl $4, %eax + movl %eax, %esi + ja .L971 + movl $5, %esi + jmp .L973 +.L971: + xorl %ebx, %ebx + cmpl $18, %eax + ja .L961 +.L973: + movl -200(%ebp), %eax + movl $3320, %edx + movl 12(%eax), %ecx + orl $2176, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $12, %eax + andl $15, %eax + addl $3, %eax + cmpl %esi, %eax + jae .L975 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal -3(%esi), %eax + andb $15, %bh + sall $12, %eax + movb $-4, %dl + orl %eax, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L975 +.L969: + orl $-1, %ebx + jmp .L961 +.L1113: + movl -196(%ebp), %edx + cmpb $0, 43(%edx) + jne .L978 + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + xorl %ecx, %ecx + testb $4, %ah + jne .L981 +.L978: + movl $2, %ecx +.L981: + leal 3(%ecx), %eax + movl -196(%ebp), %ebx + pushl %eax + movl -200(%ebp), %eax + leal 2(%ecx), %edx + movl -124(%ebp), %ecx + pushl %edx + pushl %edx + pushl $1 + pushl $11 + pushl $38 + pushl $136 + pushl (%ebx) + leal -36(%ebp), %esi + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + pushl $6 + movl -196(%ebp), %eax + movl %esi, %edx + pushl $3 + movl -124(%ebp), %ecx + pushl $3 + pushl $3 + pushl $20 + pushl $36 + pushl $136 + pushl (%eax) + movl -200(%ebp), %eax + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + movl -196(%ebp), %ecx + movl -124(%ebp), %ebx + movl -200(%ebp), %eax + movl (%ecx), %edx + movzwl 20(%eax,%ebx,2), %esi + testl %edi, %edx + jne .L984 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L984 + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L984: + movl $12, %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L987 + movl -200(%ebp), %edx + decl %eax + sete %al + movzbl %al, %esi + addl $2, %esi + movl 12(%edx), %ecx + movl $3320, %edx + orl $2240, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + andl $-196609, %ebx + sall $16, %esi + orl %esi, %ebx + cmpl %ebx, %eax + je .L992 + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L992 +.L1114: + movl -124(%ebp), %edx + movl -200(%ebp), %ecx + movl -196(%ebp), %eax + movzwl 20(%ecx,%edx,2), %ebx + movl (%eax), %edx + testl %edi, %edx + jne .L995 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L995 + movl -124(%ebp), %eax + movl $2, %esi + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx + jmp .L998 +.L995: + xorl %esi, %esi +.L998: + movl $13, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L987 +#APP + bsrl %eax, %edx + jnz 1f + movl $-1, %edx + 1: + +#NO_APP + imull $5, -56(%ebp), %eax + movl -196(%ebp), %ecx + movl -200(%ebp), %ebx + movzbl -16(%eax,%ecx), %eax + leal -25(%eax), %edi + movl $6, %eax + subl %edx, %eax + movl $3320, %edx + subl %eax, %edi + movl 12(%ebx), %eax + orl $2240, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -240(%ebp) +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %esi, %edx + movl %eax, %ebx + movzbl %dl, %eax + addl -124(%ebp), %eax + leal (%eax,%eax,2), %eax + leal 20(%eax), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + andl $7, %eax + cmpl %edi, %eax + jae .L951 + movl $3320, %edx + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $7, %eax + movb $-4, %dl + sall %cl, %eax + notl %eax + andl %eax, %ebx + sall %cl, %edi + orl %edi, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L951 +.L961: + pushl %esi + pushl %esi + pushl $.LC37 + pushl $7 + call do_printk + addl $16, %esp + testl %ebx, %ebx + js .L1001 + movl -124(%ebp), %edx + movl -196(%ebp), %ecx + movl -200(%ebp), %eax + call disable_dimm + movl -196(%ebp), %edx + movl %eax, (%edx) +.L951: + incl -124(%ebp) + incl -56(%ebp) + cmpl $4, -124(%ebp) + jne .L948 + movl -196(%ebp), %ecx + movl $2, %esi + movl -196(%ebp), %edi + movl $0, -104(%ebp) + movl $0, -108(%ebp) + movl (%ecx), %ecx + addl $8, %edi + movl $0, -112(%ebp) + movl $0, -116(%ebp) + movl %ecx, -120(%ebp) +.L1004: + movl -200(%ebp), %ebx + movl $1, %edx + leal -2(%esi), %ecx + movw 16(%ebx,%esi,2), %ax + movl %edx, %ebx + sall %cl, %ebx + testl %ebx, -120(%ebp) + je .L1005 + movzwl %ax, %eax + jmp .L1007 +.L1005: + leal 2(%esi), %ecx + sall %cl, %edx + testl %edx, -120(%ebp) + je .L1008 + movl -200(%ebp), %edx + movzwl 24(%edx,%esi,2), %eax +.L1007: + cmpb $1, (%edi) + jne .L1010 + orl %ebx, -112(%ebp) +.L1010: + cmpb $10, -2(%edi) + jne .L1012 + orl %ebx, -116(%ebp) +.L1012: + movl $13, %edx + call spd_read_byte + movb (%edi), %dl + cmpl $4, %eax + jne .L1014 + orl %ebx, -104(%ebp) + cmpb $4, %dl + jne .L1008 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, -104(%ebp) + jmp .L1008 +.L1014: + cmpl $16, %eax + jne .L1008 + orl %ebx, -108(%ebp) + cmpb $4, %dl + jne .L1008 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, -108(%ebp) +.L1008: + incl %esi + addl $5, %edi + cmpl $6, %esi + jne .L1004 + movl -196(%ebp), %ebx + movl -104(%ebp), %eax + movl -112(%ebp), %ecx + movl -108(%ebp), %edx + movl %eax, 24(%ebx) + movl -116(%ebp), %eax + movl %ecx, 32(%ebx) + movl %edx, 28(%ebx) + movl %eax, 36(%ebx) + movzbl -33(%ebp), %eax + leal -36(%ebp), %ebx + pushl %ecx + movl %ebx, %edx + pushl $.LC38 + movl $140, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $9 + pushl $2 + pushl $2 + pushl $7 + pushl $4 + call set_TT + movzbl -32(%ebp), %eax + addl $28, %esp + pushl $.LC39 + movl $140, %ecx + movl %ebx, %edx + pushl %eax + movl -200(%ebp), %eax + pushl $3 + pushl $0 + pushl $0 + pushl $3 + pushl $10 + call set_TT + movzbl -31(%ebp), %eax + addl $28, %esp + pushl $.LC40 + movl $140, %ecx + movl %ebx, %edx + pushl %eax + movl -200(%ebp), %eax + pushl $3 + pushl $1 + pushl $1 + pushl $3 + pushl $12 + call set_TT + movzbl -30(%ebp), %eax + addl $28, %esp + pushl $.LC41 + movl %ebx, %edx + movl $140, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $5 + pushl $2 + pushl $2 + pushl $3 + pushl $14 + call set_TT + movl -196(%ebp), %edx + addl $32, %esp + movl -28(%ebp), %eax + cmpl $0, 36(%edx) + je .L1020 + movzbl faw_1k.4826(%eax), %eax + jmp .L1022 +.L1020: + movzbl faw_2k.4827(%eax), %eax +.L1022: + pushl %edx + movl $148, %ecx + pushl $.LC42 + pushl %eax + movl -200(%ebp), %eax + pushl $20 + pushl $8 + pushl $7 + leal -36(%ebp), %ebx + pushl $15 + movl %ebx, %edx + pushl $28 + call set_TT + movzbl -29(%ebp), %eax + addl $28, %esp + pushl $.LC43 + movl %ebx, %edx + movl $148, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $15 + pushl $0 + pushl $0 + pushl $15 + pushl $24 + call set_TT + movl -200(%ebp), %ecx + movl 12(%ecx), %esi + shrl $4, %esi + movl %esi, %ebx + andl $268435452, %ebx + orl $-2147483500, %ebx + movl %ebx, -244(%ebp) + movl $3320, %ebx + movl -244(%ebp), %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl -244(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-241, %edi + movl %ecx, %edx + orl $192, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -200(%ebp), %edx + movl 16(%edx), %eax + movl %ebx, %edx + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $268435452, %esi + movl %eax, %edi + orl $-2147483504, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + addl $32, %esp + andl $-524289, %ebx + andl $8, %edi + je .L1023 + orl $524288, %ebx +.L1023: + movl $1, %ecx + movl $1, %edx + movl $386, %eax + call read_option + testl %eax, %eax + jne .L1025 + andl $-524289, %ebx +.L1025: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + xorl %esi, %esi + testl $524288, %ebx + movb $1, 42(%edx) + jne .L1030 + jmp .L1119 +.L1084: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-524289, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx +.L1119: + movb $0, 42(%edx) + jmp .L1029 +.L1030: + movl -196(%ebp), %ecx + movl $1, %edx + movl %edx, %eax + movl (%ecx), %edi + movl %esi, %ecx + sall %cl, %eax + testl %eax, %edi + jne .L1031 + leal 4(%esi), %ecx + sall %cl, %edx + testl %edx, %edi + je .L1033 + movl -200(%ebp), %edx + pushl %edi + movzwl 28(%edx,%esi,2), %eax + pushl %eax + pushl $.LC44 + pushl $7 + call do_printk + addl $16, %esp +.L1031: + movl -200(%ebp), %ecx + movl $11, %edx + movzwl 20(%ecx,%esi,2), %eax + call spd_read_byte + testb $2, %al + je .L1084 +.L1033: + incl %esi + cmpl $4, %esi + jne .L1030 +.L1029: + movl -200(%ebp), %ebx + movl $3320, %edx + movl 12(%ebx), %edi + shrl $4, %edi + movl %edi, %esi + andl $268435452, %esi + orl $-2147483504, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + andb $15, %ch + movl 24(%edx), %eax + movl %ebx, %edx + andl $15, %eax + sall $12, %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + cmpb $100, -34(%ebp) + jne .L1036 + movl -196(%ebp), %ecx + cmpb $0, 43(%ecx) + je .L1036 + movl (%ecx), %edx + xorl %ebx, %ebx + xorl %ecx, %ecx + andl $15, %edx +.L1039: + movl %edx, %eax + andl $1, %eax + cmpl $1, %eax + sbbl $-1, %ebx + incl %ecx + cmpl $8, %ecx + je .L1042 + shrl %edx + jmp .L1039 +.L1042: + cmpl $2, %ebx + movl $3, -244(%ebp) + je .L1045 +.L1036: + movl $1, -244(%ebp) +.L1045: + movl $3320, %ecx + movl %esi, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -248(%ebp) + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + sall $4, -244(%ebp) + movl %ebx, %edx + andl $-49, -248(%ebp) + movl -244(%ebp), %eax + orl %eax, -248(%ebp) + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $268435452, %edi + movl %ecx, %edx + orl $-2147483488, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-449, %esi + movl %ebx, %edx + orl $224, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + pushl %esi + movl -200(%ebp), %eax + movl $160, %ecx + pushl $.LC45 + pushl $2 + pushl $3 + pushl $0 + pushl $0 + pushl $3 + pushl $2 + leal -36(%ebp), %edx + call set_TT + movl -196(%ebp), %ecx + addl $32, %esp + movl (%ecx), %eax + incl %eax + je .L818 + movl $1, %ecx + movl $1, %edx + movl $396, %eax + call read_option + testl %eax, %eax + je .L1047 + movl -200(%ebp), %eax + xorl %esi, %esi + xorl %edi, %edi + movl -196(%ebp), %ebx + movl 12(%eax), %eax + movb 43(%ebx), %bl + movl $0, -84(%ebp) + movl $255, -88(%ebp) + shrl $4, %eax + movb %bl, -97(%ebp) + movl %eax, %ebx + andl $268435452, %ebx + movl %eax, -96(%ebp) + orl $-2147483520, %ebx + movl $64, -212(%ebp) +.L1049: + movl -96(%ebp), %eax + movl $3320, %edx + orl -212(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1050 + shrl $19, %eax + incl %esi + andl $1023, %eax + cmpl $0, -84(%ebp) + jne .L1052 + movl %eax, -84(%ebp) + jmp .L1054 +.L1052: + cmpl %eax, -84(%ebp) + jne .L1055 +.L1054: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %edi, %ecx + sarl %ecx + sall $2, %ecx + shrl %cl, %eax + andl $15, %eax + cmpl $255, -88(%ebp) + jne .L1056 + movl %eax, -88(%ebp) + jmp .L1050 +.L1056: + cmpl %eax, -88(%ebp) + jne .L1055 +.L1050: + incl %edi + addl $4, -212(%ebp) + cmpl $8, %edi + jne .L1049 +#APP + bsrl %esi, %edi + jnz 1f + movl $-1, %edi + 1: + +#NO_APP + movl $1, %edx + movl %edi, %ecx + movl %edx, %eax + sall %cl, %eax + cmpl %esi, %eax + jne .L1055 + testl %edi, %edi + jle .L1055 + cmpl $3, %edi + jg .L1055 + movl -88(%ebp), %ebx + movl %edx, %esi + movzbl csbase_low_f0_shift.3980(%ebx), %ecx + sall %cl, %esi + cmpb $0, -97(%ebp) + je .L1061 + addl %esi, %esi +.L1061: + movl -84(%ebp), %eax + movl %edi, %ecx + movl $0, -80(%ebp) + movl $1, -92(%ebp) + movl $64, -208(%ebp) + sall %cl, %eax + leal -1(%eax), %ebx + movl %esi, %eax + sall %cl, %eax + subl %esi, %eax + notl %eax + sall $19, %ebx + andl $16352, %eax + orl %eax, %ebx +.L1063: + movl -96(%ebp), %ecx + movl $3320, %edx + orl -208(%ebp), %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1064 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -92(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + testb $1, -80(%ebp) + jne .L1066 + movl -80(%ebp), %eax + movb $-8, %dl + sarl %eax + leal 96(,%eax,4), %eax + orl -96(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1066: + addl %esi, -92(%ebp) +.L1064: + incl -80(%ebp) + addl $4, -208(%ebp) + cmpl $8, -80(%ebp) + jne .L1063 + pushl %ebx + pushl $.LC46 + pushl $.LC5 + pushl $7 + call do_printk + movl -84(%ebp), %ebx + leal 17(%edi), %ecx + addl $16, %esp + sall %cl, %ebx + testl %ebx, %ebx + je .L1055 + jmp .L1069 +.L1047: + pushl %ecx + pushl $.LC47 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1055 +.L1120: + movl -200(%ebp), %edx + xorl %edi, %edi + xorl %ebx, %ebx + movl $0, -76(%ebp) + movl $64, -204(%ebp) + movl 12(%edx), %esi + shrl $4, %esi +.L1071: + movl -204(%ebp), %eax + movl $3320, %edx + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + movl %eax, %edx + je .L1072 + cmpl -76(%ebp), %eax + jbe .L1072 + leal 24(%edi), %ecx + movl $1, %eax + sall %cl, %eax + testl %eax, -72(%ebp) + jne .L1072 + movl %edi, %ebx + movl %edx, -76(%ebp) +.L1072: + incl %edi + addl $4, -204(%ebp) + cmpl $8, %edi + jne .L1071 + cmpl $0, -76(%ebp) + je .L1077 + leal 24(%ebx), %eax + movl -76(%ebp), %edi + movl $1, -240(%ebp) + movb %al, %cl + movl -72(%ebp), %eax + sall %cl, -240(%ebp) + orl %eax, -240(%ebp) + movl -240(%ebp), %edx + leal 64(,%ebx,4), %eax + shrl $19, %edi + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + addl %edi, %edx + movl %edx, -72(%ebp) + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + sall $19, -240(%ebp) + movb $-4, %dl + orl $1, -240(%ebp) + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + testb $1, %bl + jne .L1120 + shrl %ebx + movb $-8, %dl + leal 96(,%ebx,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1(%edi), %eax + movb $-4, %dl + sall $19, %eax + orl $16352, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L1120 +.L1077: + movl -72(%ebp), %ebx + sall $17, %ebx +.L1069: + movl -200(%ebp), %edx + pushl (%edx) + pushl %edx + call memory_end_k + addl %eax, %ebx + movl %ebx, -60(%ebp) + movl -200(%ebp), %ebx + leal 0(,%eax,4), %esi + movl -60(%ebp), %edx + xorw %si, %si + orl $3, %esi + movl (%ebx), %ecx + sall $2, %edx + xorw %dx, %dx + leal -65536(%edx), %edi + leal 0(,%ecx,8), %ebx + orl %ecx, %edi + leal 68(%ebx), %eax + addl $64, %ebx + movl %eax, -64(%ebp) + popl %eax + popl %edx + movl %ebx, -68(%ebp) + movl $790528, %ebx +.L1080: + movl -64(%ebp), %eax + movl %ebx, %edx + movl $3320, %ecx + shrl $4, %edx + movl %edx, -244(%ebp) + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -68(%ebp), %eax + movl %ecx, %edx + orl %eax, -244(%ebp) + andl $2147483644, -244(%ebp) + orl $-2147483648, -244(%ebp) + movl -244(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $32768, %ebx + cmpl $1052672, %ebx + jne .L1080 + movl -60(%ebp), %eax + xorl %edx, %edx + call set_top_mem + jmp .L1082 +.L818: + movl $.LC48, %eax + call die + jmp .L1082 +.L808: + movl -196(%ebp), %ecx + movl $-1, (%ecx) + jmp .L818 +.L845: + movl -196(%ebp), %ebx + movl $-1, (%ebx) + jmp .L818 +.L962: + pushl $6 + movl -196(%ebp), %edx + pushl $3 + movl -124(%ebp), %ecx + pushl $3 + movl -200(%ebp), %eax + pushl $3 + pushl $4 + pushl $29 + pushl $136 + pushl (%edx) + leal -36(%ebp), %esi + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1112 + jmp .L961 +.L975: + pushl $6 + movl -196(%ebp), %ecx + pushl $3 + movl -200(%ebp), %eax + pushl $3 + pushl $3 + pushl $8 + pushl $27 + pushl $136 + pushl (%ecx) + movl -124(%ebp), %ecx + leal -36(%ebp), %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1113 + jmp .L961 +.L992: + pushl $3 + movl -196(%ebp), %ebx + pushl $1 + movl -124(%ebp), %ecx + pushl $0 + movl -200(%ebp), %eax + pushl $3 + pushl $8 + pushl $37 + pushl $140 + pushl (%ebx) + leal -36(%ebp), %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1114 + jmp .L961 +.L1001: + movl -196(%ebp), %eax + movl $-1, (%eax) + jmp .L818 +.L1055: + movl $0, -72(%ebp) + jmp .L1120 +.L987: + pushl %eax + pushl %eax + pushl $.LC37 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1001 +.L1082: + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size sdram_set_spd_registers, .-sdram_set_spd_registers + .section .rom.data.str1.1 +.LC49: + .string "Ram1." +.LC50: + .string "Ram2." +.LC51: + .string "Ram3\r\n" +.LC52: + .string "No memory\r\n" +.LC53: + .string "\tdimm_mask = " +.LC54: + .string "\tx4_mask = " +.LC55: + .string "\tx16_mask = " +.LC56: + .string "\tsingle_rank_mask = " +.LC57: + .string "\tODC = " +.LC58: + .string "\tAddr Timing= " +.LC59: + .string "Initializing memory: " +.LC60: + .string "." +.LC61: + .string " failed\r\n" +.LC62: + .string " done\r\n" +.LC63: + .string "WB" +.LC64: + .string "Setting variable MTRR %d, base: %4dMB, range: %4dMB, type %s\r\n" +.LC65: + .string "set DQS timing:RcvrEn:Pass1: " +.LC66: + .string "set DQS timing:DQSPos: " +.LC67: + .string "\r\nDQS Training Rd Wr failed ctrl" +.LC68: + .string "Total DQS Training : tsc " +.LC69: + .string "%s[%02x]=%08x%08x\r\n" +.LC70: + .string "mem_trained[" +.LC71: + .string "]=" +.LC72: + .string "mem trained failed\r\n" +.LC73: + .string "Ram4\r\n" +.LC74: + .string "set DQS timing:RcvrEn:Pass2: " + .section .rom.text +.globl sdram_initialize + .type sdram_initialize, @function +sdram_initialize: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $1356, %esp + movl 12(%ebp), %edi + movl $0, -1356(%ebp) + jmp .L1122 +.L1123: + movl -1356(%ebp), %edx + movl $.LC49, %eax + call print_debug_sdram_8 + movl 4(%edi), %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $285216802, %eax + movl (%edi), %eax + je .L1124 + movl 16(%ebp), %edx + movb $0, (%edx,%eax) + jmp .L1126 +.L1124: + movl 16(%ebp), %ecx + xorl %esi, %esi + movb $1, (%ecx,%eax) + movl 4(%edi), %ebx + movl %ebx, -1352(%ebp) +.L1127: + movl register_values.3743(,%esi,4), %edx + movl -1352(%ebp), %ecx + movl %edx, %eax + andl $255, %edx + xorb %al, %al + leal -786432(%eax,%ecx), %eax + movl $3320, %ecx + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -1364(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl register_values.3743+4(,%esi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -1368(%ebp) + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl register_values.3743+8(,%esi,4), %ecx + movl %ebx, %edx + orl %ecx, -1368(%ebp) + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %esi + cmpl $114, %esi + jne .L1127 +.L1126: + incl -1356(%ebp) + addl $36, %edi +.L1122: + movl 8(%ebp), %ecx + cmpl %ecx, -1356(%ebp) + jl .L1123 + movl 12(%ebp), %ebx + xorl %esi, %esi + jmp .L1129 +.L1130: + movl %esi, %edx + movl $.LC50, %eax + call print_debug_sdram_8 + movl 16(%ebp), %edx + movl %ebx, %eax + incl %esi + addl $36, %ebx + call sdram_set_spd_registers +.L1129: + cmpl 8(%ebp), %esi + jl .L1130 + pushl %ebx + pushl $.LC51 + pushl $.LC5 + pushl $7 + call do_printk + pushl 8(%ebp) + pushl 12(%ebp) + call memory_end_k + addl $24, %esp + testl %eax, %eax + jne .L1132 + movl $.LC52, %eax + call die +.L1132: + movl 12(%ebp), %ebx + movl $0, -1348(%ebp) + addl $12, %ebx + movl %ebx, -1240(%ebp) + jmp .L1134 +.L1135: + movl -1348(%ebp), %esi + movl 16(%ebp), %eax + cmpb $0, (%esi,%eax) + je .L1136 + movl -1240(%ebp), %edx + movl (%edx), %esi + movl $3320, %edx + orl $2368, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + imull $48, -1348(%ebp), %ebx + movl %eax, %ecx + movl 16(%ebp), %edx + cmpl $0, 8(%ebx,%edx) + jne .L1138 + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + orb $64, %ch + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L1136 +.L1138: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + orl $8, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl 16(%ebp), %eax + addl %ebx, %eax + movl 8(%eax), %edx + leal 8(%eax), %esi + movb 45(%esi), %al + movl %edx, %ecx + andl $15, %ecx + cmpb $1, %al + je .L1142 + jb .L1141 + cmpb $2, %al + je .L1143 + cmpb $3, %al + jne .L1336 + jmp .L1144 +.L1141: + cmpl $3, %ecx + jne .L1146 + jmp .L1145 +.L1142: + cmpl $3, %ecx + jne .L1147 + cmpl $0, 24(%esi) + jne .L1145 + movl 28(%esi), %eax + testl %eax, %eax + jne .L1150 + movl 32(%esi), %eax + movl $3419904, %edi + movl $1119010, -1344(%ebp) + testl %eax, %eax + je .L1155 + cmpl $3, %eax + movl $12032, %edi + je .L1155 + movl $3616512, %edi + jmp .L1347 +.L1150: + cmpl $1, %eax + jne .L1157 + cmpl $1, 32(%esi) + jmp .L1352 +.L1157: + cmpl $2, %eax + jne .L1145 + cmpl $2, 32(%esi) +.L1352: + jne .L1145 + jmp .L1159 +.L1147: + cmpl $0, 24(%esi) + jne .L1161 + cmpl $0, 28(%esi) + jne .L1161 + movl 32(%esi), %eax + decl %eax + cmpl $1, %eax + ja .L1161 + jmp .L1146 +.L1143: + cmpl $3, %ecx + movl $2105888, %edi + jne .L1166 + cmpl $0, 24(%esi) + jne .L1167 + movl 28(%esi), %eax + testl %eax, %eax + jne .L1169 + movl 32(%esi), %eax + movl $2826784, %edi + movl $1119010, -1344(%ebp) + testl %eax, %eax + je .L1155 + cmpl $3, %eax + movl $3154464, %edi + je .L1155 + movl $2761248, %edi +.L1347: + movl $1, %ebx + jmp .L1156 +.L1169: + cmpl $1, %eax + jne .L1174 + cmpl $1, 32(%esi) + jmp .L1351 +.L1174: + cmpl $2, %eax + jne .L1167 + cmpl $2, 32(%esi) +.L1351: + jne .L1167 + jmp .L1176 +.L1144: + cmpl $3, %ecx + movl $2106656, %edi + movl $1126946, -1344(%ebp) + jne .L1155 + jmp .L1178 +.L1336: + movl $1118754, -1344(%ebp) + movl $3092224, %edi + xorl %ebx, %ebx +.L1156: + movl $.LC53, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC56, %eax + call print_raminit + movl -1344(%ebp), %edx + movl $.LC57, %eax + call print_raminit + movl %edi, %edx + movl $.LC58, %eax + call print_raminit + testl %ebx, %ebx + je .L1180 +.L1181: + movl -1240(%ebp), %edx + movl (%edx), %ecx + orl $2368, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, -1364(%ebp) + movl $3320, %ecx + movl -1364(%ebp), %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -1368(%ebp) + movl %ecx, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $1048576, -1368(%ebp) + movl %ebx, %edx + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP +.L1180: + movl (%esi), %eax + testb $15, %al + jne .L1182 + testb $-16, %al + je .L1182 + movl -1240(%ebp), %ebx + movl $32, %ecx + movl $152, %edx + pushl -1344(%ebp) + movl (%ebx), %eax + call pci_write_config32_index_wait + movl $36, %ecx + movl $152, %edx + pushl %edi + movl (%ebx), %eax + call pci_write_config32_index_wait + popl %edx + popl %ecx + jmp .L1136 +.L1182: + movl -1240(%ebp), %ebx + xorl %ecx, %ecx + movl $152, %edx + pushl -1344(%ebp) + movl (%ebx), %eax + call pci_write_config32_index_wait + cmpb $0, 43(%esi) + popl %eax + je .L1185 + pushl -1344(%ebp) + movl $32, %ecx + movl (%ebx), %eax + movl $152, %edx + call pci_write_config32_index_wait + popl %eax +.L1185: + movl -1240(%ebp), %ebx + movl $4, %ecx + movl $152, %edx + pushl %edi + movl (%ebx), %eax + call pci_write_config32_index_wait + cmpb $0, 43(%esi) + popl %eax + je .L1136 + pushl %edi + movl (%ebx), %eax + movl $36, %ecx + movl $152, %edx + call pci_write_config32_index_wait + popl %eax +.L1136: + incl -1348(%ebp) + addl $36, -1240(%ebp) +.L1134: + movl 8(%ebp), %esi + cmpl %esi, -1348(%ebp) + jl .L1135 + movl 12(%ebp), %edi + movl $0, -1236(%ebp) + jmp .L1189 +.L1190: + movl -1236(%ebp), %eax + movl 16(%ebp), %edx + cmpb $0, (%eax,%edx) + je .L1191 + movl 12(%edi), %ecx + movl $3320, %edx + shrl $4, %ecx + movl %ecx, %eax + andl $268435452, %eax + orl $-2147483500, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testb $8, %al + je .L1191 + andl $268435452, %ecx + movb $-8, %dl + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testl $524288, %eax + movl %eax, %ebx + je .L1194 + movl 16(%edi), %eax + movb $-8, %dl + orl $1088, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -1364(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + orl $4194304, %esi + testb $8, %bh + movl %eax, -1368(%ebp) + je .L1196 + movl %eax, %esi + orl $12582912, %esi +.L1196: + movl $3320, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1194: + movl $3320, %esi + movl %ecx, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + orl $1, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1191: + incl -1236(%ebp) + addl $36, %edi +.L1189: + movl 8(%ebp), %ecx + cmpl %ecx, -1236(%ebp) + jl .L1190 + movl 16(%ebp), %ebx + movl 12(%ebp), %edi + movl $0, -1232(%ebp) + addl $8, %ebx + movl %ebx, -1360(%ebp) + jmp .L1199 +.L1200: + movl -1232(%ebp), %esi + movl 16(%ebp), %eax + cmpb $0, (%esi,%eax) + je .L1201 + movl -1360(%ebp), %edx + cmpl $0, (%edx) + je .L1201 + pushl %eax + xorl %ebx, %ebx + pushl $.LC59 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1204: + movl 12(%edi), %eax + movl $3320, %edx + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + incl %ebx + movl %eax, %esi + testl $1023, %ebx + jne .L1205 + pushl %eax + pushl $.LC60 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1205: + andl $1, %esi + je .L1208 + cmpl $299999, %ebx + jg .L1210 + jmp .L1204 +.L1208: + cmpl $299999, %ebx + jle .L1209 +.L1210: + pushl %esi + pushl $.LC61 + jmp .L1348 +.L1209: + movl 12(%edi), %ecx + orb $10, %ch + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx +.L1211: + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1211 + pushl %ebx + pushl $.LC62 +.L1348: + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1201: + incl -1232(%ebp) + addl $36, %edi + addl $48, -1360(%ebp) +.L1199: + movl 8(%ebp), %edx + cmpl %edx, -1232(%ebp) + jl .L1200 + xorl %edi, %edi + movl $0, -1304(%ebp) + jmp .L1214 +.L1215: + movl 12(%ebp), %ebx + leal 64(%edi), %ecx + movl $3320, %edx + movl %ecx, -1332(%ebp) + movl 8(%ebx), %ebx + shrl $4, %ebx + movl %ebx, %eax + orl %ecx, %eax + andl $2147483644, %eax + movl %ebx, -1336(%ebp) + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + andl $3, %eax + cmpl $3, %eax + jne .L1216 + leal 68(%edi), %esi + movb $-8, %dl + movl %esi, -1340(%ebp) + movl -1336(%ebp), %esi + orl -1340(%ebp), %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + xorw %cx, %cx + cmpl $12582912, %ecx + ja .L1216 + addl $65536, %eax + xorw %ax, %ax + cmpl $12582912, %eax + jbe .L1216 + movl 8(%ebp), %ecx + decl %ecx + movl %ecx, %edi + sall $3, %edi + movl %ecx, -1308(%ebp) + jmp .L1219 +.L1220: + movl -1336(%ebp), %eax + leal 64(%edi), %ebx + movl $3320, %edx + movl %ebx, -1316(%ebp) + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + andl $3, %eax + cmpl $3, %eax + jne .L1221 + leal 68(%edi), %eax + movb $-8, %dl + movl %eax, -1320(%ebp) + movl -1336(%ebp), %eax + orl -1320(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + addl $4194304, %ebx + addl $4194304, %eax + movl %ebx, -1328(%ebp) + movl 12(%ebp), %ebx + movl %eax, -1324(%ebp) + movl $0, -1312(%ebp) + addl $8, %ebx + jmp .L1223 +.L1224: + movl -36(%ebx), %ecx + movl -1320(%ebp), %eax + shrl $4, %ecx + orl %ecx, %eax + movl %ecx, -1368(%ebp) + andl $2147483644, %eax + movl $3320, %ecx + orl $-2147483648, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -1324(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -1316(%ebp), %eax + movl %ecx, %edx + orl %eax, -1368(%ebp) + andl $2147483644, -1368(%ebp) + orl $-2147483648, -1368(%ebp) + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl -1328(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + incl -1312(%ebp) +.L1223: + movl 8(%ebp), %ecx + addl $36, %ebx + cmpl %ecx, -1312(%ebp) + jl .L1224 +.L1221: + decl -1308(%ebp) + subl $8, %edi +.L1219: + movl -1304(%ebp), %ebx + cmpl %ebx, -1308(%ebp) + jg .L1220 + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl 12(%ebp), %ecx + leal 4194304(%eax), %esi + xorl %ebx, %ebx + addl $8, %ecx + jmp .L1226 +.L1227: + movl -36(%ecx), %eax + movl $3320, %edx + shrl $4, %eax + orl -1340(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + incl %ebx +.L1226: + addl $36, %ecx + cmpl 8(%ebp), %ebx + jl .L1227 + imull $36, -1304(%ebp), %eax + movl 12(%ebp), %edx + movl 8(%eax,%edx), %ebx + movl $3320, %edx + movl -1332(%ebp), %eax + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + xorw %cx, %cx + shrl $2, %ecx + cmpl $3145728, %ecx + jne .L1229 + movl 12(%ebp), %ebx + movzwl %ax,%ecx + xorl %esi, %esi + orl $16777216, %ecx + addl $8, %ebx + jmp .L1231 +.L1232: + movl -36(%ebx), %eax + movl $3320, %edx + shrl $4, %eax + orl -1332(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + incl %esi +.L1231: + addl $36, %ebx + cmpl 8(%ebp), %esi + jl .L1232 + jmp .L1233 +.L1229: + movl %ebx, %eax + movl $3320, %edx + andl $268435452, %eax + orl $-2147483408, %eax +#APP + outl %eax, %dx +#NO_APP + leal 1048576(%ecx), %eax + movb $-4, %dl + shrl $6, %eax + andl $65280, %eax + subl $1073741823, %eax +#APP + outl %eax, %dx +#NO_APP +.L1233: + pushl 8(%ebp) + pushl 12(%ebp) + call memory_end_k + popl %edx + movl $3145728, %edx + popl %ecx + call set_top_mem + jmp .L1234 +.L1216: + incl -1304(%ebp) + addl $8, %edi +.L1214: + movl 8(%ebp), %edx + cmpl %edx, -1304(%ebp) + jl .L1215 +.L1234: + movl $-1073676262, %ecx +#APP + rdmsr +#NO_APP + movl 16(%ebp), %ecx + sall $24, %edx + shrl $8, %eax + orl %eax, %edx + shrl $2, %edx + movl %edx, 688(%ecx) + movl $-1073676259, %ecx +#APP + rdmsr +#NO_APP + movl 16(%ebp), %ebx + shrl $8, %eax + sall $24, %edx + orl %eax, %edx + shrl $2, %edx + movl %ebx, %eax + movl %edx, 692(%ebx) + addl $8, %eax + xorl %edx, %edx + jmp .L1235 +.L1236: + movl 16(%ebp), %esi + cmpb $0, (%edx,%esi) + movb $0, 680(%edx,%esi) + je .L1237 + cmpl $0, (%eax) + je .L1237 + movb $-128, 680(%edx,%esi) +.L1237: + incl %edx + addl $48, %eax +.L1235: + cmpl 8(%ebp), %edx + jl .L1236 + movl 16(%ebp), %eax + movl $592, %ecx + movl 16(%ebp), %edx + movl 692(%eax), %eax + movl 688(%edx), %ebx + movl %eax, -1300(%ebp) + movl $505290270, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP + movb $88, %cl +#APP + wrmsr +#NO_APP + testl %ebx, %ebx + je .L1241 + jmp .L1338 +.L1243: +#APP + bsfl %edi,%ecx + jnz 1f + movl $32,%ecx +1: + bsrl -1292(%ebp),%eax + jnz 1f + movl $0,%eax +1: +#NO_APP + cmpl %eax, %ecx + jbe .L1244 + movl %eax, %ecx +.L1244: + movl $1, -1296(%ebp) + sall %cl, -1296(%ebp) + pushl %eax + pushl %eax + movl -1296(%ebp), %eax + pushl $.LC63 + shrl $10, %eax + pushl %eax + movl %edi, %eax + shrl $10, %eax + pushl %eax + pushl -1244(%ebp) + pushl $.LC64 + pushl $7 + call do_printk + addl $32, %esp + cmpl $4194303, -1296(%ebp) + ja .L1245 + movl -1296(%ebp), %ebx + movl $255, -1256(%ebp) + sall $10, %ebx + negl %ebx + jmp .L1247 +.L1245: + movl -1296(%ebp), %eax + xorl %ebx, %ebx + shrl $22, %eax + negl %eax + andl $255, %eax + movl %eax, -1256(%ebp) +.L1247: + cmpl $7, -1244(%ebp) + ja .L1248 + cmpl $0, -1296(%ebp) + jne .L1250 + xorl %eax, %eax + movl %esi, %ecx + movl %eax, %edx + jmp .L1349 +.L1250: + movl %edi, %eax + movl %edi, %edx + sall $10, %eax + leal -1(%esi), %ecx + orl $6, %eax + shrl $22, %edx +#APP + wrmsr +#NO_APP + movl -1256(%ebp), %edx + orb $8, %bh + movl %esi, %ecx + movl %ebx, %eax +.L1349: +#APP + wrmsr +#NO_APP +.L1248: + incl -1244(%ebp) + addl $2, %esi + cmpl $8, -1244(%ebp) + je .L1241 + movl -1296(%ebp), %ebx + addl -1296(%ebp), %edi + subl %ebx, -1292(%ebp) + jne .L1243 +.L1241: + cmpl $0, -1300(%ebp) + jne .L1253 +.L1254: + movl 12(%ebp), %esi + movl $0, -1288(%ebp) + movl %esi, -1248(%ebp) + jmp .L1255 +.L1253: + movl $-1073676272, %ecx +#APP + rdmsr +#NO_APP + orl $6291456, %eax +#APP + wrmsr +#NO_APP + jmp .L1254 +.L1256: + movl -1288(%ebp), %eax + movl 16(%ebp), %edx + cmpb $-128, 680(%eax,%edx) + jne .L1257 + movl -1248(%ebp), %ecx + movl -1288(%ebp), %ebx + movl 8(%ecx), %eax + leal 64(,%ebx,8), %edx + shrl $4, %eax + orl %edx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl 16(%ebp), %esi + movl %eax, 696(%esi,%ebx,4) + movl %ebx, %eax + movl $64, %ebx + sall $5, %eax + leal 728(%eax,%esi), %ecx + xorl %esi, %esi +.L1259: + movl -1248(%ebp), %edx + movl 12(%edx), %eax + movl $3320, %edx + shrl $4, %eax + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + incl %esi + addl $4, %ebx + movl %eax, (%ecx) + addl $4, %ecx + cmpl $8, %esi + jne .L1259 + movl -1248(%ebp), %ecx + movb $-8, %dl + movl 8(%ecx), %eax + orb $15, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -1288(%ebp), %ecx + movl 16(%ebp), %ebx + movl %eax, 984(%ebx,%ecx,4) +#APP + rdtsc +#NO_APP + movl %eax, -52(%ebp) + pushl %eax + pushl $.LC65 + pushl $.LC5 + pushl $7 + movl %edx, -48(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl -1248(%ebp), %eax + movl %ebx, %ecx + movl $1, %edx + call train_DqsRcvrEn + addl $16, %esp + testl %eax, %eax + je .L1261 + movl -1288(%ebp), %esi + movb $-127, 680(%esi,%ebx) + jmp .L1263 +.L1261: + pushl %esi + pushl $.LC62 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + addl $12, %esp + pushl $.LC66 + pushl $.LC5 + pushl $7 + movl %edx, -40(%ebp) + movl %eax, -44(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl -1248(%ebp), %edx + movl 16(%ebp), %ecx + movl (%edx), %eax + imull $48, %eax, %edx + imull $36, %eax, %eax + movb 51(%edx,%ecx), %dl + addl $1016, %ecx + addl %ecx, %eax + movl %ecx, -1264(%ebp) + movl %eax, -1272(%ebp) + movb %dl, -1273(%ebp) +#APP + movl %cr4, %eax +#NO_APP + orb $2, %ah +#APP + movl %eax, %cr4 +#NO_APP + call set_wrap32dis + movl -1248(%ebp), %ebx + movl 12(%ebx), %ecx + movl $3320, %ebx + movl %ebx, %edx + orb $9, %ch + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -1284(%ebp) + movl %ebx, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -1284(%ebp), %eax + movb $-4, %dl + andl $-524289, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1204(%ebp), %ecx + addl $16, %esp + andl $-16, %ecx + xorl %edx, %edx + cmpb $0, -1273(%ebp) + movl %ecx, -1280(%ebp) + je .L1269 +.L1266: + movl TestPatternJD1b.5567(,%edx,4), %eax + movl -1280(%ebp), %ebx + movl %eax, (%ebx,%edx,4) + incl %edx + cmpl $288, %edx + jne .L1266 + movl $1, -1268(%ebp) + jmp .L1268 +.L1269: + movl TestPatternJD1a.5566(,%edx,4), %eax + movl -1280(%ebp), %esi + movl %eax, (%esi,%edx,4) + incl %edx + cmpl $144, %edx + jne .L1269 + movl $0, -1268(%ebp) +.L1268: + movl -1248(%ebp), %edx + xorl %ebx, %ebx + movl 16(%ebp), %ecx + imull $48, (%edx), %eax + movl 8(%eax,%ecx), %eax + testb $15, %al + jne .L1273 + xorl %ebx, %ebx + testb $-16, %al + setne %bl +.L1273: + xorl %edi, %edi + jmp .L1323 +.L1275: + xorl %esi, %esi +.L1276: + movl -1248(%ebp), %eax + xorl %ecx, %ecx + movl %ebx, %edx + pushl %esi + call SetDQSDelayAllCSR + movl -1248(%ebp), %eax + movl $1, %ecx + pushl 16(%ebp) + movl %ebx, %edx + pushl -1272(%ebp) + pushl -1280(%ebp) + pushl -1268(%ebp) + call TrainDQSPos + addl $20, %esp + testl %eax, %eax + je .L1277 + incl %esi + orl %eax, %edi + cmpl $48, %esi + je .L1279 + jmp .L1276 +.L1277: + pushl 16(%ebp) + xorl %ecx, %ecx + pushl -1272(%ebp) + movl %ebx, %edx + pushl -1280(%ebp) + pushl -1268(%ebp) + movl -1248(%ebp), %eax + call TrainDQSPos + addl $16, %esp + movl %eax, %edi +.L1279: + cmpb $1, -1273(%ebp) + adcl $1, %ebx +.L1323: + cmpl $1, %ebx + ja .L1282 + testl %edi, %edi + je .L1275 +.L1282: + movl -1248(%ebp), %ebx + movl $3320, %ecx + movl %ecx, %edx + movl 12(%ebx), %esi + orl $2304, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, -1364(%ebp) + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $524288, -1284(%ebp) + andl $-524289, %esi + orl -1284(%ebp), %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + call clear_wrap32dis +#APP + movl %cr4, %eax +#NO_APP + andb $253, %ah +#APP + movl %eax, %cr4 +#NO_APP + testl %edi, %edi + je .L1283 + pushl %ebx + pushl $.LC67 + pushl $.LC5 + pushl $3 + call do_printk + movl -1248(%ebp), %ecx + addl $12, %esp + pushl (%ecx) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $3 + call do_printk + movl -1288(%ebp), %ebx + movl 16(%ebp), %esi + movb $-126, 680(%ebx,%esi) + jmp .L1350 +.L1283: + movl -1248(%ebp), %edx + xorl %edi, %edi + movl $1, -20(%ebp) + movl $0, -16(%ebp) + imull $36, (%edx), %eax + addl -1264(%ebp), %eax + movl %eax, -1260(%ebp) + jmp .L1285 +.L1286: + movl -1252(%ebp), %ecx + movl $4, %edx + movl %edi, %eax + pushl -1260(%ebp) + movl -24(%ebp,%ecx,4), %esi + movl %esi, %ecx + call get_dqs_delay + movl $5, %edx + popl %ecx + movl %esi, %ecx + pushl -1260(%ebp) + movzbl %al, %ebx + movl %edi, %eax + call get_dqs_delay + popl %edx + movzbl %al, %edx + cmpl %edx, %ebx + jbe .L1287 + subl %edx, %ebx + imull $255, %ebx, %eax + shrl $8, %eax + leal (%eax,%edx), %ebx +.L1287: + movl -1248(%ebp), %eax + movl $8, %ecx + movl %edi, %edx + pushl %ebx + pushl %esi + call SetDQSDelayCSR + movzbl %bl, %eax + movl %esi, %ecx + pushl %eax + movl $8, %edx + pushl -1260(%ebp) + movl %edi, %eax + call save_dqs_delay + addl $16, %esp + incl -1252(%ebp) + cmpl $3, -1252(%ebp) + jne .L1286 + incl %edi + cmpl $2, %edi + je .L1343 + jmp .L1285 +.L1291: + movl -1288(%ebp), %ebx + movl 16(%ebp), %esi + movb $-125, 680(%ebx,%esi) + jmp .L1263 +.L1346: + pushl %ecx + pushl $.LC62 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + movl %edx, -24(%ebp) + movl %eax, -28(%ebp) +.L1350: + addl $16, %esp +.L1263: + xorl %ebx, %ebx +.L1293: + leal -52(%ebp), %eax + pushl %edx + pushl %edx + pushl (%eax,%ebx,8) + pushl 4(%eax,%ebx,8) + pushl %ebx + incl %ebx + pushl $.LC68 + pushl $.LC69 + pushl $7 + call do_printk + addl $32, %esp + cmpl $4, %ebx + jne .L1293 + movl -1288(%ebp), %eax + movl 16(%ebp), %edx + cmpb $-128, 680(%eax,%edx) + jne .L1257 + movb $1, 680(%eax,%edx) +.L1257: + incl -1288(%ebp) + addl $36, -1248(%ebp) +.L1255: + movl 8(%ebp), %ecx + cmpl %ecx, -1288(%ebp) + jl .L1256 + movl 16(%ebp), %esi + movl $-1073676272, %ecx + movl 692(%esi), %ebx +#APP + rdmsr +#NO_APP + orl $524288, %eax +#APP + wrmsr +#NO_APP + xorl %eax, %eax + movl $592, %ecx + movl %eax, %edx +#APP + wrmsr +#NO_APP + movb $88, %cl +#APP + wrmsr +#NO_APP + movb $4, %cl +.L1297: + xorl %eax, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP + incl %ecx + cmpl $528, %ecx + jne .L1297 + testl %ebx, %ebx + je .L1299 + movl $-1073676272, %ecx +#APP + rdmsr +#NO_APP + andl $-6291457, %eax +#APP + wrmsr +#NO_APP +.L1299: + movl 16(%ebp), %ecx + xorl %ebx, %ebx + movl 1432(%ecx), %edi + movl $1, %ecx + cmpl $1, %edi + jne .L1303 + jmp .L1301 +.L1304: + movl 16(%ebp), %esi + cmpb $0, 680(%ecx,%esi) + je .L1305 + movl $1, %eax + sall %cl, %eax + orl %eax, %ebx +.L1305: + incl %ecx +.L1303: + cmpl %edi, %ecx + jb .L1304 + movl $1, %ecx +.L1308: + movl $1, %eax + sall %cl, %eax + testl %eax, %ebx + je .L1309 + movl 16(%ebp), %edx + cmpb $-128, 680(%edx,%ecx) + je .L1309 + notl %eax + andl %eax, %ebx +.L1309: + testl %ebx, %ebx + jne .L1312 + xorl %esi, %esi + jmp .L1314 +.L1312: + leal 1(%ecx), %eax + xorl %edx, %edx + divl %edi + movl %edx, %ecx + jmp .L1308 +.L1315: + pushl %edi + pushl $.LC70 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC71 + pushl $.LC5 + pushl $7 + call do_printk + movl 16(%ebp), %ecx + addl $12, %esp + movzbl 680(%ebx,%ecx), %eax + pushl %eax + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl 16(%ebp), %edx + addl $16, %esp + movb 680(%ebx,%edx), %al + addl $127, %eax + cmpb $2, %al + ja .L1316 + movl $1, %esi +.L1316: + incl %ebx +.L1314: + movl 16(%ebp), %ecx + cmpl 1432(%ecx), %ebx + jb .L1315 + testl %esi, %esi + je .L1301 + pushl %ecx + pushl $.LC72 + pushl $.LC5 + pushl $7 + call do_printk + call soft_reset + addl $16, %esp +.L1301: + pushl %edx + pushl $.LC73 + pushl $.LC5 + pushl $7 + call do_printk + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L1178: + movl $2106656, %edi + movl $1127202, -1344(%ebp) + jmp .L1155 +.L1176: + movl $2892320, %edi + movl $1119010, -1344(%ebp) + jmp .L1155 +.L1167: + movl $2105888, %edi + movl $1119010, -1344(%ebp) + jmp .L1155 +.L1159: + movl $3682048, %edi + movl $1119010, -1344(%ebp) + jmp .L1155 +.L1145: + movl $1119010, -1344(%ebp) + movl $3092224, %edi +.L1155: + movl $.LC53, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC56, %eax + call print_raminit + movl -1344(%ebp), %edx + movl $.LC57, %eax + call print_raminit + movl %edi, %edx + movl $.LC58, %eax + call print_raminit + jmp .L1181 +.L1161: + movl $2830080, %edi + jmp .L1166 +.L1146: + movl $3092224, %edi +.L1166: + movl $.LC53, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC56, %eax + call print_raminit + movl $1118754, %edx + movl $.LC57, %eax + call print_raminit + movl %edi, %edx + movl $.LC58, %eax + call print_raminit + movl $1118754, -1344(%ebp) + jmp .L1180 +.L1285: + movl $1, -1252(%ebp) + jmp .L1286 +.L1343: + pushl %eax + pushl $.LC62 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + addl $12, %esp + pushl $.LC74 + pushl $.LC5 + pushl $7 + movl %edx, -32(%ebp) + movl %eax, -36(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl 16(%ebp), %ecx + movl $2, %edx + movl -1248(%ebp), %eax + call train_DqsRcvrEn + addl $16, %esp + testl %eax, %eax + jne .L1291 + jmp .L1346 +.L1338: + xorl %edi, %edi + movl $517, %esi + movl $2, -1244(%ebp) + movl %ebx, -1292(%ebp) + jmp .L1243 + .size sdram_initialize, .-sdram_initialize + .section .rom.data.str1.1 +.LC75: + .string "Testing DRAM : %08x - %08x\r\n" +.LC76: + .string "DRAM fill: 0x%08x-0x%08x\r\n" +.LC77: + .string "%08x \r" +.LC78: + .string "%08x\r\nDRAM filled\r\n" +.LC79: + .string "DRAM verify: 0x%08x-0x%08x\r\n" +.LC80: + .string "Fail: @0x%08x Read value=0x%08x\r\n" +.LC81: + .string "Aborting.\n\r" +.LC82: + .string "\r\nDRAM did _NOT_ verify!\r\n" +.LC83: + .string "DRAM ERROR" +.LC84: + .string "\r\nDRAM range verified.\r\n" +.LC85: + .string "Done.\r\n" + .section .rom.text +.globl ram_check + .type ram_check, @function +ram_check: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $12, %esp + movl 12(%ebp), %edi + movl 8(%ebp), %esi + pushl %edi + pushl %esi + movl %esi, %ebx + pushl $.LC75 + pushl $7 + call do_printk + pushl %edi + pushl %esi + pushl $.LC76 + pushl $7 + call do_printk + addl $32, %esp + jmp .L1354 +.L1355: + testl $1048575, %ebx + jne .L1356 + pushl %eax + pushl %ebx + pushl $.LC77 + pushl $7 + call do_printk + addl $16, %esp +.L1356: +#APP + movnti %ebx, (%ebx) +#NO_APP + addl $4, %ebx +.L1354: + cmpl %edi, %ebx + jb .L1355 + pushl %eax + pushl %ebx + xorl %ebx, %ebx + pushl $.LC78 + pushl $7 + call do_printk + pushl %edi + pushl %esi + pushl $.LC79 + pushl $7 + call do_printk + addl $32, %esp + jmp .L1359 +.L1360: + testl $1048575, %esi + jne .L1361 + pushl %eax + pushl %esi + pushl $.LC77 + pushl $7 + call do_printk + addl $16, %esp +.L1361: + movl (%esi), %eax + cmpl %esi, %eax + je .L1363 + pushl %eax + incl %ebx + pushl %esi + pushl $.LC80 + pushl $3 + call do_printk + addl $16, %esp + cmpl $256, %ebx + jg .L1371 +.L1363: + addl $4, %esi +.L1359: + cmpl %edi, %esi + jb .L1360 + pushl %eax + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $16, %esp + testl %ebx, %ebx + je .L1368 +.L1366: + pushl %eax + pushl %eax + pushl $.LC82 + pushl $7 + call do_printk + movl $.LC83, %eax + call die + jmp .L1372 +.L1371: + pushl %edi + pushl %edi + pushl $.LC81 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1366 +.L1368: + pushl %esi + pushl %esi + pushl $.LC84 + pushl $7 + call do_printk +.L1372: + movl $.LC85, 12(%ebp) + addl $16, %esp + movl $7, 8(%ebp) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + jmp do_printk + .size ram_check, .-ram_check + .section .rom.data.str1.1 +.LC86: + .string "\r\n\r\n\r\nINIT detected from " +.LC87: + .string "%s --- { APICID = %02x NODEID = %02x COREID = %02x} ---\r\n" +.LC88: + .string "\r\nIssuing SOFT_RESET...\r\n" +.LC89: + .string "fidvid_ap_stage1: time out while reading from BSP on " +.LC90: + .string "fidvid_ap_stage3: time out while reading from BSP on " +.LC91: + .string "while waiting for BSP signal to STOP, timeout in ap " +.LC92: + .string "BIST failed: %08x" +.LC93: + .string "*sysinfo range: [" +.LC94: + .string "," +.LC95: + .string ")\r\n" +.LC96: + .string "bsp_apicid=" +.LC97: + .string "core0 started: " +.LC98: + .string "started ap apicid: " +.LC99: + .string "begin msr fid, vid " +.LC100: + .string "end msr fid, vid " +.LC101: + .string "ht reset -\r\n" +.LC102: + .string "v_esp=" +.LC103: + .string "testx = " +.LC104: + .string "Copying data from cache to RAM -- switching to use RAM as stack... " +.LC105: + .string "Done\r\n" +.LC106: + .string "Disabling cache as ram now \r\n" +.LC107: + .string "Clearing initial memory region: " +.LC108: + .string "Uncompressing coreboot to RAM.\r\n" +.LC109: + .string "src=" +.LC110: + .string "dst=" +.LC111: + .string "coreboot_ram.nrv2b length = " +.LC112: + .string "coreboot_ram.bin length = " +.LC113: + .string "Jumping to coreboot.\r\n" +.LC114: + .string "should not be here -\r\n" +.LC115: + .string "fidvid_ap_stage2: time out while reading from BSP on " +.LC116: + .string "fidvid_bsp_stage1: time out while reading from ap " +.LC117: + .string "fidvid_bsp_stage2: time out while reading from ap " + .section .rom.text +.globl real_main + .type real_main, @function +real_main: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $348, %esp + cmpl $0, 8(%ebp) + jne .L1374 + call read_nb_cfg_54 + leal -112(%ebp), %edx + pushl %eax + pushl %edx + call get_node_core_id + movl -108(%ebp), %esi + movl -112(%ebp), %ebx + popl %edx + testl %esi, %esi + movl %esi, -156(%ebp) + movl %ebx, -160(%ebp) + jne .L1376 + movl $-1073676257, %ecx +#APP + rdmsr +#NO_APP + orl $4194304, %edx +#APP + wrmsr +#NO_APP +.L1376: + movl $27, %ecx +#APP + rdmsr +#NO_APP + andl $2047, %eax + xorb %dl, %dl + orl $-18872320, %eax +#APP + wrmsr +#NO_APP + movl -18874336, %edi + shrl $24, %edi + cmpl $0, 12(%ebp) + je .L1378 + pushl %eax + pushl %eax + pushl %esi + pushl %ebx + pushl %edi + pushl $.LC86 + pushl $.LC87 + pushl $7 + call do_printk + addl $28, %esp + pushl $.LC88 + pushl $.LC5 + pushl $7 + call do_printk + call soft_reset + addl $16, %esp +.L1378: + cmpl $0, -156(%ebp) + jne .L1380 + movl -160(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + addl $24, %eax + andl $31, %eax + sall $11, %eax + orl $-2147483540, %eax + movl %eax, -340(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $112, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1380: + movl %edi, %ecx + sall $24, %ecx + movl %ecx, %eax + orl $51, %eax + testl %edi, %edi + movl %ecx, -288(%ebp) + movl %eax, -18873472 + je .L1374 + cmpl $0, -156(%ebp) + jne .L1383 + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + movl %eax, -336(%ebp) + shrl $16, %eax + movl %edx, %ebx + andl $63, %eax + cmpl $41, %eax + jbe .L1385 + movl -336(%ebp), %eax + shrl $8, %eax + andl $63, %eax + addl $10, %eax + cmpl $41, %eax + jbe .L1385 + movl $12, %eax +.L1385: + movl %ebx, %esi + andl $63, %ebx + andl $63, -336(%ebp) + andl $4128768, %esi + sall $8, %eax + movl $-1073676223, %ecx + orl -288(%ebp), %eax + movl $1, %edx + sall $8, %ebx + orl -336(%ebp), %ebx + orl %eax, %esi + movl %ebx, %eax +#APP + wrmsr +#NO_APP + xorl %eax, %eax + movl $0, -28(%ebp) + call wait_cpu_state + testl %eax, %eax + je .L1388 + movl %edi, %edx + movl $.LC89, %eax + call print_initcpu8 +.L1388: + movl %esi, %eax + movl $999999, %ebx + orl $1, %eax + movl %eax, -18873472 +.L1390: + xorl %eax, %eax + movl $896, %edx + leal -28(%ebp), %ecx + call lapic_remote_read + testl %eax, %eax + jne .L1391 + movzbl -25(%ebp), %eax + cmpl %edi, %eax + je .L1393 +.L1391: + decl %ebx + je .L1533 + jmp .L1390 +.L1393: + movl -28(%ebp), %edx + movl $1, %ecx + movl %edi, %eax + andl $16776960, %edx + call set_fidvid + movl %eax, %esi + andl $16776960, %esi + orl -288(%ebp), %esi + movl %eax, -28(%ebp) +.L1395: + orl $2, %esi + xorl %eax, %eax + movl $3, %edx + movl %esi, -18873472 + call wait_cpu_state + testl %eax, %eax + je .L1383 + movl %edi, %edx + movl $.LC90, %eax + call print_initcpu8 +.L1383: + movl $99, %ebx +.L1397: + xorl %eax, %eax + movl $68, %edx + call wait_cpu_state + testl %eax, %eax + je .L1398 + decl %ebx + cmpl $-1, %ebx + jne .L1397 + movl %edi, %edx + movl $.LC91, %eax + call print_initcpu8 +.L1398: + orl $68, -288(%ebp) + movl -288(%ebp), %edx + movl %edx, -18873472 + call set_init_ram_access +#APP + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax, %cr0 + movl $0x269, %ecx + xorl %edx, %edx + xorl %eax, %eax + wrmsr + movl $0xC0010010, %ecx + rdmsr + andl $(~(3<<18)), %eax + wrmsr + movl $0x2ff, %ecx + xorl %edx, %edx + movl $0x00000800, %eax + wrmsr + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + +#NO_APP +.L1401: +#APP + hlt +#NO_APP + jmp .L1401 +.L1374: + movb $-121, %al +#APP + outb %al, $46 +#NO_APP + movb $1, %al +#APP + outb %al, $46 +#NO_APP + movb $85, %al +#APP + outb %al, $46 + outb %al, $46 +#NO_APP + movb $35, %al +#APP + outb %al, $46 +#NO_APP + movb $17, %al +#APP + outb %al, $47 +#NO_APP + movb $36, %al +#APP + outb %al, $46 + inb $47, %al +#NO_APP + testb $14, %al + movb %al, %dl + je .L1402 + movb $36, %al +#APP + outb %al, $46 +#NO_APP + orl $16, %edx + movzbl %dl, %eax +#APP + outb %al, $47 +#NO_APP + movb $7, %al +#APP + outb %al, $46 + outb %al, $47 +#NO_APP + movb $100, %al +#APP + outb %al, $46 +#NO_APP + movb $8, %al +#APP + outb %al, $47 +#NO_APP + movb $101, %al +#APP + outb %al, $46 +#NO_APP + movb $32, %al +#APP + outb %al, $47 +#NO_APP +.L1402: + movb $7, %al +#APP + outb %al, $46 +#NO_APP + movb $1, %cl + movb %cl, %al +#APP + outb %al, $47 +#NO_APP + movb $48, %dl + movb %dl, %al +#APP + outb %al, $46 +#NO_APP + xorl %eax, %eax +#APP + outb %al, $47 +#NO_APP + movb $96, %al +#APP + outb %al, $46 +#NO_APP + movb $3, %al +#APP + outb %al, $47 +#NO_APP + movb $97, %al +#APP + outb %al, $46 +#NO_APP + movb $-8, %al +#APP + outb %al, $47 +#NO_APP + movb %dl, %al +#APP + outb %al, $46 +#NO_APP + movb %cl, %al +#APP + outb %al, $47 +#NO_APP + movb $2, %al +#APP + outb %al, $46 + outb %al, $47 +#NO_APP + xorl %ebx, %ebx +.L1404: + movl register_values.6108(,%ebx,4), %edx + movl %edx, %eax + movl %edx, %ecx + xorb %al, %al + andl $252, %ecx + shrl $4, %eax + movl $3320, %edx + orl %eax, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + andl register_values.6108+4(,%ebx,4), %edi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + orl register_values.6108+8(,%ebx,4), %edi + movl %esi, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %ebx + cmpl $117, %ebx + jne .L1404 + xorl %ecx, %ecx + movl $3, %edx + movl $392, %eax + call read_option + pushl $3 + andl $7, %eax + movzbl divisor.1504(%eax), %eax + pushl %eax + pushl $1016 + call uart8250_init + addl $12, %esp + cmpl $0, 8(%ebp) + je .L1406 + pushl %eax + pushl 8(%ebp) + pushl $.LC92 + pushl $0 + call do_printk + movl $.LC7, %eax + call die + addl $16, %esp +.L1406: + pushl %eax + movl $-2147434388, %edi + pushl $console_test.1909 + movl $3320, %ebx + pushl $.LC5 + pushl $6 + call do_printk + addl $12, %esp + pushl $.LC93 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $847872 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC94 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $849712 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC95 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC96 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $0 + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-4, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147433496, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + addl $16, %esp + testb $48, %ah + jne .L1408 + movl $-2147434392, %ebx + movl $3320, %edi + movl %ebx, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1823, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1408: + xorl %ecx, %ecx + movl $1, %edx + movl $399, %eax + movl $1, %edi + call read_option + testl %eax, %eax + jne .L1412 + movl $-2147433496, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + shrl $12, %eax + andl $3, %eax + leal 1(%eax), %edi +.L1412: + movl $3320, %ecx + movl $-2147434400, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl $-2147434400, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1(%edi), %eax + andl $-983153, %esi + sall $16, %eax + movl %ebx, %edx + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434392, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-251682817, %esi + movl %ebx, %edx + orl $251707392, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + call get_nodes + movl $1, %ebx + movl %eax, %esi + pushl %eax + pushl $.LC97 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1413 +.L1520: + leal 24(%ebx), %eax + movl $3320, %edx + andl $31, %eax + sall $11, %eax + orl $-2147483540, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $64, %al + je .L1520 + movl %ebx, %edx + movl $.LC12, %eax + call print_initcpu8_nocr + incl %ebx +.L1413: + cmpl %esi, %ebx + jb .L1520 + pushl %eax + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + xorl %ecx, %ecx + movl $1, %edx + movl $399, %eax + call read_option + addl $16, %esp + testl %eax, %eax + jne .L1417 + call get_nodes + movl $0, -280(%ebp) + movl %eax, -284(%ebp) + jmp .L1419 +.L1420: + movl -280(%ebp), %esi + movl $3320, %edx + addl $24, %esi + andl $31, %esi + sall $15, %esi + movl %esi, %ecx + orb $48, %ch + shrl $4, %ecx + movl %ecx, %eax + orl $-2147483416, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + testb $48, %ah + je .L1421 + movl %ecx, %ebx + movl $3320, %ecx + orl $-2147483580, %ebx + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -336(%ebp) + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + orl $134217728, -336(%ebp) + movl %ebx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + shrl $4, %esi + movl %ecx, %edx + movl %esi, -340(%ebp) + orl $-2147483544, -340(%ebp) + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $32, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1421: + incl -280(%ebp) +.L1419: + movl -284(%ebp), %ecx + cmpl %ecx, -280(%ebp) + jne .L1420 +.L1417: + pushl %eax + pushl $.LC98 + pushl $.LC5 + pushl $7 + call do_printk + movl $wait_ap_started, %ecx + movl $2, %edx + xorl %eax, %eax + movl $0, (%esp) + call for_each_ap + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl $847872, %eax + call ht_setup_chains_x + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + addl $12, %esp + movl %edx, %ebx + pushl $.LC99 + movl %eax, %esi + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl $-2147434400, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $4, %eax + addl $16, %esp + andl $7, %eax + movl %eax, -276(%ebp) + movl $24, -140(%ebp) + jmp .L1423 +.L1424: + movl -140(%ebp), %edi + movl $3320, %ecx + andl $31, %edi + sall $15, %edi + movl %edi, %esi + orl $12288, %esi + shrl $4, %esi + movl %esi, %edx + orl $-2147483432, %edx + movl %edx, -336(%ebp) + movl %edx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -340(%ebp) + movl %ecx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1880096768, -340(%ebp) + movl %ebx, %edx + orl $536880912, -340(%ebp) + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ecx, %edx + orl $-2147483436, %eax +#APP + outl %eax, %dx +#NO_APP + movl $81962759, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + shrl $4, %edi + movl %ecx, %edx + movl %edi, -336(%ebp) + orl $-2147482988, -336(%ebp) + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $16384, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ecx, %edx + orl $-2147483520, %eax +#APP + outl %eax, %dx +#NO_APP + movl $587663104, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + orl $-2147483516, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $1253651, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + incl -140(%ebp) +.L1423: + movl -276(%ebp), %eax + addl $25, %eax + cmpl %eax, -140(%ebp) + jne .L1424 + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + movl %eax, %ebx + movl %edx, %ecx + shrl $16, %eax + andl $63, %eax + cmpl $41, %eax + jbe .L1426 + shrl $8, %ebx + andl $63, %ebx + leal 10(%ebx), %eax + cmpl $41, %eax + jbe .L1426 + movl $12, %eax +.L1426: + movl %eax, %esi + subl $12, %esp + andl $4128768, %ecx + movl $1, %edx + leal -96(%ebp), %eax + sall $8, %esi + movl $1, -18873472 + orl %ecx, %esi + movl $store_ap_apicid, %ecx + pushl %eax + xorl %eax, %eax + movl $0, -96(%ebp) + call for_each_ap + addl $16, %esp + movl $0, -272(%ebp) + jmp .L1429 +.L1430: + movl -272(%ebp), %ecx + movl $999999, %ebx + movl $0, -28(%ebp) + movl -92(%ebp,%ecx,4), %edi +.L1431: + leal -28(%ebp), %ecx + movl $896, %edx + movl %edi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L1432 + cmpb $1, -28(%ebp) + je .L1434 +.L1432: + decl %ebx + je .L1537 + jmp .L1431 +.L1434: + movl -28(%ebp), %ecx + movl %esi, %edx + andl $65280, %edx + andl $16776960, %ecx + movl %ecx, %eax + andl $65280, %eax + cmpl %eax, %edx + jbe .L1436 + movl %ecx, %esi +.L1436: + incl -272(%ebp) +.L1429: + movl -272(%ebp), %ebx + cmpl -96(%ebp), %ebx + jb .L1430 + movl $1, %ecx + movl %esi, %edx + xorl %eax, %eax + call set_fidvid + movl $0, -116(%ebp) + movl %eax, %ebx + andl $16776960, %ebx + jmp .L1439 +.L1440: + movl -116(%ebp), %eax + movl $999999, %edi + movl $0, -28(%ebp) + movl -92(%ebp,%eax,4), %esi + movl %esi, %eax + sall $24, %eax + orl $2, %eax + orl %ebx, %eax + movl %eax, -18873472 +.L1441: + leal -28(%ebp), %ecx + movl $896, %edx + movl %esi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L1442 + cmpb $2, -28(%ebp) + je .L1444 +.L1442: + decl %edi + je .L1538 + jmp .L1441 +.L1444: + incl -116(%ebp) +.L1439: + movl -116(%ebp), %edx + cmpl -96(%ebp), %edx + jb .L1440 + orl $3, %ebx + movl $-1073676222, %ecx + movl %ebx, -18873472 +#APP + rdmsr +#NO_APP + pushl %edi + movl %edx, %ebx + pushl $.LC100 + movl %eax, %esi + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + call get_nodes + addl $16, %esp + movl $0, -264(%ebp) + movl $0, -268(%ebp) + movl %eax, -260(%ebp) + jmp .L1447 +.L1448: + movl -264(%ebp), %esi + movl $3320, %edx + addl $24, %esi + andl $31, %esi + sall $15, %esi + movl %esi, %ebx + shrl $4, %ebx + orl $-2147482660, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + xorl %edi, %edi + movl %eax, -136(%ebp) + movl %eax, -344(%ebp) + movl $152, -144(%ebp) +.L1449: + movl %esi, %eax + movl $3320, %edx + shrl $4, %eax + orl -144(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $7, %eax + cmpl $3, %eax + jne .L1450 + movl %edi, %ecx + movb $-1, %al + sall %cl, %eax + notl %eax + andl %eax, -344(%ebp) + movl $37, %eax + sall %cl, %eax + orl %eax, -344(%ebp) +.L1450: + addl $32, -144(%ebp) + addl $8, %edi + cmpl $248, -144(%ebp) + jne .L1449 + movl -136(%ebp), %eax + cmpl %eax, -344(%ebp) + je .L1453 + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -344(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $1, -268(%ebp) +.L1453: + incl -264(%ebp) +.L1447: + movl -260(%ebp), %edx + cmpl %edx, -264(%ebp) + jne .L1448 + movl 849692, %ecx + movl $0, -248(%ebp) + movl $0, -252(%ebp) + movl $0, -316(%ebp) + movl %ecx, -256(%ebp) + jmp .L1456 +.L1457: + movl -316(%ebp), %eax + addl $849308, %eax + movl 20(%eax), %ebx + movl 12(%eax), %edx + movl 8(%eax), %ecx + movl %ebx, -204(%ebp) + movl -316(%ebp), %ebx + movl %edx, -240(%ebp) + movb 4(%eax), %dl + movb 16(%eax), %al + movl %ecx, -196(%ebp) + movl 849308(%ebx), %ebx + movb %dl, -189(%ebp) + addl %ecx, %edx + movb %al, -197(%ebp) + movzbl %dl, %edx + movl %ebx, %eax + movl %ebx, -236(%ebp) + call ht_read_freq_cap + movb -197(%ebp), %dl + addl -204(%ebp), %edx + movzbl %dl, %edx + movl %eax, %ebx + movl -240(%ebp), %eax + call ht_read_freq_cap + andl %eax, %ebx + movzwl %bx, %eax +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -196(%ebp), %edx + movl -236(%ebp), %ebx + movzbl -189(%ebp), %ecx + movb %al, -217(%ebp) + movzbl %dh, %eax + shrl $4, %ebx + movl %ebx, -224(%ebp) + leal (%eax,%ecx), %ebx + orl -224(%ebp), %ebx + movl %ecx, -208(%ebp) + movl $3320, %ecx + movl %ecx, %edx + movl %ebx, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + andl $3, %eax + addw $3324, %ax + movw %ax, -226(%ebp) + movl %eax, %edx +#APP + inb %dx, %al +#NO_APP + movzbl -197(%ebp), %ebx + movl %eax, %esi + movl -240(%ebp), %eax + movl %ebx, -212(%ebp) + movl -204(%ebp), %ebx + shrl $4, %eax + movl %eax, -232(%ebp) + movzbl %bh, %edx + addl -212(%ebp), %edx + orl %eax, %edx + movl %edx, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %edx, -336(%ebp) + movl %ebx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -336(%ebp), %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + andl $15, %esi + movl %esi, %edx + cmpb -217(%ebp), %dl + movb -217(%ebp), %dl + movb %al, -329(%ebp) + setne -312(%ebp) + andl $15, %eax + cmpb %dl, %al + movb -312(%ebp), %al + setne %dl + orl %edx, %eax + movl %ecx, %edx + movl %eax, %esi + movl %edi, %eax + andl $1, %esi +#APP + outl %eax, %dx +#NO_APP + movzbl -217(%ebp), %edi + movw -226(%ebp), %dx + movl %edi, %eax +#APP + outb %al, %dx +#NO_APP + movl %ebx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx +#APP + outb %al, %dx +#NO_APP + movl -196(%ebp), %edi + movb -189(%ebp), %al + shrl $16, %edi + addl %edi, %eax + movzbl %al, %edx + movl -236(%ebp), %eax + call ht_read_width_cap + movl -204(%ebp), %ecx + shrl $16, %ecx + movl %ecx, -216(%ebp) + movb %al, %bl + movb -197(%ebp), %al + addl %ecx, %eax + movzbl %al, %edx + movl -240(%ebp), %eax + call ht_read_width_cap + movl %ebx, %edx + andl $7, %edx + movb link_width_to_pow2.3155(%edx), %dl + shrb $4, %bl + andl $7, %ebx + movb link_width_to_pow2.3155(%ebx), %cl + movb %dl, -129(%ebp) + movb %al, %dl + andl $7, %eax + shrb $4, %dl + movb link_width_to_pow2.3155(%eax), %al + andl $7, %edx + movb link_width_to_pow2.3155(%edx), %dl + cmpb -129(%ebp), %dl + jbe .L1458 + movb -129(%ebp), %dl +.L1458: + cmpb %cl, %al + movzbl %dl, %edx + jbe .L1459 + movb %cl, %al +.L1459: + movzbl %al, %eax + movb pow2_to_link_width.3156(%edx), %dl + movzbl pow2_to_link_width.3156(%eax), %eax + movl -208(%ebp), %ebx + sall $4, %eax + orl %eax, %edx + movb %dl, -130(%ebp) + movl %edi, %edx + andl $255, %edx + leal 1(%edx,%ebx), %edi + movl $3320, %ebx + orl -224(%ebp), %edi + movl %ebx, %edx + movl %edi, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + andl $119, %eax + movzbl -130(%ebp), %edi + movl %ebx, %edx + cmpb -130(%ebp), %al + setne %al + movzbl %al, %eax + orl %eax, %esi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx +#APP + outb %al, %dx +#NO_APP + movl %edi, %edx + andl $7, %edi + movl -212(%ebp), %eax + andl $112, %edx + sarl $4, %edx + sall $4, %edi + orl %edx, %edi + movzbl -216(%ebp),%edx + leal 1(%edx,%eax), %ecx + orl -232(%ebp), %ecx + movl %ecx, %edx + andl $2147483644, %edx + orl $-2147483648, %edx + movl %edx, -340(%ebp) + movl %edx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + movb %al, %cl + movl %ebx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx + andl $119, %eax +#APP + outb %al, %dx +#NO_APP + andl $119, %ecx + movl %edi, %ebx + xorl %eax, %eax + cmpb %bl, %cl + setne %al + orl %eax, %esi + incl -248(%ebp) + orl %esi, -252(%ebp) + addl $24, -316(%ebp) +.L1456: + movl -256(%ebp), %eax + cmpl %eax, -248(%ebp) + jne .L1457 + movb 849696, %dl + movl $0, -188(%ebp) + movl $0, -148(%ebp) + movb %dl, -241(%ebp) + jmp .L1461 +.L1462: + movzbl %dl, %eax + movl $3320, %ebx + leal 224(,%eax,4), %eax + movl %ebx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + andl $16711680, %eax + orl $-2147483648, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $65535, %eax + cmpl $4130, %eax + je .L1463 + cmpl $4318, %eax + jne .L1465 +.L1463: + movl %ecx, %edi + andl $240, %ecx + shrl $4, %ecx + andl $3840, %edi + leal 24(%ecx), %ebx + movl $3320, %edx + shrl $8, %edi + andl $31, %ebx + sall $15, %ebx + movl %edi, %eax + movl %ebx, %ecx + sall $5, %eax + addl $152, %eax + shrl $4, %ecx + orl %eax, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $7, %eax + cmpl $7, %eax + jne .L1466 + movl %ebx, %esi + movb $-8, %dl + shrl $4, %esi + orl $-2147482660, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl $255, %ebx + leal 0(,%edi,8), %ecx + sall %cl, %ebx + notl %ebx + andl %eax, %ebx + movl %eax, -336(%ebp) + movl $37, %eax + sall %cl, %eax + orl %eax, %ebx + cmpl -336(%ebp), %ebx + je .L1466 + movb $-8, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $1, %eax + jmp .L1469 +.L1466: + xorl %eax, %eax +.L1469: + orl %eax, -188(%ebp) +.L1465: + incl -148(%ebp) +.L1461: + movzbl -241(%ebp), %eax + cmpl %eax, -148(%ebp) + movb -148(%ebp), %dl + jne .L1462 + call mcp55_early_setup_x + movl -188(%ebp), %edx + orl %edx, -252(%ebp) + movl -268(%ebp), %ecx + orl %eax, -252(%ebp) + orl -252(%ebp), %ecx + je .L1471 + pushl %ecx + pushl $.LC101 + pushl $.LC5 + pushl $6 + call do_printk + call soft_reset + addl $16, %esp +.L1471: + movl 849304, %ebx + xorl %esi, %esi + xorl %edi, %edi + movl $68, -18873472 + movl $0, -152(%ebp) + movl %ebx, -184(%ebp) + jmp .L1473 +.L1474: + leal 24(%esi), %eax + movl $1, %ecx + andl $31, %eax + sall $15, %eax + movl %eax, %edx + leal 848264(%edi), %ebx + orb $16, %dh + movl %edx, 8(%ebx) + movl %eax, %edx + movl %eax, 4(%ebx) + orb $32, %dh + orb $48, %ah + movl %esi, 848264(%edi) + movl %edx, 12(%ebx) + movl %eax, 16(%ebx) +.L1475: + movl -152(%ebp), %eax + addl %ecx, %eax + movw spd_addr.6923-2(%eax,%eax), %dx + movw %dx, 18(%ebx,%ecx,2) + movw spd_addr.6923+6(%eax,%eax), %ax + movw %ax, 26(%ebx,%ecx,2) + incl %ecx + cmpl $5, %ecx + jne .L1475 + addl $8, -152(%ebp) + incl %esi + addl $36, %edi +.L1473: + cmpl -184(%ebp), %esi + jl .L1474 + xorl %ecx, %ecx +.L1478: + movl %ecx, %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57151710, %eax + je .L1479 + addl $4096, %ecx + cmpl $268435456, %ecx + jne .L1478 + orl $-1, %ecx +.L1479: + shrl $4, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx + andl $268435452, %eax + orl $-2147483616, %eax +#APP + outl %eax, %dx +#NO_APP + movl $4097, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movl %ebx, %edx + andl $268435452, %eax + orl $-2147483612, %eax +#APP + outl %eax, %dx +#NO_APP + movl $4353, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + orl $4, %ecx + movl %ebx, %edx + movl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx + movl $1, %eax + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + outw %ax, %dx +#NO_APP + movl $4097, %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + movl $4353, %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + pushl %edx + pushl $847872 + pushl $848264 + pushl 849304 + call sdram_initialize +#APP + movl %esp, %eax + +#NO_APP + movl %eax, %edx + movl $.LC102, %eax + call print_debug_pcar + movl $1515870810, %edx + movl $.LC103, %eax + call print_debug_pcar + movl $819200, %esi + movl $2064384, %edi + call set_init_ram_access + addl $12, %esp + pushl $.LC104 + pushl $.LC5 + pushl $7 + call do_printk + movl $8192, %ecx +#APP + cld + rep; movsl + +#NO_APP + movl $-1245184, %eax +#APP + subl %eax, %ebp + subl %eax, %esp + +#NO_APP + addl $12, %esp + pushl $.LC105 + pushl $.LC5 + pushl $7 + call do_printk + movl $1515870810, %edx + movl $.LC103, %eax + call print_debug_pcar + addl $12, %esp + pushl $.LC106 + pushl $.LC5 + pushl $7 + call do_printk +#APP + pushl %edx + pushl %ecx + + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax, %cr0 + movl $0x269, %ecx + xorl %edx, %edx + xorl %eax, %eax + wrmsr + movl $0xC0010010, %ecx + rdmsr + andl $(~(3<<18)), %eax + wrmsr + movl $0x2ff, %ecx + xorl %edx, %edx + movl $0x00000800, %eax + wrmsr + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + + popl %ecx + popl %edx + +#NO_APP + addl $12, %esp + movl $-2147434388, %esi + pushl $.LC107 + pushl $.LC5 + pushl $7 + call do_printk + call clear_init_ram + addl $12, %esp + pushl $.LC105 + pushl $.LC5 + pushl $7 + call do_printk + movl %esi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + andb $253, %ch + movb $-4, %dl + orb $2, %ch + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + addl $12, %esp + pushl $.LC108 + pushl $.LC5 + pushl $7 + call do_printk +#APP + leal _liseg, %eax + leal _iseg, %ebx + +#NO_APP + movl %eax, %edx + movl %eax, %esi + movl $.LC109, %eax + addl $4, %esi + movl %ebx, -164(%ebp) + xorl %edi, %edi + call print_debug_cp_run + movl %ebx, %edx + movl $.LC110, %eax + call print_debug_cp_run + xorl %ebx, %ebx + addl $16, %esp + movl %esi, -120(%ebp) + xorl %esi, %esi + movl $0, -168(%ebp) + movl $1, -172(%ebp) + jmp .L1550 +.L1483: + movl -120(%ebp), %edx + movl -164(%ebp), %ecx + movb (%edx,%edi), %al + incl %edi + movl -168(%ebp), %edx + movb %al, (%ecx,%edx) + incl %edx + movl %edx, -168(%ebp) +.L1550: + testl %esi, %esi + je .L1484 + decl %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + andl $1, %eax + jmp .L1486 +.L1484: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax +.L1486: + testb %al, %al + jne .L1483 + movl $1, %edx +.L1488: + addl %edx, %edx + testl %esi, %esi + je .L1489 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %edx + testl %ecx, %ecx + jne .L1491 + jmp .L1543 +.L1489: + movl -120(%ebp), %ecx + movl (%ecx,%edi), %ebx + addl $4, %edi + movl $31, %ecx + movl %ebx, %eax + shrl $31, %eax + addl %eax, %edx +.L1491: + leal -1(%ecx), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + xorl $1, %eax + andl $1, %eax + jmp .L1493 +.L1543: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + xorl $1, %eax + andl $1, %eax +.L1493: + testb %al, %al + jne .L1488 + movl -172(%ebp), %ecx + cmpl $2, %edx + movl %ecx, -180(%ebp) + je .L1497 + movl -120(%ebp), %ecx + sall $8, %edx + movzbl (%ecx,%edi), %eax + incl %edi + leal -768(%edx,%eax), %eax + cmpl $-1, %eax + je .L1498 + incl %eax + movl %eax, -180(%ebp) + movl %eax, -172(%ebp) +.L1497: + testl %esi, %esi + je .L1500 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %eax + testl %ecx, %ecx + jne .L1502 + jmp .L1545 +.L1500: + movl -120(%ebp), %eax + movl $31, %ecx + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + addl %eax, %eax +.L1502: + leal -1(%ecx), %esi + movl %ebx, %edx + movl %esi, %ecx + shrl %cl, %edx + andl $1, %edx + jmp .L1504 +.L1545: + movl -120(%ebp), %edx + movl $31, %esi + movl (%edx,%edi), %ebx + addl $4, %edi + movl %ebx, %edx + shrl $31, %edx +.L1504: + addl %eax, %edx + jne .L1505 + movl $1, %edx +.L1507: + addl %edx, %edx + testl %esi, %esi + je .L1508 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %edx + testl %ecx, %ecx + jne .L1510 + jmp .L1546 +.L1508: + movl -120(%ebp), %ecx + movl (%ecx,%edi), %ebx + addl $4, %edi + movl $31, %ecx + movl %ebx, %eax + shrl $31, %eax + addl %eax, %edx +.L1510: + leal -1(%ecx), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + xorl $1, %eax + andl $1, %eax + jmp .L1512 +.L1546: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + xorl $1, %eax + andl $1, %eax +.L1512: + testb %al, %al + jne .L1507 + addl $2, %edx +.L1505: + xorl %eax, %eax + cmpl $3328, -180(%ebp) + seta %al + addl %eax, %edx + movl %edx, -128(%ebp) + movl -164(%ebp), %edx + addl -168(%ebp), %edx + movl %edx, %ecx + subl -180(%ebp), %ecx + movl %ecx, -176(%ebp) + movb (%ecx), %al + movb %al, (%edx) + movl -168(%ebp), %eax + movl $0, -344(%ebp) + incl %eax + movl %eax, -124(%ebp) +.L1514: + movl -344(%ebp), %ecx + movl -176(%ebp), %eax + movl -164(%ebp), %edx + addl -344(%ebp), %edx + movl %edx, -336(%ebp) + movb 1(%ecx,%eax), %cl + movl -168(%ebp), %eax + movb %cl, 1(%eax,%edx) + movl -128(%ebp), %edx + incl -344(%ebp) + cmpl %edx, -344(%ebp) + jne .L1514 + movl -124(%ebp), %ecx + addl %edx, %ecx + movl %ecx, -168(%ebp) + jmp .L1550 +.L1498: + movl %edi, %edx + movl $.LC111, %eax + call print_debug_cp_run + movl -168(%ebp), %edx + movl $.LC112, %eax + call print_debug_cp_run + pushl %eax + pushl $.LC113 + pushl $.LC5 + pushl $7 + call do_printk +#APP + xorl %ebp, %ebp + cli + leal _iseg, %edi + jmp *%edi + +#NO_APP + addl $12, %esp + pushl $.LC114 + pushl $.LC5 + pushl $7 + call do_printk + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L1533: + movl %edi, %edx + movl $.LC115, %eax + call print_initcpu8 + jmp .L1395 +.L1537: + movl %edi, %edx + movl $.LC116, %eax + call print_initcpu8 + jmp .L1436 +.L1538: + movl %esi, %edx + movl $.LC117, %eax + call print_initcpu8 + jmp .L1444 + .size real_main, .-real_main +.globl cache_as_ram_main + .type cache_as_ram_main, @function +cache_as_ram_main: + pushl %ebp + movl %esp, %ebp + popl %ebp + jmp real_main + .size cache_as_ram_main, .-cache_as_ram_main +.globl init_timer + .type init_timer, @function +init_timer: + pushl %ebp + movl %esp, %ebp + movl $196608, -18873568 + movl $11, -18873376 + movl $-1, -18873472 + popl %ebp + ret + .size init_timer, .-init_timer +.globl uart8250_rx_byte + .type uart8250_rx_byte, @function +uart8250_rx_byte: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl 8(%ebp), %ebx +.L1557: + movl %ebx, %ecx + leal 5(%ecx), %edx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + testb $1, %al + je .L1557 + movzwl %bx, %edx +#APP + inb %dx, %al +#NO_APP + popl %ebx + movzbl %al, %eax + popl %ebp + ret + .size uart8250_rx_byte, .-uart8250_rx_byte + .section .rom.data + .align 2 + .type spd_addr.6923, @object + .size spd_addr.6923, 16 +spd_addr.6923: + .value 80 + .value 82 + .value 0 + .value 0 + .value 81 + .value 83 + .value 0 + .value 0 + .align 32 + .type next_fid_a.6719, @object + .size next_fid_a.6719, 144 +next_fid_a.6719: + .byte 0 + .byte 9 + .byte 9 + .byte 8 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 0 + .byte 11 + .byte 11 + .byte 9 + .byte 9 + .byte 10 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 0 + .byte 13 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 12 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 0 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 14 + .byte 15 + .byte 4 + .byte 9 + .byte 9 + .byte 9 + .byte 0 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 4 + .byte 5 + .byte 10 + .byte 10 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 9 + .byte 5 + .byte 11 + .byte 11 + .byte 9 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 10 + .byte 5 + .byte 6 + .byte 12 + .byte 10 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 11 + .byte 6 + .byte 13 + .byte 11 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 12 + .byte 12 + .byte 6 + .byte 7 + .byte 12 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 13 + .byte 13 + .byte 13 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 14 + .byte 14 + .byte 14 + .byte 7 + .byte 14 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .align 32 + .type register_values.6108, @object + .size register_values.6108, 468 +register_values.6108: + .long 790596 + .long 63736 + .long 0 + .long 790604 + .long 63736 + .long 1 + .long 790612 + .long 63736 + .long 2 + .long 790620 + .long 63736 + .long 3 + .long 790628 + .long 63736 + .long 4 + .long 790636 + .long 63736 + .long 5 + .long 790644 + .long 63736 + .long 6 + .long 790652 + .long 63736 + .long 7 + .long 790592 + .long 63740 + .long 0 + .long 790600 + .long 63740 + .long 0 + .long 790608 + .long 63740 + .long 0 + .long 790616 + .long 63740 + .long 0 + .long 790624 + .long 63740 + .long 0 + .long 790632 + .long 63740 + .long 0 + .long 790640 + .long 63740 + .long 0 + .long 790648 + .long 63740 + .long 0 + .long 790660 + .long 72 + .long 0 + .long 790668 + .long 72 + .long 0 + .long 790676 + .long 72 + .long 0 + .long 790684 + .long 72 + .long 0 + .long 790692 + .long 72 + .long 0 + .long 790700 + .long 72 + .long 0 + .long 790708 + .long 72 + .long 0 + .long 790656 + .long 240 + .long 0 + .long 790664 + .long 240 + .long 0 + .long 790672 + .long 240 + .long 0 + .long 790680 + .long 240 + .long 0 + .long 790688 + .long 240 + .long 0 + .long 790696 + .long 240 + .long 0 + .long 790704 + .long 240 + .long 0 + .long 790732 + .long -33550392 + .long 0 + .long 790740 + .long -33550392 + .long 0 + .long 790748 + .long -33550392 + .long 0 + .long 790728 + .long -33550388 + .long 0 + .long 790736 + .long -33550388 + .long 0 + .long 790744 + .long -33550388 + .long 0 + .long 790756 + .long 64648 + .long 0 + .long 790760 + .long 64648 + .long 0 + .long 790764 + .long 64648 + .long 0 + .type divisor.1504, @object + .size divisor.1504, 8 +divisor.1504: + .byte 1 + .byte 2 + .byte 3 + .byte 6 + .byte 12 + .byte 24 + .byte 48 + .byte 96 + .align 32 + .type console_test.1909, @object + .size console_test.1909, 74 +console_test.1909: + .string "\r\n\r\ncoreboot-2.0.0nf570_Normal Thu Oct 30 16:44:01 GMT 2008 starting...\r\n" + .type pow2_to_link_width.3156, @object + .size pow2_to_link_width.3156, 6 +pow2_to_link_width.3156: + .byte 7 + .byte 4 + .byte 5 + .byte 0 + .byte 1 + .byte 3 + .type link_width_to_pow2.3155, @object + .size link_width_to_pow2.3155, 8 +link_width_to_pow2.3155: + .byte 3 + .byte 4 + .byte 0 + .byte 5 + .byte 1 + .byte 2 + .byte 0 + .byte 0 + .align 4 + .type C.181.6395, @object + .size C.181.6395, 16 +C.181.6395: + .long 0 + .long 4 + .long 4 + .long 4 + .align 32 + .type ctrl_devport_conf.6240, @object + .size ctrl_devport_conf.6240, 36 +ctrl_devport_conf.6240: + .long 36968 + .long -65281 + .long 10240 + .long 36964 + .long -65281 + .long 9216 + .long 36960 + .long -65281 + .long 8192 + .align 32 + .type ctrl_conf_2.6341, @object + .size ctrl_conf_2.6341, 112 +ctrl_conf_2.6341: + .long 16 + .long 116 + .long -4081 + .long 2512 + .long 16 + .long 32884 + .long -32769 + .long 32768 + .long 32 + .long 9288 + .long -65537 + .long 65536 + .long 32 + .long 10336 + .long -256 + .long 18 + .long 16 + .long 37092 + .long -5242881 + .long 5242880 + .long 34 + .long 9412 + .long -256 + .long 4 + .long 34 + .long 9412 + .long -256 + .long 5 + .align 32 + .type ctrl_conf_master_only.6340, @object + .size ctrl_conf_master_only.6340, 32 +ctrl_conf_master_only.6340: + .long 32 + .long 8320 + .long 251658239 + .long 16777216 + .long 34 + .long 9408 + .long -13 + .long 0 + .align 32 + .type ctrl_conf_mcp55_only.6339, @object + .size ctrl_conf_mcp55_only.6339, 528 +ctrl_conf_mcp55_only.6339: + .long 16 + .long 36928 + .long 0 + .long -880537378 + .long 16 + .long 37088 + .long -257 + .long 0 + .long 16 + .long 37092 + .long -5 + .long 0 + .long 16 + .long 37096 + .long -5650177 + .long 12288 + .long 16 + .long 131136 + .long 0 + .long -880537378 + .long 16 + .long 131320 + .long -49 + .long 16 + .long 16 + .long 65600 + .long 0 + .long -880537378 + .long 16 + .long 69696 + .long 0 + .long -880537378 + .long 16 + .long 69732 + .long -125829121 + .long 83886080 + .long 16 + .long 69752 + .long -4161537 + .long 3538944 + .long 16 + .long 69736 + .long -33501121 + .long 20917248 + .long 16 + .long 69744 + .long -524289 + .long 524288 + .long 16 + .long 69756 + .long -4081 + .long 1392 + .long 16 + .long 69880 + .long -49 + .long 16 + .long 16 + .long 196612 + .long -261 + .long 260 + .long 16 + .long 196668 + .long -167772161 + .long 167772160 + .long 16 + .long 196672 + .long 13172735 + .long 120782848 + .long 16 + .long 196680 + .long -8 + .long 5 + .long 16 + .long 196684 + .long -33357825 + .long 4980736 + .long 16 + .long 196724 + .long -64 + .long 0 + .long 16 + .long 196800 + .long 0 + .long -880537378 + .long 16 + .long 196804 + .long -8 + .long 7 + .long 16 + .long 32888 + .long -1056964609 + .long 419430400 + .long 16 + .long 200768 + .long 0 + .long -880537378 + .long 34 + .long 9445 + .long 0 + .long 104 + .long 34 + .long 9446 + .long 0 + .long 104 + .long 34 + .long 9447 + .long 0 + .long 104 + .long 34 + .long 9448 + .long 0 + .long 104 + .long 34 + .long 9467 + .long 0 + .long 96 + .long 34 + .long 9468 + .long 0 + .long 96 + .long 34 + .long 9429 + .long -13 + .long 8 + .long 34 + .long 9430 + .long -13 + .long 8 + .long 34 + .long 9454 + .long -13 + .long 8 + .align 32 + .type ctrl_conf_1_1.6338, @object + .size ctrl_conf_1_1.6338, 144 +ctrl_conf_1_1.6338: + .long 16 + .long 163904 + .long 0 + .long -880537378 + .long 16 + .long 163920 + .long -4 + .long 3 + .long 16 + .long 163940 + .long -2 + .long 1 + .long 16 + .long 163952 + .long -983041 + .long 262144 + .long 16 + .long 164012 + .long -3841 + .long 256 + .long 16 + .long 163964 + .long -17 + .long 0 + .long 16 + .long 164040 + .long -16711936 + .long 655370 + .long 16 + .long 164048 + .long -251658241 + .long 50331648 + .long 16 + .long 164064 + .long -251658241 + .long 50331648 + .align 32 + .type ctrl_conf_1.6337, @object + .size ctrl_conf_1.6337, 640 +ctrl_conf_1.6337: + .long 32 + .long 8208 + .long 524287 + .long 267878400 + .long 32 + .long 8356 + .long -1179649 + .long 73728 + .long 32 + .long 8364 + .long -513 + .long 512 + .long 32 + .long 8372 + .long -3 + .long 2 + .long 32 + .long 10276 + .long -1057951601 + .long 637665840 + .long 32 + .long 10292 + .long 0 + .long 572662306 + .long 32 + .long 10248 + .long 2147483647 + .long 0 + .long 32 + .long 10284 + .long 2147483647 + .long -2147483648 + .long 32 + .long 10444 + .long -1537 + .long 0 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10444 + .long -1537 + .long 512 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10444 + .long -1537 + .long 1024 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10356 + .long -61451 + .long 61440 + .long 32 + .long 10360 + .long -16711936 + .long 1048592 + .long 32 + .long 10364 + .long -15732481 + .long 5244160 + .long 32 + .long 10368 + .long -25 + .long 0 + .long 32 + .long 10336 + .long -3145729 + .long 3145728 + .long 32 + .long 10384 + .long -65281 + .long 65280 + .long 32 + .long 10396 + .long -16711681 + .long 458752 + .long 16 + .long 64 + .long 0 + .long -880537378 + .long 16 + .long 72 + .long -8979 + .long 8194 + .long 16 + .long 120 + .long -114 + .long 17 + .long 16 + .long 128 + .long -65536 + .long 39203 + .long 16 + .long 136 + .long -2 + .long 0 + .long 16 + .long 140 + .long -65536 + .long 127 + .long 16 + .long 220 + .long -65537 + .long 65536 + .long 16 + .long 32832 + .long 0 + .long -880537378 + .long 16 + .long 32884 + .long -133 + .long 132 + .long 16 + .long 33016 + .long -49 + .long 16 + .long 16 + .long 37060 + .long -2 + .long 1 + .long 16 + .long 37104 + .long 2147483645 + .long 2 + .long 16 + .long 37112 + .long -49 + .long 16 + .long 16 + .long 262208 + .long 0 + .long -880537378 + .long 16 + .long 262248 + .long -256 + .long 255 + .long 16 + .long 262392 + .long -65 + .long 64 + .long 16 + .long 294976 + .long 0 + .long -880537378 + .long 16 + .long 295016 + .long -256 + .long 255 + .long 16 + .long 295160 + .long -65 + .long 64 + .align 32 + .type ctrl_devport_conf_clear.6265, @object + .size ctrl_devport_conf_clear.6265, 36 +ctrl_devport_conf_clear.6265: + .long 36968 + .long -65281 + .long 0 + .long 36964 + .long -65281 + .long 0 + .long 36960 + .long -65281 + .long 0 + .align 32 + .type register_values.3743, @object + .size register_values.3743, 456 +register_values.3743: + .long 790596 + .long 63736 + .long 0 + .long 790604 + .long 63736 + .long 1 + .long 790612 + .long 63736 + .long 2 + .long 790620 + .long 63736 + .long 3 + .long 790628 + .long 63736 + .long 4 + .long 790636 + .long 63736 + .long 5 + .long 790644 + .long 63736 + .long 6 + .long 790652 + .long 63736 + .long 7 + .long 790592 + .long 63740 + .long 0 + .long 790600 + .long 63740 + .long 0 + .long 790608 + .long 63740 + .long 0 + .long 790616 + .long 63740 + .long 0 + .long 790624 + .long 63740 + .long 0 + .long 790632 + .long 63740 + .long 0 + .long 790640 + .long 63740 + .long 0 + .long 790648 + .long 63740 + .long 0 + .long 794688 + .long -536362984 + .long 0 + .long 794692 + .long -536362984 + .long 0 + .long 794696 + .long -536362984 + .long 0 + .long 794700 + .long -536362984 + .long 0 + .long 794704 + .long -536362984 + .long 0 + .long 794708 + .long -536362984 + .long 0 + .long 794712 + .long -536362984 + .long 0 + .long 794716 + .long -536362984 + .long 0 + .long 794720 + .long -536362977 + .long 0 + .long 794724 + .long -536362977 + .long 0 + .long 794728 + .long -536362977 + .long 0 + .long 794732 + .long -536362977 + .long 0 + .long 794744 + .long -524288 + .long 102 + .long 794752 + .long -65536 + .long 0 + .long 794760 + .long 1224 + .long -16777214 + .long 794764 + .long 786575 + .long 131328 + .long 794768 + .long -655284 + .long 16 + .long 794772 + .long 11022080 + .long 32768 + .long 794784 + .long 16776192 + .long -16777216 + .long 798808 + .long -2039584 + .long 0 + .long 798812 + .long 62 + .long 0 + .long 798816 + .long -256 + .long 0 + .type addresses.4206, @object + .size addresses.4206, 24 +addresses.4206: + .byte 2 + .byte 3 + .byte 4 + .byte 5 + .byte 6 + .byte 9 + .byte 11 + .byte 13 + .byte 17 + .byte 18 + .byte 20 + .byte 21 + .byte 23 + .byte 26 + .byte 27 + .byte 28 + .byte 29 + .byte 30 + .byte 36 + .byte 37 + .byte 38 + .byte 41 + .byte 41 + .byte 42 + .type cs_map_aaa.3888, @object + .size cs_map_aaa.3888, 24 +cs_map_aaa.3888: + .byte 0 + .byte 1 + .byte 3 + .byte 0 + .byte 2 + .byte 6 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 0 + .byte 0 + .byte 5 + .byte 8 + .byte 0 + .byte 7 + .byte 9 + .byte 0 + .byte 10 + .byte 11 + .align 2 + .type min_cycle_times.4311, @object + .size min_cycle_times.4311, 8 +min_cycle_times.4311: + .value 592 + .value 768 + .value 885 + .value 1280 + .type latency_indicies.4310, @object + .size latency_indicies.4310, 3 +latency_indicies.4310: + .byte 25 + .byte 23 + .byte 9 + .align 4 + .type fraction.4292, @object + .size fraction.4292, 16 +fraction.4292: + .long 37 + .long 51 + .long 102 + .long 117 + .align 32 + .type speed, @object + .size speed, 120 +speed: + .value 1280 + .byte -56 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 0 + .string "200Mhz\r\n" + .zero 3 + .value 885 + .byte -106 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 1 + .string "266Mhz\r\n" + .zero 3 + .value 768 + .byte 120 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 2 + .string "333Mhz\r\n" + .zero 3 + .value 592 + .byte 100 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 3 + .string "400Mhz\r\n" + .zero 3 + .value 0 + .zero 22 + .align 32 + .type dv_a.4275, @object + .size dv_a.4275, 48 +dv_a.4275: + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -56 + .byte -56 + .byte -56 + .byte 100 + .byte -56 + .byte -90 + .byte -90 + .byte 100 + .byte -56 + .byte -85 + .byte -114 + .byte 100 + .byte -56 + .byte -106 + .byte 125 + .byte 100 + .byte -56 + .byte -100 + .byte -123 + .byte 100 + .byte -56 + .byte -96 + .byte 120 + .byte 100 + .byte -56 + .byte -93 + .byte 127 + .byte 100 + .byte -56 + .byte -106 + .byte -123 + .byte 100 + .byte -56 + .byte -103 + .byte 123 + .byte 100 + .byte -56 + .byte -99 + .byte -128 + .byte 100 + .byte -56 + .byte -96 + .byte 120 + .byte 100 + .type fraction.4411, @object + .size fraction.4411, 7 +fraction.4411: + .byte 0 + .byte 1 + .byte 2 + .byte 2 + .byte 3 + .byte 3 + .byte 0 + .type faw_2k.4827, @object + .size faw_2k.4827, 4 +faw_2k.4827: + .byte 10 + .byte 14 + .byte 17 + .byte 18 + .type faw_1k.4826, @object + .size faw_1k.4826, 4 +faw_1k.4826: + .byte 8 + .byte 10 + .byte 13 + .byte 14 + .type csbase_low_f0_shift.3980, @object + .size csbase_low_f0_shift.3980, 12 +csbase_low_f0_shift.3980: + .byte 6 + .byte 7 + .byte 7 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte 9 + .byte 9 + .byte 8 + .byte 9 + .align 32 + .type TestPatternJD1b.5567, @object + .size TestPatternJD1b.5567, 1152 +TestPatternJD1b.5567: + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long 538976288 + .long 538976288 + .long 538976288 + .long 538976288 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .align 32 + .type TestPatternJD1a.5566, @object + .size TestPatternJD1a.5566, 576 +TestPatternJD1a.5566: + .long 0 + .long 0 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long 538976288 + .long 538976288 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .align 32 + .type TestPattern2.5231, @object + .size TestPattern2.5231, 64 +TestPattern2.5231: + .long 305419896 + .long -2023406815 + .long 591751049 + .long -1737075662 + .long 1496864804 + .long 810116900 + .long 608765845 + .long -1718384845 + .long 1077433922 + .long 944132677 + .long 692265315 + .long 84310164 + .long 305434693 + .long -1737345945 + .long 305690164 + .long 878212643 + .align 32 + .type TestPattern1.5230, @object + .size TestPattern1.5230, 64 +TestPattern1.5230: + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .align 32 + .type TestPattern0.5229, @object + .size TestPattern0.5229, 64 +TestPattern0.5229: + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .align 32 + .type TT_a.5195, @object + .size TT_a.5195, 96 +TT_a.5195: + .value 6250 + .value 6250 + .value 6250 + .value 6250 + .value 5000 + .value 5000 + .value 5000 + .value 2500 + .value 5000 + .value 4166 + .value 4166 + .value 2500 + .value 5000 + .value 4285 + .value 3571 + .value 2500 + .value 5000 + .value 3750 + .value 3125 + .value 2500 + .value 5000 + .value 3888 + .value 3333 + .value 2500 + .value 5000 + .value 4000 + .value 3000 + .value 2500 + .value 5000 + .value 4090 + .value 3181 + .value 2500 + .value 5000 + .value 3750 + .value 3333 + .value 2500 + .value 5000 + .value 3846 + .value 3076 + .value 2500 + .value 5000 + .value 3928 + .value 3214 + .value 2500 + .value 5000 + .value 4000 + .value 3000 + .value 2500 + .align 2 + .type T1000_a.5194, @object + .size T1000_a.5194, 8 +T1000_a.5194: + .value 5000 + .value 3759 + .value 3003 + .value 2500 + .ident "GCC: (GNU) 4.1.3 20080308 (prerelease) (Ubuntu 4.1.2-21ubuntu1)" + .section .note.GNU-stack,"",@progbits Index: targets/dfi/nf570/nf570/normal/coreboot_ram.map =================================================================== --- targets/dfi/nf570/nf570/normal/coreboot_ram.map (revision 0) +++ targets/dfi/nf570/nf570/normal/coreboot_ram.map (revision 0) @@ -0,0 +1,1112 @@ +00000000 A ACPI_SSDTX_NUM +00000000 A CAR_FAM10 +00000000 A CBB +00000000 A CONFIG_AMDMCT +00000000 A CONFIG_AP_CODE_IN_CAR +00000000 A CONFIG_AP_IN_SIPI_WAIT +00000000 A CONFIG_COMPRESSED_PAYLOAD_LZMA +00000000 A CONFIG_COMPRESSED_PAYLOAD_NRV2B +00000000 A CONFIG_CONSOLE_BTEXT +00000000 A CONFIG_CONSOLE_LOGBUF +00000000 A CONFIG_CONSOLE_SROM +00000000 A CONFIG_CONSOLE_VGA_MULTI +00000000 A CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST +00000000 A CONFIG_FS_EXT2 +00000000 A CONFIG_FS_FAT +00000000 A CONFIG_FS_ISO9660 +00000000 A CONFIG_FS_PAYLOAD +00000000 A CONFIG_GDB_STUB +00000000 A CONFIG_IDE +00000000 A CONFIG_IDE_PAYLOAD +00000000 A CONFIG_PCI_64BIT_PREF_MEM +00000000 A CONFIG_PCIE_CONFIGSPACE_HOLE +00000000 A CONFIG_PRECOMPRESSED_PAYLOAD +00000000 A CONFIG_SERIAL_PAYLOAD +00000000 A CONFIG_SERIAL_POST +00000000 A CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +00000000 A CONFIG_UDELAY_IO +00000000 A CONFIG_UDELAY_TSC +00000000 A CONFIG_UNCOMPRESSED +00000000 A CONFIG_USBDEBUG_DIRECT +00000000 A CONFIG_USE_INIT +00000000 A CONFIG_VGA_ROM_RUN +00000000 A ENABLE_APIC_EXT_ID +00000000 A EXT_CONF_SUPPORT +00000000 A EXT_RT_TBL_SUPPORT +00000000 A FAKE_SPDROM +00000000 A HAVE_ACPI_TABLES +00000000 A HT3_SUPPORT +00000000 A HT_CHAIN_UNITID_BASE +00000000 A HW_MEM_HOLE_SIZE_AUTO_INC +00000000 A IDE_BOOT_DRIVE +00000000 A IDE_OFFSET +00000000 A K8_MEM_BANK_B_ONLY +00000000 A MMCONF_SUPPORT +00000000 A MMCONF_SUPPORT_DEFAULT +00000000 A PCI_BUS_SEGN_BITS +00000000 A PCI_IO_CFG_EXT +00000000 A ROM_SECTION_OFFSET +00000000 A SB_HT_CHAIN_UNITID_OFFSET_ONLY +00000000 A USE_FAILOVER_IMAGE +00000000 A USE_FALLBACK_IMAGE +00000000 A USE_WATCHDOG_ON_BOOT +00000000 A WAIT_BEFORE_CPUS_INIT +00000001 A _bogus +00000001 A CONFIG_AGP_PLUGIN_SUPPORT +00000001 A CONFIG_CARDBUS_PLUGIN_SUPPORT +00000001 A CONFIG_CHIP_NAME +00000001 A CONFIG_COMPRESS +00000001 A CONFIG_CONSOLE_SERIAL8250 +00000001 A CONFIG_CONSOLE_VGA +00000001 A CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT +00000001 A CONFIG_IOAPIC +00000001 A CONFIG_LOGICAL_CPUS +00000001 A CONFIG_MAX_PHYSICAL_CPUS +00000001 A CONFIG_PCIEXP_PLUGIN_SUPPORT +00000001 A CONFIG_PCI_ROM_RUN +00000001 A CONFIG_PCIX_PLUGIN_SUPPORT +00000001 A CONFIG_ROM_PAYLOAD +00000001 A CONFIG_SMP +00000001 A CONFIG_USE_PRINTK_IN_CAR +00000001 A CONFIG_VAR_MTRR_HOLE +00000001 A DEBUG +00000001 A HAVE_FAILOVER_BOOT +00000001 A HAVE_FALLBACK_BOOT +00000001 A HAVE_FANCTL +00000001 A HAVE_HARD_RESET +00000001 A HAVE_INIT_TIMER +00000001 A HAVE_MOVNTI +00000001 A HAVE_MP_TABLE +00000001 A HAVE_OPTION_TABLE +00000001 A HAVE_PIRQ_TABLE +00000001 A K8_HT_FREQ_1G_SUPPORT +00000001 A K8_REV_F_SUPPORT +00000001 A LIFT_BSP_APIC_ID +00000001 A SERIAL_CPU_INIT +00000001 A USE_DCACHE_RAM +00000001 A USE_OPTION_TABLE +00000002 A AUTOBOOT_DELAY +00000002 A CONFIG_MAX_CPUS +00000002 A MEM_TRAIN_SEQ +00000002 A SB_HT_CHAIN_ON_BUS0 +00000003 A MAX_REBOOT_CNT +00000003 A TTYS0_LCS +00000004 A DIMM_SUPPORT +00000008 A DEFAULT_CONSOLE_LOGLEVEL +00000008 A MAXIMUM_CONSOLE_LOGLEVEL +0000000b A IRQ_SLOT_COUNT +00000010 A APIC_ID_OFFSET +00000011 A CPU_SOCKET_TYPE +00000018 A CDB +00000020 A HT_CHAIN_END_UNITID_BASE +00000027 A gdt_limit +00000028 A CPU_ADDR_BITS +00000031 A LB_CKS_RANGE_START +0000007a A LB_CKS_RANGE_END +0000007b A LB_CKS_LOC +000000ff A CONFIG_MAX_PCI_BUSES +000003f8 A TTYS0_BASE +00000800 A CONFIG_LB_MEM_TOPK +00001000 A DCACHE_RAM_GLOBAL_VAR_SIZE +00001000 A FAILOVER_SIZE +00001022 A MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +00002000 A STACK_SIZE +00002b80 A MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +00008000 A DCACHE_RAM_SIZE +00008000 A HEAP_SIZE +0001c200 A TTYS0_BAUD +00020000 A PAYLOAD_SIZE +00020000 A ROM_IMAGE_SIZE +0003f000 A FALLBACK_SIZE +00040000 A ROM_SECTION_SIZE +00040000 A XIP_ROM_SIZE +00080000 A ROM_SIZE +000c8000 A DCACHE_RAM_BASE +00100000 A HW_MEM_HOLE_SIZEK +00100000 A _RAMBASE +00100000 T _ram_seg +00100000 T _start +00100000 T _text +001000a0 t vec0 +001000a6 t vec1 +001000ac t vec2 +001000b2 t vec3 +001000b8 t vec4 +001000be t vec5 +001000c4 t vec6 +001000ca t vec7 +001000d0 t vec8 +001000d6 t vec9 +001000dc t vec10 +001000e2 t vec11 +001000e8 t vec12 +001000ee t vec13 +001000f4 t vec14 +001000fa t vec15 +00100100 t vec16 +00100106 t vec17 +0010010c t vec18 +00100112 t vec19 +00100118 t int_hand +00100137 t gdtaddr +00100140 t lpci_set_subsystem +0010015f t set_bits +001001cb t aza_init +00100350 t lpci_set_subsystem +00100370 t pci_init +00100410 t ttyS0_tst_byte +00100422 t ttyS0_rx_byte +00100437 t ttyS0_tx_byte +00100451 t ttyS0_init +00100498 t lpci_set_subsystem +001004b7 t ide_init +0010055c t vga_tx_byte +001006c8 t lpci_set_subsystem +001006e7 t lpc_common_init +001007a9 t lpc_init +001008ec t lpc_slave_init +001008fa t mcp55_lpc_enable_resources +00100ae1 t mcp55_lpc_read_resources +00100b24 t lpci_set_subsystem +00100b43 t phy_read +00100bd6 t nic_init +00100d6c t pcie_init +00100d98 t lpci_set_subsystem +00100db7 t usb2_init +00100de6 t usb2_set_resources +00100df0 t lpci_set_subsystem +00100e0f t sata_init +00100eb4 t find_lpc_dev +00100f09 T mcp55_enable +0010125c t lpci_set_subsystem +0010127c t misc_control_init +00101375 t mcf3_set_resources +0010142e t mcf3_read_resources +001014cc t enable_lapic +001014e6 t disable_lapic +001014f7 t disable_cache +0010150b T cpus_ready_for_init +00101510 t restore_mtrr_state +001015a2 t set_init_ecc_mtrrs +00101603 T is_cpu_f0_in_bsp +00101642 t clear_2M_ram +001016e9 T model_fxx_init +00101ac8 t smbus_wait_until_done +00101af1 t mcp55_sm_init +00101af6 t lsmbus_write_byte +00101ba3 t lsmbus_read_byte +00101c4a t lsmbus_send_byte +00101ce6 t lsmbus_recv_byte +00101d71 t lpci_set_subsystem +00101d90 t mcp55_sm_read_resources +00101dcc T x86_enable_cache +00101df8 t ops_pci_bus +00101e18 t get_pbus +00101e86 T pci_write_config32 +00101ebd T pci_write_config16 +00101efb T pci_write_config8 +00101f3b T pci_read_config32 +00101f69 T pci_read_config16 +00101f9a T pci_read_config8 +00101fcc t disable_cache +00101fe0 t fixed_mtrr_index +00102016 t set_fixed_mtrrs +001020f6 t set_fixed_mtrr_resource +001021c6 T amd_setup_mtrrs +001022e8 t lapic_write_atomic +001022f3 T setup_lapic +001023ac t ops_smbus_bus +001023cc T get_pbus_smbus +0010243b T smbus_block_write +00102480 T smbus_block_read +001024c5 T smbus_process_call +00102500 T smbus_write_word +0010253b T smbus_read_word +0010256b T smbus_write_byte +001025a8 T smbus_read_byte +001025d8 T smbus_send_byte +00102608 T smbus_recv_byte +0010262c T smbus_quick_write +00102650 T smbus_quick_read +00102673 T smbus_set_link +001026ec T model_fxx_update_microcode +001026f4 T pnp_write_config +0010271a T pnp_read_config +0010273f T pnp_set_logical_device +00102757 T pnp_set_enable +001027a9 T pnp_read_enable +001027ce T pnp_set_iobase +0010280e T pnp_set_irq +00102825 T pnp_set_drq +0010283c T pnp_read_resources +00102841 T pnp_enable_resources +0010285e T pnp_enable +00102881 t pnp_get_ioresource +001028f7 T pnp_enable_devices +00102a6b T pnp_set_resources +00102b88 T do_printk +00102bd8 T pci_level_irq +00102c7e T pci_assign_irqs +00102d30 T pci_moving_config8 +00102da1 T pci_find_next_capability +00102e48 T pci_find_capability +00102e5d T pci_moving_config16 +00102ecf T do_pci_scan_bridge +00102faa T pci_scan_bridge +00102fc2 T pci_dev_set_subsystem +00102fe1 T pci_moving_config32 +0010304a T pci_dev_enable_resources +001030e7 T pci_probe_dev +001034d4 T pci_scan_bus +00103633 T pci_dev_init +00103682 T pci_bus_reset +001036dc T pci_bus_enable_resources +00103744 t pci_set_resource +00103a25 T pci_dev_set_resources +00103ad2 t pci_record_bridge_resource +00103bc3 t pci_get_rom_resource +00103d06 T pci_get_resource +00103eee t pci_read_bases +00103f3f T pci_bus_read_resources +001040ee T pci_dev_read_resources +00104114 t __console_tx_byte +00104143 T console_tx_flush +00104169 T console_tx_byte +00104197 T console_rx_byte +001041dc T console_tst_byte +00104207 T post_code +00104212 T console_init +00104262 T die +00104280 T read_nb_cfg_54 +00104294 T get_apicid_base +001043d0 T get_node_core_id +0010441c T hardwaremain +00104500 T mdelay +00104528 T delay +00104550 T isa_dma_init +00104564 T hard_reset +00104598 T ht_scan_bridge +001045b0 t ht_lookup_slave_capability +001045ea T hypertransport_scan_chain +00104b0f T hypertransport_scan_chain_x +00104b30 t skip_atoi +00104b5b t number +00104dbe T vtxprintf +00105160 T root_dev_init +00105165 T root_dev_reset +00105180 T enable_childrens_resources +001051c2 T root_dev_enable_resources +001051cb T scan_static_bus +00105309 T root_dev_scan_bus +00105312 T root_dev_set_resources +00105359 T root_dev_read_resources +00105418 T cardbus_scan_bus +00105421 T cardbus_scan_bridge +001054fe T cardbus_enable_resources +0010555c t cardbus_record_bridge_resource +00105645 t cardbus_size_bridge_resource +00105698 T cardbus_read_resources +00105850 T uart8250_tx_byte +0010587b T uart8250_can_rx_byte +0010588d T uart8250_init +001058e2 T init_uart8250 +00105916 T uart8250_rx_byte +00105934 T dev_find_slot +0010596b T dev_find_slot_on_smbus +001059a2 T dev_find_device +001059cc T dev_find_class +001059fa T probe_resource +00105a32 T resource_end +00105a7f T resource_max +00105aca T search_bus_resources +00105b4c T search_global_resources +00105ba6 T dev_set_enabled +00105bf3 T disable_children +00105c3e T resource_type +00105cd5 T path_eq +00105d31 T find_dev_path +00105d64 T compact_resources +00105dd4 T new_resource +00105e7c T dev_path +00105f6c T report_resource_stored +00106026 T find_resource +00106075 T bus_path +001060a5 T alloc_find_dev +001060d8 t round +0010610a t pick_largest_resource +0010618e T reset_bus +001061ce T scan_bus +0010627c T dev_enumerate +001062e8 T dev_initialize +00106392 T enable_resources +001063d8 T dev_enable +00106409 T assign_resources +00106468 t read_resources +00106549 T dev_configure +0010670c T alloc_dev +001067ca T compute_allocate_resource +001069a4 t disable_cache +001069b8 T enable_fixed_mtrr +001069c9 t set_var_mtrr +00106a79 t set_fixed_mtrrs +00106b59 t fixed_mtrr_index +00106b8f t range_to_mtrr +00106c54 T x86_mtrr_check +00106cee T x86_setup_var_mtrrs +00106dc8 T x86_setup_fixed_mtrrs +00106e28 T x86_setup_mtrrs +00106e42 t set_fixed_mtrr_resource +00106ed4 T set_var_mtrr_resource +00106fb4 T init_processor_name +00107228 T x86_exception +00107274 T memcpy +00107298 T udelay +001072b9 T init_timer +001072dc T memmove +00107320 T pci_rom_load +001073e6 T pci_rom_probe +001074c4 T map_2M_page +00107614 t pci_conf2_write_config32 +00107650 t pci_conf2_write_config16 +00107692 t pci_conf2_write_config8 +001076d0 t pci_conf2_read_config32 +0010771d t pci_conf2_read_config16 +0010776c t pci_conf2_read_config8 +001077bc t pci_conf1_read_config16 +001077f9 t pci_conf1_read_config8 +00107835 t pci_conf1_write_config32 +00107863 t pci_conf1_write_config16 +001078a5 t pci_conf1_write_config8 +001078e3 t pci_conf1_read_config32 +00107910 t rtc_checksum_valid +00107961 T get_option +00107a31 T rtc_init +00107b3c T x_inb +00107b49 T x_inw +00107b57 T x_inl +00107b61 T x_outw +00107b70 T x_outl +00107b7d T getIntVect +00107bb1 T pushw +00107be1 T run_bios_int +00107c42 T do_int +00107cc7 T x_outb +00107cd5 T run_bios +00107e20 t str_tx_byte +00107e35 T vsprintf +00107e5e T sprintf +00107e78 T malloc_mark +00107e88 T malloc_release +00107e97 T free +00107e9c T malloc +00107ef4 T memset +00107f10 t pnp_enter_ext_func_mode +00107f2d t enable_dev +00107f4c t pnp_exit_ext_func_mode +00107f61 t it8716f_pnp_enable +00107f98 t it8716f_init +00108050 t it8716f_pnp_enable_resources +00108078 t it8716f_pnp_set_resources +001080a0 T pciexp_scan_bridge +001080b8 T pciexp_scan_bus +00108128 T move_gdt +00108183 T write_tables +00108278 t kbc_cleanup_buffers +001082cc t kbc_output_buffer_full +00108304 t kbc_input_buffer_empty +0010833c t send_keyboard +00108371 T init_pc_keyboard +00108524 T set_kbc_ps2_mode +00108584 T write_pirq_routing_table +00108674 T pcix_speed +001086bf T pcix_scan_bus +001087cf T pcix_scan_bridge +00108884 T get_bus_conf +00108a78 T X86EMU_halt_sys +00108a8a T fetch_decode_modrm +00108adc T fetch_byte_imm +00108b0c T fetch_word_imm +00108b39 T fetch_long_imm +00108b63 T fetch_data_byte_abs +00108b7e T fetch_data_word_abs +00108b99 T fetch_data_long_abs +00108bb1 T store_data_byte_abs +00108bd2 T store_data_word_abs +00108bf3 T store_data_long_abs +00108c13 T decode_sib_si +00108c8a T decode_sib_address +00108d7d T decode_rm10_address +00108eca T decode_rm01_address +0010901d T decode_rm00_address +0010912c T decode_rmXX_address +00109157 t get_data_segment +00109207 T store_data_long +00109237 T store_data_word +00109268 T store_data_byte +0010929b T fetch_data_long +001092bd T fetch_data_word +001092e3 T fetch_data_byte +00109309 T X86EMU_exec +00109427 T x86emu_intr_raise +00109466 T decode_rm_byte_register +001094dd T decode_rm_seg_register +00109546 T decode_rm_long_register +001095bd T decode_rm_word_register +00109634 t mcf0_control_init +00109639 t tolm_test +00109662 t cpu_bus_noop +00109667 t root_complex_enable_dev +00109692 t get_fx_devs +001096fb t f1_write_config32 +0010973a t f1_read_config32 +0010975b t amdk8_scan_chain +001099e4 t amdk8_enable_resources +00109a03 t ram_resource +00109a4c t pci_domain_read_resources +00109b14 t reg_useable +00109b91 t amdk8_find_mempair +00109bfc t amdk8_read_resources +00109df5 t cpu_bus_scan +0010a10e t cpu_bus_init +0010a11e t pci_domain_scan_bus +0010a1b4 t pci_domain_set_resources +0010a5d8 t amdk8_scan_chains +0010a660 t amdk8_set_resources +0010aa04 T elfload +0010b212 T elfboot +0010b392 T verify_ip_checksum +0010b484 T elf_check_arch +0010b4a9 T jmp_to_elf_entry +0010b578 T get_sblk_pci1234 +0010b6ec T memcmp +0010b71c T pcibios_handler +0010b92c T x86emuOp_two_byte +0010b96a T x86emuOp_segovr_ES +0010b976 T x86emuOp_segovr_CS +0010b982 T x86emuOp_segovr_SS +0010b98e T x86emuOp_segovr_DS +0010b99a T x86emuOp_segovr_FS +0010b9a6 T x86emuOp_segovr_GS +0010b9b2 T x86emuOp_prefix_data +0010b9c1 T x86emuOp_prefix_addr +0010b9d0 T x86emuOp_nop +0010b9df T x86emuOp_cbw +0010ba26 T x86emuOp_cwd +0010ba5d T x86emuOp_wait +0010ba6c T x86emuOp_sahf +0010ba87 T x86emuOp_lahf +0010baa3 T x86emuOp_in_byte_AL_DX +0010bacb T x86emuOp_in_word_AX_DX +0010bb11 T x86emuOp_out_byte_DX_AL +0010bb3c T x86emuOp_out_word_DX_AX +0010bb83 T x86emuOp_lock +0010bb92 T x86emuOp_repne +0010bba9 T x86emuOp_repe +0010bbbf T x86emuOp_cmc +0010bbd5 T x86emuOp_clc +0010bbeb T x86emuOp_stc +0010bc01 T x86emuOp_cli +0010bc1a T x86emuOp_sti +0010bc33 T x86emuOp_cld +0010bc4c T x86emuOp_std +0010bc65 T x86emuOp_lods_word +0010bd1a T x86emuOp_push_DS +0010bd3c T x86emuOp_push_SS +0010bd5e T x86emuOp_push_CS +0010bd80 T x86emuOp_push_ES +0010bda2 T x86emuOp_pushf_word +0010bde1 T x86emuOp_push_all +0010bee2 T x86emuOp_opcD3_word_RM_CL +0010bfed T x86emuOp_opcD1_word_RM_1 +0010c0de T x86emuOp_lds_R_IMM +0010c14c T x86emuOp_les_R_IMM +0010c1ba T x86emuOp_xchg_word_AX_register +0010c21c T x86emuOp_lea_word_R_M +0010c26c T x86emuOp_mov_word_R_RM +0010c331 T x86emuOp_mov_word_RM_R +0010c3f0 T x86emuOp_xchg_word_RM_R +0010c4d4 T x86emuOp_push_register +0010c525 T x86emuOp_dec_register +0010c583 T x86emuOp_inc_register +0010c5e1 T x86emuOp_genop_word_R_RM +0010c6e5 T x86emuOp_genop_word_RM_R +0010c827 T x86emuOp_opcFF_word_RM +0010cafa T x86emuOp_halt +0010cb2a T x86emuOp_illegal_op +0010cb59 T x86emuOp_xlat +0010cb8b T x86emuOp_lods_byte +0010cc1d T x86emuOp_opcFE_byte_RM +0010ccca T x86emuOp_opcD2_byte_RM_CL +0010cd67 T x86emuOp_opcD0_byte_RM_1 +0010cdf2 T x86emuOp_mov_byte_R_RM +0010ce63 T x86emuOp_mov_byte_RM_R +0010ced6 T x86emuOp_xchg_byte_RM_R +0010cf5e T x86emuOp_genop_byte_R_RM +0010cff0 T x86emuOp_genop_byte_RM_R +0010d0ad T x86emuOp_jump_far_IMM +0010d0db T x86emuOp_jump_near_IMM +0010d0f9 T x86emuOp_call_near_IMM +0010d135 T x86emuOp_mov_word_RM_IMM +0010d208 T x86emuOp_mov_word_register_IMM +0010d25d T x86emuOp_mov_M_AX_IMM +0010d2a3 T x86emuOp_mov_M_AL_IMM +0010d2d0 T x86emuOp_mov_AX_M_IMM +0010d315 T x86emuOp_mov_AL_M_IMM +0010d340 T x86emuOp_call_far_IMM +0010d394 T x86emuOp_opc81_word_RM_IMM +0010d4b4 T x86emuOp_push_word_IMM +0010d501 T x86emuOp_genop_word_AX_IMM +0010d57e T x86emuOp_test_AX_IMM +0010d5d7 T x86emuOp_test_word_RM_R +0010d6ae T x86emuOp_opcF7_word_RM +0010d979 T x86emuOp_jump_byte_IMM +0010d999 T x86emuOp_out_word_IMM_AX +0010d9e6 T x86emuOp_out_byte_IMM_AL +0010da14 T x86emuOp_in_word_AX_IMM +0010da5e T x86emuOp_in_byte_AL_IMM +0010da8a T x86emuOp_jcxz +0010dabd T x86emuOp_loop +0010dafb T x86emuOp_loope +0010db42 T x86emuOp_loopne +0010db89 T x86emuOp_mov_byte_RM_IMM +0010dc16 T x86emuOp_opcC1_word_RM_MEM +0010dd32 T x86emuOp_opcC0_byte_RM_MEM +0010ddd2 T x86emuOp_mov_byte_register_IMM +0010de01 T x86emuOp_opc83_word_RM_IMM +0010df2b T x86emuOp_opc82_byte_RM_IMM +0010dfd2 T x86emuOp_opc80_byte_RM_IMM +0010e079 T x86emuOp_push_byte_IMM +0010e0a1 T x86emuOp_genop_byte_AL_IMM +0010e0e2 T x86emuOp_test_AL_IMM +0010e10f T x86emuOp_test_byte_RM_R +0010e192 T x86emuOp_opcF6_byte_RM +0010e317 T x86emuOp_aad +0010e347 T x86emuOp_aam +0010e399 T x86emuOp_iret +0010e3ce T x86emuOp_ret_far +0010e3f6 T x86emuOp_ret_far_IMM +0010e42f T x86emuOp_leave +0010e458 T x86emuOp_ret_near +0010e475 T x86emuOp_ret_near_IMM +0010e4a3 T x86emuOp_pop_DS +0010e4c0 T x86emuOp_pop_SS +0010e4dd T x86emuOp_pop_ES +0010e4fa T x86emuOp_into +0010e593 T x86emuOp_int_IMM +0010e636 T x86emuOp_int3 +0010e6c3 T x86emuOp_enter +0010e770 T x86emuOp_scas_word +0010e91b T x86emuOp_cmps_word +0010ea9e T x86emuOp_scas_byte +0010ebc4 T x86emuOp_cmps_byte +0010ecd1 T x86emuOp_stos_word +0010ed8e T x86emuOp_movs_word +0010ee78 T x86emuOp_stos_byte +0010ef1c T x86emuOp_movs_byte +0010efb5 T x86emuOp_popf_word +0010efe4 T x86emuOp_pop_RM +0010f0ad T x86emuOp_pop_all +0010f16c T x86emuOp_pop_register +0010f1c1 T x86emuOp_mov_word_SR_RM +0010f234 T x86emuOp_mov_word_RM_SR +0010f2a9 T x86emuOp_jump_near_cond +0010f2ec T x86emuOp_outs_word +0010f31b T x86emuOp_outs_byte +0010f337 T x86emuOp_ins_word +0010f366 T x86emuOp_ins_byte +0010f382 T x86emuOp_imul_byte_IMM +0010f50d T x86emuOp_imul_word_IMM +0010f690 T x86emuOp_aas +0010f6b8 T x86emuOp_aaa +0010f6e0 T x86emuOp_das +0010f707 T x86emuOp_daa +0010f730 t set_parity_flag +0010f75f t set_szp_flags_8 +0010f796 t set_szp_flags_16 +0010f7d2 t set_szp_flags_32 +0010f809 t no_carry_byte_side_eff +0010f81f t no_carry_word_side_eff +0010f835 t no_carry_long_side_eff +0010f845 t calc_carry_chain +0010f8c2 t calc_borrow_chain +0010f93a T aaa_word +0010f97e T aas_word +0010f9c2 T aad_word +0010f9e4 T aam_word +0010fa1a T adc_byte +0010fa65 T adc_word +0010fab0 T adc_long +0010fb2f T add_byte +0010fb6a T add_word +0010fba5 T add_long +0010fbf0 T and_byte +0010fc09 T and_word +0010fc22 T and_long +0010fc38 T cmp_byte +0010fc6f T cmp_word +0010fca4 T cmp_long +0010fcd3 T daa_byte +0010fd22 T das_byte +0010fd6d T dec_byte +0010fda4 T dec_word +0010fdd9 T dec_long +0010fe08 T inc_byte +0010fe3f T inc_word +0010fe74 T inc_long +0010fea3 T or_byte +0010febc T or_word +0010fed5 T or_long +0010feeb T neg_byte +0010ff35 T neg_word +0010ff7b T neg_long +0010ffbc T not_byte +0010ffc9 T not_word +0010ffd6 T not_long +0010ffe0 T rcl_byte +001100a5 T rcl_word +00110160 T rcl_long +00110208 T rcr_byte +001102e6 T rcr_word +001103c6 T rcr_long +001104b7 T rol_byte +00110566 T rol_word +00110610 T rol_long +001106b4 T ror_byte +0011075e T ror_word +00110801 T ror_long +0011089f T shl_byte +0011095c T shl_word +00110a15 T shl_long +00110ac1 T shr_byte +00110b75 T shr_word +00110c06 T shr_long +00110c8c T sar_byte +00110d3a T sar_word +00110de4 T sar_long +00110e8b T shld_word +00110f5c T shld_long +0011101d T shrd_word +001110c2 T shrd_long +0011115a T sbb_byte +00111204 T sbb_word +001112a3 T sbb_long +00111330 T sub_byte +001113b6 T sub_word +0011143b T sub_long +001114b4 T test_byte +001114d8 T test_word +001114fc T test_long +0011151d T xor_byte +00111536 T xor_word +0011154f T xor_long +00111565 T imul_byte +001115aa T imul_word +001115f7 T imul_long_direct +00111613 T imul_long +00111664 T mul_byte +00111697 T mul_word +001116d3 T mul_long +0011170c T mem_access_word +00111720 T push_word +00111757 T push_long +0011178c T pop_word +001117b9 T pop_long +001117e3 t single_out +00111860 T outs +001118ed t single_in +00111983 T ins +00111a10 T div_long +00111aa7 T div_word +00111b3a T div_byte +00111b78 T idiv_long +00111c10 T idiv_word +00111caa T idiv_byte +00111cf4 t p_inb +00111d01 t p_inw +00111d0f t p_inl +00111d19 t p_outb +00111d27 t p_outw +00111d36 t p_outl +00111d43 T X86EMU_setupMemFuncs +00111d7a T X86EMU_setupPioFuncs +00111db1 T X86EMU_setupIntrFuncs +00111deb T X86EMU_setMemBase +00111e00 T X86EMU_prepareForInt +00111e73 T mem_ptr +00111eb1 T wrl +00111ecb T wrw +00111eea T wrb +00111f08 T rdl +00111f1c T rdw +00111f31 T rdb +00111f48 T init_ec +00111f88 T compute_ip_checksum +00111fdb T add_ip_checksums +0011201c T x86emuOp_esc_coprocess_d8 +0011202b T x86emuOp_esc_coprocess_df +0011208a T x86emuOp_esc_coprocess_de +001120e9 T x86emuOp_esc_coprocess_dd +00112148 T x86emuOp_esc_coprocess_dc +001121a7 T x86emuOp_esc_coprocess_db +00112206 T x86emuOp_esc_coprocess_da +00112265 T x86emuOp_esc_coprocess_d9 +001122c4 t pack_lb64 +001122da T lb_table_init +0011231a T lb_first_record +00112325 T lb_last_record +00112333 T lb_next_record +0011233e T lb_new_record +0011236c T lb_memory +00112386 T lb_serial +001123ad T add_console +001123de T lb_console +00112420 T lb_cmos_checksum +00112456 T lb_memory_range +001124cf T get_lb_mem +001124d9 t build_lb_mem_range +001124f9 T lb_strings +00112554 T lb_mainboard +001125f9 t lb_cleanup_memory_ranges +0011289e t lb_add_memory_range +00112b2e T lb_table_fini +00112cae T write_coreboot_table +00112dfc T stream_fini +00112e01 T stream_skip +00112e52 T stream_read +00112e80 T stream_init +00112eac T x86emu_dump_xregs +001130f3 T x86emu_dump_regs +0011334c T x86emu_check_jump_condition +00113466 T x86emuOp2_movsx_word_R_RM +001134d9 T x86emuOp2_movzx_word_R_RM +0011354e T x86emuOp2_lgs_R_IMM +001135bc T x86emuOp2_lfs_R_IMM +0011362a T x86emuOp2_lss_R_IMM +00113698 T x86emuOp2_movsx_byte_R_RM +00113764 T x86emuOp2_movzx_byte_R_RM +00113832 T x86emuOp2_bsr +001139cd T x86emuOp2_bsf +00113b64 T x86emuOp2_bt_R +00113c83 T x86emuOp2_btc_R +00113e02 T x86emuOp2_btr_R +00113f8b T x86emuOp2_bts_R +0011410a T x86emuOp2_illegal_op +00114153 T x86emuOp2_btX_I +0011438f T x86emuOp2_imul_R_RM +001144e3 T x86emuOp2_shrd_CL +00114611 T x86emuOp2_shrd_IMM +00114751 T x86emuOp2_pop_GS +0011476e T x86emuOp2_pop_FS +0011478b T x86emuOp2_push_GS +001147ad T x86emuOp2_push_FS +001147cf T x86emuOp2_shld_CL +001148fd T x86emuOp2_shld_IMM +00114a3d T x86emuOp2_set_byte +00114bd9 T x86emuOp2_long_jump +00114c1c T smp_compute_checksum +00114c3a T smp_write_floating_table +00114c8e T smp_write_floating_table_physaddr +00114cdc T smp_next_mpc_entry +00114cea t smp_add_mpc_entry +00114cf7 T smp_next_mpe_entry +00114d0c T smp_write_intsrc +00114d87 T smp_write_processor +00114df5 T smp_write_processors +00114e96 T smp_write_intsrc_pci_bridge +00114fed T smp_write_lintsrc +00115068 T smp_write_ioapic +001150c2 T smp_write_bus +00115117 T smp_write_compatibility_address_space +0011516b T smp_write_bus_hierarchy +001151c5 T smp_write_address_space +0011522c t lapic_write_atomic +00115237 T secondary_cpu_init +00115253 T start_cpu +001154e4 T initialize_cpus +00115634 T set_boot_successful +00115662 T boot_successful +0011566c T smp_write_config_table +00115c00 T write_smp_table +00116000 T _secondary_start +00116055 t gdtaddr +0011605b T _secondary_start_end +0011605c t set_cpu_ops +001160a6 T cpu_initialize +00116350 T __divdi3 +001164f0 T __moddi3 +00116700 T __udivdi3 +00116830 T __umoddi3 +001169f0 T _etext +00116a00 R console_drivers +00116a00 R _rodata +00116a00 r uart8250_console +00116a14 r vga_console +00116a28 r azaaudio_driver +00116a28 R econsole_drivers +00116a28 R pci_drivers +00116a30 r ht_driver +00116a38 r pci_driver +00116a40 r ide_driver +00116a48 r lpc_driver_slave +00116a50 r lpc_driver_lpc6 +00116a58 r lpc_driver_lpc5 +00116a60 r lpc_driver_lpc4 +00116a68 r lpc_driver_lpc3 +00116a70 r lpc_driver_lpc2 +00116a78 r lpc_driver_pro +00116a80 r lpc_driver +00116a88 r nic_bridge_driver +00116a90 r nic_driver +00116a98 r pcied_driver +00116aa0 r pcief_driver +00116aa8 r pciea_driver +00116ab0 r pciee_driver +00116ab8 r pciebc_driver +00116ac0 r usb2_driver +00116ac8 r sata1_driver +00116ad0 r sata0_driver +00116ad8 r usb_driver +00116ae0 r mcf3_driver +00116ae8 r smbus_driver +00116af0 r mcf0_driver +00116af8 R cpu_drivers +00116af8 R epci_drivers +00116af8 r model_fxx +00116b00 r div.945 +00116b00 R ecpu_drivers +00116b80 r mtrr_msr +00116bac r __func__.2192 +00116bc0 R mainboard_vendor +00116bc4 R mainboard_part_number +00116bca R coreboot_version +00116bd0 R coreboot_extra_version +00116bdd R coreboot_build +00116bfa R coreboot_compile_time +00116c03 R coreboot_compile_by +00116c09 R coreboot_compile_host +00116c10 R coreboot_compile_domain +00116c20 R coreboot_compiler +00116c80 R coreboot_linker +00116ce0 R coreboot_assembler +00116da0 r mtrr_msr +00116df8 R pci_cf8_conf2 +00116e10 R pci_cf8_conf1 +00116e28 r free_mem_end_ptr +00116eac r unknown.1381 +00116eb4 r pcix_533mhz.1380 +00116ec1 r pcix_266mhz.1379 +00116ece r pcix_133mhz.1378 +00116edb r pcix_100mhz.1377 +00116ee8 r pcix_66mhz.1376 +00116ef4 r conventional.1375 +00117080 r __func__.1635 +001171e0 r opcD1_long_operation +00117200 r opcD1_word_operation +00117220 r opcD0_byte_operation +00117240 r genop_long_operation +00117260 r genop_word_operation +00117280 r genop_byte_operation +001172a0 r x86emu_parity_tab +001172c0 r sequence +00117300 r strings.1557 +00117350 r __FUNCTION__.1109 +001173d8 r productid.1666 +001173e4 r oem.1665 +001173ec r sig.1664 +00117400 r x86_vendors +00117460 r x86_vendor_name +00119558 R _erodata +00119620 D _data +00119620 D gdt +00119648 D gdt_end +00119648 D idtarg +00119650 d _idt +001196f0 d _idt_end +00119700 d verb_data +001197c0 d aza_audio_ops +001197ec d lops_pci +00119800 d ht_ops +0011982c d lops_pci +00119840 d pci_ops +00119880 d ide_ops +001198ac d lops_pci +001198b0 D mainboard_dfi_nf570_ops +001198c0 d ioapicregvalues +001199e0 d lpc_slave_ops +00119a20 d lpc_ops +00119a4c d lops_pci +00119a60 d nic_ops +00119a8c d lops_pci +00119aa0 d pcie_ops +00119ae0 d usb2_ops +00119b0c d lops_pci +00119b20 d sata_ops +00119b4c d lops_pci +00119b50 D southbridge_nvidia_mcp55_ops +00119b60 d usb_ops +00119b8c d lops_pci +00119ba0 d mcf3_ops +00119be0 d cpu_dev_ops +00119c20 d cpu_table +00119d00 d smbus_ops +00119d2c d lops_pci +00119d40 d lops_smbus_bus +00119d80 D pnp_ops +00119dac D console_loglevel +00119db0 D default_message_loglevel +00119db4 D minimum_console_loglevel +00119db8 D default_console_loglevel +00119dbc d console_lock +00119dc0 D default_pci_ops_dev +00119e00 D default_pci_ops_bus +00119e2c d pci_dev_ops_pci +00119e40 D default_ht_ops_bus +00119e80 D default_dev_ops_root +00119ec0 D default_cardbus_ops_bus +00119eec D all_devices +00119ef0 d dev_lock +00119ef4 d pci_ram_image_start +00119ef8 D myfuncs +00119f20 D last_dev_p +00119f40 D dev_root +0011a3a0 D _dev3 +0011a800 D _dev6 +0011ac60 D _dev5 +0011b0c0 D _dev8 +0011b520 D _dev62 +0011b980 D _dev63 +0011bde0 D _dev64 +0011c22c D southbridge_nvidia_mcp55_info_9 +0011c240 D _dev10 +0011c6a0 D _dev11 +0011cb00 D _dev24 +0011cf60 D _dev44 +0011d3c0 D _dev45 +0011d820 D _dev46 +0011dc80 D _dev47 +0011e0e0 D _dev48 +0011e540 D _dev49 +0011e9a0 D _dev50 +0011ee00 D _dev51 +0011f260 D _dev52 +0011f6c0 D _dev53 +0011fb20 D _dev54 +0011ff80 D _dev55 +001203e0 D _dev56 +00120840 D _dev57 +00120ca0 D _dev58 +00121100 D _dev59 +00121560 D _dev13 +001219c0 D _dev14 +00121e20 D _dev15 +00122280 D _dev16 +001226e0 D _dev17 +00122b40 D _dev18 +00122fa0 D _dev19 +00123400 D _dev20 +00123860 D _dev21 +00123cc0 D _dev22 +00124120 D _dev23 +00124580 D _dev26 +001249e0 D _dev28 +00124e40 D _dev30 +001252a0 D _dev32 +00125700 D _dev34 +00125b60 D _dev36 +00125fc0 D _dev38 +00126420 D _dev40 +00126880 D _dev43 +00126ccc d free_mem_ptr +00126ce0 D superio_ite_it8716f_ops +00126d00 d ops +00126d40 d pnp_dev_info +00126f40 D default_pciexp_ops_bus +00126f80 D default_pcix_ops_bus +00126fac D pci1234x +00126fb0 D hcdnx +00126fc0 D northbridge_amd_amdk8_ops +00126fc8 D northbridge_amd_amdk8_root_complex_ops +00126fe0 d pci_domain_ops +00127020 d cpu_bus_ops +00127060 d northbridge_operations +001270a0 d elf_boot_notes +00127100 D x86emu_optab +00127500 D sys_rdb +00127504 D sys_rdw +00127508 D sys_rdl +0012750c D sys_wrb +00127510 D sys_wrw +00127514 D sys_wrl +00127518 D sys_inb +0012751c D sys_inw +00127520 D sys_inl +00127524 D sys_outb +00127528 D sys_outw +0012752c D sys_outl +00127530 D cpu_amd_socket_AM2_ops +00127540 D option_table +00127c30 D rom_start +00127c34 D rom_end +00127c40 D x86emu_optab2 +00128040 d active_cpus +00128044 d start_cpu_lock +00128048 A _bss +00128048 D _edata +00129000 b lops_pci +00129004 B vga_inited +00129008 b vga_console_inited +0012900c b vidmem +00129010 b nic_index.1563 +00129014 b lops_pci +00129018 b final_reg +0012901c b pci_bus_ops_pci +00129020 b initialized +00129024 b ht_bus_ops_pci +00129028 b smbus_max +00129040 b buffer.1729 +00129060 b buffer.1579 +00129088 b buffer.1547 +001290a8 B vga_pri +0012a000 b mapped_window.1413 +0012b000 b pgtbl.1412 +00135000 b str_buf +00135004 b pciexp_bus_ops_pci +00135008 b pcix_bus_ops_pci +0013500c b get_bus_conf_done +00135020 b __f0_dev +00135040 b __f1_dev +00135060 b header.1645 +00137060 b mem_ranges +00137064 b rom +00137068 b last_cpu_index +00137080 B sysconf +00137120 B _dev41 +0013756c B superio_ite_it8716f_info_12 +00137580 B _X86EMU_intrTab +00137980 B bus_isa +00137984 B vga_col +00137988 B mainboard_dfi_nf570_info_0 +00137988 B northbridge_amd_amdk8_info_7 +001379a0 B _dev61 +00137dec B vga_line +00137df0 B bus_mcp55 +00137df8 B apicid_mcp55 +00137e00 B _dev60 +0013824c B northbridge_amd_amdk8_root_complex_info_2 +00138260 B _X86EMU_env +001383e4 B cpu_amd_socket_AM2_info_4 +00138400 B bus_type +00138800 B secondary_stack +00138804 A _ebss +00138804 A _end +0013a000 A _stack +0013e000 A _estack +0013e000 A _heap +00146000 A _eheap +00146000 A _eram_seg +04000000 A AGP_APERTURE_SIZE +fff80000 A CONFIG_ROM_PAYLOAD_START +fff80000 A XIP_ROM_BASE +fffa0000 A _RESET +fffa0000 A _ROMBASE +fffa0100 A _EXCEPTION_VECTORS Index: targets/dfi/nf570/nf570/normal/coreboot.map =================================================================== --- targets/dfi/nf570/nf570/normal/coreboot.map (revision 0) +++ targets/dfi/nf570/nf570/normal/coreboot.map (revision 0) @@ -0,0 +1,270 @@ +00000000 A ACPI_SSDTX_NUM +00000000 A CAR_FAM10 +00000000 A CBB +00000000 A CONFIG_AMDMCT +00000000 A CONFIG_AP_CODE_IN_CAR +00000000 A CONFIG_AP_IN_SIPI_WAIT +00000000 A CONFIG_COMPRESSED_PAYLOAD_LZMA +00000000 A CONFIG_COMPRESSED_PAYLOAD_NRV2B +00000000 A CONFIG_CONSOLE_BTEXT +00000000 A CONFIG_CONSOLE_LOGBUF +00000000 A CONFIG_CONSOLE_SROM +00000000 A CONFIG_CONSOLE_VGA_MULTI +00000000 A CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST +00000000 A CONFIG_FS_EXT2 +00000000 A CONFIG_FS_FAT +00000000 A CONFIG_FS_ISO9660 +00000000 A CONFIG_FS_PAYLOAD +00000000 A CONFIG_GDB_STUB +00000000 A CONFIG_IDE +00000000 A CONFIG_IDE_PAYLOAD +00000000 A CONFIG_PCI_64BIT_PREF_MEM +00000000 A CONFIG_PCIE_CONFIGSPACE_HOLE +00000000 A CONFIG_PRECOMPRESSED_PAYLOAD +00000000 A CONFIG_SERIAL_PAYLOAD +00000000 A CONFIG_SERIAL_POST +00000000 A CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +00000000 A CONFIG_UDELAY_IO +00000000 A CONFIG_UDELAY_TSC +00000000 A CONFIG_UNCOMPRESSED +00000000 A CONFIG_USBDEBUG_DIRECT +00000000 A CONFIG_USE_INIT +00000000 A CONFIG_VGA_ROM_RUN +00000000 A ENABLE_APIC_EXT_ID +00000000 A EXT_CONF_SUPPORT +00000000 A EXT_RT_TBL_SUPPORT +00000000 A FAKE_SPDROM +00000000 A HAVE_ACPI_TABLES +00000000 A HT3_SUPPORT +00000000 A HT_CHAIN_UNITID_BASE +00000000 A HW_MEM_HOLE_SIZE_AUTO_INC +00000000 A IDE_BOOT_DRIVE +00000000 A IDE_OFFSET +00000000 A K8_MEM_BANK_B_ONLY +00000000 A MMCONF_SUPPORT +00000000 A MMCONF_SUPPORT_DEFAULT +00000000 A PCI_BUS_SEGN_BITS +00000000 A PCI_IO_CFG_EXT +00000000 A ROM_SECTION_OFFSET +00000000 A SB_HT_CHAIN_UNITID_OFFSET_ONLY +00000000 A USE_FAILOVER_IMAGE +00000000 A USE_FALLBACK_IMAGE +00000000 A USE_WATCHDOG_ON_BOOT +00000000 A WAIT_BEFORE_CPUS_INIT +00000001 A CONFIG_AGP_PLUGIN_SUPPORT +00000001 A CONFIG_CARDBUS_PLUGIN_SUPPORT +00000001 A CONFIG_CHIP_NAME +00000001 A CONFIG_COMPRESS +00000001 A CONFIG_CONSOLE_SERIAL8250 +00000001 A CONFIG_CONSOLE_VGA +00000001 A CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT +00000001 A CONFIG_IOAPIC +00000001 A CONFIG_LOGICAL_CPUS +00000001 A CONFIG_MAX_PHYSICAL_CPUS +00000001 A CONFIG_PCIEXP_PLUGIN_SUPPORT +00000001 A CONFIG_PCI_ROM_RUN +00000001 A CONFIG_PCIX_PLUGIN_SUPPORT +00000001 A CONFIG_ROM_PAYLOAD +00000001 A CONFIG_SMP +00000001 A CONFIG_USE_PRINTK_IN_CAR +00000001 A CONFIG_VAR_MTRR_HOLE +00000001 A DEBUG +00000001 A HAVE_FAILOVER_BOOT +00000001 A HAVE_FALLBACK_BOOT +00000001 A HAVE_FANCTL +00000001 A HAVE_HARD_RESET +00000001 A HAVE_INIT_TIMER +00000001 A HAVE_MOVNTI +00000001 A HAVE_MP_TABLE +00000001 A HAVE_OPTION_TABLE +00000001 A HAVE_PIRQ_TABLE +00000001 A K8_HT_FREQ_1G_SUPPORT +00000001 A K8_REV_F_SUPPORT +00000001 A LIFT_BSP_APIC_ID +00000001 A SERIAL_CPU_INIT +00000001 A USE_DCACHE_RAM +00000001 A USE_OPTION_TABLE +00000002 A AUTOBOOT_DELAY +00000002 A CONFIG_MAX_CPUS +00000002 A MEM_TRAIN_SEQ +00000002 A SB_HT_CHAIN_ON_BUS0 +00000003 A MAX_REBOOT_CNT +00000003 A TTYS0_LCS +00000004 A DIMM_SUPPORT +00000008 A DEFAULT_CONSOLE_LOGLEVEL +00000008 A MAXIMUM_CONSOLE_LOGLEVEL +0000000b A IRQ_SLOT_COUNT +00000010 A APIC_ID_OFFSET +00000011 A CPU_SOCKET_TYPE +00000018 A CDB +00000020 A HT_CHAIN_END_UNITID_BASE +00000028 A CPU_ADDR_BITS +00000031 A LB_CKS_RANGE_START +0000007a A LB_CKS_RANGE_END +0000007b A LB_CKS_LOC +000000ff A CONFIG_MAX_PCI_BUSES +000003f8 A TTYS0_BASE +00000800 A CONFIG_LB_MEM_TOPK +00001000 A DCACHE_RAM_GLOBAL_VAR_SIZE +00001000 A FAILOVER_SIZE +00001022 A MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +00002000 A STACK_SIZE +00002b80 A MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +00008000 A DCACHE_RAM_SIZE +00008000 A HEAP_SIZE +0000dbb3 A _binary_coreboot_ram_rom_size +0001c200 A TTYS0_BAUD +00020000 A PAYLOAD_SIZE +00020000 A ROM_IMAGE_SIZE +0003f000 A FALLBACK_SIZE +00040000 A ROM_SECTION_SIZE +00040000 A XIP_ROM_SIZE +00080000 A ROM_SIZE +000c8000 A DCACHE_RAM_BASE +00100000 A HW_MEM_HOLE_SIZEK +00100000 A _iseg +00100000 A _RAMBASE +0010dbb3 A _eiseg +04000000 A AGP_APERTURE_SIZE +fff80000 A CONFIG_ROM_PAYLOAD_START +fff80000 A XIP_ROM_BASE +fffa0000 A _RESET +fffa0000 A _ROMBASE +fffa0000 D _binary_coreboot_ram_rom_start +fffa0000 D _liseg +fffa0000 D _ram +fffa0100 A _EXCEPTION_VECTORS +fffadbb3 A _lrom +fffadbb3 D _binary_coreboot_ram_rom_end +fffadbb3 D _eliseg +fffadbb3 D _eram +fffadbb3 T _rom +fffadbb8 t gdt +fffadbb8 T gdtptr +fffadbd0 t gdt_end +fffadbd0 T protected_start +fffadbdf t __protected_start +fffadbf7 t cache_as_ram_setup +fffadc56 t fixed_mtrr_msr +fffadc82 t var_mtrr_msr +fffadcc2 t var_iorr_msr +fffadcd2 t mem_top +fffadcde t cache_as_ram_setup_out +fffadcde t read_option +fffadd07 T uart8250_tx_byte +fffadd32 T uart8250_can_rx_byte +fffadd44 T uart8250_init +fffadd99 T init_uart8250 +fffaddcd t skip_atoi +fffaddf8 t number +fffae05b T vtxprintf +fffae3fa T console_tx_byte +fffae429 T udelay +fffae44a T mdelay +fffae46d T delay +fffae490 T memcpy +fffae4b3 t setup_resource_map_offset +fffae52c t setup_resource_map_x_offset +fffae5e7 t soft_reset +fffae618 t spd_read_byte +fffae689 t get_nodes +fffae6a3 t ht_lookup_slave_capability +fffae78d t ht_read_freq_cap +fffae800 t ht_read_width_cap +fffae868 t pci_read_config32_index_wait +fffae8cc t pci_write_config32_index_wait +fffae93b T memory_end_k +fffae9b7 t convert_to_linear +fffae9da t update_dimm_TT_1_4 +fffaeaa7 t Get_MCTSysAddr +fffaeb02 t Get_RcvrSysAddr +fffaeb0d t set_wrap32dis +fffaeb20 t clear_wrap32dis +fffaeb33 t Write1LTestPattern +fffaeb76 t Read1LTestPattern +fffaeb9d t CompareTestPatternQW0 +fffaec0a t SetMaxAL_RcvrDly +fffaec63 t SetTargetWTIO +fffaec85 t proc_IOCLFLUSH +fffaecb5 t ResetDCTWrPtr +fffaed13 t SetDQSDelayCSR +fffaed87 t SetDQSDelayAllCSR +fffaedda t save_dqs_delay +fffaedf0 t FlushDQSTestPattern_L18 +fffaee88 t TrainDQSPos +fffaf380 t get_dqs_delay +fffaf394 T read_nb_cfg_54 +fffaf3a8 T get_node_core_id +fffaf3f2 t clear_init_ram +fffaf405 t set_init_ram_access +fffaf423 t for_each_ap +fffaf52c t lapic_remote_read +fffaf59e t wait_cpu_state +fffaf5ea t store_ap_apicid +fffaf5fe T do_printk +fffaf626 t set_fidvid +fffaf841 t print_initcpu8_nocr +fffaf85a t wait_ap_started +fffaf8ab t print_initcpu8 +fffaf8c4 t print_debug_pcar +fffaf8dd t print_debug_cp_run +fffaf8f6 t mcp55_early_setup_x +fffafbd2 T sdram_no_memory +fffafbef t print_debug_sdram_8 +fffafc31 t train_DqsRcvrEn +fffb04aa t disable_dimm +fffb05f9 t print_raminit +fffb0612 t print_linkn_in +fffb062e t ht_setup_chains_x +fffb0e69 t die +fffb0e82 t set_TT +fffb0f14 t set_top_mem +fffb0fe6 t sdram_set_spd_registers +fffb2b7e T sdram_initialize +fffb3efe T ram_check +fffb4033 T real_main +fffb5546 T cache_as_ram_main +fffb554f T init_timer +fffb5572 T uart8250_rx_byte +fffb55a0 t spd_addr.6923 +fffb55c0 t next_fid_a.6719 +fffb5660 t register_values.6108 +fffb5834 t divisor.1504 +fffb5840 t console_test.1909 +fffb588a t pow2_to_link_width.3156 +fffb5890 t link_width_to_pow2.3155 +fffb5898 t C.181.6395 +fffb58c0 t ctrl_devport_conf.6240 +fffb5900 t ctrl_conf_2.6341 +fffb5980 t ctrl_conf_master_only.6340 +fffb59a0 t ctrl_conf_mcp55_only.6339 +fffb5bc0 t ctrl_conf_1_1.6338 +fffb5c60 t ctrl_conf_1.6337 +fffb5ee0 t ctrl_devport_conf_clear.6265 +fffb5f20 t register_values.3743 +fffb60e8 t addresses.4206 +fffb6100 t cs_map_aaa.3888 +fffb6118 t min_cycle_times.4311 +fffb6120 t latency_indicies.4310 +fffb6124 t fraction.4292 +fffb6140 t speed +fffb61c0 t dv_a.4275 +fffb61f0 t fraction.4411 +fffb61f7 t faw_2k.4827 +fffb61fb t faw_1k.4826 +fffb61ff t csbase_low_f0_shift.3980 +fffb6220 t TestPatternJD1b.5567 +fffb66a0 t TestPatternJD1a.5566 +fffb68e0 t TestPattern2.5231 +fffb6920 t TestPattern1.5230 +fffb6960 t TestPattern0.5229 +fffb69a0 t TT_a.5195 +fffb6a00 t T1000_a.5194 +fffb72f0 A _elrom +fffb72f0 T _erom +fffbff6a R __id_start +fffbff6a r vendor +fffbff6e r part +fffbff80 R __id_end +fffbfff0 A _ROMTOP +fffbfff0 R reset_vector Index: targets/dfi/nf570/nf570/normal/secondary.s =================================================================== --- targets/dfi/nf570/nf570/normal/secondary.s (revision 0) +++ targets/dfi/nf570/nf570/normal/secondary.s (revision 0) @@ -0,0 +1,64 @@ +# 1 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/asm.h" 1 +# 2 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" 2 +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/intel.h" 1 +# 3 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" 2 +# 1 "/home/chris/coreboot-v2/src/include/cpu/x86/mtrr.h" 1 +# 4 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" 2 +# 1 "/home/chris/coreboot-v2/src/include/cpu/x86/lapic_def.h" 1 +# 5 "/home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S" 2 + .text + .globl _secondary_start, _secondary_start_end + .balign 4096 +_secondary_start: + .code16 + cli + xorl %eax, %eax + movl %eax, %cr3 + + + + + + + movw %cs, %ax + movw %ax, %ds + + data32 lgdt gdtaddr - _secondary_start + + movl %cr0, %eax + andl $0x7FFAFFD1, %eax + orl $0x60000001, %eax + movl %eax, %cr0 + + ljmpl $0x10, $1f +1: + .code32 + movw $0x18, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + + + lidt idtarg + + + xorl %eax, %eax + movl secondary_stack, %esp + movl %eax, secondary_stack + + call secondary_cpu_init +1: hlt + jmp 1b + + gdtaddr: + .word gdt_limit + .long gdt + +_secondary_start_end: +.code32 Index: targets/dfi/nf570/nf570/normal/payload =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/payload ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/nrv2b =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/nrv2b ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/option_table.c =================================================================== --- targets/dfi/nf570/nf570/normal/option_table.c (revision 0) +++ targets/dfi/nf570/nf570/normal/option_table.c (revision 0) @@ -0,0 +1,179 @@ +unsigned char option_table[] = { + 0xc8,0x00,0x00,0x00,0xf0,0x06,0x00,0x00,0x0c,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x28,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x80,0x01,0x00,0x00,0x72,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x72,0x65,0x73,0x65, + 0x72,0x76,0x65,0x64,0x5f,0x6d,0x65,0x6d,0x6f,0x72, + 0x79,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0x80,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x04,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74, + 0x5f,0x6f,0x70,0x74,0x69,0x6f,0x6e,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0x81,0x01,0x00,0x00, + 0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x6c,0x61,0x73,0x74,0x5f,0x62,0x6f,0x6f, + 0x74,0x00,0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00, + 0x00,0x00,0x82,0x01,0x00,0x00,0x01,0x00,0x00,0x00, + 0x65,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x45,0x43, + 0x43,0x5f,0x6d,0x65,0x6d,0x6f,0x72,0x79,0x00,0x00, + 0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0x84,0x01, + 0x00,0x00,0x04,0x00,0x00,0x00,0x72,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x72,0x65,0x62,0x6f,0x6f,0x74, + 0x5f,0x62,0x69,0x74,0x73,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x88,0x01,0x00,0x00,0x03,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x05,0x00,0x00,0x00, + 0x62,0x61,0x75,0x64,0x5f,0x72,0x61,0x74,0x65,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0x8b,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x68,0x77,0x5f,0x73, + 0x63,0x72,0x75,0x62,0x62,0x65,0x72,0x00,0xc9,0x00, + 0x00,0x00,0x30,0x00,0x00,0x00,0x8c,0x01,0x00,0x00, + 0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x69,0x6e,0x74,0x65,0x72,0x6c,0x65,0x61, + 0x76,0x65,0x5f,0x63,0x68,0x69,0x70,0x5f,0x73,0x65, + 0x6c,0x65,0x63,0x74,0x73,0x00,0xc9,0x00,0x00,0x00, + 0x28,0x00,0x00,0x00,0x8d,0x01,0x00,0x00,0x02,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x08,0x00,0x00,0x00, + 0x6d,0x61,0x78,0x5f,0x6d,0x65,0x6d,0x5f,0x63,0x6c, + 0x6f,0x63,0x6b,0x00,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x8f,0x01,0x00,0x00,0x01,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x02,0x00,0x00,0x00, + 0x64,0x75,0x61,0x6c,0x5f,0x63,0x6f,0x72,0x65,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x2c,0x00,0x00,0x00, + 0x90,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x70,0x6f,0x77,0x65, + 0x72,0x5f,0x6f,0x6e,0x5f,0x61,0x66,0x74,0x65,0x72, + 0x5f,0x66,0x61,0x69,0x6c,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0x9c,0x01,0x00,0x00,0x04,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x64,0x65,0x62,0x75,0x67,0x5f,0x6c,0x65,0x76,0x65, + 0x6c,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0xa0,0x01,0x00,0x00,0x04,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74, + 0x5f,0x66,0x69,0x72,0x73,0x74,0x00,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0xa4,0x01,0x00,0x00, + 0x04,0x00,0x00,0x00,0x65,0x00,0x00,0x00,0x07,0x00, + 0x00,0x00,0x62,0x6f,0x6f,0x74,0x5f,0x73,0x65,0x63, + 0x6f,0x6e,0x64,0x00,0xc9,0x00,0x00,0x00,0x24,0x00, + 0x00,0x00,0xa8,0x01,0x00,0x00,0x04,0x00,0x00,0x00, + 0x65,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x62,0x6f, + 0x6f,0x74,0x5f,0x74,0x68,0x69,0x72,0x64,0x00,0x00, + 0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0xac,0x01, + 0x00,0x00,0x04,0x00,0x00,0x00,0x68,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x62,0x6f,0x6f,0x74,0x5f,0x69, + 0x6e,0x64,0x65,0x78,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x28,0x00,0x00,0x00,0xb0,0x01,0x00,0x00,0x08,0x00, + 0x00,0x00,0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x62,0x6f,0x6f,0x74,0x5f,0x63,0x6f,0x75,0x6e,0x74, + 0x64,0x6f,0x77,0x6e,0x00,0x00,0xc9,0x00,0x00,0x00, + 0x24,0x00,0x00,0x00,0xb8,0x01,0x00,0x00,0x04,0x00, + 0x00,0x00,0x65,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x73,0x6c,0x6f,0x77,0x5f,0x63,0x70,0x75,0x00,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x1c,0x00,0x00,0x00, + 0xbc,0x01,0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x6e,0x6d,0x69,0x00, + 0xc9,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0xbd,0x01, + 0x00,0x00,0x01,0x00,0x00,0x00,0x65,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x69,0x6f,0x6d,0x6d,0x75,0x00, + 0x00,0x00,0xc9,0x00,0x00,0x00,0x24,0x00,0x00,0x00, + 0xd8,0x02,0x00,0x00,0x00,0x01,0x00,0x00,0x68,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x75,0x73,0x65,0x72, + 0x5f,0x64,0x61,0x74,0x61,0x00,0x00,0x00,0xc9,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0xd8,0x03,0x00,0x00, + 0x10,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x63,0x68,0x65,0x63,0x6b,0x5f,0x73,0x75, + 0x6d,0x00,0x00,0x00,0xc9,0x00,0x00,0x00,0x28,0x00, + 0x00,0x00,0xe8,0x03,0x00,0x00,0x18,0x00,0x00,0x00, + 0x72,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x72,0x65, + 0x73,0x65,0x72,0x76,0x65,0x64,0x5f,0x6d,0x65,0x6d, + 0x6f,0x72,0x79,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x44,0x69,0x73,0x61,0x62,0x6c,0x65,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x45,0x6e,0x61,0x62,0x6c,0x65, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x45,0x6e, + 0x61,0x62,0x6c,0x65,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x44,0x69,0x73,0x61,0x62,0x6c,0x65,0x00, + 0xca,0x00,0x00,0x00,0x1c,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x46,0x61,0x6c,0x6c, + 0x62,0x61,0x63,0x6b,0x00,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x04,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x4e,0x6f,0x72,0x6d,0x61,0x6c, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x31,0x31, + 0x35,0x32,0x30,0x30,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x01,0x00, + 0x00,0x00,0x35,0x37,0x36,0x30,0x30,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00, + 0x00,0x00,0x02,0x00,0x00,0x00,0x33,0x38,0x34,0x30, + 0x30,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x05,0x00,0x00,0x00,0x03,0x00,0x00,0x00, + 0x31,0x39,0x32,0x30,0x30,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00, + 0x04,0x00,0x00,0x00,0x39,0x36,0x30,0x30,0x00,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x05,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x34,0x38, + 0x30,0x30,0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x06,0x00, + 0x00,0x00,0x32,0x34,0x30,0x30,0x00,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x05,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x31,0x32,0x30,0x30, + 0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x06,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x4e,0x6f,0x74,0x69,0x63,0x65,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x07,0x00,0x00,0x00,0x49,0x6e,0x66,0x6f,0x00,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x06,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x44,0x65, + 0x62,0x75,0x67,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x06,0x00,0x00,0x00,0x09,0x00, + 0x00,0x00,0x53,0x70,0x65,0x77,0x00,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x07,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x4e,0x65,0x74,0x77, + 0x6f,0x72,0x6b,0x00,0xca,0x00,0x00,0x00,0x14,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x48,0x44,0x44,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x02,0x00,0x00,0x00, + 0x46,0x6c,0x6f,0x70,0x70,0x79,0x00,0x00,0xca,0x00, + 0x00,0x00,0x24,0x00,0x00,0x00,0x07,0x00,0x00,0x00, + 0x08,0x00,0x00,0x00,0x46,0x61,0x6c,0x6c,0x62,0x61, + 0x63,0x6b,0x5f,0x4e,0x65,0x74,0x77,0x6f,0x72,0x6b, + 0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x20,0x00, + 0x00,0x00,0x07,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x46,0x61,0x6c,0x6c,0x62,0x61,0x63,0x6b,0x5f,0x48, + 0x44,0x44,0x00,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x20,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x0a,0x00, + 0x00,0x00,0x46,0x61,0x6c,0x6c,0x62,0x61,0x63,0x6b, + 0x5f,0x46,0x6c,0x6f,0x70,0x70,0x79,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x32,0x30,0x30,0x4d,0x68,0x7a, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x31,0x36, + 0x36,0x4d,0x68,0x7a,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x02,0x00, + 0x00,0x00,0x31,0x33,0x33,0x4d,0x68,0x7a,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x08,0x00, + 0x00,0x00,0x03,0x00,0x00,0x00,0x31,0x30,0x30,0x4d, + 0x68,0x7a,0x00,0x00,0xca,0x00,0x00,0x00,0x14,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x6f,0x66,0x66,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x38,0x37,0x2e,0x35,0x25,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x02,0x00,0x00,0x00,0x37,0x35,0x2e,0x30,0x25,0x00, + 0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x09,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x36,0x32, + 0x2e,0x35,0x25,0x00,0x00,0x00,0xca,0x00,0x00,0x00, + 0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00,0x04,0x00, + 0x00,0x00,0x35,0x30,0x2e,0x30,0x25,0x00,0x00,0x00, + 0xca,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00, + 0x00,0x00,0x05,0x00,0x00,0x00,0x33,0x37,0x2e,0x35, + 0x25,0x00,0x00,0x00,0xca,0x00,0x00,0x00,0x18,0x00, + 0x00,0x00,0x09,0x00,0x00,0x00,0x06,0x00,0x00,0x00, + 0x32,0x35,0x2e,0x30,0x25,0x00,0x00,0x00,0xca,0x00, + 0x00,0x00,0x18,0x00,0x00,0x00,0x09,0x00,0x00,0x00, + 0x07,0x00,0x00,0x00,0x31,0x32,0x2e,0x35,0x25,0x00, + 0x00,0x00,0xcc,0x00,0x00,0x00,0x18,0x00,0x00,0x00, + 0x88,0x01,0x00,0x00,0xd7,0x03,0x00,0x00,0xd8,0x03, + 0x00,0x00,0x01,0x00,0x00,0x00}; Index: targets/dfi/nf570/nf570/normal/c_start.s =================================================================== --- targets/dfi/nf570/nf570/normal/c_start.s (revision 0) +++ targets/dfi/nf570/nf570/normal/c_start.s (revision 0) @@ -0,0 +1,281 @@ +# 1 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/asm.h" 1 +# 2 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" 2 +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/intel.h" 1 +# 3 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" 2 + + .section ".text" + .code32 + .globl _start +_start: + cli + lgdt %cs:gdtaddr + ljmp $0x10, $1f +1: movl $0x18, %eax + movl %eax, %ds + movl %eax, %es + movl %eax, %ss + movl %eax, %fs + movl %eax, %gs + + movb $0x13, %al ; outb %al, $0x80 + + + cld + leal _stack, %edi + movl $_estack, %ecx + subl %edi, %ecx + shrl $2, %ecx + xorl %eax, %eax + rep + stosl + + + leal _bss, %edi + movl $_ebss, %ecx + subl %edi, %ecx + jz .Lnobss + shrl $2, %ecx + xorl %eax, %eax + rep + stosl +.Lnobss: + + + movl $_estack, %esp + + + pushl $0 + pushl $0 + + + pushl %ebp + + + movl %esp, %ebp + + + leal _idt, %edi + leal vec0, %ebx + movl $(0x10 << 16), %eax + +1: movw %bx, %ax + movl %ebx, %edx + movw $0x8E00, %dx + movl %eax, 0(%edi) + movl %edx, 4(%edi) + addl $6, %ebx + addl $8, %edi + cmpl $_idt_end, %edi + jne 1b + + + lidt idtarg + + + + + + + movb $0xfe, %al ; outb %al, $0x80 + + + movl %ebp, %esp + + + call hardwaremain + +.Lhlt: + movb $0xee, %al ; outb %al, $0x80 + hlt + jmp .Lhlt + +vec0: + pushl $0 + pushl $0 + jmp int_hand +vec1: + pushl $0 + pushl $1 + jmp int_hand + +vec2: + pushl $0 + pushl $2 + jmp int_hand + +vec3: + pushl $0 + pushl $3 + jmp int_hand + +vec4: + pushl $0 + pushl $4 + jmp int_hand + +vec5: + pushl $0 + pushl $5 + jmp int_hand + +vec6: + pushl $0 + pushl $6 + jmp int_hand + +vec7: + pushl $0 + pushl $7 + jmp int_hand + +vec8: + + pushl $8 + jmp int_hand + .word 0x9090 + +vec9: + pushl $0 + pushl $9 + jmp int_hand + +vec10: + + pushl $10 + jmp int_hand + .word 0x9090 + +vec11: + + pushl $11 + jmp int_hand + .word 0x9090 + +vec12: + + pushl $12 + jmp int_hand + .word 0x9090 + +vec13: + + pushl $13 + jmp int_hand + .word 0x9090 + +vec14: + + pushl $14 + jmp int_hand + .word 0x9090 + +vec15: + pushl $0 + pushl $15 + jmp int_hand + +vec16: + pushl $0 + pushl $16 + jmp int_hand + +vec17: + + pushl $17 + jmp int_hand + .word 0x9090 + +vec18: + pushl $0 + pushl $18 + jmp int_hand + +vec19: + pushl $0 + pushl $19 + jmp int_hand +int_hand: + + + + + + + + pushl %edi + pushl %esi + pushl %ebp + + leal 32(%esp), %ebp + pushl %ebp + pushl %ebx + pushl %edx + pushl %ecx + pushl %eax + + pushl %esp + call x86_exception + pop %eax + + popl %eax + popl %ecx + popl %edx + popl %ebx + popl %ebp + popl %ebp + popl %esi + popl %edi + + addl $8, %esp + + iret +# 245 "/home/chris/coreboot-v2/src/arch/i386/lib/c_start.S" + .globl gdt, gdt_end, gdt_limit, idtarg + +gdt_limit = gdt_end - gdt - 1 +gdtaddr: + .word gdt_limit + .long gdt + + .data + + + + +gdt: + + .word 0x0000, 0x0000 + .byte 0x00, 0x00, 0x00, 0x00 + + + .word 0x0000, 0x0000 + .byte 0x00, 0x00, 0x00, 0x00 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0xcf, 0x00 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x93, 0xcf, 0x00 + + + .word 0x0000, 0x0000 + .byte 0x00, 0x00, 0x00, 0x00 + +gdt_end: + +idtarg: + .word _idt_end - _idt - 1 + .long _idt + .word 0 +_idt: + .fill 20, 8, 0 # idt is unitiailzed +_idt_end: + + .previous +.code32 Index: targets/dfi/nf570/nf570/normal/coreboot_ram.nrv2b =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/coreboot_ram.nrv2b ___________________________________________________________________ Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/option_table.h =================================================================== --- targets/dfi/nf570/nf570/normal/option_table.h (revision 0) +++ targets/dfi/nf570/nf570/normal/option_table.h (revision 0) @@ -0,0 +1,40 @@ +#define CMOS_VSTART_boot_option 384 +#define CMOS_VLEN_boot_option 1 +#define CMOS_VSTART_last_boot 385 +#define CMOS_VLEN_last_boot 1 +#define CMOS_VSTART_ECC_memory 386 +#define CMOS_VLEN_ECC_memory 1 +#define CMOS_VSTART_baud_rate 392 +#define CMOS_VLEN_baud_rate 3 +#define CMOS_VSTART_hw_scrubber 395 +#define CMOS_VLEN_hw_scrubber 1 +#define CMOS_VSTART_interleave_chip_selects 396 +#define CMOS_VLEN_interleave_chip_selects 1 +#define CMOS_VSTART_max_mem_clock 397 +#define CMOS_VLEN_max_mem_clock 2 +#define CMOS_VSTART_dual_core 399 +#define CMOS_VLEN_dual_core 1 +#define CMOS_VSTART_power_on_after_fail 400 +#define CMOS_VLEN_power_on_after_fail 1 +#define CMOS_VSTART_debug_level 412 +#define CMOS_VLEN_debug_level 4 +#define CMOS_VSTART_boot_first 416 +#define CMOS_VLEN_boot_first 4 +#define CMOS_VSTART_boot_second 420 +#define CMOS_VLEN_boot_second 4 +#define CMOS_VSTART_boot_third 424 +#define CMOS_VLEN_boot_third 4 +#define CMOS_VSTART_boot_index 428 +#define CMOS_VLEN_boot_index 4 +#define CMOS_VSTART_boot_countdown 432 +#define CMOS_VLEN_boot_countdown 8 +#define CMOS_VSTART_slow_cpu 440 +#define CMOS_VLEN_slow_cpu 4 +#define CMOS_VSTART_nmi 444 +#define CMOS_VLEN_nmi 1 +#define CMOS_VSTART_iommu 445 +#define CMOS_VLEN_iommu 1 +#define CMOS_VSTART_user_data 728 +#define CMOS_VLEN_user_data 256 +#define CMOS_VSTART_check_sum 984 +#define CMOS_VLEN_check_sum 16 Index: targets/dfi/nf570/nf570/normal/coreboot_ram.rom =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/coreboot_ram.rom ___________________________________________________________________ Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/static.c =================================================================== --- targets/dfi/nf570/nf570/normal/static.c (revision 0) +++ targets/dfi/nf570/nf570/normal/static.c (revision 0) @@ -0,0 +1,808 @@ +#include <device/device.h> +#include <device/pci.h> +#include "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/chip.h" +#include "/home/chris/coreboot-v2/src/cpu/amd/socket_AM2/chip.h" +#include "/home/chris/coreboot-v2/src/mainboard/dfi/nf570/chip.h" +#include "/home/chris/coreboot-v2/src/superio/ite/it8716f/chip.h" +#include "/home/chris/coreboot-v2/src/northbridge/amd/amdk8/chip.h" +#include "/home/chris/coreboot-v2/src/northbridge/amd/amdk8/root_complex/chip.h" +struct device _dev3; +struct device _dev6; +struct device _dev5; +struct device _dev8; +struct device _dev60; +struct device _dev61; +struct device _dev62; +struct device _dev63; +struct device _dev64; +struct device _dev10; +struct device _dev11; +struct device _dev24; +struct device _dev41; +struct device _dev44; +struct device _dev45; +struct device _dev46; +struct device _dev47; +struct device _dev48; +struct device _dev49; +struct device _dev50; +struct device _dev51; +struct device _dev52; +struct device _dev53; +struct device _dev54; +struct device _dev55; +struct device _dev56; +struct device _dev57; +struct device _dev58; +struct device _dev59; +struct device _dev13; +struct device _dev14; +struct device _dev15; +struct device _dev16; +struct device _dev17; +struct device _dev18; +struct device _dev19; +struct device _dev20; +struct device _dev21; +struct device _dev22; +struct device _dev23; +struct device _dev26; +struct device _dev28; +struct device _dev30; +struct device _dev32; +struct device _dev34; +struct device _dev36; +struct device _dev38; +struct device _dev40; +struct device _dev43; +struct mainboard_dfi_nf570_config mainboard_dfi_nf570_info_0; +struct device **last_dev_p = &_dev64.next; +struct device dev_root = { + .ops = &default_dev_ops_root, + .bus = &dev_root.link[0], + .path = { .type = DEVICE_PATH_ROOT }, + .enabled = 1, + .links = 1, + .on_mainboard = 1, + .link = { + [0] = { + .dev=&dev_root, + .link = 0, + .children = &_dev3, + }, + }, + .chip_ops = &mainboard_dfi_nf570_ops, + .chip_info = &mainboard_dfi_nf570_info_0, + .next = &_dev3, +}; +struct northbridge_amd_amdk8_root_complex_config northbridge_amd_amdk8_root_complex_info_2; +struct device _dev3 = { + .ops = 0, + .bus = &dev_root.link[0], + .path = {.type=DEVICE_PATH_APIC_CLUSTER,.u={.apic_cluster={ .cluster = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev3, + .children = &_dev5, + }, + }, + .links = 1, + .sibling = &_dev6, + .chip_ops = &northbridge_amd_amdk8_root_complex_ops, + .chip_info = &northbridge_amd_amdk8_root_complex_info_2, + .next=&_dev5 +}; +struct device _dev6 = { + .ops = 0, + .bus = &dev_root.link[0], + .path = {.type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev6, + .children = &_dev8, + }, + }, + .links = 1, + .chip_ops = &northbridge_amd_amdk8_root_complex_ops, + .chip_info = &northbridge_amd_amdk8_root_complex_info_2, + .next=&_dev8 +}; +struct cpu_amd_socket_AM2_config cpu_amd_socket_AM2_info_4; +struct device _dev5 = { + .ops = 0, + .bus = &_dev3.link[0], + .path = {.type=DEVICE_PATH_APIC,.u={.apic={ .apic_id = 0x0 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &cpu_amd_socket_AM2_ops, + .chip_info = &cpu_amd_socket_AM2_info_4, + .next=&_dev6 +}; +struct northbridge_amd_amdk8_config northbridge_amd_amdk8_info_7; +struct device _dev8 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev8, + .children = &_dev10, + }, + [1] = { + .link = 1, + .dev = &_dev8, + }, + [2] = { + .link = 2, + .dev = &_dev8, + }, + }, + .links = 3, + .sibling = &_dev62, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev10 +}; +struct device _dev62 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev63, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev63 +}; +struct device _dev63 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,2)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev64, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, + .next=&_dev64 +}; +struct device _dev64 = { + .ops = 0, + .bus = &_dev6.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x18,3)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &northbridge_amd_amdk8_ops, + .chip_info = &northbridge_amd_amdk8_info_7, +}; +struct southbridge_nvidia_mcp55_config southbridge_nvidia_mcp55_info_9 = { + .ide0_enable = 1, + .sata0_enable = 1, + .sata1_enable = 1, + .mac_eeprom_addr = 0x51, + .mac_eeprom_smbus = 3, +}; + +struct device _dev10 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x0,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev11, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev11 +}; +struct device _dev11 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x1,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev11, + .children = &_dev13, + }, + }, + .links = 1, + .sibling = &_dev24, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev13 +}; +struct device _dev24 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x1,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + [0] = { + .link = 0, + .dev = &_dev24, + .children = &_dev26, + }, + [1] = { + .link = 1, + .dev = &_dev24, + .children = &_dev43, + }, + }, + .links = 2, + .sibling = &_dev44, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev26 +}; +struct device _dev44 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x2,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev45, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev45 +}; +struct device _dev45 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x2,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev46, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev46 +}; +struct device _dev46 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x4,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev47, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev47 +}; +struct device _dev47 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev48, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev48 +}; +struct device _dev48 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev49, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev49 +}; +struct device _dev49 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x5,2)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev50, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev50 +}; +struct device _dev50 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x6,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev51, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev51 +}; +struct device _dev51 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x6,1)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev52, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev52 +}; +struct device _dev52 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x8,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev53, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev53 +}; +struct device _dev53 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x9,0)}}}, + .enabled = 0, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev54, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev54 +}; +struct device _dev54 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xa,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev55, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev55 +}; +struct device _dev55 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xb,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev56, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev56 +}; +struct device _dev56 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xc,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev57, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev57 +}; +struct device _dev57 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xd,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev58, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev58 +}; +struct device _dev58 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xe,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev59, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev59 +}; +struct device _dev59 = { + .ops = 0, + .bus = &_dev8.link[0], + .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0xf,0)}}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &southbridge_nvidia_mcp55_ops, + .chip_info = &southbridge_nvidia_mcp55_info_9, + .next=&_dev62 +}; +struct superio_ite_it8716f_config superio_ite_it8716f_info_12; +struct device _dev13 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x0 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 4, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x23, .base=0x11}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x3f0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x6}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_DRQ, .index=0x74, .base=0x2}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev14, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev14 +}; +struct device _dev14 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x1 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x3f8}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x4}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev15, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev15 +}; +struct device _dev15 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x2 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x2f8}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x3}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev16, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev16 +}; +struct device _dev16 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x3 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x378}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x7}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev17, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev17 +}; +struct device _dev17 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x4 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 3, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x290}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x230}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x9}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev18, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev18 +}; +struct device _dev18 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x5 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 3, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x60}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x64}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x1}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev19, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev19 +}; +struct device _dev19 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x6 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 1, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0xc}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev20, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev20 +}; +struct device _dev20 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x7 }}}, + .enabled = 1, + .on_mainboard = 1, + .resources = 13, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x25, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x26, .base=0x43}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x27, .base=0x20}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x29, .base=0x81}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x800}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x64, .base=0x820}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x72, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xb8, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xbc, .base=0x1}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc1, .base=0x43}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc2, .base=0x20}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xc9, .base=0x0}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0xf6, .base=0x28}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev21, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev21 +}; +struct device _dev21 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x8 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 2, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x300}, + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0xa}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev22, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev22 +}; +struct device _dev22 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x9 }}}, + .enabled = 0, + .on_mainboard = 1, + .resources = 1, + .resource = { + { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x220}, + }, + .link = { + }, + .links = 0, + .sibling = &_dev23, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev23 +}; +struct device _dev23 = { + .ops = 0, + .bus = &_dev11.link[0], + .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0xa }}}, + .enabled = 0, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .chip_ops = &superio_ite_it8716f_ops, + .chip_info = &superio_ite_it8716f_info_12, + .next=&_dev24 +}; +struct device _dev26 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x50 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev28, + .next=&_dev28 +}; +struct device _dev28 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x51 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev30, + .next=&_dev30 +}; +struct device _dev30 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x52 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev32, + .next=&_dev32 +}; +struct device _dev32 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x53 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev34, + .next=&_dev34 +}; +struct device _dev34 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x54 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev36, + .next=&_dev36 +}; +struct device _dev36 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x55 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev38, + .next=&_dev38 +}; +struct device _dev38 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x56 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .sibling = &_dev40, + .next=&_dev40 +}; +struct device _dev40 = { + .ops = 0, + .bus = &_dev24.link[0], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x57 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .next=&_dev43 +}; +struct device _dev43 = { + .ops = 0, + .bus = &_dev24.link[1], + .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x51 }}}, + .enabled = 1, + .on_mainboard = 1, + .link = { + }, + .links = 0, + .next=&_dev44 +}; Index: targets/dfi/nf570/nf570/normal/coreboot.rom =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/coreboot.rom ___________________________________________________________________ Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/crt0.s =================================================================== --- targets/dfi/nf570/nf570/normal/crt0.s (revision 0) +++ targets/dfi/nf570/nf570/normal/crt0.s (revision 0) @@ -0,0 +1,13508 @@ +# 1 "crt0.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "crt0.S" +# 24 "crt0.S" +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/asm.h" 1 +# 25 "crt0.S" 2 +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/intel.h" 1 +# 26 "crt0.S" 2 +# 1 "/home/chris/coreboot-v2/src/include/console/loglevel.h" 1 +# 27 "crt0.S" 2 + + + + + + +.section ".rom.data", "a", @progbits +.section ".rom.text", "ax", @progbits + + movb $0x01, %al ; outb %al, $0x80 + +# 1 "crt0_includes.h" 1 +# 1 "/home/chris/coreboot-v2/src/cpu/x86/32bit/entry32.inc" 1 + + +# 1 "/home/chris/coreboot-v2/src/arch/i386/include/arch/rom_segs.h" 1 +# 4 "/home/chris/coreboot-v2/src/cpu/x86/32bit/entry32.inc" 2 + + + .code32 + + .align 4 +.globl gdtptr + + + + +gdt: +gdtptr: + .word gdt_end - gdt -1 + .long gdt + .word 0 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0xcf, 0x00 + + + .word 0xffff, 0x0000 + .byte 0x00, 0x93, 0xcf, 0x00 + +gdt_end: +# 42 "/home/chris/coreboot-v2/src/cpu/x86/32bit/entry32.inc" + .align 4 +.globl protected_start +protected_start: + + lgdt %cs:gdtptr + ljmp $0x08, $__protected_start + +__protected_start: + + movl %eax, %ebp + + movb $0x10, %al ; outb %al, $0x80 + + movw $0x10, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + + + movl %ebp, %eax +# 2 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/cpu/x86/32bit/reset32.inc" 1 + .section ".reset" + .code16 +.globl reset_vector +reset_vector: + + . = 0x8; + .code32 + jmp protected_start + + .previous +# 3 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/id.inc" 1 +# 22 "/home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/id.inc" + .section ".id", "a", @progbits + + .globl __id_start +__id_start: +vendor: + .asciz "DFI" +part: + .asciz "nf570" +.long __id_end + 0x80 - vendor +.long __id_end + 0x80 - part +.long 0x20000 + 0x20000 + .globl __id_end + +__id_end: +.previous +# 4 "crt0_includes.h" 2 +# 1 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 1 +# 31 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" +# 1 "/home/chris/coreboot-v2/src/include/cpu/x86/mtrr.h" 1 +# 32 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 2 +# 1 "/home/chris/coreboot-v2/src/include/cpu/amd/mtrr.h" 1 +# 33 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" 2 + + + movl %eax, %ebp + + + +cache_as_ram_setup: + + movb $0xA0, %al + outb %al, $0x80 +# 206 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movl %cr0, %eax + orl $(1 << 30),%eax + movl %eax, %cr0 + + + + + + + + movl $0x202, %ecx + xorl %edx, %edx + movl $(0xfff80000 | 6), %eax + wrmsr + + movl $0x203, %ecx + movl $((1 << (40 - 32)) - 1), %edx + movl $(~(0x40000 - 1) | 0x800), %eax + wrmsr +# 242 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movb $0xA1, %al + outb %al, $0x80 + + + movl %cr0, %eax + andl $0x9fffffff, %eax + movl %eax, %cr0 +# 259 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movb $0xA2, %al + outb %al, $0x80 +# 277 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movl $((0xd0000 - 0x8000) + 0x8000 - 0x1000), %eax + movl %eax, %esp + + movb $0xA3, %al + outb %al, $0x80 +# 331 "/home/chris/coreboot-v2/src/cpu/amd/car/cache_as_ram.inc" + movb $0xA5, %al + outb %al, $0x80 + + + movl %ebp, %eax + + + movl %esp, %ebp + pushl %ebx + pushl %eax + call cache_as_ram_main + + + movb $0xAF, %al + outb %al, $0x80 + +fixed_mtrr_msr: + .long 0x250, 0x258, 0x259 + .long 0x268, 0x269, 0x26A + .long 0x26B, 0x26C, 0x26D + .long 0x26E, 0x26F +var_mtrr_msr: + .long 0x200, 0x201, 0x202, 0x203 + .long 0x204, 0x205, 0x206, 0x207 + .long 0x208, 0x209, 0x20A, 0x20B + .long 0x20C, 0x20D, 0x20E, 0x20F +var_iorr_msr: + .long 0xC0010016, 0xC0010017, 0xC0010018, 0xC0010019 +mem_top: + .long 0xC001001A, 0xC001001D + .long 0x000 + +cache_as_ram_setup_out: +# 5 "crt0_includes.h" 2 +# 1 "././cache_as_ram_auto.inc" 1 + .file "cache_as_ram_auto.c" + .section .rom.text + .type read_option, @function +read_option: + pushl %ebp + movl %eax, %ecx + shrl $3, %eax + movl %esp, %ebp + movzbl %al, %eax + pushl %ebx + movl %edx, %ebx +#APP + outb %al, $112 + inb $113, %al +#NO_APP + andl $7, %ecx + movzbl %al, %eax + shrl %cl, %eax + movl $1, %edx + movb %bl, %cl + sall %cl, %edx + popl %ebx + decl %edx + popl %ebp + andl %edx, %eax + ret + .size read_option, .-read_option +.globl uart8250_tx_byte + .type uart8250_tx_byte, @function +uart8250_tx_byte: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + movb 12(%ebp), %bl +.L4: + movl %esi, %edi + leal 5(%edi), %ecx + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + testb $32, %al + je .L4 + movzbl %bl, %eax + movzwl %si, %edx +#APP + outb %al, %dx +#NO_APP +.L6: + movl %ecx, %edx +#APP + inb %dx, %al +#NO_APP + testb $64, %al + je .L6 + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size uart8250_tx_byte, .-uart8250_tx_byte +.globl uart8250_can_rx_byte + .type uart8250_can_rx_byte, @function +uart8250_can_rx_byte: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + addl $5, %edx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + popl %ebp + andl $1, %eax + ret + .size uart8250_can_rx_byte, .-uart8250_can_rx_byte +.globl uart8250_init + .type uart8250_init, @function +uart8250_init: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + movzwl 8(%ebp), %ecx + pushl %edi + pushl %esi + pushl %ebx + leal 1(%ecx), %ebx + movl %ebx, %edx +#APP + outb %al, %dx +#NO_APP + leal 2(%ecx), %edx + movb $1, %al + movzwl %dx, %edx +#APP + outb %al, %dx +#NO_APP + leal 4(%ecx), %edx + movb $3, %al + movzwl %dx, %edx +#APP + outb %al, %dx +#NO_APP + movb 16(%ebp), %al + leal 3(%ecx), %edi + movl %edi, %edx + andl $127, %eax + movl %eax, %esi + orl $-128, %eax + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + movzbl 12(%ebp), %eax + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl 12(%ebp), %edx + movzbl %dh, %eax + movl %ebx, %edx +#APP + outb %al, %dx +#NO_APP + movl %esi, %edx + movzbl %dl, %eax + movl %edi, %edx +#APP + outb %al, %dx +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size uart8250_init, .-uart8250_init +.globl init_uart8250 + .type init_uart8250, @function +init_uart8250: + pushl %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + pushl %ebx + movl 8(%ebp), %ecx + movl (%eax), %edx + movl $115200, %eax + testl %edx, %edx + je .L20 + movl %edx, %ebx + xorl %edx, %edx + divl %ebx +.L20: + cmpl $1016, %ecx + je .L23 + pushl $3 + pushl %eax + pushl %ecx + call uart8250_init + addl $12, %esp +.L23: + movl -4(%ebp), %ebx + leave + ret + .size init_uart8250, .-init_uart8250 + .type skip_atoi, @function +skip_atoi: + pushl %ebp + xorl %ecx, %ecx + movl %esp, %ebp + pushl %esi + movl %eax, %esi + pushl %ebx + jmp .L25 +.L26: + imull $10, %ecx, %eax + movsbl %dl,%edx + leal -48(%eax,%edx), %ecx + leal 1(%ebx), %eax + movl %eax, (%esi) +.L25: + movl (%esi), %ebx + movb (%ebx), %dl + leal -48(%edx), %eax + cmpb $9, %al + jbe .L26 + popl %ebx + movl %ecx, %eax + popl %esi + popl %ebp + ret + .size skip_atoi, .-skip_atoi + .section .rom.data.str1.1,"aMS",@progbits,1 +.LC0: + .string "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ" +.LC1: + .string "0123456789abcdefghijklmnopqrstuvwxyz" + .section .rom.text + .type number, @function +number: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $188, %esp + movl 20(%ebp), %edi + movl %edx, %ecx + movl %eax, -160(%ebp) + movl 12(%ebp), %esi + movl $.LC0, -120(%ebp) + testl $64, %edi + jne .L32 + movl $.LC1, -120(%ebp) +.L32: + testl $16, %edi + je .L33 + andl $-2, %edi +.L33: + movl 8(%ebp), %eax + movl $0, -112(%ebp) + subl $2, %eax + cmpl $34, %eax + ja .L37 + movl %edi, %eax + andl $1, %eax + cmpl $1, %eax + sbbl %eax, %eax + andl $-16, %eax + addl $48, %eax + testl $2, %edi + movb %al, -152(%ebp) + je .L41 + testl %ebx, %ebx + jns .L43 + negl %ecx + adcl $0, %ebx + decl %esi + negl %ebx + movb $45, -121(%ebp) + jmp .L45 +.L43: + testl $4, %edi + je .L46 + decl %esi + movb $43, -121(%ebp) + jmp .L45 +.L46: + testl $8, %edi + je .L41 + decl %esi + movb $32, -121(%ebp) + jmp .L45 +.L41: + movb $0, -121(%ebp) +.L45: + movl %edi, %edx + andl $32, %edx + movl %edx, -156(%ebp) + je .L49 + cmpl $16, 8(%ebp) + jne .L51 + subl $2, %esi + jmp .L49 +.L51: + xorl %eax, %eax + cmpl $8, 8(%ebp) + sete %al + subl %eax, %esi +.L49: + movl %ebx, %eax + orl %ecx, %eax + movl $0, -116(%ebp) + jne .L57 + movb $48, -90(%ebp) + movl $1, -116(%ebp) + jmp .L56 +.L57: + movl %ecx, %eax + movl %ebx, %edx + movl %edx, %ecx + xorl %edx, %edx + testl %ecx, %ecx + movl %eax, -176(%ebp) + je .L60 + movl %ecx, %eax + xorl %edx, %edx + divl 8(%ebp) + movl %eax, %ecx +.L60: + movl -176(%ebp), %eax +#APP + divl 8(%ebp) +#NO_APP + movl %edx, -172(%ebp) + movl %ecx, %edx + movl %eax, %ecx + movl %edx, %ebx + movl -172(%ebp), %eax + movl -120(%ebp), %edx + movb (%edx,%eax), %dl + movl -116(%ebp), %eax + movb %dl, -90(%ebp,%eax) + movl %ebx, %edx + incl %eax + orl %ecx, %edx + movl %eax, -116(%ebp) + jne .L57 +.L56: + movl -116(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -108(%ebp) + cmpl %edx, %eax + jge .L61 + movl %edx, -108(%ebp) +.L61: + subl -108(%ebp), %esi + testl $17, %edi + movl $0, -112(%ebp) + movl %esi, %eax + je .L65 + jmp .L64 +.L66: + subl $12, %esp + pushl $32 + call *-160(%ebp) + movl %ebx, %eax + addl $16, %esp +.L65: + testl %eax, %eax + leal -1(%eax), %ebx + jg .L66 + subl %eax, %esi + movl %esi, -112(%ebp) + movl %ebx, %esi +.L64: + cmpb $0, -121(%ebp) + je .L68 + movzbl -121(%ebp), %eax + subl $12, %esp + pushl %eax + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L68: + cmpl $0, -156(%ebp) + je .L70 + cmpl $8, 8(%ebp) + jne .L72 + subl $12, %esp + pushl $48 + call *-160(%ebp) + incl -112(%ebp) + jmp .L90 +.L72: + cmpl $16, 8(%ebp) + jne .L70 + subl $12, %esp + pushl $48 + call *-160(%ebp) + movl -120(%ebp), %edx + movzbl 33(%edx), %eax + movl %eax, (%esp) + call *-160(%ebp) + addl $2, -112(%ebp) +.L90: + addl $16, %esp +.L70: + andl $16, %edi + movl %esi, %eax + je .L77 + jmp .L75 +.L78: + movzbl -152(%ebp), %eax + subl $12, %esp + pushl %eax + call *-160(%ebp) + movl %ebx, %eax + addl $16, %esp + incl -112(%ebp) +.L77: + testl %eax, %eax + leal -1(%eax), %ebx + jg .L78 + movl %ebx, %esi +.L75: + movl -108(%ebp), %ebx + jmp .L80 +.L81: + subl $12, %esp + decl %ebx + pushl $48 + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L80: + cmpl %ebx, -116(%ebp) + jl .L81 + jmp .L89 +.L83: + decl -116(%ebp) + subl $12, %esp + movl -116(%ebp), %edx + movzbl -90(%ebp,%edx), %eax + pushl %eax + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L89: + cmpl $0, -116(%ebp) + jg .L83 + movl %esi, %ebx + jmp .L85 +.L86: + subl $12, %esp + decl %ebx + pushl $32 + call *-160(%ebp) + addl $16, %esp + incl -112(%ebp) +.L85: + testl %ebx, %ebx + jg .L86 +.L37: + movl -112(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size number, .-number + .section .rom.data.str1.1 +.LC2: + .string "<NULL>" + .section .rom.text +.globl vtxprintf + .type vtxprintf, @function +vtxprintf: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl 16(%ebp), %esi + movl $0, -20(%ebp) + jmp .L92 +.L93: + cmpb $37, %al + movl $0, -28(%ebp) + je .L200 + subl $12, %esp + movzbl %al, %eax + jmp .L196 +.L200: + movl 12(%ebp), %ecx + incl %ecx + movl %ecx, 12(%ebp) + movb (%ecx), %dl + cmpb $43, %dl + je .L101 + jg .L104 + cmpb $32, %dl + je .L99 + cmpb $35, %dl + jne .L98 + jmp .L100 +.L104: + cmpb $45, %dl + je .L102 + cmpb $48, %dl + jne .L98 + jmp .L103 +.L102: + orl $16, -28(%ebp) + jmp .L200 +.L101: + orl $4, -28(%ebp) + jmp .L200 +.L99: + orl $8, -28(%ebp) + jmp .L200 +.L100: + orl $32, -28(%ebp) + jmp .L200 +.L103: + orl $1, -28(%ebp) + jmp .L200 +.L98: + leal -48(%edx), %eax + cmpb $9, %al + ja .L105 + leal 12(%ebp), %eax + call skip_atoi + movl %eax, %edi + jmp .L107 +.L105: + orl $-1, %edi + cmpb $42, %dl + jne .L107 + movl (%esi), %edi + leal 1(%ecx), %eax + movl %eax, 12(%ebp) + leal 4(%esi), %eax + movl %eax, %esi + testl %edi, %edi + jns .L107 + orl $16, -28(%ebp) + negl %edi +.L107: + movl 12(%ebp), %edx + movl $-1, -24(%ebp) + cmpb $46, (%edx) + jne .L114 + leal 1(%edx), %eax + movl %eax, 12(%ebp) + movb 1(%edx), %cl + leal -48(%ecx), %eax + cmpb $9, %al + ja .L115 + leal 12(%ebp), %eax + call skip_atoi + movl %eax, -24(%ebp) + jmp .L117 +.L115: + cmpb $42, %cl + jne .L118 + leal 2(%edx), %eax + movl %eax, 12(%ebp) + movl (%esi), %eax + addl $4, %esi + movl %eax, -24(%ebp) +.L117: + cmpl $0, -24(%ebp) + jns .L114 +.L118: + movl $0, -24(%ebp) +.L114: + movl 12(%ebp), %ecx + movb (%ecx), %dl + cmpb $104, %dl + je .L120 + cmpb $108, %dl + je .L120 + orl $-1, %ebx + cmpb $76, %dl + jne .L123 +.L120: + leal 1(%ecx), %eax + movl %eax, 12(%ebp) + cmpb $108, 1(%ecx) + je .L124 + movsbl %dl,%ebx + jmp .L123 +.L124: + leal 2(%ecx), %eax + movl $76, %ebx + movl %eax, 12(%ebp) +.L123: + movl 12(%ebp), %eax + movb (%eax), %al + cmpb $110, %al + je .L131 + jg .L137 + cmpb $99, %al + je .L129 + jg .L138 + cmpb $37, %al + je .L127 + cmpb $88, %al + jne .L126 + jmp .L128 +.L138: + cmpb $100, %al + je .L130 + cmpb $105, %al + jne .L126 + jmp .L130 +.L137: + cmpb $115, %al + je .L134 + jg .L139 + cmpb $111, %al + je .L132 + cmpb $112, %al + jne .L126 + jmp .L133 +.L139: + cmpb $117, %al + je .L135 + cmpb $120, %al + movl $16, -36(%ebp) + je .L140 + jmp .L126 +.L129: + testb $16, -28(%ebp) + movl %edi, %ebx + je .L143 + jmp .L141 +.L144: + subl $12, %esp + pushl $32 + call *8(%ebp) + addl $16, %esp +.L143: + decl %ebx + testl %ebx, %ebx + jg .L144 + movl -20(%ebp), %eax + addl %edi, %eax + movl %ebx, %edi + subl %ebx, %eax + decl %eax + movl %eax, -20(%ebp) +.L141: + movzbl (%esi), %eax + subl $12, %esp + pushl %eax + call *8(%ebp) + movl -20(%ebp), %ebx + jmp .L191 +.L147: + subl $12, %esp + pushl $32 + call *8(%ebp) +.L191: + decl %edi + addl $16, %esp + incl %ebx + testl %edi, %edi + jg .L147 + movl %ebx, -20(%ebp) + jmp .L199 +.L134: + movl (%esi), %edx + testl %edx, %edx + movl %edx, -32(%ebp) + jne .L149 + movl $.LC2, -32(%ebp) +.L149: + movl $0, -16(%ebp) + jmp .L151 +.L152: + incl -16(%ebp) +.L151: + movl -16(%ebp), %ecx + movl -32(%ebp), %eax + cmpb $0, (%ecx,%eax) + je .L153 + movl -24(%ebp), %edx + cmpl %edx, %ecx + jne .L152 +.L153: + testb $16, -28(%ebp) + movl %edi, %eax + je .L157 + jmp .L155 +.L158: + subl $12, %esp + pushl $32 + call *8(%ebp) + movl %ebx, %eax + addl $16, %esp + incl -20(%ebp) +.L157: + cmpl %eax, -16(%ebp) + leal -1(%eax), %ebx + jl .L158 + movl %ebx, %edi +.L155: + xorl %ebx, %ebx + jmp .L160 +.L161: + movl -32(%ebp), %ecx + subl $12, %esp + movzbl (%ebx,%ecx), %eax + incl %ebx + pushl %eax + call *8(%ebp) + addl $16, %esp + incl -20(%ebp) +.L160: + cmpl -16(%ebp), %ebx + jl .L161 + movl %edi, %ebx + jmp .L163 +.L164: + subl $12, %esp + decl %ebx + pushl $32 + call *8(%ebp) + addl $16, %esp + incl -20(%ebp) +.L163: + cmpl %ebx, -16(%ebp) + jl .L164 + jmp .L199 +.L133: + cmpl $-1, %edi + jne .L166 + orl $1, -28(%ebp) + movl $8, %edi +.L166: + movl (%esi), %edx + leal 4(%esi), %ebx + xorl %ecx, %ecx + pushl -28(%ebp) + pushl -24(%ebp) + pushl %edi + pushl $16 + jmp .L197 +.L131: + cmpl $76, %ebx + jne .L168 + movl -20(%ebp), %eax + movl (%esi), %ecx + cltd + movl %eax, (%ecx) + movl %edx, 4(%ecx) +.L199: + addl $4, %esi + jmp .L97 +.L168: + movl (%esi), %eax + leal 4(%esi), %edx + movl -20(%ebp), %ecx + movl %edx, %esi + movl %ecx, (%eax) + jmp .L97 +.L127: + subl $12, %esp + pushl $37 + jmp .L198 +.L132: + movl $8, -36(%ebp) + jmp .L140 +.L128: + orl $64, -28(%ebp) + movl $16, -36(%ebp) + jmp .L140 +.L130: + orl $2, -28(%ebp) + jmp .L135 +.L126: + subl $12, %esp + pushl $37 + call *8(%ebp) + movl 12(%ebp), %eax + addl $16, %esp + incl -20(%ebp) + movb (%eax), %dl + testb %dl, %dl + je .L172 + subl $12, %esp + movzbl %dl, %eax +.L196: + pushl %eax +.L198: + call *8(%ebp) + incl -20(%ebp) + jmp .L194 +.L172: + decl %eax + movl %eax, 12(%ebp) + jmp .L97 +.L135: + movl $10, -36(%ebp) +.L140: + cmpl $76, %ebx + jne .L174 + movl (%esi), %edx + leal 8(%esi), %ebx + movl 4(%esi), %ecx + jmp .L176 +.L174: + cmpl $108, %ebx + jne .L177 + leal 4(%esi), %ebx + jmp .L192 +.L177: + cmpl $104, %ebx + jne .L179 + xorl %ecx, %ecx + movzwl (%esi), %edx + testb $2, -28(%ebp) + leal 4(%esi), %ebx + je .L176 + movswl %dx,%edx + movl %edx, %ecx + jmp .L193 +.L179: + testb $2, -28(%ebp) + leal 4(%esi), %edx + je .L182 + movl (%esi), %eax + movl %edx, %ebx + movl %eax, %ecx + movl %eax, %edx +.L193: + sarl $31, %ecx + jmp .L176 +.L182: + movl %edx, %ebx +.L192: + movl (%esi), %edx + xorl %ecx, %ecx +.L176: + pushl -28(%ebp) + pushl -24(%ebp) + pushl %edi + pushl -36(%ebp) +.L197: + movl 8(%ebp), %eax + movl %ebx, %esi + call number + addl %eax, -20(%ebp) +.L194: + addl $16, %esp +.L97: + incl 12(%ebp) +.L92: + movl 12(%ebp), %eax + movb (%eax), %al + testb %al, %al + jne .L93 + movl -20(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size vtxprintf, .-vtxprintf +.globl console_tx_byte + .type console_tx_byte, @function +console_tx_byte: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movb 8(%ebp), %bl + cmpb $10, %bl + jne .L202 + pushl $13 + pushl $1016 + call uart8250_tx_byte + popl %ecx + popl %eax +.L202: + movzbl %bl, %eax + pushl %eax + pushl $1016 + call uart8250_tx_byte + movl -4(%ebp), %ebx + popl %eax + popl %edx + leave + ret + .size console_tx_byte, .-console_tx_byte +.globl udelay + .type udelay, @function +udelay: + pushl %ebp + movl %esp, %ebp + imull $200, 8(%ebp), %ecx + pushl %ebx + movl -18873456, %edx +.L206: + movl -18873456, %eax + movl %edx, %ebx + subl %eax, %ebx + cmpl %ecx, %ebx + jb .L206 + popl %ebx + popl %ebp + ret + .size udelay, .-udelay +.globl mdelay + .type mdelay, @function +mdelay: + pushl %ebp + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + xorl %ebx, %ebx + jmp .L212 +.L213: + pushl $1000 + incl %ebx + call udelay + popl %eax +.L212: + cmpl %esi, %ebx + jne .L213 + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size mdelay, .-mdelay +.globl delay + .type delay, @function +delay: + pushl %ebp + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + xorl %ebx, %ebx + jmp .L217 +.L218: + pushl $1000 + incl %ebx + call mdelay + popl %eax +.L217: + cmpl %esi, %ebx + jne .L218 + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size delay, .-delay +.globl memcpy + .type memcpy, @function +memcpy: + pushl %ebp + xorl %edx, %edx + movl %esp, %ebp + pushl %esi + movl 8(%ebp), %ecx + pushl %ebx + movl 12(%ebp), %esi + movl 16(%ebp), %ebx + jmp .L222 +.L223: + movb (%edx,%esi), %al + movb %al, (%edx,%ecx) + incl %edx +.L222: + cmpl %ebx, %edx + jne .L223 + popl %ebx + movl %ecx, %eax + popl %esi + popl %ebp + ret + .size memcpy, .-memcpy + .type setup_resource_map_offset, @function +setup_resource_map_offset: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + subl $16, %esp + movl %edx, -16(%ebp) + movl %ecx, -20(%ebp) + jmp .L227 +.L228: + movl (%esi,%edi,4), %edx + movl $3320, %ecx + movl %edx, %eax + andl $4095, %edx + andl $-4096, %eax + addl -20(%ebp), %eax + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -28(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl 4(%esi,%edi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -24(%ebp) + movl -28(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl 8(%ebp), %eax + movl %ebx, %edx + addl 8(%esi,%edi,4), %eax + orl %eax, -24(%ebp) + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %edi +.L227: + cmpl -16(%ebp), %edi + jl .L228 + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size setup_resource_map_offset, .-setup_resource_map_offset + .type setup_resource_map_x_offset, @function +setup_resource_map_x_offset: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + subl $16, %esp + movl %edx, -16(%ebp) + movl %ecx, -20(%ebp) + jmp .L232 +.L233: + movl (%esi,%edi,4), %eax + cmpl $32, %eax + je .L236 + cmpl $34, %eax + je .L237 + cmpl $16, %eax + jne .L234 + movl 4(%esi,%edi,4), %edx + movl $3320, %ecx + movl %edx, %eax + andl $4095, %edx + andl $-4096, %eax + addl -20(%ebp), %eax + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -28(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl 8(%esi,%edi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -24(%ebp) + movl -28(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl 12(%esi,%edi,4), %eax + movl %ebx, %edx + orl %eax, -24(%ebp) + movl -24(%ebp), %eax + jmp .L240 +.L237: + movl 8(%ebp), %edx + addl 4(%esi,%edi,4), %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax + andl 8(%esi,%edi,4), %eax + orl 12(%esi,%edi,4), %eax + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + jmp .L234 +.L236: + movl 8(%ebp), %edx + addl 4(%esi,%edi,4), %edx +#APP + inl %dx, %eax +#NO_APP + andl 8(%esi,%edi,4), %eax + orl 12(%esi,%edi,4), %eax +.L240: +#APP + outl %eax, %dx +#NO_APP +.L234: + addl $4, %edi +.L232: + cmpl -16(%ebp), %edi + jl .L233 + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size setup_resource_map_x_offset, .-setup_resource_map_x_offset + .type soft_reset, @function +soft_reset: + pushl %ebp + movl $-2147434388, %eax + movl %esp, %ebp + movl $3320, %edx + pushl %ebx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl $-2147434388, %ecx + movl %eax, %ebx + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-33, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $2, %al + movb $-7, %dl +#APP + outb %al, %dx +#NO_APP + movb $6, %al +#APP + outb %al, %dx +#NO_APP + popl %ebx + popl %ebp + ret + .size soft_reset, .-soft_reset + .type spd_read_byte, @function +spd_read_byte: + pushl %ebp + addl %eax, %eax + movl %esp, %ebp + orl $1, %eax + pushl %esi + movl $4098, %ecx + pushl %ebx + movzbl %al, %eax + movl %edx, %ebx + movl %ecx, %edx +#APP + outb %al, %dx +#NO_APP + movl $-128, %esi + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movzbl %bl, %ecx + movb $3, %dl + movb %cl, %al +#APP + outb %al, %dx +#NO_APP + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movb $7, %cl + xorb %dl, %dl + movb %cl, %al +#APP + outb %al, %dx +#NO_APP + movl %esi, %eax +#APP + outb %al, $128 +#NO_APP + movl $1000000, %ecx +.L244: + movb $-128, %al +#APP + outb %al, $128 +#NO_APP + movl $4097, %edx +#APP + inb %dx, %al +#NO_APP + testb %al, %al + jne .L245 + decl %ecx + jne .L244 + movl $-3, %edx + jmp .L248 +.L245: +#APP + inb %dx, %al +#NO_APP + movl $4100, %edx + movb %al, %bl +#APP + inb %dx, %al +#NO_APP + andl $-128, %ebx + orl $-1, %edx + cmpb $-128, %bl + jne .L248 + movzbl %al, %edx +.L248: + popl %ebx + movl %edx, %eax + popl %esi + popl %ebp + ret + .size spd_read_byte, .-spd_read_byte + .type get_nodes, @function +get_nodes: + pushl %ebp + movl $-2147434400, %eax + movl %esp, %ebp + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $4, %eax + popl %ebp + andl $7, %eax + incl %eax + ret + .size get_nodes, .-get_nodes + .type ht_lookup_slave_capability, @function +ht_lookup_slave_capability: + pushl %ebp + movl $3320, %ecx + movl %esp, %ebp + movl %ecx, %edx + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + shrl $4, %ebx + subl $4, %esp + movl %ebx, %esi + orl $14, %esi + movl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + andl $127, %eax + xorl %edi, %edi + cmpb $1, %al + ja .L265 + jmp .L257 +.L260: + movl %edi, %eax + movl %ebx, %edx + movzbl %al, %esi + movl $3320, %ecx + orl %esi, %edx + movl %edx, %eax + andl $2147483644, %eax + movl %edx, -16(%ebp) + orl $-2147483648, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -16(%ebp), %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + cmpb $8, %al + jne .L261 + leal 2(%esi), %eax + movl %ecx, %edx + orl %ebx, %eax + movl %eax, -16(%ebp) + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -16(%ebp), %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + shrw $13, %ax + je .L263 +.L261: + incl %esi + orl %ebx, %esi +.L266: + movl %esi, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + movl %eax, %edi +.L265: + movl %edi, %edx + testb %dl, %dl + jne .L260 + jmp .L263 +.L257: + movl %ebx, %esi + orl $52, %esi + jmp .L266 +.L263: + movl %edi, %edx + movzbl %dl, %eax + popl %edx + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size ht_lookup_slave_capability, .-ht_lookup_slave_capability + .type ht_read_freq_cap, @function +ht_read_freq_cap: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movzbl %dl, %esi + shrl $4, %edi + orl %edi, %esi + movl %esi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + andl $2147483644, %edi + movl %eax, %esi + orl $-2147483648, %edi + movl %eax, %ecx + andw $32767, %si + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $1951404066, %eax + je .L274 + cmpl $1951666210, %eax + jne .L271 +.L274: + movl %ecx, %eax + andl $32735, %eax + jmp .L270 +.L271: + movzwl %si, %eax +.L270: + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size ht_read_freq_cap, .-ht_read_freq_cap + .type ht_read_width_cap, @function +ht_read_width_cap: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movzbl %dl, %esi + shrl $4, %edi + orl %edi, %esi + movl %esi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx + andl $3, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + andl $2147483644, %edi + movb %al, %cl + orl $-2147483648, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $71758, %eax + jne .L276 + movl %ecx, %eax + andl $119, %eax + cmpl $17, %eax + jne .L276 + andl $-120, %ecx +.L276: + popl %ebx + movzbl %cl, %eax + popl %esi + popl %edi + popl %ebp + ret + .size ht_read_width_cap, .-ht_read_width_cap + .type pci_read_config32_index_wait, @function +pci_read_config32_index_wait: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %edx, %edi + pushl %esi + movl %ecx, %esi + pushl %ebx + movl %eax, %ebx + shrl $4, %ebx + movl %ebx, %ecx + orl %edx, %ecx + movl $3320, %edx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1073741825, %esi + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L281: + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testl %eax, %eax + jns .L281 + leal 4(%edi), %eax + movb $-8, %dl + orl %eax, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size pci_read_config32_index_wait, .-pci_read_config32_index_wait + .type pci_write_config32_index_wait, @function +pci_write_config32_index_wait: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl %ecx, %esi + movl %edx, %ecx + shrl $4, %edi + addl $4, %ecx + orl %edi, %ecx + andl $2147483644, %ecx + pushl %ebx + orl $-2147483648, %ecx + movl $3320, %ebx + subl $4, %esp + movl %ecx, %eax + movl %edx, -16(%ebp) + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl 8(%ebp), %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + orl -16(%ebp), %edi + movl %ebx, %edx + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1073741824, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L287: + movl $3320, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testl %eax, %eax + jns .L287 + popl %ecx + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size pci_write_config32_index_wait, .-pci_write_config32_index_wait +.globl memory_end_k + .type memory_end_k, @function +memory_end_k: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + xorl %esi, %esi + pushl %ebx + subl $4, %esp + movl $0, -16(%ebp) + jmp .L293 +.L294: + movl 8(%ebp), %eax + movl $3320, %edx + movl -16(%ebp), %edi + movl 8(%eax), %ecx + sall $3, %edi + leal 64(%edi), %eax + shrl $4, %ecx + orl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $3, %eax + cmpl $3, %eax + jne .L295 + leal 68(%edi), %eax + movb $-8, %dl + orl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + leal 65536(%eax), %esi + xorw %si, %si + shrl $2, %esi +.L295: + incl -16(%ebp) +.L293: + movl 12(%ebp), %eax + cmpl %eax, -16(%ebp) + jne .L294 + popl %ebx + movl %esi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size memory_end_k, .-memory_end_k + .type convert_to_linear, @function +convert_to_linear: + movl %eax, %edx + andl $15, %edx + pushl %ebp + cmpl $9, %edx + movl %esp, %ebp + ja .L300 + sall $4, %eax + jmp .L302 +.L300: + andl $240, %eax + sall $4, %eax + orl fraction.4292-40(,%edx,4), %eax +.L302: + popl %ebp + ret + .size convert_to_linear, .-convert_to_linear + .type update_dimm_TT_1_4, @function +update_dimm_TT_1_4: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $12, %esp + movl 8(%ebp), %edi + movl %edx, -20(%ebp) + movl $1, %edx + movzwl 20(%eax,%ecx,2), %esi + movl %eax, -16(%ebp) + movl %edx, %eax + sall %cl, %eax + testl %eax, %edi + jne .L305 + leal 4(%ebx), %ecx + sall %cl, %edx + testl %edx, %edi + je .L305 + movl -16(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L305: + movl 16(%ebp), %edx + movl %esi, %eax + orl $-1, %edi + call spd_read_byte + testl %eax, %eax + js .L310 + movl -20(%ebp), %ecx + imull $10, %eax, %edx + movl 32(%ebp), %esi + movzbl 2(%ecx), %ebx + leal -1(%edx,%ebx), %edx + movl %edx, %eax + cltd + idivl %ebx + cmpl %eax, %esi + jae .L311 + movl %eax, %esi +.L311: + xorl %edi, %edi + cmpl 36(%ebp), %esi + ja .L310 + movl -16(%ebp), %ecx + movl $3320, %edx + movl 12(%ebp), %eax + movl 12(%ecx), %ecx + shrl $4, %ecx + orl %eax, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, -24(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movb 20(%ebp), %cl + movl %eax, %ebx + movw $1, %di + shrl %cl, %eax + andl 24(%ebp), %eax + addl 28(%ebp), %eax + cmpl %esi, %eax + jae .L310 + sall %cl, 24(%ebp) + movb $-8, %dl + notl 24(%ebp) + andl 24(%ebp), %ebx + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + subl 28(%ebp), %esi + movb $-4, %dl + sall %cl, %esi + orl %esi, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L310: + addl $12, %esp + movl %edi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size update_dimm_TT_1_4, .-update_dimm_TT_1_4 + .type Get_MCTSysAddr, @function +Get_MCTSysAddr: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl (%eax), %ebx + leal (%edx,%ebx,8), %eax + movl 728(%ecx,%eax,4), %edx + movl 696(%ecx,%ebx,4), %eax + andl $-16, %edx + xorw %ax, %ax + addl %eax, %edx + movl 984(%ecx,%ebx,4), %eax + testb $1, %al + je .L318 + movl %eax, %ecx + andl $-16777216, %ecx + shrl $10, %ecx + leal 0(,%ecx,4), %eax + cmpl %eax, %edx + jb .L318 + cmpl $16777215, %edx + ja .L318 + movl $4194304, %eax + subl %ecx, %eax + leal (%edx,%eax,4), %edx +.L318: + popl %ebx + popl %ebp + leal 4096(%edx), %eax + ret + .size Get_MCTSysAddr, .-Get_MCTSysAddr + .type Get_RcvrSysAddr, @function +Get_RcvrSysAddr: + pushl %ebp + movl %ecx, %edx + movl %esp, %ebp + movl 8(%ebp), %ecx + popl %ebp + jmp Get_MCTSysAddr + .size Get_RcvrSysAddr, .-Get_RcvrSysAddr + .type set_wrap32dis, @function +set_wrap32dis: + pushl %ebp + movl $-1073676267, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + orl $131072, %eax +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size set_wrap32dis, .-set_wrap32dis + .type clear_wrap32dis, @function +clear_wrap32dis: + pushl %ebp + movl $-1073676267, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + andl $-131073, %eax +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size clear_wrap32dis, .-clear_wrap32dis + .type Write1LTestPattern, @function +Write1LTestPattern: + pushl %ebp + decl %edx + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + je .L331 + movl %ecx, %esi +.L331: + movl %edi, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + sall $8, %edi + movl $16, %edx + movl $4, %ecx + movl %edi, %eax + movl %esi, %ebx +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size Write1LTestPattern, .-Write1LTestPattern + .type Read1LTestPattern, @function +Read1LTestPattern: + pushl %ebp + movl %eax, %edx + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + movl %eax, %esi + pushl %ebx + movl $-1073741568, %ebx + shrl $24, %edx + movl %ebx, %ecx + movl %edi, %eax +#APP + wrmsr +#NO_APP + sall $8, %esi + movl %esi, %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size Read1LTestPattern, .-Read1LTestPattern + .type CompareTestPatternQW0, @function +CompareTestPatternQW0: + pushl %ebp + movl %esp, %ebp + cmpl $1, 20(%ebp) + pushl %edi + movl %eax, %edi + pushl %esi + movl 16(%ebp), %esi + pushl %ebx + movl %edx, %ebx + jne .L340 + decl %ecx + movl 12(%ebp), %esi + je .L340 + movl 8(%ebp), %esi +.L340: + movl %ebx, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + movl %ebx, %eax + sall $8, %eax + cmpl $0, 24(%ebp) + je .L341 + decl %edi + jne .L341 + addl $8, %eax + addl $8, %esi +.L341: +#APP + movl %fs:(%eax), %ebx + +#NO_APP + cmpl (%esi), %ebx + movl $1, %edx + jne .L345 + addl $4, %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + xorl %edx, %edx + cmpl 4(%esi), %ebx + setne %dl +.L345: + cmpl $2, 20(%ebp) + jne .L346 + testl %edx, %edx + sete %al + movzbl %al, %edx +.L346: + popl %ebx + movl %edx, %eax + popl %esi + popl %edi + popl %ebp + ret + .size CompareTestPatternQW0, .-CompareTestPatternQW0 + .type SetMaxAL_RcvrDly, @function +SetMaxAL_RcvrDly: + pushl %ebp + movl %esp, %ebp + leal 19(%edx), %ecx + movl $20, %edx + pushl %edi + movl %eax, %edi + pushl %esi + movl %ecx, %eax + movl %edx, %esi + xorl %edx, %edx + divl %esi + movl 12(%edi), %esi + movl $3320, %edx + pushl %ebx + orl $2368, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %eax, %ebx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + andb $15, %cl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 6(%ebx), %eax + movb $-4, %dl + sall $4, %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size SetMaxAL_RcvrDly, .-SetMaxAL_RcvrDly + .type SetTargetWTIO, @function +SetTargetWTIO: + pushl %ebp + movl %eax, %edx + movl %esp, %ebp + movl $-1073676266, %ecx + sall $8, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + movl $-67106816, %eax + movb $23, %cl + movl $255, %edx +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size SetTargetWTIO, .-SetTargetWTIO + .type proc_IOCLFLUSH, @function +proc_IOCLFLUSH: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %eax, %ebx + call SetTargetWTIO + movl %ebx, %edx + movl $-1073741568, %ecx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + sall $8, %ebx + movl %ebx, %eax +#APP + clflush %fs:(%eax) + +#NO_APP + movl $-1073676265, %ecx + xorl %eax, %eax + xorl %edx, %edx +#APP + wrmsr +#NO_APP + popl %ebx + popl %ebp + ret + .size proc_IOCLFLUSH, .-proc_IOCLFLUSH + .type ResetDCTWrPtr, @function +ResetDCTWrPtr: + pushl %ebp + movl $16, %ecx + movl %esp, %ebp + movl $152, %edx + pushl %esi + pushl %ebx + movl %eax, %ebx + movl 12(%eax), %eax + call pci_read_config32_index_wait + movl 12(%ebx), %esi + movl $16, %ecx + movl $152, %edx + pushl %eax + movl %esi, %eax + call pci_write_config32_index_wait + movl 12(%ebx), %eax + movl $48, %ecx + movl $152, %edx + call pci_read_config32_index_wait + movl 12(%ebx), %ebx + movl $48, %ecx + movl $152, %edx + pushl %eax + movl %ebx, %eax + call pci_write_config32_index_wait + popl %esi + popl %eax + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size ResetDCTWrPtr, .-ResetDCTWrPtr + .type SetDQSDelayCSR, @function +SetDQSDelayCSR: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + pushl %ebx + movl %ecx, %ebx + subl $8, %esp + movl 12(%ebp), %eax + sall $5, %edx + movl %eax, -16(%ebp) + movl %ecx, %eax + shrl $2, %eax + leal 1(%eax,%edx), %eax + movl 8(%ebp), %edx + leal (%eax,%edx,4), %esi + jmp .L358 +.L359: + subl $4, %ebx +.L358: + cmpl $3, %ebx + ja .L359 + movl 12(%edi), %eax + movl %esi, %ecx + movl $152, %edx + sall $3, %ebx + call pci_read_config32_index_wait + movzbl -16(%ebp),%edx + movb %bl, %cl + movl $63, -20(%ebp) + sall %cl, -20(%ebp) + notl -20(%ebp) + andl %eax, -20(%ebp) + sall %cl, %edx + movl 12(%edi), %eax + movl %esi, %ecx + orl -20(%ebp), %edx + movl %edx, 8(%ebp) + movl $152, %edx + popl %ebx + popl %esi + popl %ebx + popl %esi + popl %edi + popl %ebp + jmp pci_write_config32_index_wait + .size SetDQSDelayCSR, .-SetDQSDelayCSR + .type SetDQSDelayAllCSR, @function +SetDQSDelayAllCSR: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl $1, %esi + pushl %ebx + subl $4, %esp + movl %eax, -16(%ebp) + movzbl 8(%ebp),%eax + leal (%ecx,%edx,8), %edx + leal 0(,%edx,4), %edi + movl %eax, %ebx + sall $8, %ebx + orl %eax, %ebx + sall $16, %eax + orl %eax, %ebx + sall $8, %eax + orl %eax, %ebx +.L363: + movl -16(%ebp), %edx + leal (%edi,%esi), %ecx + incl %esi + movl 12(%edx), %eax + movl $152, %edx + pushl %ebx + call pci_write_config32_index_wait + cmpl $3, %esi + popl %eax + jne .L363 + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size SetDQSDelayAllCSR, .-SetDQSDelayAllCSR + .type save_dqs_delay, @function +save_dqs_delay: + imull $18, %eax, %eax + pushl %ebp + movl %esp, %ebp + leal (%ecx,%ecx,8), %ecx + addl %eax, %ecx + movl 12(%ebp), %eax + addl 8(%ebp), %ecx + movb %al, (%ecx,%edx) + popl %ebp + ret + .size save_dqs_delay, .-save_dqs_delay + .type FlushDQSTestPattern_L18, @function +FlushDQSTestPattern_L18: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + leal 896(%eax), %edx + pushl %ebx + leal 640(%eax), %esi + subl $12, %esp + leal 1152(%eax), %ecx + leal 128(%eax), %ebx + movl %ecx, -20(%ebp) + leal 384(%eax), %edi + movl %edx, %ecx + movl %ebx, -24(%ebp) + movl %esi, %ebx + movl -24(%ebp), %eax + movl %edx, -16(%ebp) + movl -20(%ebp), %edx +#APP + clflush %fs:-128(%eax) + clflush %fs:-64(%eax) + clflush %fs:(%eax) + clflush %fs:64(%eax) + clflush %fs:-128(%edi) + clflush %fs:-64(%edi) + clflush %fs:(%edi) + clflush %fs:64(%edi) + clflush %fs:-128(%ebx) + clflush %fs:-64(%ebx) + clflush %fs:(%ebx) + clflush %fs:64(%ebx) + clflush %fs:-128(%ecx) + clflush %fs:-64(%ecx) + clflush %fs:(%ecx) + clflush %fs:64(%ecx) + clflush %fs:-128(%edx) + clflush %fs:-64(%edx) + +#NO_APP + addl $12, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size FlushDQSTestPattern_L18, .-FlushDQSTestPattern_L18 + .type TrainDQSPos, @function +TrainDQSPos: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $268, %esp + movl %eax, -264(%ebp) + xorl %eax, %eax + movl %edx, -268(%ebp) + movl %ecx, -272(%ebp) +.L373: + movl $255, -204(%ebp,%eax,4) + incl %eax + cmpl $48, %eax + jne .L373 + imull $9, 8(%ebp), %eax + xorl %edx, %edx + movl $0, -252(%ebp) + leal 36(,%eax,4), %eax + movl %eax, -236(%ebp) +.L375: + movl -264(%ebp), %ecx + movl -252(%ebp), %ebx + movl (%ecx), %eax + movl 20(%ebp), %ecx + leal (%ebx,%eax,8), %eax + testb $1, 728(%ecx,%eax,4) + je .L376 + movl -264(%ebp), %eax + movl %ebx, %edx + call Get_MCTSysAddr + movl $-1073741568, %ecx + movl %eax, -248(%ebp) + movl -248(%ebp), %edx + xorl %eax, %eax + shrl $24, %edx +#APP + wrmsr +#NO_APP + cmpl $1, -272(%ebp) + movl $0, -216(%ebp) + jne .L426 + movl -248(%ebp), %eax + movl $16, %edx + movl -236(%ebp), %ecx + movl 12(%ebp), %ebx + sall $8, %eax +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP +.L426: + movl -216(%ebp), %eax + movl -204(%ebp,%eax,4), %eax + testl %eax, %eax + movl %eax, -208(%ebp) + je .L381 + pushl -216(%ebp) + movl -264(%ebp), %eax + movl -272(%ebp), %ecx + movl -268(%ebp), %edx + call SetDQSDelayAllCSR + cmpl $0, -272(%ebp) + popl %eax + jne .L383 + movl -248(%ebp), %eax + movl $16, %edx + movl -236(%ebp), %ecx + movl 12(%ebp), %ebx + sall $8, %eax +#APP + 1: + movdqa (%ebx), %xmm0 + movntdq %xmm0, %fs:(%eax) + addl %edx, %eax + addl %edx, %ebx + loop 1b + +#NO_APP +.L383: + movl -248(%ebp), %eax + sall $8, %eax + cmpl $0, 8(%ebp) + movl %eax, -212(%ebp) + leal 640(%eax), %ebx + leal 128(%eax), %esi + leal 384(%eax), %edi + jne .L385 + xorl %eax, %eax + movl %esi, %ecx + movl %edi, %edx +#APP + movl %fs:-128(%ecx), %eax + movl %fs:-64(%ecx), %eax + movl %fs:(%ecx), %eax + movl %fs:64(%ecx), %eax + movl %fs:-128(%edx), %eax + movl %fs:-64(%edx), %eax + movl %fs:(%edx), %eax + movl %fs:64(%edx), %eax + movl %fs:-128(%ebx), %eax + +#NO_APP + movl 12(%ebp), %ebx + movl -212(%ebp), %eax + movl %ebx, -280(%ebp) + movl %eax, -276(%ebp) + jmp .L387 +.L385: + movl -212(%ebp), %ecx + xorl %eax, %eax + movl -212(%ebp), %edx + addl $896, %ecx + addl $1152, %edx +#APP + movl %fs:-128(%esi), %eax + movl %fs:-64(%esi), %eax + movl %fs:(%esi), %eax + movl %fs:64(%esi), %eax + movl %fs:-128(%edi), %eax + movl %fs:-64(%edi), %eax + movl %fs:(%edi), %eax + movl %fs:64(%edi), %eax + movl %fs:-128(%ebx), %eax + movl %fs:-64(%ebx), %eax + movl %fs:(%ebx), %eax + movl %fs:64(%ebx), %eax + movl %fs:-128(%ecx), %eax + movl %fs:-64(%ecx), %eax + movl %fs:(%ecx), %eax + movl %fs:64(%ecx), %eax + movl %fs:-128(%edx), %eax + movl %fs:-64(%edx), %eax + +#NO_APP + movl 12(%ebp), %edx + movl -212(%ebp), %ecx + cmpl $0, -268(%ebp) + movl %edx, -280(%ebp) + movl %ecx, -276(%ebp) + je .L387 + movl %ecx, %ebx + addl $8, %edx + addl $8, %ebx + movl %ebx, -276(%ebp) + movl %edx, -280(%ebp) +.L387: + movl $255, -220(%ebp) + xorl %edi, %edi + movl $0, -224(%ebp) +.L390: + movl -276(%ebp), %eax +#APP + movl %fs:(%eax), %ebx + +#NO_APP + movl -280(%ebp), %eax + xorl %esi, %esi + movl %ebx, -232(%ebp) + movl (%eax), %eax + movl %eax, -228(%ebp) +.L391: + movl -232(%ebp), %edx + movl %esi, %ecx + movl -228(%ebp), %eax + shrl %cl, %edx + shrl %cl, %eax + cmpb %dl, %al + je .L392 + movl $-2, %eax + movl %edi, %ecx + roll %cl, %eax + andl %eax, -220(%ebp) +.L392: + incl %edi + addl $8, %esi + andl $7, %edi + cmpl $32, %esi + jne .L391 + testl %edi, %edi + jne .L395 + cmpl $1, 8(%ebp) + jne .L395 + addl $8, -276(%ebp) + addl $8, -280(%ebp) +.L395: + incl -224(%ebp) + cmpl $144, -224(%ebp) + je .L398 + addl $4, -276(%ebp) + addl $4, -280(%ebp) + jmp .L390 +.L398: + movl -248(%ebp), %eax + call SetTargetWTIO + cmpl $0, 8(%ebp) + jne .L400 + movl -212(%ebp), %ebx + movl -212(%ebp), %ecx + movl -212(%ebp), %eax + addl $640, %ebx + subl $-128, %ecx + addl $384, %eax +#APP + clflush %fs:-128(%ecx) + clflush %fs:-64(%ecx) + clflush %fs:(%ecx) + clflush %fs:64(%ecx) + clflush %fs:-128(%eax) + clflush %fs:-64(%eax) + clflush %fs:(%eax) + clflush %fs:64(%eax) + clflush %fs:-128(%ebx) + +#NO_APP + jmp .L402 +.L400: + movl -212(%ebp), %eax + call FlushDQSTestPattern_L18 +.L402: + movl -220(%ebp), %ebx + movl $-1073676265, %ecx + andl %ebx, -208(%ebp) + movl -208(%ebp), %edx + movl -216(%ebp), %eax + movl %edx, -204(%ebp,%eax,4) + xorl %eax, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP +.L381: + incl -216(%ebp) + cmpl $48, -216(%ebp) + jne .L426 + movl $1, %edx +.L376: + incl -252(%ebp) + cmpl $8, -252(%ebp) + jne .L375 + testl %edx, %edx + movl $0, -256(%ebp) + je .L407 + jmp .L405 +.L408: + movb -260(%ebp), %cl + movl $1, %eax + movl -276(%ebp), %edx + sall %cl, %eax + testl %eax, -204(%ebp,%edx,4) + jne .L409 + movl $1, -244(%ebp) + jmp .L411 +.L409: + cmpl $1, -244(%ebp) + jne .L412 + movl -276(%ebp), %esi + movl $0, -244(%ebp) + movl %esi, -240(%ebp) + jmp .L411 +.L412: + movl -276(%ebp), %edx + movl %edi, %eax + subl -240(%ebp), %edx + subl %ebx, %eax + movl -276(%ebp), %esi + movl $0, -244(%ebp) + cmpl %eax, %edx + jbe .L411 + movl -240(%ebp), %ebx + movl %esi, %edi +.L411: + incl -276(%ebp) + cmpl $48, -276(%ebp) + jne .L408 + testl %esi, %esi + jne .L417 + orl $14, -256(%ebp) + jmp .L419 +.L417: + movl %edi, %edx + subl %ebx, %edx + cmpl $2, %edx + ja .L420 + orl $15, -256(%ebp) + jmp .L419 +.L420: + movl %edx, %eax + movl -260(%ebp), %ecx + andl $1, %eax + cmpl $1, %eax + movl -264(%ebp), %eax + sbbl $-1, %ebx + shrl %edx + addl %edx, %ebx + movl -268(%ebp), %edx + pushl %ebx + movzbl %bl, %ebx + pushl -272(%ebp) + call SetDQSDelayCSR + movl -272(%ebp), %ecx + pushl %ebx + movl -260(%ebp), %edx + pushl 16(%ebp) + movl -268(%ebp), %eax + call save_dqs_delay + addl $16, %esp +.L419: + incl -260(%ebp) + cmpl $8, -260(%ebp) + je .L407 + jmp .L424 +.L405: + movl $0, -240(%ebp) + movl $0, -260(%ebp) + movl $0, -256(%ebp) +.L424: + xorl %edi, %edi + xorl %ebx, %ebx + xorl %esi, %esi + movl $0, -276(%ebp) + movl $1, -244(%ebp) + jmp .L408 +.L407: + movl -256(%ebp), %eax + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size TrainDQSPos, .-TrainDQSPos + .type get_dqs_delay, @function +get_dqs_delay: + imull $18, %eax, %eax + pushl %ebp + movl %esp, %ebp + leal (%ecx,%ecx,8), %ecx + addl %eax, %ecx + addl 8(%ebp), %ecx + popl %ebp + movzbl (%ecx,%edx), %eax + ret + .size get_dqs_delay, .-get_dqs_delay +.globl read_nb_cfg_54 + .type read_nb_cfg_54, @function +read_nb_cfg_54: + pushl %ebp + movl $-1073676257, %ecx + movl %esp, %ebp +#APP + rdmsr +#NO_APP + shrl $22, %edx + popl %ebp + andl $1, %edx + movl %edx, %eax + ret + .size read_nb_cfg_54, .-read_nb_cfg_54 +.globl get_node_core_id + .type get_node_core_id, @function +get_node_core_id: + pushl %ebp + movl %esp, %ebp + cmpl $0, 12(%ebp) + pushl %esi + movl 8(%ebp), %esi + pushl %ebx + je .L443 + movl $1, %eax +#APP + cpuid +#NO_APP + shrl $24, %ebx + movl %ebx, %edx + movl %ebx, %eax + andl $15, %edx + andl $1, %eax + shrl %edx + jmp .L445 +.L443: + movl $1, %eax +#APP + cpuid +#NO_APP + shrl $24, %ebx + movl %ebx, %eax + movl %ebx, %edx + andl $15, %eax + andl $7, %edx + shrl $3, %eax +.L445: + movl %eax, 4(%esi) + movl %esi, %eax + movl %edx, (%esi) + popl %ebx + popl %esi + popl %ebp + ret $4 + .size get_node_core_id, .-get_node_core_id + .type clear_init_ram, @function +clear_init_ram: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + movl $516096, %ecx + pushl %edi + xorl %edi, %edi +#APP + cld + rep; stosl + +#NO_APP + popl %edi + popl %ebp + ret + .size clear_init_ram, .-clear_init_ram + .type set_init_ram_access, @function +set_init_ram_access: + pushl %ebp + movl $512, %ecx + movl %esp, %ebp + movl $6, %eax + xorl %edx, %edx +#APP + wrmsr +#NO_APP + movl $-2095104, %eax + movb $1, %cl + movb $-1, %dl +#APP + wrmsr +#NO_APP + popl %ebp + ret + .size set_init_ram_access, .-set_init_ram_access + .type for_each_ap, @function +for_each_ap: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl %edx, -32(%ebp) + movl %ecx, -36(%ebp) + movl %eax, -28(%ebp) + call get_nodes + xorl %ecx, %ecx + movl $1, %edx + movl %eax, -24(%ebp) + movl $399, %eax + call read_option + testl %eax, %eax + setne %al + xorl %edi, %edi + movzbl %al, %eax + movl %eax, -40(%ebp) + call read_nb_cfg_54 + movl %eax, -20(%ebp) + jmp .L452 +.L453: + leal 24(%edi), %ecx + movl $3320, %edx + andl $31, %ecx + sall $11, %ecx + orb $3, %ch + movl %ecx, %eax + orl $-2147483416, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $12, %ebx + andl $3, %ebx + cmpl $0, -20(%ebp) + je .L454 + testl %ebx, %ebx + jne .L454 + orl $-2147483396, %ecx + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + andl $1048320, %eax + cmpl $265984, %eax + sete %al + movzbl %al, %eax + testl %eax, %eax + je .L454 + movb $1, %bl + jmp .L458 +.L454: + xorl %eax, %eax +.L458: + orl -40(%ebp), %eax + jne .L459 + cmpl $1, -32(%ebp) + movl %ebx, -16(%ebp) + jne .L461 +.L459: + movl $0, -16(%ebp) +.L461: + cmpl $2, -32(%ebp) + sete %al + movzbl %al, %esi + leal 1(%ebx), %eax + movl %edi, %ebx + imull %eax, %ebx + jmp .L462 +.L463: + cmpl $0, -20(%ebp) + movl %edi, %edx + movl $8, %eax + je .L466 + movl %ebx, %edx + movb $1, %al +.L466: + imull %esi, %eax + leal (%edx,%eax), %eax + cmpl -28(%ebp), %eax + je .L467 + pushl %edx + pushl %edx + pushl 8(%ebp) + pushl %eax + call *-36(%ebp) + addl $16, %esp +.L467: + incl %esi +.L462: + cmpl -16(%ebp), %esi + jbe .L463 + incl %edi +.L452: + cmpl -24(%ebp), %edi + jne .L453 + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size for_each_ap, .-for_each_ap + .type lapic_remote_read, @function +lapic_remote_read: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %eax, %ebx +.L473: + movl -18873600, %eax + testb $16, %ah + jne .L473 + sarl $4, %edx + orb $3, %dh + sall $24, %ebx + movl %ebx, -18873584 + movl %edx, -18873600 + xorl %edx, %edx +.L475: + movl -18873600, %eax + testb $16, %ah + je .L476 + cmpl $1000, %edx + je .L476 + incl %edx + jmp .L475 +.L476: + xorl %edx, %edx +.L479: + movl -18873600, %eax + andl $196608, %eax + cmpl $65536, %eax + jne .L480 + cmpl $1000, %edx + je .L482 + incl %edx + jmp .L479 +.L480: + cmpl $131072, %eax + jne .L482 + movl -18874176, %eax + movl %eax, (%ecx) + xorl %eax, %eax + jmp .L485 +.L482: + orl $-1, %eax +.L485: + popl %ebx + popl %ebp + ret + .size lapic_remote_read, .-lapic_remote_read + .type wait_cpu_state, @function +wait_cpu_state: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + movl %edx, %esi + pushl %ebx + movl $1999999, %ebx + subl $16, %esp + movl $0, -16(%ebp) +.L490: + leal -16(%ebp), %ecx + movl $896, %edx + movl %edi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L491 + movzbl -16(%ebp),%eax + cmpl %esi, %eax + jne .L491 + xorl %eax, %eax + jmp .L494 +.L491: + decl %ebx + jne .L490 + movl -16(%ebp), %eax + testl %eax, %eax + jne .L494 + movb $1, %al +.L494: + addl $16, %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size wait_cpu_state, .-wait_cpu_state + .type store_ap_apicid, @function +store_ap_apicid: + pushl %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + movl 8(%ebp), %ecx + movl (%eax), %edx + movl %ecx, 4(%eax,%edx,4) + incl %edx + movl %edx, (%eax) + popl %ebp + ret + .size store_ap_apicid, .-store_ap_apicid +.globl do_printk + .type do_printk, @function +do_printk: + pushl %ebp + xorl %eax, %eax + movl %esp, %ebp + subl $24, %esp + cmpl $7, 8(%ebp) + jg .L505 + leal 16(%ebp), %eax + pushl %ecx + pushl %eax + pushl 12(%ebp) + movl %eax, -4(%ebp) + pushl $console_tx_byte + call vtxprintf + addl $16, %esp +.L505: + leave + ret + .size do_printk, .-do_printk + .section .rom.data.str1.1 +.LC3: + .string "wrong apicid, we want change %x, but it is %x\r\n" +.LC4: + .string "set vid failed for apicid =" +.LC5: + .string "%s" +.LC6: + .string "%02x" +.LC7: + .string "\r\n" +.LC8: + .string "set fid failed for apicid =" + .section .rom.text + .type set_fidvid, @function +set_fidvid: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %edx, %edi + pushl %esi + pushl %ebx + subl $28, %esp + movl %eax, -32(%ebp) + movl -18874336, %eax + movl %ecx, -36(%ebp) + shrl $24, %eax + cmpl %eax, -32(%ebp) + je .L508 + pushl %eax + pushl -32(%ebp) + pushl $.LC3 + jmp .L544 +.L508: + movl %edx, %eax + movl $-1073676222, %ecx + shrl $8, %eax + shrl $16, %edx + andl $63, %eax + andl $63, %edx + movl %eax, -24(%ebp) + movl %edx, -28(%ebp) +#APP + rdmsr +#NO_APP + movl %eax, %esi + movl %eax, %ecx + movl %edx, %eax + andl $63, %esi + andl $63, %eax + movl %edx, %ebx + cmpl -28(%ebp), %eax + jne .L512 + cmpl -24(%ebp), %esi + je .L510 +.L512: + movl %ecx, %edi + shrl $16, %edi + andl $63, %edi + cmpl $41, %edi + jbe .L513 + shrl $8, %ecx + andl $63, %ecx + leal 10(%ecx), %edi + cmpl $41, %edi + jbe .L513 + movl $12, %edi +.L513: + shrl $8, %ebx + movl %esi, %eax + orl $65536, %eax + andl $16128, %ebx + orl %eax, %ebx + movl $-1073676223, %ecx + movl $1, %edx + movl %ebx, %eax +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L516: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + movl %edx, %ecx + jns .L517 + incl %ebx + cmpl $100000, %ebx + jne .L516 +.L517: + andl $63, %ecx + movl %ecx, -16(%ebp) + movl $8, -20(%ebp) + jmp .L519 +.L520: + cmpl $8, %esi + jbe .L521 + cmpl $8, -24(%ebp) + jbe .L521 + cmpl -24(%ebp), %esi + leal 2(%esi), %edx + jb .L525 + leal -2(%esi), %edx + jmp .L525 +.L521: + movl %esi, %eax + movl -24(%ebp), %edx + shrl %eax + imull $12, %eax, %eax + shrl %edx + movzbl next_fid_a.6719(%eax,%edx), %eax + testl %eax, %eax + jle .L526 + leal -8(%eax,%eax), %edx +.L525: + cmpl %edi, %edx + ja .L526 + movl -16(%ebp), %eax + orl $65536, %edx + movl $-1073676223, %ecx + sall $8, %eax + orl %edx, %eax + movl $20000, %edx +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L529: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + jns .L530 + incl %ebx + cmpl $100000, %ebx + jne .L529 +.L530: + decl -20(%ebp) + movl %eax, %esi + andl $63, %esi +.L519: + cmpl -24(%ebp), %esi + je .L526 + cmpl $0, -20(%ebp) + jne .L520 +.L526: + movl -28(%ebp), %eax + movl $-1073676223, %ecx + movl $1, %edx + sall $8, %eax + orl $65536, %eax + orl %esi, %eax +#APP + wrmsr +#NO_APP + xorl %ebx, %ebx +.L533: + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + testl %eax, %eax + movl %edx, %ecx + jns .L534 + incl %ebx + cmpl $100000, %ebx + jne .L533 +.L534: + movl %ecx, %edx + movl %esi, %eax + andl $63, %edx + movl %edx, %edi + sall $16, %edi + sall $8, %eax + orl %eax, %edi + cmpl $0, -36(%ebp) + je .L510 + cmpl %edx, -28(%ebp) + je .L537 + pushl %eax + pushl $.LC4 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -32(%ebp) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L537: + cmpl %esi, -24(%ebp) + je .L510 + pushl %ebx + pushl $.LC8 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -32(%ebp) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 +.L544: + pushl $3 + call do_printk + addl $16, %esp +.L510: + leal -12(%ebp), %esp + movl %edi, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size set_fidvid, .-set_fidvid + .section .rom.data.str1.1 +.LC9: + .string "%s%02x" + .section .rom.text + .type print_initcpu8_nocr, @function +print_initcpu8_nocr: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC9 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_initcpu8_nocr, .-print_initcpu8_nocr + .section .rom.data.str1.1 +.LC10: + .string "*" +.LC11: + .string "%s%08x\r\n" +.LC12: + .string " " + .section .rom.text + .type wait_ap_started, @function +wait_ap_started: + pushl %ebp + movl $51, %edx + movl %esp, %ebp + pushl %esi + pushl %ebx + movl 8(%ebp), %ebx + movl %ebx, %eax + call wait_cpu_state + testl %eax, %eax + movl %eax, %esi + je .L548 + movl %ebx, %edx + movl $.LC10, %eax + call print_initcpu8_nocr + pushl %esi + pushl $.LC10 + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret +.L548: + leal -8(%ebp), %esp + movl %ebx, %edx + popl %ebx + movl $.LC12, %eax + popl %esi + popl %ebp + jmp print_initcpu8_nocr + .size wait_ap_started, .-wait_ap_started + .section .rom.data.str1.1 +.LC13: + .string "%s%02x\r\n" + .section .rom.text + .type print_initcpu8, @function +print_initcpu8: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC13 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_initcpu8, .-print_initcpu8 + .type print_debug_pcar, @function +print_debug_pcar: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_debug_pcar, .-print_debug_pcar + .type print_debug_cp_run, @function +print_debug_cp_run: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_debug_cp_run, .-print_debug_cp_run + .section .rom.data.str1.1 +.LC14: + .string "mcp55_num:" + .section .rom.text + .type mcp55_early_setup_x, @function +mcp55_early_setup_x: + pushl %ebp + movl %esp, %ebp + pushl %edi + xorl %edi, %edi + pushl %esi + xorl %esi, %esi + pushl %ebx + xorl %ebx, %ebx + subl $112, %esp + pushl $16 + pushl $C.181.6395 + leal -76(%ebp), %eax + pushl %eax + call memcpy + addl $16, %esp +.L559: + xorl %ecx, %ecx +.L560: + movl %ebx, %eax + movl $3320, %edx + sall $20, %eax + movl %eax, -112(%ebp) + movl %ecx, %eax + andl $31, %eax + sall $15, %eax + orl %eax, -112(%ebp) + shrl $4, -112(%ebp) + orl $-2147483648, -112(%ebp) + movl -112(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57217246, %eax + jne .L561 + movl %ebx, -28(%ebp) + movl %ecx, -44(%ebp) + movl %edi, -60(%ebp) + movl $1, -108(%ebp) + jmp .L563 +.L561: + incl %ecx + cmpl $32, %ecx + jne .L560 + incl %esi + addl $64, %ebx + addl $16384, %edi + cmpl $4, %esi + jne .L559 + movl $0, -108(%ebp) +.L563: + pushl %ebx + xorl %ebx, %ebx + pushl $.LC14 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl -108(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L566 +.L567: + movl -28(%ebp,%ebx,4), %ecx + movl $9, %edx + movl -44(%ebp,%ebx,4), %eax + pushl -60(%ebp,%ebx,4) + incl %ebx + andl $4095, %ecx + andl $31, %eax + sall $15, %eax + sall $20, %ecx + orl %eax, %ecx + movl $ctrl_devport_conf.6240, %eax + call setup_resource_map_offset + popl %ecx +.L566: + cmpl -108(%ebp), %ebx + jne .L567 + movl $0, -104(%ebp) + jmp .L569 +.L570: + movl -104(%ebp), %eax + movl -60(%ebp,%eax,4), %edx + movl -76(%ebp,%eax,4), %esi + movl -44(%ebp,%eax,4), %eax + movl %edx, -100(%ebp) + addl $10240, %edx + movl %edx, -88(%ebp) + movl -104(%ebp), %edx + movl %eax, %ebx + incl %ebx + movl %eax, -84(%ebp) + andl $31, %ebx + movl -28(%ebp,%edx,4), %edx + sall $15, %ebx + movl %edx, -80(%ebp) + sall $20, %edx + movl %edx, %eax + orb $16, %ah + orl %eax, %ebx + shrl $4, %ebx + orl $-2147483420, %ebx + movl %edx, -92(%ebp) + movl %ebx, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1008, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edi, %edi + movl $0, -96(%ebp) +.L571: + movl -88(%ebp), %ecx + leal 204(%ecx), %edx +#APP + inl %dx, %eax +#NO_APP + andb $249, %ah + orl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 48(%ecx), %edx +#APP + inl %dx, %eax +#NO_APP + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP +.L572: +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L572 + incl -96(%ebp) + addl $512, %edi + cmpl $3, -96(%ebp) + jne .L571 + movl -88(%ebp), %edx + addw $204, %dx +#APP + inl %dx, %eax +#NO_APP + andl $-369, %eax + orb $1, %ah + sall $4, %esi + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edx, %edx +.L575: + movb $1, %al +#APP + outb %al, $128 +#NO_APP + incl %edx + cmpl $32768, %edx + jne .L575 + movl $3320, %edi + movl %ebx, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1009, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %edx, %edx +.L577: + movb $-24, %al +#APP + outb %al, $128 +#NO_APP + incl %edx + cmpl $32768, %edx + jne .L577 + movl -84(%ebp), %ebx + movw $160, %dx + movl $ctrl_conf_1.6337, %eax + pushl -100(%ebp) + xorl %esi, %esi + andl $31, %ebx + sall $15, %ebx + orl -92(%ebp), %ebx + movl %ebx, %ecx + call setup_resource_map_x_offset + popl %edx +.L579: + movl %esi, %ecx + movl $ctrl_conf_1_1.6338, %eax + pushl -100(%ebp) + andl $7, %ecx + sall $12, %ecx + movl $36, %edx + orl %ebx, %ecx + incl %esi + call setup_resource_map_x_offset + cmpl $3, %esi + popl %eax + jne .L579 + cmpl $0, -80(%ebp) + jne .L581 + pushl -100(%ebp) + movl $ctrl_conf_mcp55_only.6339, %eax + movl %ebx, %ecx + movl $132, %edx + call setup_resource_map_x_offset + cmpl $1, -108(%ebp) + popl %eax + jbe .L581 + pushl -100(%ebp) + movl $ctrl_conf_master_only.6340, %eax + movl %ebx, %ecx + movl $8, %edx + call setup_resource_map_x_offset + popl %eax +.L581: + pushl -100(%ebp) + movl $ctrl_conf_2.6341, %eax + movl %ebx, %ecx + movl $28, %edx + call setup_resource_map_x_offset + incl -104(%ebp) + popl %eax +.L569: + movl -108(%ebp), %eax + cmpl %eax, -104(%ebp) + jne .L570 + xorl %ebx, %ebx + jmp .L585 +.L586: + movl -28(%ebp,%ebx,4), %ecx + movl $9, %edx + movl -44(%ebp,%ebx,4), %eax + pushl -60(%ebp,%ebx,4) + incl %ebx + andl $4095, %ecx + andl $31, %eax + sall $15, %eax + sall $20, %ecx + orl %eax, %ecx + movl $ctrl_devport_conf_clear.6265, %eax + call setup_resource_map_offset + popl %eax +.L585: + cmpl -108(%ebp), %ebx + jne .L586 + leal -12(%ebp), %esp + xorl %eax, %eax + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size mcp55_early_setup_x, .-mcp55_early_setup_x + .section .rom.data.str1.1 +.LC15: + .string "No memory!!\r\n" + .section .rom.text +.globl sdram_no_memory + .type sdram_no_memory, @function +sdram_no_memory: + pushl %ebp + movl %esp, %ebp + subl $12, %esp + pushl $.LC15 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L604: +#APP + hlt +#NO_APP + jmp .L604 + .size sdram_no_memory, .-sdram_no_memory + .type print_debug_sdram_8, @function +print_debug_sdram_8: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl %edx, %ebx + subl $8, %esp + pushl %eax + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + movl -4(%ebp), %ebx + leave + ret + .size print_debug_sdram_8, .-print_debug_sdram_8 + .section .rom.data.str1.1 +.LC16: + .string " CTLRMaxDelay=%02x" + .section .rom.text + .type train_DqsRcvrEn, @function +train_DqsRcvrEn: + pushl %ebp + movl %esp, %ebp + pushl %edi + movl %eax, %edi + pushl %esi + pushl %ebx + subl $380, %esp + movl (%eax), %eax + movl %edx, -380(%ebp) + movl %ecx, -384(%ebp) + movl %eax, %edx + imull $48, %eax, %eax + sall $4, %edx + leal 1304(%ecx,%edx), %edx + movl %edx, -320(%ebp) + movb 51(%eax,%ecx), %al + cmpl $1, -380(%ebp) + movb %al, -305(%ebp) + movzbl %al, %eax + movl %eax, -376(%ebp) + jne .L609 + movl $1, %ebx +.L611: + movl 12(%edi), %eax + movl %ebx, %ecx + movl $152, %edx + pushl $0 + call pci_write_config32_index_wait + movl 12(%edi), %eax + leal 32(%ebx), %ecx + pushl $0 + movl $152, %edx + incl %ebx + call pci_write_config32_index_wait + cmpl $4, %ebx + popl %eax + popl %edx + jne .L611 + movb $5, %bl +.L613: + movl 12(%edi), %eax + movl %ebx, %ecx + movl $152, %edx + pushl $791621423 + call pci_write_config32_index_wait + movl 12(%edi), %eax + leal 32(%ebx), %ecx + pushl $791621423 + movl $152, %edx + incl %ebx + call pci_write_config32_index_wait + cmpl $8, %ebx + popl %esi + popl %eax + jne .L613 +.L609: +#APP + movl %cr4, %eax +#NO_APP + orb $2, %ah +#APP + movl %eax, %cr4 +#NO_APP + call set_wrap32dis + movl 12(%edi), %esi + movl $3320, %edx + shrl $4, %esi + movl %esi, %ecx + andl $268435452, %ecx + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -296(%ebp) + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -296(%ebp), %eax + movl %ebx, %edx + andl $-524289, %eax +#APP + outl %eax, %dx +#NO_APP + cmpl $1, -380(%ebp) + jne .L614 + movl %esi, %ecx + movb $-8, %dl + andl $268435452, %ecx + orl $-2147483528, %ecx + movl %ecx, -388(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + movl -388(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $262144, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP +.L614: + movl %esi, %eax + movl $3320, %edx + andl $268435452, %eax + orl $-2147483500, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl $-1073676222, %ecx + andl $7, %ebx +#APP + rdmsr +#NO_APP + andl $63, %eax + shrl %eax + cmpl $12, %eax + jle .L616 + movzwl T1000_a.5194(%ebx,%ebx), %eax + jmp .L618 +.L616: + leal (%ebx,%eax,4), %eax + movzwl TT_a.5195(%eax,%eax), %eax +.L618: + leal -268(%ebp), %ecx + xorl %edx, %edx + andl $-16, %ecx + movzwl %ax, %eax + movl %ecx, -312(%ebp) + subl $-128, %ecx + cmpl $1, -380(%ebp) + movl %eax, -336(%ebp) + movl %ecx, -316(%ebp) + jne .L623 +.L621: + movl TestPattern0.5229(,%edx,4), %eax + movl -312(%ebp), %ecx + movl %eax, (%ecx,%edx,4) + movl TestPattern1.5230(,%edx,4), %eax + movl %eax, 128(%ecx,%edx,4) + incl %edx + cmpl $16, %edx + je .L622 + jmp .L621 +.L623: + movl TestPattern2.5231(,%edx,4), %eax + movl -312(%ebp), %ecx + movl %eax, (%ecx,%edx,4) + movl %eax, 128(%ecx,%edx,4) + incl %edx + cmpl $16, %edx + jne .L623 +.L622: + imull $48, (%edi), %eax + movl -384(%ebp), %edx + movl $0, -372(%ebp) + movl 8(%eax,%edx), %eax + testb $15, %al + jne .L626 + testb $-16, %al + setne %al + movzbl %al, %eax + movl %eax, -372(%ebp) +.L626: + movl -372(%ebp), %ecx + movl $0, -328(%ebp) + movl $0, -332(%ebp) + movl $0, -292(%ebp) + sall $3, %ecx + movl %ecx, -300(%ebp) + movl $0, -364(%ebp) + jmp .L627 +.L628: + movl -324(%ebp), %eax + shrl %eax + cmpb $0, -305(%ebp) + leal (%eax,%eax,2), %eax + leal 16(%eax), %edx + movl %edx, -368(%ebp) + je .L629 + cmpl $0, -372(%ebp) + je .L631 + movl 12(%edi), %eax + movl %edx, %ecx + movl $152, %edx + call pci_read_config32_index_wait + andl $255, %eax + movl %eax, -364(%ebp) + jmp .L631 +.L629: + cmpl $0, -372(%ebp) + je .L631 + addl $48, %eax + movl %eax, -368(%ebp) +.L631: + movl (%edi), %eax + movl -324(%ebp), %ecx + movl -384(%ebp), %edx + leal 0(,%eax,8), %ebx + leal (%ebx,%ecx), %eax + testb $1, 728(%edx,%eax,4) + je .L634 + pushl %edx + movl -372(%ebp), %edx + movl %edi, %eax + call Get_RcvrSysAddr + movl -384(%ebp), %edx + popl %ecx + movl -304(%ebp), %ecx + movl %eax, -356(%ebp) + addl $16384, %eax + movl %eax, -288(%ebp) + leal (%ebx,%ecx), %eax + testb $1, 728(%edx,%eax,4) + je .L636 + pushl %edx + movl -372(%ebp), %edx + movl %edi, %eax + call Get_RcvrSysAddr + movl -312(%ebp), %ecx + popl %edx + xorl %edx, %edx + pushl -316(%ebp) + movl %eax, -360(%ebp) + addl $16384, %eax + movl %eax, -292(%ebp) + movl -356(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + movl $1, %edx + pushl -316(%ebp) + movl -288(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + xorl %edx, %edx + pushl -316(%ebp) + movl -360(%ebp), %eax + call Write1LTestPattern + movl -312(%ebp), %ecx + movl $1, %edx + pushl -316(%ebp) + movl -292(%ebp), %eax + call Write1LTestPattern + addl $16, %esp + movl $1, -344(%ebp) +.L638: + xorl %esi, %esi + cmpl $1, -380(%ebp) + je .L641 + movl -320(%ebp), %eax + movl -300(%ebp), %ecx + addl -304(%ebp), %eax + movzbl -1(%ecx,%eax), %esi +.L641: + movl $1, -340(%ebp) + jmp .L642 +.L643: + testl $1, %esi + movl $1, -348(%ebp) + movl $0, -352(%ebp) + jne .L646 + movl $0, -348(%ebp) + movl $1, -352(%ebp) +.L646: + movl 12(%edi), %eax + movl $152, %edx + movl -368(%ebp), %ecx + pushl %esi + call pci_write_config32_index_wait + cmpb $0, -305(%ebp) + popl %eax + je .L647 + movl -368(%ebp), %ecx + movl $152, %edx + movl 12(%edi), %eax + pushl %esi + addl $32, %ecx + call pci_write_config32_index_wait + popl %eax +.L647: + movl %esi, %edx + movl %edi, %eax + call SetMaxAL_RcvrDly + movl -356(%ebp), %eax + call Read1LTestPattern + movl -348(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -356(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5231 + pushl $TestPattern1.5230 + pushl $TestPattern0.5229 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -356(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + movl -288(%ebp), %eax + call Read1LTestPattern + movl -352(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -288(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5231 + pushl $TestPattern1.5230 + pushl $TestPattern0.5229 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -288(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + cmpl $0, -344(%ebp) + je .L652 + movl -360(%ebp), %eax + call Read1LTestPattern + movl -348(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -360(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5231 + pushl $TestPattern1.5230 + pushl $TestPattern0.5229 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -360(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + jne .L649 + movl -292(%ebp), %eax + call Read1LTestPattern + movl -352(%ebp), %ecx + pushl -376(%ebp) + pushl -380(%ebp) + movl -292(%ebp), %edx + movl -372(%ebp), %eax + pushl $TestPattern2.5231 + pushl $TestPattern1.5230 + pushl $TestPattern0.5229 + call CompareTestPatternQW0 + movl %eax, %ebx + movl -292(%ebp), %eax + call proc_IOCLFLUSH + movl %edi, %eax + call ResetDCTWrPtr + addl $20, %esp + testl %ebx, %ebx + je .L652 +.L649: + movl $1, -340(%ebp) +.L655: + movl -288(%ebp), %eax + incl %esi + movl -356(%ebp), %edx + movl -360(%ebp), %ecx + movl %eax, -356(%ebp) + movl -292(%ebp), %eax + movl %edx, -288(%ebp) + movl %ecx, -292(%ebp) + movl %eax, -360(%ebp) +.L642: + cmpl $174, %esi + jbe .L643 + jmp .L684 +.L657: + cmpl $174, %esi + jbe .L658 +.L659: + orl $13, -328(%ebp) + movl $174, %esi +.L658: + cmpl $2, -380(%ebp) + jne .L660 + movl -320(%ebp), %eax + movl -300(%ebp), %edx + addl -304(%ebp), %eax + movzbl -1(%edx,%eax), %eax + addl %eax, %esi + shrl %esi +.L660: + movl -320(%ebp), %eax + movl %esi, %ecx + movl -300(%ebp), %edx + addl -304(%ebp), %eax + movb %cl, -1(%edx,%eax) + movl 12(%edi), %eax + movl $152, %edx + movl -368(%ebp), %ecx + pushl %esi + call pci_write_config32_index_wait + cmpb $0, -305(%ebp) + popl %eax + je .L662 + movl -368(%ebp), %ecx + movl $152, %edx + movl 12(%edi), %eax + pushl %esi + addl $32, %ecx + call pci_write_config32_index_wait + cmpl $0, -372(%ebp) + popl %ebx + je .L662 + movl 12(%edi), %eax + movl $152, %edx + pushl -364(%ebp) + movl -368(%ebp), %ecx + call pci_write_config32_index_wait + cmpl -364(%ebp), %esi + popl %ecx + jbe .L665 + movl %esi, %eax + subl -364(%ebp), %eax + jmp .L667 +.L665: + movl -364(%ebp), %eax + subl %esi, %eax +.L667: + imull $50, %eax, %eax + cmpl -336(%ebp), %eax + jbe .L662 + orl $12, -328(%ebp) +.L662: + cmpl -332(%ebp), %esi + jbe .L634 + movl %esi, -332(%ebp) +.L634: + addl $2, -324(%ebp) + addl $2, -304(%ebp) +.L670: + cmpl $7, -324(%ebp) + ja .L672 + cmpl $0, -328(%ebp) + je .L628 +.L672: + incl -372(%ebp) + addl $8, -300(%ebp) +.L627: + cmpl $1, -372(%ebp) + ja .L673 + cmpl $0, -328(%ebp) + jne .L673 + movl $0, -324(%ebp) + movl $1, -304(%ebp) + jmp .L670 +.L673: + movl -332(%ebp), %edx + movl %edi, %eax + call SetMaxAL_RcvrDly + movl %edi, %eax + call ResetDCTWrPtr + movl 12(%edi), %ebx + movl $3320, %edx + shrl $4, %ebx + movl %ebx, %ecx + andl $268435452, %ecx + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $524288, -296(%ebp) + andl $-524289, %edi + orl -296(%ebp), %edi + movl %esi, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + cmpl $1, -380(%ebp) + jne .L675 + andl $268435452, %ebx + movl $3320, %edi + orl $-2147483528, %ebx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-262145, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L675 +.L636: + pushl -316(%ebp) + xorl %edx, %edx + movl -312(%ebp), %ecx + movl -356(%ebp), %eax + call Write1LTestPattern + movl -288(%ebp), %eax + movl $1, %edx + pushl -316(%ebp) + movl -312(%ebp), %ecx + call Write1LTestPattern + popl %eax + popl %edx + movl $0, -344(%ebp) + jmp .L638 +.L652: + cmpl $1, -340(%ebp) + je .L657 + movl $0, -340(%ebp) + jmp .L655 +.L684: + movl $11, -328(%ebp) + jmp .L659 +.L675: + call clear_wrap32dis +#APP + movl %cr4, %eax +#NO_APP + andb $253, %ah +#APP + movl %eax, %cr4 +#NO_APP + pushl %esi + pushl -332(%ebp) + pushl $.LC16 + pushl $7 + call do_printk + addl $16, %esp + xorl %eax, %eax + cmpl $174, -332(%ebp) + sete %al + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size train_DqsRcvrEn, .-train_DqsRcvrEn + .section .rom.data.str1.1 +.LC17: + .string "disabling dimm" + .section .rom.text + .type disable_dimm, @function +disable_dimm: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + subl $16, %esp + pushl $.LC17 + pushl $.LC5 + pushl $7 + movl %edx, -20(%ebp) + movl %ecx, -24(%ebp) + call do_printk + addl $12, %esp + pushl -20(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl -24(%ebp), %eax + addl $16, %esp + movl (%eax), %eax + testb $15, %al + movl %eax, -16(%ebp) + jne .L686 + testb $-16, %al + je .L686 + movl -20(%ebp), %esi + movl 12(%ebx), %edi + movl $3320, %ebx + movl %ebx, %edx + addl %esi, %esi + shrl $4, %edi + leal 80(,%esi,4), %eax + orl %edi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal 84(,%esi,4), %esi + orl %esi, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax + jmp .L692 +.L686: + movl 12(%ebx), %esi + movl $3320, %ebx + movl -20(%ebp), %ecx + movl %ebx, %edx + shrl $4, %esi + leal 64(,%ecx,8), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -20(%ebp), %edi + movl %ebx, %edx + addl %edi, %edi + leal 68(,%edi,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + imull $5, -20(%ebp), %eax + movl -24(%ebp), %ecx + cmpb $4, 8(%eax,%ecx) + jne .L689 + leal 80(,%edi,4), %eax + movl %ebx, %edx + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal 84(,%edi,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +.L692: + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP +.L689: + movb -20(%ebp), %cl + movl $-2, %eax + movl -24(%ebp), %edx + roll %cl, %eax + andl -16(%ebp), %eax + movl %eax, (%edx) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size disable_dimm, .-disable_dimm + .type print_raminit, @function +print_raminit: + pushl %ebp + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC11 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_raminit, .-print_raminit + .type print_linkn_in, @function +print_linkn_in: + pushl %ebp + movzbl %dl, %edx + movl %esp, %ebp + subl $8, %esp + pushl %edx + pushl %eax + pushl $.LC13 + pushl $7 + call do_printk + addl $16, %esp + leave + ret + .size print_linkn_in, .-print_linkn_in + .section .rom.data.str1.1 +.LC18: + .string "SBLink=" +.LC19: + .string "NC node|link=" +.LC20: + .string "\tbusn=" +.LC21: + .string "Detected error on Hypertransport Link\n" +.LC22: + .string "udev=" +.LC23: + .string "%08x" +.LC24: + .string "\tupos=" +.LC25: + .string "\tuoffs=" +.LC26: + .string "\tHT link capability not found\r\n" + .section .rom.text + .type ht_setup_chains_x, @function +ht_setup_chains_x: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + movl $3320, %esi + pushl %ebx + subl $188, %esp + movl %eax, -176(%ebp) + call get_nodes + movl %esi, %edx + movb %al, -137(%ebp) + movl $-2147434396, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + movl $.LC18, %eax + shrl $8, %ebx + movl %ebx, %edx + andl $3, %ebx + andl $3, %edx + call print_linkn_in + movl -176(%ebp), %eax + movzbl -137(%ebp), %edx + movl %ebx, 1832(%eax) + movl %edx, 1432(%eax) + movl $0, 1836(%eax) + movl $-2147434016, %eax + movl %edx, -172(%ebp) + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + movl %edi, %edx + sall $8, %eax + orl $1056964611, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434044, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + sall $4, %ebx + movl %edi, %edx + orb $48, %bh + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434048, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $51, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl $228, %edi + movl $204, %esi +.L698: + movl %edi, %eax + movl $3320, %ebx + andl $2147483644, %eax + movl %ebx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + xorl %ecx, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ebx, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + leal -4(%esi), %eax + movl %ebx, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $4, %edi + addl $8, %esi + cmpl $240, %edi + jne .L698 + movb $64, -138(%ebp) + movl $4, -136(%ebp) + movl $0, -48(%ebp) + jmp .L700 +.L701: + movzbl %al, %eax + movl %eax, -32(%ebp) + addl $24, %eax + andl $31, %eax + sall $15, %eax + movl %eax, -128(%ebp) + movl -136(%ebp), %eax + movl $0, -56(%ebp) + movl $152, -52(%ebp) + sall $12, %eax + addl $12288, %eax + movl %eax, -184(%ebp) +.L702: + movl -128(%ebp), %eax + movl $3320, %edx + shrl $4, %eax + orl -52(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $23, %eax + cmpl $7, %eax + jne .L703 + movb -32(%ebp), %dl + xorl %edi, %edi + movl $224, %ebx + movb -56(%ebp), %al + sall $4, %edx + andl $15, %eax + orl %eax, %edx + movl $.LC19, %eax + movzbl %dl, %edx + call print_linkn_in + movl -56(%ebp), %eax + movl -32(%ebp), %esi + sall $8, %eax + sall $4, %esi + orl $3, %eax + orl %eax, %esi +.L705: + movl %ebx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movzwl %ax,%ecx + movl %eax, %edx + movl %esi, %eax + andl $65535, %eax + cmpl %eax, %ecx + je .L706 + testl %ecx, %ecx + je .L706 + incl %edi + addl $4, %ebx + movl %edi, %edx + cmpb $4, %dl + jne .L705 + jmp .L710 +.L706: + andl $15, %edx + cmpl $3, %edx + je .L703 + movzbl -138(%ebp), %ebx + movl $.LC20, %eax + andl $255, %edi + movl %ebx, %edx + call print_linkn_in + leal 224(,%edi,4), %eax + movl $3320, %ecx + orl $-2147434240, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + addl $63, %ebx + sall $16, %eax + movb $-4, %dl + sall $24, %ebx + orl %ebx, %eax + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + leal 0(,%edi,8), %ebx + movl %ecx, %edx + leal 196(%ebx), %eax + addb $64, -138(%ebp) + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl -56(%ebp), %eax + movb $-4, %dl + sall $4, %eax + orl -32(%ebp), %eax + orl -184(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + leal 192(%ebx), %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl -136(%ebp), %eax + movb $-4, %dl + sall $12, %eax + orl $3, %eax +#APP + outl %eax, %dx +#NO_APP + addl $4, -136(%ebp) + addl $16384, -184(%ebp) +.L703: + incl -56(%ebp) + addl $32, -52(%ebp) + cmpl $3, -56(%ebp) + jne .L702 +.L710: + incl -48(%ebp) +.L700: + movl -172(%ebp), %ebx + cmpl %ebx, -48(%ebp) + movb -48(%ebp), %al + jne .L701 + movb $1, -168(%ebp) + jmp .L713 +.L714: + movb -168(%ebp), %al + movl $224, %esi + leal 24(%eax), %ebx + andl $31, %ebx + sall $15, %ebx + orb $16, %bh +.L715: + movl %esi, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %ebx, %edi + movl %ecx, %edx + shrl $4, %edi + movl %eax, -36(%ebp) + movl %edi, %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -36(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $4, %esi + cmpl $240, %esi + jne .L715 + movl $196, %ebx +.L717: + movl %ebx, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -40(%ebp) + movl %edi, %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -40(%ebp), %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + addl $8, %ebx + cmpl $228, %ebx + jne .L717 + movb $-64, %bl +.L719: + movl %ebx, %eax + movl $3320, %ecx + andl $2147483644, %eax + movl %ecx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -44(%ebp) + movl %edi, %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -44(%ebp), %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + addl $8, %ebx + cmpl $224, %ebx + jne .L719 + incb -168(%ebp) +.L713: + movb -137(%ebp), %bl + cmpb %bl, -168(%ebp) + jb .L714 + movb $0, -129(%ebp) + movl $224, %ecx +.L722: + movl %ecx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $15, %eax + cmpl $1, %eax + sbbb $-1, -129(%ebp) + addl $4, %ecx + cmpl $240, %ecx + jne .L722 + movl -176(%ebp), %edx + movzbl -129(%ebp), %eax + movb $0, -121(%ebp) + movl $0, 1820(%edx) + movl %eax, 1824(%edx) + jmp .L726 +.L727: + movzbl -121(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + leal 224(,%eax,4), %eax + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %eax, %edi + andl $240, %eax + andl $3840, %edi + shrl $4, %eax + addl $24, %eax + movl %eax, %edx + andl $31, %edx + sall $15, %edx + shrl $3, %edi + movl %edx, -96(%ebp) + shrl $4, %edx + movl %edx, -196(%ebp) + leal 148(%edi), %edx + orl %edx, -196(%ebp) + movl %ecx, %edx + orl $-2147483648, -196(%ebp) + movl -196(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -192(%ebp) + movl %ecx, %edx + movl -196(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ebx, %edx + andl $-16776961, -192(%ebp) + xorw %ax, %ax + shrl $8, %eax + orl %eax, -192(%ebp) + movl -192(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $16711680, %esi + movl %esi, %ebx + shrl $16, %ebx + leal -128(%edi), %esi + movb %bl, -120(%ebp) + movb $0, -88(%ebp) + movl $67504394, -92(%ebp) + jmp .L768 +.L729: + movzbl -25(%ebp), %esi + movl %edi, %eax + movl %ecx, -96(%ebp) + movb %al, -88(%ebp) +.L768: + movl %esi, %edx + movl -96(%ebp), %ebx + movzbl %dl, %edx + movl %edx, -60(%ebp) + movl -92(%ebp), %edx + shrl $4, %ebx + shrl $24, %edx + addl -60(%ebp), %edx + orl %edx, %ebx + movl $3320, %edx + movl %ebx, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + andl $2, %eax + leal 3324(%eax), %ebx + movl %ebx, %edx +#APP + inw %dx, %ax +#NO_APP + movzwl %ax, %edx + movl %eax, %edi + testb $64, %dl + jne .L730 + andl $272, %edx + je .L732 + movl %ecx, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + orw $272, %di + movl %ebx, %edx + movzwl %di, %eax +#APP + outw %ax, %dx +#NO_APP + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + testl $272, %edi + je .L732 + pushl %ebx + pushl $.LC21 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp + jmp .L735 +.L732: + testw $32, %di + je .L768 +.L735: + movzbl -120(%ebp), %ebx + movl $3320, %edx + sall $20, %ebx + movl %ebx, -64(%ebp) + shrl $4, %ebx + movl %ebx, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edx + leal -1(%eax), %eax + cmpl $-3, %eax + ja .L730 + cmpl $65535, %edx + je .L730 + cmpl $-65536, %edx + je .L730 + movl -64(%ebp), %eax + call ht_lookup_slave_capability + testb %al, %al + movb %al, -25(%ebp) + jne .L738 + pushl %ecx + pushl $.LC22 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -96(%ebp) + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC24 + pushl $.LC5 + pushl $3 + call do_printk + movl %esi, %edx + addl $12, %esp + movzbl %dl, %eax + pushl %eax + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC25 + pushl $.LC5 + pushl $3 + call do_printk + addl $12, %esp + pushl -92(%ebp) + pushl $.LC23 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC26 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp + jmp .L730 +.L738: + movzbl -25(%ebp), %eax + movl %ebx, %edi + movl $3320, %ebx + movl %ebx, %edx + movl %eax, %esi + addl $2, %esi + orl %esi, %edi + movl %edi, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %eax, -180(%ebp) + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx + andl $2, %edx + addw $3324, %dx + movw %dx, -186(%ebp) +#APP + inw %dx, %ax +#NO_APP + movl %eax, %edi + movb -88(%ebp), %al + movl %ebx, %edx + andl $-32, %edi + andl $31, %eax + orl %eax, %edi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movzwl %di, %eax + movw -186(%ebp), %dx +#APP + outw %ax, %dx +#NO_APP + movb -88(%ebp), %cl + shrw $5, %di + movb -88(%ebp), %dl + movl %edi, %eax + andl $31, %eax + andl $31, %ecx + sall $15, %ecx + orl -64(%ebp), %ecx + leal (%edx,%eax), %edi + movl %ebx, %edx + movl %ecx, %eax + shrl $4, %eax + orl %esi, %eax + movl %eax, -192(%ebp) + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl -192(%ebp), %edx + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + inw %dx, %ax +#NO_APP + movl -176(%ebp), %ebx + testb $4, %ah + movl 1820(%ebx), %eax + je .L740 + imull $24, %eax, %eax + leal 1424(%eax,%ebx), %eax + movl -96(%ebp), %ebx + leal 12(%eax), %edx + movl %ecx, 12(%edx) + movl $134877458, 20(%edx) + movl %ebx, 12(%eax) + movl -60(%ebp), %eax + movl -92(%ebp), %ebx + movl $67505422, -92(%ebp) + movl %eax, 4(%edx) + movl -180(%ebp), %eax + movl %ebx, 8(%edx) + movl %eax, 16(%edx) + movl -176(%ebp), %edx + incl 1820(%edx) +.L742: + movl %edi, %ebx + cmpb %bl, -88(%ebp) + jne .L729 +.L730: + incb -121(%ebp) +.L726: + movb -129(%ebp), %al + cmpb %al, -121(%ebp) + jne .L727 + movl -176(%ebp), %edx + movl 1836(%edx), %ecx + andl $4095, %ecx + sall $20, %ecx + movl %ecx, %ebx + orl $1044480, %ebx + jmp .L744 +.L745: + movl %ecx, %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57217246, %eax + je .L746 + addl $4096, %ecx +.L744: + cmpl %ebx, %ecx + jbe .L745 + orl $-1, %ecx +.L746: + movl -176(%ebp), %ebx + shrl $15, %ecx + andl $31, %ecx + movl %ecx, 1828(%ebx) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L740: + movl -176(%ebp), %edx + imull $24, %eax, %eax + movl -96(%ebp), %ebx + leal 1424(%eax,%edx), %eax + leal 12(%eax), %edx + movl %ebx, 12(%eax) + movl -60(%ebp), %eax + movl -92(%ebp), %ebx + movl %ecx, 12(%edx) + movl $67505422, 20(%edx) + movl %eax, 4(%edx) + movl -180(%ebp), %eax + movl %ebx, 8(%edx) + movl $134877458, -92(%ebp) + movl %eax, 16(%edx) + movl -176(%ebp), %edx + incl 1820(%edx) + jmp .L742 + .size ht_setup_chains_x, .-ht_setup_chains_x + .type die, @function +die: + pushl %ebp + movl %esp, %ebp + subl $12, %esp + pushl %eax + pushl $.LC5 + pushl $0 + call do_printk + addl $16, %esp +.L770: +#APP + hlt +#NO_APP + jmp .L770 + .size die, .-die + .section .rom.data.str1.1 +.LC27: + .string " Unknown\r\n" + .section .rom.text + .type set_TT, @function +set_TT: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + movl %eax, %ebx + subl $12, %esp + movl 28(%ebp), %esi + cmpl 20(%ebp), %esi + movl %ecx, -16(%ebp) + movl 12(%ebp), %edi + jb .L775 + cmpl 24(%ebp), %esi + jbe .L773 +.L775: + pushl %eax + pushl 32(%ebp) + pushl $.LC5 + pushl $3 + call do_printk + movl $.LC27, %eax + call die + addl $16, %esp +.L773: + movl 12(%ebx), %ebx + movl $3320, %edx + movl -16(%ebp), %eax + movl %ebx, -20(%ebp) + shrl $4, -20(%ebp) + orl %eax, -20(%ebp) + andl $2147483644, -20(%ebp) + orl $-2147483648, -20(%ebp) + movl -20(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movb 8(%ebp), %cl + movb $-8, %dl + sall %cl, %edi + notl %edi + andl %edi, %eax + movl %eax, -24(%ebp) + movl -20(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + subl 16(%ebp), %esi + movl %ebx, %edx + sall %cl, %esi + orl %esi, -24(%ebp) + movl -24(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size set_TT, .-set_TT + .section .rom.data.str1.1 +.LC28: + .string "No memory?" +.LC29: + .string "RAM: 0x" +.LC30: + .string " KB\r\n" + .section .rom.text + .type set_top_mem, @function +set_top_mem: + pushl %ebp + testl %eax, %eax + movl %esp, %ebp + pushl %esi + movl %edx, %esi + pushl %ebx + movl %eax, %ebx + jne .L778 + movl $.LC28, %eax + call die + pushl %eax + pushl $.LC29 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $0 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC30 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L780 +.L778: + pushl %eax + pushl $.LC29 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC30 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + cmpl $4194304, %ebx + jbe .L781 + movl %ebx, %eax + movl $-1073676259, %ecx + shrl $22, %ebx + sall $10, %eax + movl %ebx, %edx +#APP + wrmsr +#NO_APP + jmp .L783 +.L781: + cmpl $4128767, %ebx + jbe .L780 +.L783: + testl %esi, %esi + movl %esi, %ebx + jne .L780 + movl $4128768, %ebx +.L780: + movl %ebx, %eax + movl $-1073676262, %ecx + shrl $22, %ebx + sall $10, %eax + movl %ebx, %edx +#APP + wrmsr +#NO_APP + leal -8(%ebp), %esp + popl %ebx + popl %esi + popl %ebp + ret + .size set_top_mem, .-set_top_mem + .section .rom.data.str1.1 +.LC31: + .string "No memory for this cpu\r\n" +.LC32: + .string "Bad RANK Size --\r\n" +.LC33: + .string "Bad SPD value\r\n" +.LC34: + .string "Registered\r\n" +.LC35: + .string "Unbuffered\r\n" +.LC36: + .string "min_cycle_time to low" +.LC37: + .string "spd_set_dram_timing dimm_err!\n" +.LC38: + .string "TrwtTO" +.LC39: + .string "Twrrd" +.LC40: + .string "Twrwr" +.LC41: + .string "Trdrd" +.LC42: + .string "FourActWindow" +.LC43: + .string "DcqBypassMax" +.LC44: + .string "set_ecc spd_device: 0x%x\n" +.LC45: + .string "RdWrQByp" +.LC46: + .string "Interleaved\r\n" +.LC47: + .string "Interleaving disabled\r\n" +.LC48: + .string "Unrecoverable error reading SPD data. No qualified DIMMs?" + .section .rom.text + .type sdram_set_spd_registers, @function +sdram_set_spd_registers: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $236, %esp + movl %eax, -200(%ebp) + movl (%eax), %eax + cmpb $0, (%edx,%eax) + je .L1082 + imull $48, %eax, %eax + xorl %ebx, %ebx + xorl %esi, %esi + leal 8(%edx,%eax), %eax + movl %eax, -196(%ebp) +.L790: + movl -200(%ebp), %edx + movw 20(%edx,%esi,2), %ax + testw %ax, %ax + je .L791 + movzwl %ax, %eax + movl $2, %edx + call spd_read_byte + cmpl $8, %eax + jne .L791 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, %ebx +.L791: + movl -200(%ebp), %edx + movw 28(%edx,%esi,2), %ax + testw %ax, %ax + je .L794 + movzwl %ax, %eax + movl $2, %edx + call spd_read_byte + cmpl $8, %eax + jne .L794 + leal 4(%esi), %ecx + movb $1, %al + sall %cl, %eax + orl %eax, %ebx +.L794: + incl %esi + cmpl $4, %esi + jne .L790 + movl -196(%ebp), %ecx + testb %bl, %bl + movl %ebx, (%ecx) + jne .L798 + pushl %eax + pushl $.LC31 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1082 +.L798: + movl %ebx, %eax + shrl $4, %ebx + andl $15, %eax + andl $15, %ebx + cmpl %ebx, %eax + jne .L800 + movl -200(%ebp), %ebx + movl $3320, %edx + movl 16(%ebx), %eax + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + movl $0, -184(%ebp) + jne .L803 + jmp .L800 +.L804: + movb -184(%ebp), %cl + movl $1, %eax + movl -196(%ebp), %ebx + sall %cl, %eax + testl %eax, (%ebx) + je .L805 + movzwl %dx, %edx + movl -184(%ebp), %eax + xorl %edi, %edi + movl %edx, -188(%ebp) + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %eax + movl %eax, -192(%ebp) +.L807: + movzbl addresses.4206(%edi), %ebx + movl -188(%ebp), %eax + movl %ebx, %edx + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + js .L808 + movl -192(%ebp), %eax + movl %ebx, %edx + call spd_read_byte + testl %eax, %eax + js .L808 + cmpl %eax, %esi + jne .L800 + incl %edi + cmpl $24, %edi + jne .L807 +.L805: + incl -184(%ebp) + cmpl $4, -184(%ebp) + je .L812 +.L803: + movl -184(%ebp), %ecx + movl -200(%ebp), %ebx + movw 20(%ebx,%ecx,2), %dx + testw %dx, %dx + jne .L804 +.L812: + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %edi + orl $2304, %edi + shrl $4, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1025, %esi + movl %ebx, %edx + orl $2048, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + movl (%ecx), %eax + movb $1, 43(%ecx) + jmp .L813 +.L800: + movl -196(%ebp), %ebx + movl (%ebx), %ecx + movb $0, 43(%ebx) + movb $0, 44(%ebx) + movl %ecx, %edx + movl %ecx, %eax + shrl $4, %edx + andl $15, %eax + andl $15, %edx + cmpl %edx, %eax + je .L814 + testl %edx, %edx + je .L816 + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %esi + shrl $4, %esi + movl %esi, %ebx + andl $268435452, %ebx + orl $-2147483488, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $16, %edi + movb $-4, %dl + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %ebx + movl %ecx, %edx + andl $268435452, %ebx + orl $-2147483504, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, -248(%ebp) + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -248(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + movb $1, 44(%ecx) + jmp .L816 +.L814: + movl -196(%ebp), %ebx + andb $15, %cl + movl %ecx, (%ebx) +.L816: + movl -196(%ebp), %edx + movl (%edx), %eax +.L813: + movl -196(%ebp), %ecx + movl %eax, (%ecx) + incl %eax + je .L818 + movl $0, -180(%ebp) + movl $2, -48(%ebp) + movl $84, -216(%ebp) + movl $80, -220(%ebp) + movl $68, -224(%ebp) + movl $84, -228(%ebp) + movl $80, -232(%ebp) + movl %ecx, -236(%ebp) +.L820: + movl -180(%ebp), %ebx + movl -200(%ebp), %eax + movl -196(%ebp), %edx + movb -180(%ebp), %cl + movw 20(%eax,%ebx,2), %si + movl (%edx), %ebx + movl $1, %edx + movl %edx, %eax + sall %cl, %eax + testl %eax, %ebx + je .L821 + movzwl %si, %ebx + jmp .L823 +.L821: + movl -180(%ebp), %ecx + addl $4, %ecx + sall %cl, %edx + testl %edx, %ebx + je .L824 + movl -180(%ebp), %eax + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx +.L823: + movl -236(%ebp), %eax + movl -180(%ebp), %ecx + movl -236(%ebp), %edx + addl $4, %eax + movl %eax, -152(%ebp) + movl %ecx, -156(%ebp) + movb $0, 4(%edx) + movl $3, %edx + movb $0, 1(%eax) + movb $0, 2(%eax) + movb $0, 4(%eax) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + testb %al, %al + je .L828 + movl -152(%ebp), %ecx + movl $4, %edx + addb %al, (%ecx) + movb %al, 1(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + testb %al, %al + je .L828 + movl -152(%ebp), %ecx + movl $17, %edx + addb %al, (%ecx) + movb %al, 2(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax + je .L828 +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -152(%ebp), %edx + addb %al, (%edx) + movb %al, 3(%edx) + movl $6, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax + cmpl $72, %eax + je .L836 + cmpl $64, %eax + jne .L828 +.L836: +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -236(%ebp), %ecx + movl $5, %edx + addb 4(%ecx), %al + subl $3, %eax + movb %al, 4(%ecx) + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $7, %eax + cmpl $1, %eax + leal 1(%eax), %edx + jbe .L839 + cmpl $4, %edx + jne .L828 +.L839: + movl -152(%ebp), %eax + movb %dl, 4(%eax) + movl $31, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L826 + andl $255, %eax +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + cmpl $4, %eax + jg .L841 + addl $8, %eax +.L841: + movl -236(%ebp), %ecx + leal 22(%eax), %edx + movzbl 4(%ecx), %eax + cmpl %eax, %edx + je .L843 + pushl %eax + pushl $.LC32 + pushl $.LC5 + pushl $3 + call do_printk + addl $16, %esp +.L828: + movl $.LC33, %eax + call die +.L826: + movl -152(%ebp), %ebx + movb $0, (%ebx) + movb $0, 1(%ebx) + movb $0, 2(%ebx) + movb $0, 3(%ebx) + movb $0, 4(%ebx) +.L843: + movl -152(%ebp), %eax + movb (%eax), %al + testb %al, %al + movb %al, -173(%ebp) + je .L845 + xorl %ebx, %ebx + cmpb $26, %al + jbe .L849 + movzbl %al, %ecx + movb $1, %bl + subl $8, %ecx + sall %cl, %ebx + orl $1, %ebx +.L849: + movl -152(%ebp), %edx + movb 4(%edx), %dl + movb %dl, -157(%ebp) + xorl %edx, %edx + cmpb $1, -157(%ebp) + jbe .L852 + movzbl -173(%ebp), %ecx + movb $1, %dl + subl $8, %ecx + sall %cl, %edx + orl $1, %edx +.L852: + movl -196(%ebp), %ecx + movb 43(%ecx), %cl + testb %cl, %cl + movb %cl, -158(%ebp) + je .L853 + leal (%ebx,%ebx), %eax + andl $1, %ebx + orl %eax, %ebx + leal (%edx,%edx), %eax + andl $1, %edx + orl %eax, %edx +.L853: + movl %ebx, %esi + movl -196(%ebp), %ebx + movl %edx, %edi + andl $536346625, %esi + andl $536346625, %edi + movl (%ebx), %ebx + movl %ebx, -164(%ebp) + andl $15, %ebx + movl %ebx, -168(%ebp) + jne .L855 + testb $-16, -164(%ebp) + je .L855 + movl -200(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + movl 12(%eax), %ebx + movl -232(%ebp), %eax + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + orl -228(%ebp), %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, %eax + jmp .L1117 +.L855: + movl -200(%ebp), %ecx + movl -180(%ebp), %edx + movl 12(%ecx), %ebx + movl $3320, %ecx + leal 64(,%edx,8), %eax + movl %ecx, %edx + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -224(%ebp), %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + cmpb $4, -157(%ebp) + jne .L858 + movl -220(%ebp), %eax + movl %ecx, %edx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + orl -216(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +.L1117: + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP +.L858: + testl %esi, %esi + je .L860 + cmpl $0, -168(%ebp) + jne .L862 + testb $-16, -164(%ebp) + je .L862 + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %edi + orl $2560, %edi + shrl $4, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movb $-8, %dl + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movb -180(%ebp), %cl + movl $-1577058304, %eax + movl %ebx, %edx + shrl %cl, %eax + notl %eax + andl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L865 +.L862: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %ecx + shrl $4, %ecx + movl %ecx, %ebx + andl $268435452, %ebx + orl $-2147483512, %ebx + movl %ecx, -172(%ebp) + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movb -180(%ebp), %cl + movl $-1577058304, %edi + movl %edi, %esi + shrl %cl, %esi + notl %esi + andl %esi, %eax + cmpb $4, -157(%ebp) + movl %eax, -240(%ebp) + jne .L866 + movb -48(%ebp), %cl + movl %edi, %eax + shrl %cl, %eax + notl %eax + andl %eax, -240(%ebp) +.L866: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + cmpb $0, -158(%ebp) + je .L860 + movl -172(%ebp), %ebx + movb $-8, %dl + andl $268435452, %ebx + orl $-2147483488, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl %esi, %eax + cmpb $4, -157(%ebp) + movl %eax, -240(%ebp) + jne .L869 + movb -48(%ebp), %cl + shrl %cl, %edi + notl %edi + andl %edi, %eax + movl %eax, -240(%ebp) +.L869: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP +.L860: + cmpl $0, -168(%ebp) + jne .L871 + testb $-16, -164(%ebp) + je .L871 +.L865: + movl -48(%ebp), %edx + movl %edx, -156(%ebp) +.L871: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %esi + orl $2048, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl -156(%ebp), %edi + movl $15, %edx + movl %eax, %ebx + movl %edx, %eax + sall $2, %edi + movl %edi, %ecx + sall %cl, %eax + notl %eax + andl %eax, %ebx + cmpb $4, -157(%ebp) + jne .L873 + leal 8(%edi), %ecx + sall %cl, %edx + notl %edx + andl %edx, %ebx +.L873: + cmpb $26, -173(%ebp) + jbe .L875 + movl -152(%ebp), %eax + movl -152(%ebp), %ecx + movzbl 1(%eax), %eax + movl %eax, -248(%ebp) + movzbl 3(%ecx), %edx + leal (%eax,%eax,2), %eax + movzbl 2(%ecx), %ecx + imull $12, %edx, %edx + leal cs_map_aaa.3888(%eax,%edx), %eax + movzbl -72(%eax,%ecx), %edx + movl %edi, %ecx + movl %edx, %eax + sall %cl, %eax + orl %eax, %ebx + cmpb $4, -157(%ebp) + jne .L875 + leal 8(%edi), %ecx + sall %cl, %edx + orl %edx, %ebx +.L875: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L824: + incl -180(%ebp) + addl $5, -236(%ebp) + addl $8, -232(%ebp) + addl $8, -228(%ebp) + addl $8, -224(%ebp) + addl $8, -220(%ebp) + addl $8, -216(%ebp) + incl -48(%ebp) + cmpl $4, -180(%ebp) + jne .L820 + movl -196(%ebp), %edx + movl (%edx), %eax + incl %eax + je .L818 + xorl %ebx, %ebx + movl $0, -148(%ebp) +.L880: + movl -196(%ebp), %edx + movl -200(%ebp), %ecx + movl (%edx), %esi + movl $1, %edx + movw 20(%ecx,%ebx,2), %ax + movl %edx, %edi + movb %bl, %cl + sall %cl, %edi + testl %edi, %esi + je .L881 + movzwl %ax, %eax + jmp .L883 +.L881: + leal 4(%ebx), %ecx + sall %cl, %edx + testl %edx, %esi + je .L884 + movl -200(%ebp), %edx + movzwl 28(%edx,%ebx,2), %eax +.L883: + movl $20, %edx + call spd_read_byte + testl %eax, %eax + js .L1001 + andl $63, %eax + cmpl $1, %eax + je .L889 + cmpl $16, %eax + jne .L884 +.L889: + orl %edi, -148(%ebp) +.L884: + incl %ebx + cmpl $4, %ebx + jne .L880 + movl -200(%ebp), %ecx + movl 16(%ecx), %eax + movl $3320, %ecx + movl %ecx, %edx + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -200(%ebp), %ebx + movl %ecx, %edx + movl 12(%ebx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -196(%ebp), %ebx + movl %eax, %ecx + andl $-65537, %ecx + movb $1, 41(%ebx) + cmpl $0, -148(%ebp) + jne .L891 + orl $65536, %ecx + movb $0, 41(%ebx) +.L891: + movl -200(%ebp), %edx + movl 12(%edx), %eax + movl $3320, %edx + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + cmpb $0, 41(%edx) + je .L893 + pushl %eax + pushl $.LC34 + jmp .L1118 +.L893: + pushl %eax + pushl $.LC35 +.L1118: + pushl $.LC5 + pushl $7 + call do_printk + movl -196(%ebp), %ecx + addl $16, %esp + movl (%ecx), %eax + incl %eax + je .L818 + movl -200(%ebp), %ebx + movl $3320, %edx + movl 16(%ebx), %eax + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $5, %eax + xorl %ecx, %ecx + andl $3, %eax + movl $2, %edx + movzwl min_cycle_times.4311(%eax,%eax), %ebx + movl $397, %eax + call read_option + movzwl min_cycle_times.4311(%eax,%eax), %eax + cmpl %ebx, %eax + movl %eax, -128(%ebp) + jae .L897 + movl %ebx, -128(%ebp) +.L897: + movl $3, -132(%ebp) + movl $0, -52(%ebp) +.L898: + movl -196(%ebp), %ecx + movl -52(%ebp), %eax + movl -200(%ebp), %edx + movl (%ecx), %ebx + movb -52(%ebp), %cl + movw 20(%edx,%eax,2), %si + movl $1, %edx + movl %edx, %eax + sall %cl, %eax + testl %eax, %ebx + je .L899 + movzwl %si, %esi + movl %esi, -144(%ebp) + jmp .L901 +.L899: + movl -52(%ebp), %ecx + addl $4, %ecx + sall %cl, %edx + testl %edx, %ebx + je .L902 + movl -52(%ebp), %ebx + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %ebx + movl %ebx, -144(%ebp) +.L901: + movl -144(%ebp), %eax + movl $18, %edx + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + jle .L902 +#APP + bsrl %eax, %edi + jnz 1f + movl $-1, %edi + 1: + +#NO_APP + leal -2(%edi), %ebx + movl $1280, -136(%ebp) + movl $6, -140(%ebp) +.L905: + leal -3(%ebx), %eax + cmpl $3, %eax + ja .L906 + movl %esi, %eax + movb %bl, %cl + sarl %cl, %eax + testb $1, %al + je .L906 + movl %edi, %eax + negl %eax + movzbl latency_indicies.4310+2(%ebx,%eax), %edx + movl -144(%ebp), %eax + call spd_read_byte + testl %eax, %eax + js .L845 + call convert_to_linear + cmpl -128(%ebp), %eax + jb .L906 + cmpl -136(%ebp), %eax + jl .L912 + jne .L906 + cmpl %ebx, -140(%ebp) + jle .L906 +.L912: + movl %eax, -136(%ebp) + movl %ebx, -140(%ebp) +.L906: + cmpl %edi, %ebx + je .L916 + incl %ebx + jmp .L905 +.L916: + cmpl $6, -140(%ebp) + jg .L902 + movl -136(%ebp), %ebx + cmpl %ebx, -128(%ebp) + jae .L919 + movl %ebx, -128(%ebp) +.L919: + movl -132(%ebp), %eax + cmpl %eax, -140(%ebp) + jbe .L902 + movl -140(%ebp), %edx + movl %edx, -132(%ebp) +.L902: + incl -52(%ebp) + cmpl $4, -52(%ebp) + jne .L898 + xorl %edi, %edi +.L922: + movl -196(%ebp), %eax + movl $1, %edx + movl -200(%ebp), %ecx + movl (%eax), %ebx + movl %edx, %eax + movw 20(%ecx,%edi,2), %si + movl %edi, %ecx + sall %cl, %eax + testl %eax, %ebx + je .L923 + movzwl %si, %esi + jmp .L925 +.L923: + leal 4(%edi), %ecx + sall %cl, %edx + testl %edx, %ebx + je .L926 + movl -200(%ebp), %ebx + movzwl 28(%ebx,%edi,2), %esi +.L925: + movl $18, %edx + movl %esi, %eax + call spd_read_byte + cmpl $0, %eax + movl %eax, %edx + jl .L845 + je .L926 +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + xorl %ebx, %ebx + leal -2(%eax), %ecx +.L930: + movl %edx, %eax + sarl %cl, %eax + testb $1, %al + je .L931 + cmpl -132(%ebp), %ecx + je .L933 +.L931: + incl %ebx + cmpl $3, %ebx + je .L934 + incl %ecx + jmp .L930 +.L933: + movzbl latency_indicies.4310(%ebx), %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L845 + call convert_to_linear + cmpl -128(%ebp), %eax + jbe .L926 +.L934: + movl -196(%ebp), %ecx + movl %edi, %edx + movl -200(%ebp), %eax + call disable_dimm + movl -196(%ebp), %edx + movl %eax, (%edx) +.L926: + incl %edi + cmpl $4, %edi + jne .L922 + movl $speed, %edx + jmp .L938 +.L939: + movzwl 24(%edi), %eax + leal 24(%edi), %edx + cmpl %eax, -128(%ebp) + ja .L940 +.L938: + cmpw $0, (%edx) + movl %edx, %edi + jne .L939 + movl $.LC36, %eax + call die +.L940: + movl -200(%ebp), %ecx + movl 12(%ecx), %ebx + orl $2368, %ebx + shrl $4, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %ebx, -248(%ebp) + movl $3320, %ebx + movl -248(%ebp), %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-8, %ecx + movl %esi, %edx + orl 8(%edi), %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + pushl %eax + leal 12(%edi), %eax + pushl %eax + pushl $.LC5 + pushl $7 + call do_printk + movl -200(%ebp), %ecx + movl %ebx, %edx + movl 12(%ecx), %eax + orl $2176, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -248(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl -132(%ebp), %eax + andl $-8, %ecx + movl %esi, %edx + decl %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %ecx + addl $16, %esp + movl (%ecx), %eax + incl %eax + je .L818 +.L909: + movl 8(%edi), %eax + movl -196(%ebp), %edx + movb %al, 45(%edx) + leal -36(%ebp), %eax + pushl $24 + pushl %edi + pushl %eax + call memcpy + movl 8(%edi), %ebx + movl $-1073676222, %ecx + movzbl -34(%ebp), %esi +#APP + rdmsr +#NO_APP + andl $63, %eax + addl $12, %esp + shrl %eax + cmpl $12, %eax + jle .L943 + movl %esi, %ecx + movzbl %cl, %eax + jmp .L945 +.L943: + cmpl $3, %ebx + jle .L946 + movl %esi, %ebx + movzbl %bl, %eax + jmp .L945 +.L946: + movzbl dv_a.4275(%ebx,%eax,4), %eax +.L945: + movb %al, -34(%ebp) + movl $0, -124(%ebp) + movl $4, -56(%ebp) +.L948: + movl -196(%ebp), %eax + movl $1, %edi + movb -124(%ebp), %cl + movl $1, -240(%ebp) + movl (%eax), %edx + sall %cl, %edi + movl %edx, %esi + andl %edi, %esi + jne .L949 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L951 +.L949: + movl -124(%ebp), %eax + testl %esi, %esi + movl -200(%ebp), %ecx + movzwl 20(%ecx,%eax,2), %ebx + jne .L952 + movb -56(%ebp), %cl + sall %cl, -240(%ebp) + testl %edx, -240(%ebp) + je .L952 + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx +.L952: + movl $41, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + movl %eax, %esi + js .L969 + movl $40, %edx + movl %ebx, %eax + call spd_read_byte + movzbl -34(%ebp), %edx + movl %edx, %ebx + sarl $4, %eax + andl $7, %eax + movzbl fraction.4411(%eax), %eax + leal (%eax,%esi,4), %eax + imull $10, %eax, %eax + leal -1(%eax,%edx), %ecx + movl %ecx, %eax + cltd + idivl %ebx + cmpl $10, %eax + movl %eax, %esi + ja .L957 + movl $11, %esi + jmp .L959 +.L957: + xorl %ebx, %ebx + cmpl $26, %eax + ja .L961 +.L959: + movl -200(%ebp), %eax + movl $3320, %edx + movl 12(%eax), %ecx + orl $2176, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $16, %eax + andl $15, %eax + addl $11, %eax + cmpl %esi, %eax + jae .L962 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal -11(%esi), %eax + andl $-983041, %ebx + sall $16, %eax + movb $-4, %dl + orl %eax, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L962 +.L1112: + pushl $5 + movl -196(%ebp), %edx + pushl $2 + movl -124(%ebp), %ecx + pushl $2 + movl -200(%ebp), %eax + pushl $3 + pushl $22 + pushl $28 + pushl $136 + pushl (%edx) + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + movl -196(%ebp), %ecx + movl -124(%ebp), %ebx + movl -200(%ebp), %eax + movl (%ecx), %edx + movzwl 20(%eax,%ebx,2), %esi + testl %edi, %edx + jne .L966 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L966 + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L966: + movl $30, %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L969 + sall $2, %eax + movzbl -34(%ebp), %edx + imull $10, %eax, %eax + movl %edx, %ebx + leal -1(%eax,%edx), %ecx + movl %ecx, %eax + cltd + idivl %ebx + cmpl $4, %eax + movl %eax, %esi + ja .L971 + movl $5, %esi + jmp .L973 +.L971: + xorl %ebx, %ebx + cmpl $18, %eax + ja .L961 +.L973: + movl -200(%ebp), %eax + movl $3320, %edx + movl 12(%eax), %ecx + orl $2176, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + shrl $12, %eax + andl $15, %eax + addl $3, %eax + cmpl %esi, %eax + jae .L975 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + leal -3(%esi), %eax + andb $15, %bh + sall $12, %eax + movb $-4, %dl + orl %eax, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L975 +.L969: + orl $-1, %ebx + jmp .L961 +.L1113: + movl -196(%ebp), %edx + cmpb $0, 43(%edx) + jne .L978 + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + xorl %ecx, %ecx + testb $4, %ah + jne .L981 +.L978: + movl $2, %ecx +.L981: + leal 3(%ecx), %eax + movl -196(%ebp), %ebx + pushl %eax + movl -200(%ebp), %eax + leal 2(%ecx), %edx + movl -124(%ebp), %ecx + pushl %edx + pushl %edx + pushl $1 + pushl $11 + pushl $38 + pushl $136 + pushl (%ebx) + leal -36(%ebp), %esi + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + pushl $6 + movl -196(%ebp), %eax + movl %esi, %edx + pushl $3 + movl -124(%ebp), %ecx + pushl $3 + pushl $3 + pushl $20 + pushl $36 + pushl $136 + pushl (%eax) + movl -200(%ebp), %eax + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jle .L961 + movl -196(%ebp), %ecx + movl -124(%ebp), %ebx + movl -200(%ebp), %eax + movl (%ecx), %edx + movzwl 20(%eax,%ebx,2), %esi + testl %edi, %edx + jne .L984 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L984 + movl -200(%ebp), %eax + movzwl 28(%eax,%ebx,2), %esi +.L984: + movl $12, %edx + movl %esi, %eax + call spd_read_byte + testl %eax, %eax + js .L987 + movl -200(%ebp), %edx + decl %eax + sete %al + movzbl %al, %esi + addl $2, %esi + movl 12(%edx), %ecx + movl $3320, %edx + orl $2240, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + andl $-196609, %ebx + sall $16, %esi + orl %esi, %ebx + cmpl %ebx, %eax + je .L992 + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L992 +.L1114: + movl -124(%ebp), %edx + movl -200(%ebp), %ecx + movl -196(%ebp), %eax + movzwl 20(%ecx,%edx,2), %ebx + movl (%eax), %edx + testl %edi, %edx + jne .L995 + movb -56(%ebp), %cl + movl $1, %eax + sall %cl, %eax + testl %eax, %edx + je .L995 + movl -124(%ebp), %eax + movl $2, %esi + movl -200(%ebp), %edx + movzwl 28(%edx,%eax,2), %ebx + jmp .L998 +.L995: + xorl %esi, %esi +.L998: + movl $13, %edx + movl %ebx, %eax + call spd_read_byte + testl %eax, %eax + js .L987 +#APP + bsrl %eax, %edx + jnz 1f + movl $-1, %edx + 1: + +#NO_APP + imull $5, -56(%ebp), %eax + movl -196(%ebp), %ecx + movl -200(%ebp), %ebx + movzbl -16(%eax,%ecx), %eax + leal -25(%eax), %edi + movl $6, %eax + subl %edx, %eax + movl $3320, %edx + subl %eax, %edi + movl 12(%ebx), %eax + orl $2240, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -240(%ebp) +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %esi, %edx + movl %eax, %ebx + movzbl %dl, %eax + addl -124(%ebp), %eax + leal (%eax,%eax,2), %eax + leal 20(%eax), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + andl $7, %eax + cmpl %edi, %eax + jae .L951 + movl $3320, %edx + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $7, %eax + movb $-4, %dl + sall %cl, %eax + notl %eax + andl %eax, %ebx + sall %cl, %edi + orl %edi, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L951 +.L961: + pushl %esi + pushl %esi + pushl $.LC37 + pushl $7 + call do_printk + addl $16, %esp + testl %ebx, %ebx + js .L1001 + movl -124(%ebp), %edx + movl -196(%ebp), %ecx + movl -200(%ebp), %eax + call disable_dimm + movl -196(%ebp), %edx + movl %eax, (%edx) +.L951: + incl -124(%ebp) + incl -56(%ebp) + cmpl $4, -124(%ebp) + jne .L948 + movl -196(%ebp), %ecx + movl $2, %esi + movl -196(%ebp), %edi + movl $0, -104(%ebp) + movl $0, -108(%ebp) + movl (%ecx), %ecx + addl $8, %edi + movl $0, -112(%ebp) + movl $0, -116(%ebp) + movl %ecx, -120(%ebp) +.L1004: + movl -200(%ebp), %ebx + movl $1, %edx + leal -2(%esi), %ecx + movw 16(%ebx,%esi,2), %ax + movl %edx, %ebx + sall %cl, %ebx + testl %ebx, -120(%ebp) + je .L1005 + movzwl %ax, %eax + jmp .L1007 +.L1005: + leal 2(%esi), %ecx + sall %cl, %edx + testl %edx, -120(%ebp) + je .L1008 + movl -200(%ebp), %edx + movzwl 24(%edx,%esi,2), %eax +.L1007: + cmpb $1, (%edi) + jne .L1010 + orl %ebx, -112(%ebp) +.L1010: + cmpb $10, -2(%edi) + jne .L1012 + orl %ebx, -116(%ebp) +.L1012: + movl $13, %edx + call spd_read_byte + movb (%edi), %dl + cmpl $4, %eax + jne .L1014 + orl %ebx, -104(%ebp) + cmpb $4, %dl + jne .L1008 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, -104(%ebp) + jmp .L1008 +.L1014: + cmpl $16, %eax + jne .L1008 + orl %ebx, -108(%ebp) + cmpb $4, %dl + jne .L1008 + movb $1, %al + movl %esi, %ecx + sall %cl, %eax + orl %eax, -108(%ebp) +.L1008: + incl %esi + addl $5, %edi + cmpl $6, %esi + jne .L1004 + movl -196(%ebp), %ebx + movl -104(%ebp), %eax + movl -112(%ebp), %ecx + movl -108(%ebp), %edx + movl %eax, 24(%ebx) + movl -116(%ebp), %eax + movl %ecx, 32(%ebx) + movl %edx, 28(%ebx) + movl %eax, 36(%ebx) + movzbl -33(%ebp), %eax + leal -36(%ebp), %ebx + pushl %ecx + movl %ebx, %edx + pushl $.LC38 + movl $140, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $9 + pushl $2 + pushl $2 + pushl $7 + pushl $4 + call set_TT + movzbl -32(%ebp), %eax + addl $28, %esp + pushl $.LC39 + movl $140, %ecx + movl %ebx, %edx + pushl %eax + movl -200(%ebp), %eax + pushl $3 + pushl $0 + pushl $0 + pushl $3 + pushl $10 + call set_TT + movzbl -31(%ebp), %eax + addl $28, %esp + pushl $.LC40 + movl $140, %ecx + movl %ebx, %edx + pushl %eax + movl -200(%ebp), %eax + pushl $3 + pushl $1 + pushl $1 + pushl $3 + pushl $12 + call set_TT + movzbl -30(%ebp), %eax + addl $28, %esp + pushl $.LC41 + movl %ebx, %edx + movl $140, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $5 + pushl $2 + pushl $2 + pushl $3 + pushl $14 + call set_TT + movl -196(%ebp), %edx + addl $32, %esp + movl -28(%ebp), %eax + cmpl $0, 36(%edx) + je .L1020 + movzbl faw_1k.4826(%eax), %eax + jmp .L1022 +.L1020: + movzbl faw_2k.4827(%eax), %eax +.L1022: + pushl %edx + movl $148, %ecx + pushl $.LC42 + pushl %eax + movl -200(%ebp), %eax + pushl $20 + pushl $8 + pushl $7 + leal -36(%ebp), %ebx + pushl $15 + movl %ebx, %edx + pushl $28 + call set_TT + movzbl -29(%ebp), %eax + addl $28, %esp + pushl $.LC43 + movl %ebx, %edx + movl $148, %ecx + pushl %eax + movl -200(%ebp), %eax + pushl $15 + pushl $0 + pushl $0 + pushl $15 + pushl $24 + call set_TT + movl -200(%ebp), %ecx + movl 12(%ecx), %esi + shrl $4, %esi + movl %esi, %ebx + andl $268435452, %ebx + orl $-2147483500, %ebx + movl %ebx, -244(%ebp) + movl $3320, %ebx + movl -244(%ebp), %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ebx, %edx + movl -244(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-241, %edi + movl %ecx, %edx + orl $192, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -200(%ebp), %edx + movl 16(%edx), %eax + movl %ebx, %edx + orl $3712, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + andl $268435452, %esi + movl %eax, %edi + orl $-2147483504, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + addl $32, %esp + andl $-524289, %ebx + andl $8, %edi + je .L1023 + orl $524288, %ebx +.L1023: + movl $1, %ecx + movl $1, %edx + movl $386, %eax + call read_option + testl %eax, %eax + jne .L1025 + andl $-524289, %ebx +.L1025: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + xorl %esi, %esi + testl $524288, %ebx + movb $1, 42(%edx) + jne .L1030 + jmp .L1119 +.L1084: + movl -200(%ebp), %ecx + movl $3320, %edx + movl 12(%ecx), %eax + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-524289, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx +.L1119: + movb $0, 42(%edx) + jmp .L1029 +.L1030: + movl -196(%ebp), %ecx + movl $1, %edx + movl %edx, %eax + movl (%ecx), %edi + movl %esi, %ecx + sall %cl, %eax + testl %eax, %edi + jne .L1031 + leal 4(%esi), %ecx + sall %cl, %edx + testl %edx, %edi + je .L1033 + movl -200(%ebp), %edx + pushl %edi + movzwl 28(%edx,%esi,2), %eax + pushl %eax + pushl $.LC44 + pushl $7 + call do_printk + addl $16, %esp +.L1031: + movl -200(%ebp), %ecx + movl $11, %edx + movzwl 20(%ecx,%esi,2), %eax + call spd_read_byte + testb $2, %al + je .L1084 +.L1033: + incl %esi + cmpl $4, %esi + jne .L1030 +.L1029: + movl -200(%ebp), %ebx + movl $3320, %edx + movl 12(%ebx), %edi + shrl $4, %edi + movl %edi, %esi + andl $268435452, %esi + orl $-2147483504, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movb $-8, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl -196(%ebp), %edx + andb $15, %ch + movl 24(%edx), %eax + movl %ebx, %edx + andl $15, %eax + sall $12, %eax + orl %eax, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + cmpb $100, -34(%ebp) + jne .L1036 + movl -196(%ebp), %ecx + cmpb $0, 43(%ecx) + je .L1036 + movl (%ecx), %edx + xorl %ebx, %ebx + xorl %ecx, %ecx + andl $15, %edx +.L1039: + movl %edx, %eax + andl $1, %eax + cmpl $1, %eax + sbbl $-1, %ebx + incl %ecx + cmpl $8, %ecx + je .L1042 + shrl %edx + jmp .L1039 +.L1042: + cmpl $2, %ebx + movl $3, -244(%ebp) + je .L1045 +.L1036: + movl $1, -244(%ebp) +.L1045: + movl $3320, %ecx + movl %esi, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -248(%ebp) + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + sall $4, -244(%ebp) + movl %ebx, %edx + andl $-49, -248(%ebp) + movl -244(%ebp), %eax + orl %eax, -248(%ebp) + movl -248(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $268435452, %edi + movl %ecx, %edx + orl $-2147483488, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-449, %esi + movl %ebx, %edx + orl $224, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + pushl %esi + movl -200(%ebp), %eax + movl $160, %ecx + pushl $.LC45 + pushl $2 + pushl $3 + pushl $0 + pushl $0 + pushl $3 + pushl $2 + leal -36(%ebp), %edx + call set_TT + movl -196(%ebp), %ecx + addl $32, %esp + movl (%ecx), %eax + incl %eax + je .L818 + movl $1, %ecx + movl $1, %edx + movl $396, %eax + call read_option + testl %eax, %eax + je .L1047 + movl -200(%ebp), %eax + xorl %esi, %esi + xorl %edi, %edi + movl -196(%ebp), %ebx + movl 12(%eax), %eax + movb 43(%ebx), %bl + movl $0, -84(%ebp) + movl $255, -88(%ebp) + shrl $4, %eax + movb %bl, -97(%ebp) + movl %eax, %ebx + andl $268435452, %ebx + movl %eax, -96(%ebp) + orl $-2147483520, %ebx + movl $64, -212(%ebp) +.L1049: + movl -96(%ebp), %eax + movl $3320, %edx + orl -212(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1050 + shrl $19, %eax + incl %esi + andl $1023, %eax + cmpl $0, -84(%ebp) + jne .L1052 + movl %eax, -84(%ebp) + jmp .L1054 +.L1052: + cmpl %eax, -84(%ebp) + jne .L1055 +.L1054: + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %edi, %ecx + sarl %ecx + sall $2, %ecx + shrl %cl, %eax + andl $15, %eax + cmpl $255, -88(%ebp) + jne .L1056 + movl %eax, -88(%ebp) + jmp .L1050 +.L1056: + cmpl %eax, -88(%ebp) + jne .L1055 +.L1050: + incl %edi + addl $4, -212(%ebp) + cmpl $8, %edi + jne .L1049 +#APP + bsrl %esi, %edi + jnz 1f + movl $-1, %edi + 1: + +#NO_APP + movl $1, %edx + movl %edi, %ecx + movl %edx, %eax + sall %cl, %eax + cmpl %esi, %eax + jne .L1055 + testl %edi, %edi + jle .L1055 + cmpl $3, %edi + jg .L1055 + movl -88(%ebp), %ebx + movl %edx, %esi + movzbl csbase_low_f0_shift.3980(%ebx), %ecx + sall %cl, %esi + cmpb $0, -97(%ebp) + je .L1061 + addl %esi, %esi +.L1061: + movl -84(%ebp), %eax + movl %edi, %ecx + movl $0, -80(%ebp) + movl $1, -92(%ebp) + movl $64, -208(%ebp) + sall %cl, %eax + leal -1(%eax), %ebx + movl %esi, %eax + sall %cl, %eax + subl %esi, %eax + notl %eax + sall $19, %ebx + andl $16352, %eax + orl %eax, %ebx +.L1063: + movl -96(%ebp), %ecx + movl $3320, %edx + orl -208(%ebp), %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1064 + movb $-8, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -92(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + testb $1, -80(%ebp) + jne .L1066 + movl -80(%ebp), %eax + movb $-8, %dl + sarl %eax + leal 96(,%eax,4), %eax + orl -96(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1066: + addl %esi, -92(%ebp) +.L1064: + incl -80(%ebp) + addl $4, -208(%ebp) + cmpl $8, -80(%ebp) + jne .L1063 + pushl %ebx + pushl $.LC46 + pushl $.LC5 + pushl $7 + call do_printk + movl -84(%ebp), %ebx + leal 17(%edi), %ecx + addl $16, %esp + sall %cl, %ebx + testl %ebx, %ebx + je .L1055 + jmp .L1069 +.L1047: + pushl %ecx + pushl $.LC47 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1055 +.L1120: + movl -200(%ebp), %edx + xorl %edi, %edi + xorl %ebx, %ebx + movl $0, -76(%ebp) + movl $64, -204(%ebp) + movl 12(%edx), %esi + shrl $4, %esi +.L1071: + movl -204(%ebp), %eax + movl $3320, %edx + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + movl %eax, %edx + je .L1072 + cmpl -76(%ebp), %eax + jbe .L1072 + leal 24(%edi), %ecx + movl $1, %eax + sall %cl, %eax + testl %eax, -72(%ebp) + jne .L1072 + movl %edi, %ebx + movl %edx, -76(%ebp) +.L1072: + incl %edi + addl $4, -204(%ebp) + cmpl $8, %edi + jne .L1071 + cmpl $0, -76(%ebp) + je .L1077 + leal 24(%ebx), %eax + movl -76(%ebp), %edi + movl $1, -240(%ebp) + movb %al, %cl + movl -72(%ebp), %eax + sall %cl, -240(%ebp) + orl %eax, -240(%ebp) + movl -240(%ebp), %edx + leal 64(,%ebx,4), %eax + shrl $19, %edi + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + addl %edi, %edx + movl %edx, -72(%ebp) + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + sall $19, -240(%ebp) + movb $-4, %dl + orl $1, -240(%ebp) + movl -240(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + testb $1, %bl + jne .L1120 + shrl %ebx + movb $-8, %dl + leal 96(,%ebx,4), %eax + orl %esi, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1(%edi), %eax + movb $-4, %dl + sall $19, %eax + orl $16352, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L1120 +.L1077: + movl -72(%ebp), %ebx + sall $17, %ebx +.L1069: + movl -200(%ebp), %edx + pushl (%edx) + pushl %edx + call memory_end_k + addl %eax, %ebx + movl %ebx, -60(%ebp) + movl -200(%ebp), %ebx + leal 0(,%eax,4), %esi + movl -60(%ebp), %edx + xorw %si, %si + orl $3, %esi + movl (%ebx), %ecx + sall $2, %edx + xorw %dx, %dx + leal -65536(%edx), %edi + leal 0(,%ecx,8), %ebx + orl %ecx, %edi + leal 68(%ebx), %eax + addl $64, %ebx + movl %eax, -64(%ebp) + popl %eax + popl %edx + movl %ebx, -68(%ebp) + movl $790528, %ebx +.L1080: + movl -64(%ebp), %eax + movl %ebx, %edx + movl $3320, %ecx + shrl $4, %edx + movl %edx, -244(%ebp) + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -68(%ebp), %eax + movl %ecx, %edx + orl %eax, -244(%ebp) + andl $2147483644, -244(%ebp) + orl $-2147483648, -244(%ebp) + movl -244(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + addl $32768, %ebx + cmpl $1052672, %ebx + jne .L1080 + movl -60(%ebp), %eax + xorl %edx, %edx + call set_top_mem + jmp .L1082 +.L818: + movl $.LC48, %eax + call die + jmp .L1082 +.L808: + movl -196(%ebp), %ecx + movl $-1, (%ecx) + jmp .L818 +.L845: + movl -196(%ebp), %ebx + movl $-1, (%ebx) + jmp .L818 +.L962: + pushl $6 + movl -196(%ebp), %edx + pushl $3 + movl -124(%ebp), %ecx + pushl $3 + movl -200(%ebp), %eax + pushl $3 + pushl $4 + pushl $29 + pushl $136 + pushl (%edx) + leal -36(%ebp), %esi + movl %esi, %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1112 + jmp .L961 +.L975: + pushl $6 + movl -196(%ebp), %ecx + pushl $3 + movl -200(%ebp), %eax + pushl $3 + pushl $3 + pushl $8 + pushl $27 + pushl $136 + pushl (%ecx) + movl -124(%ebp), %ecx + leal -36(%ebp), %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1113 + jmp .L961 +.L992: + pushl $3 + movl -196(%ebp), %ebx + pushl $1 + movl -124(%ebp), %ecx + pushl $0 + movl -200(%ebp), %eax + pushl $3 + pushl $8 + pushl $37 + pushl $140 + pushl (%ebx) + leal -36(%ebp), %edx + call update_dimm_TT_1_4 + addl $32, %esp + testl %eax, %eax + movl %eax, %ebx + jg .L1114 + jmp .L961 +.L1001: + movl -196(%ebp), %eax + movl $-1, (%eax) + jmp .L818 +.L1055: + movl $0, -72(%ebp) + jmp .L1120 +.L987: + pushl %eax + pushl %eax + pushl $.LC37 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1001 +.L1082: + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret + .size sdram_set_spd_registers, .-sdram_set_spd_registers + .section .rom.data.str1.1 +.LC49: + .string "Ram1." +.LC50: + .string "Ram2." +.LC51: + .string "Ram3\r\n" +.LC52: + .string "No memory\r\n" +.LC53: + .string "\tdimm_mask = " +.LC54: + .string "\tx4_mask = " +.LC55: + .string "\tx16_mask = " +.LC56: + .string "\tsingle_rank_mask = " +.LC57: + .string "\tODC = " +.LC58: + .string "\tAddr Timing= " +.LC59: + .string "Initializing memory: " +.LC60: + .string "." +.LC61: + .string " failed\r\n" +.LC62: + .string " done\r\n" +.LC63: + .string "WB" +.LC64: + .string "Setting variable MTRR %d, base: %4dMB, range: %4dMB, type %s\r\n" +.LC65: + .string "set DQS timing:RcvrEn:Pass1: " +.LC66: + .string "set DQS timing:DQSPos: " +.LC67: + .string "\r\nDQS Training Rd Wr failed ctrl" +.LC68: + .string "Total DQS Training : tsc " +.LC69: + .string "%s[%02x]=%08x%08x\r\n" +.LC70: + .string "mem_trained[" +.LC71: + .string "]=" +.LC72: + .string "mem trained failed\r\n" +.LC73: + .string "Ram4\r\n" +.LC74: + .string "set DQS timing:RcvrEn:Pass2: " + .section .rom.text +.globl sdram_initialize + .type sdram_initialize, @function +sdram_initialize: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $1356, %esp + movl 12(%ebp), %edi + movl $0, -1356(%ebp) + jmp .L1122 +.L1123: + movl -1356(%ebp), %edx + movl $.LC49, %eax + call print_debug_sdram_8 + movl 4(%edi), %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $285216802, %eax + movl (%edi), %eax + je .L1124 + movl 16(%ebp), %edx + movb $0, (%edx,%eax) + jmp .L1126 +.L1124: + movl 16(%ebp), %ecx + xorl %esi, %esi + movb $1, (%ecx,%eax) + movl 4(%edi), %ebx + movl %ebx, -1352(%ebp) +.L1127: + movl register_values.3743(,%esi,4), %edx + movl -1352(%ebp), %ecx + movl %edx, %eax + andl $255, %edx + xorb %al, %al + leal -786432(%eax,%ecx), %eax + movl $3320, %ecx + shrl $4, %eax + orl %edx, %eax + movl %ecx, %edx + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -1364(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl register_values.3743+4(,%esi,4), %edx + andl %edx, %eax + movl %ecx, %edx + movl %eax, -1368(%ebp) + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl register_values.3743+8(,%esi,4), %ecx + movl %ebx, %edx + orl %ecx, -1368(%ebp) + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %esi + cmpl $114, %esi + jne .L1127 +.L1126: + incl -1356(%ebp) + addl $36, %edi +.L1122: + movl 8(%ebp), %ecx + cmpl %ecx, -1356(%ebp) + jl .L1123 + movl 12(%ebp), %ebx + xorl %esi, %esi + jmp .L1129 +.L1130: + movl %esi, %edx + movl $.LC50, %eax + call print_debug_sdram_8 + movl 16(%ebp), %edx + movl %ebx, %eax + incl %esi + addl $36, %ebx + call sdram_set_spd_registers +.L1129: + cmpl 8(%ebp), %esi + jl .L1130 + pushl %ebx + pushl $.LC51 + pushl $.LC5 + pushl $7 + call do_printk + pushl 8(%ebp) + pushl 12(%ebp) + call memory_end_k + addl $24, %esp + testl %eax, %eax + jne .L1132 + movl $.LC52, %eax + call die +.L1132: + movl 12(%ebp), %ebx + movl $0, -1348(%ebp) + addl $12, %ebx + movl %ebx, -1240(%ebp) + jmp .L1134 +.L1135: + movl -1348(%ebp), %esi + movl 16(%ebp), %eax + cmpb $0, (%esi,%eax) + je .L1136 + movl -1240(%ebp), %edx + movl (%edx), %esi + movl $3320, %edx + orl $2368, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + imull $48, -1348(%ebp), %ebx + movl %eax, %ecx + movl 16(%ebp), %edx + cmpl $0, 8(%ebx,%edx) + jne .L1138 + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + orb $64, %ch + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + jmp .L1136 +.L1138: + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + orl $8, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl 16(%ebp), %eax + addl %ebx, %eax + movl 8(%eax), %edx + leal 8(%eax), %esi + movb 45(%esi), %al + movl %edx, %ecx + andl $15, %ecx + cmpb $1, %al + je .L1142 + jb .L1141 + cmpb $2, %al + je .L1143 + cmpb $3, %al + jne .L1336 + jmp .L1144 +.L1141: + cmpl $3, %ecx + jne .L1146 + jmp .L1145 +.L1142: + cmpl $3, %ecx + jne .L1147 + cmpl $0, 24(%esi) + jne .L1145 + movl 28(%esi), %eax + testl %eax, %eax + jne .L1150 + movl 32(%esi), %eax + movl $3419904, %edi + movl $1119010, -1344(%ebp) + testl %eax, %eax + je .L1155 + cmpl $3, %eax + movl $12032, %edi + je .L1155 + movl $3616512, %edi + jmp .L1347 +.L1150: + cmpl $1, %eax + jne .L1157 + cmpl $1, 32(%esi) + jmp .L1352 +.L1157: + cmpl $2, %eax + jne .L1145 + cmpl $2, 32(%esi) +.L1352: + jne .L1145 + jmp .L1159 +.L1147: + cmpl $0, 24(%esi) + jne .L1161 + cmpl $0, 28(%esi) + jne .L1161 + movl 32(%esi), %eax + decl %eax + cmpl $1, %eax + ja .L1161 + jmp .L1146 +.L1143: + cmpl $3, %ecx + movl $2105888, %edi + jne .L1166 + cmpl $0, 24(%esi) + jne .L1167 + movl 28(%esi), %eax + testl %eax, %eax + jne .L1169 + movl 32(%esi), %eax + movl $2826784, %edi + movl $1119010, -1344(%ebp) + testl %eax, %eax + je .L1155 + cmpl $3, %eax + movl $3154464, %edi + je .L1155 + movl $2761248, %edi +.L1347: + movl $1, %ebx + jmp .L1156 +.L1169: + cmpl $1, %eax + jne .L1174 + cmpl $1, 32(%esi) + jmp .L1351 +.L1174: + cmpl $2, %eax + jne .L1167 + cmpl $2, 32(%esi) +.L1351: + jne .L1167 + jmp .L1176 +.L1144: + cmpl $3, %ecx + movl $2106656, %edi + movl $1126946, -1344(%ebp) + jne .L1155 + jmp .L1178 +.L1336: + movl $1118754, -1344(%ebp) + movl $3092224, %edi + xorl %ebx, %ebx +.L1156: + movl $.LC53, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC56, %eax + call print_raminit + movl -1344(%ebp), %edx + movl $.LC57, %eax + call print_raminit + movl %edi, %edx + movl $.LC58, %eax + call print_raminit + testl %ebx, %ebx + je .L1180 +.L1181: + movl -1240(%ebp), %edx + movl (%edx), %ecx + orl $2368, %ecx + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, -1364(%ebp) + movl $3320, %ecx + movl -1364(%ebp), %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -1368(%ebp) + movl %ecx, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $1048576, -1368(%ebp) + movl %ebx, %edx + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP +.L1180: + movl (%esi), %eax + testb $15, %al + jne .L1182 + testb $-16, %al + je .L1182 + movl -1240(%ebp), %ebx + movl $32, %ecx + movl $152, %edx + pushl -1344(%ebp) + movl (%ebx), %eax + call pci_write_config32_index_wait + movl $36, %ecx + movl $152, %edx + pushl %edi + movl (%ebx), %eax + call pci_write_config32_index_wait + popl %edx + popl %ecx + jmp .L1136 +.L1182: + movl -1240(%ebp), %ebx + xorl %ecx, %ecx + movl $152, %edx + pushl -1344(%ebp) + movl (%ebx), %eax + call pci_write_config32_index_wait + cmpb $0, 43(%esi) + popl %eax + je .L1185 + pushl -1344(%ebp) + movl $32, %ecx + movl (%ebx), %eax + movl $152, %edx + call pci_write_config32_index_wait + popl %eax +.L1185: + movl -1240(%ebp), %ebx + movl $4, %ecx + movl $152, %edx + pushl %edi + movl (%ebx), %eax + call pci_write_config32_index_wait + cmpb $0, 43(%esi) + popl %eax + je .L1136 + pushl %edi + movl (%ebx), %eax + movl $36, %ecx + movl $152, %edx + call pci_write_config32_index_wait + popl %eax +.L1136: + incl -1348(%ebp) + addl $36, -1240(%ebp) +.L1134: + movl 8(%ebp), %esi + cmpl %esi, -1348(%ebp) + jl .L1135 + movl 12(%ebp), %edi + movl $0, -1236(%ebp) + jmp .L1189 +.L1190: + movl -1236(%ebp), %eax + movl 16(%ebp), %edx + cmpb $0, (%eax,%edx) + je .L1191 + movl 12(%edi), %ecx + movl $3320, %edx + shrl $4, %ecx + movl %ecx, %eax + andl $268435452, %eax + orl $-2147483500, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testb $8, %al + je .L1191 + andl $268435452, %ecx + movb $-8, %dl + orl $-2147483504, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + testl $524288, %eax + movl %eax, %ebx + je .L1194 + movl 16(%edi), %eax + movb $-8, %dl + orl $1088, %eax + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax + movl %eax, -1364(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + orl $4194304, %esi + testb $8, %bh + movl %eax, -1368(%ebp) + je .L1196 + movl %eax, %esi + orl $12582912, %esi +.L1196: + movl $3320, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1194: + movl $3320, %esi + movl %ecx, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movl %esi, %edx +#APP + outl %eax, %dx +#NO_APP + orl $1, %ebx + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1191: + incl -1236(%ebp) + addl $36, %edi +.L1189: + movl 8(%ebp), %ecx + cmpl %ecx, -1236(%ebp) + jl .L1190 + movl 16(%ebp), %ebx + movl 12(%ebp), %edi + movl $0, -1232(%ebp) + addl $8, %ebx + movl %ebx, -1360(%ebp) + jmp .L1199 +.L1200: + movl -1232(%ebp), %esi + movl 16(%ebp), %eax + cmpb $0, (%esi,%eax) + je .L1201 + movl -1360(%ebp), %edx + cmpl $0, (%edx) + je .L1201 + pushl %eax + xorl %ebx, %ebx + pushl $.LC59 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1204: + movl 12(%edi), %eax + movl $3320, %edx + orb $9, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + incl %ebx + movl %eax, %esi + testl $1023, %ebx + jne .L1205 + pushl %eax + pushl $.LC60 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1205: + andl $1, %esi + je .L1208 + cmpl $299999, %ebx + jg .L1210 + jmp .L1204 +.L1208: + cmpl $299999, %ebx + jle .L1209 +.L1210: + pushl %esi + pushl $.LC61 + jmp .L1348 +.L1209: + movl 12(%edi), %ecx + orb $10, %ch + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx +.L1211: + movl $3320, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $1, %al + je .L1211 + pushl %ebx + pushl $.LC62 +.L1348: + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp +.L1201: + incl -1232(%ebp) + addl $36, %edi + addl $48, -1360(%ebp) +.L1199: + movl 8(%ebp), %edx + cmpl %edx, -1232(%ebp) + jl .L1200 + xorl %edi, %edi + movl $0, -1304(%ebp) + jmp .L1214 +.L1215: + movl 12(%ebp), %ebx + leal 64(%edi), %ecx + movl $3320, %edx + movl %ecx, -1332(%ebp) + movl 8(%ebx), %ebx + shrl $4, %ebx + movl %ebx, %eax + orl %ecx, %eax + andl $2147483644, %eax + movl %ebx, -1336(%ebp) + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + andl $3, %eax + cmpl $3, %eax + jne .L1216 + leal 68(%edi), %esi + movb $-8, %dl + movl %esi, -1340(%ebp) + movl -1336(%ebp), %esi + orl -1340(%ebp), %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + xorw %cx, %cx + cmpl $12582912, %ecx + ja .L1216 + addl $65536, %eax + xorw %ax, %ax + cmpl $12582912, %eax + jbe .L1216 + movl 8(%ebp), %ecx + decl %ecx + movl %ecx, %edi + sall $3, %edi + movl %ecx, -1308(%ebp) + jmp .L1219 +.L1220: + movl -1336(%ebp), %eax + leal 64(%edi), %ebx + movl $3320, %edx + movl %ebx, -1316(%ebp) + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ecx + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ebx + andl $3, %eax + cmpl $3, %eax + jne .L1221 + leal 68(%edi), %eax + movb $-8, %dl + movl %eax, -1320(%ebp) + movl -1336(%ebp), %eax + orl -1320(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx +#APP + inl %dx, %eax +#NO_APP + addl $4194304, %ebx + addl $4194304, %eax + movl %ebx, -1328(%ebp) + movl 12(%ebp), %ebx + movl %eax, -1324(%ebp) + movl $0, -1312(%ebp) + addl $8, %ebx + jmp .L1223 +.L1224: + movl -36(%ebx), %ecx + movl -1320(%ebp), %eax + shrl $4, %ecx + orl %ecx, %eax + movl %ecx, -1368(%ebp) + andl $2147483644, %eax + movl $3320, %ecx + orl $-2147483648, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -1324(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl -1316(%ebp), %eax + movl %ecx, %edx + orl %eax, -1368(%ebp) + andl $2147483644, -1368(%ebp) + orl $-2147483648, -1368(%ebp) + movl -1368(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl -1328(%ebp), %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + incl -1312(%ebp) +.L1223: + movl 8(%ebp), %ecx + addl $36, %ebx + cmpl %ecx, -1312(%ebp) + jl .L1224 +.L1221: + decl -1308(%ebp) + subl $8, %edi +.L1219: + movl -1304(%ebp), %ebx + cmpl %ebx, -1308(%ebp) + jg .L1220 + movl $3320, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl 12(%ebp), %ecx + leal 4194304(%eax), %esi + xorl %ebx, %ebx + addl $8, %ecx + jmp .L1226 +.L1227: + movl -36(%ecx), %eax + movl $3320, %edx + shrl $4, %eax + orl -1340(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + incl %ebx +.L1226: + addl $36, %ecx + cmpl 8(%ebp), %ebx + jl .L1227 + imull $36, -1304(%ebp), %eax + movl 12(%ebp), %edx + movl 8(%eax,%edx), %ebx + movl $3320, %edx + movl -1332(%ebp), %eax + shrl $4, %ebx + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + xorw %cx, %cx + shrl $2, %ecx + cmpl $3145728, %ecx + jne .L1229 + movl 12(%ebp), %ebx + movzwl %ax,%ecx + xorl %esi, %esi + orl $16777216, %ecx + addl $8, %ebx + jmp .L1231 +.L1232: + movl -36(%ebx), %eax + movl $3320, %edx + shrl $4, %eax + orl -1332(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + incl %esi +.L1231: + addl $36, %ebx + cmpl 8(%ebp), %esi + jl .L1232 + jmp .L1233 +.L1229: + movl %ebx, %eax + movl $3320, %edx + andl $268435452, %eax + orl $-2147483408, %eax +#APP + outl %eax, %dx +#NO_APP + leal 1048576(%ecx), %eax + movb $-4, %dl + shrl $6, %eax + andl $65280, %eax + subl $1073741823, %eax +#APP + outl %eax, %dx +#NO_APP +.L1233: + pushl 8(%ebp) + pushl 12(%ebp) + call memory_end_k + popl %edx + movl $3145728, %edx + popl %ecx + call set_top_mem + jmp .L1234 +.L1216: + incl -1304(%ebp) + addl $8, %edi +.L1214: + movl 8(%ebp), %edx + cmpl %edx, -1304(%ebp) + jl .L1215 +.L1234: + movl $-1073676262, %ecx +#APP + rdmsr +#NO_APP + movl 16(%ebp), %ecx + sall $24, %edx + shrl $8, %eax + orl %eax, %edx + shrl $2, %edx + movl %edx, 688(%ecx) + movl $-1073676259, %ecx +#APP + rdmsr +#NO_APP + movl 16(%ebp), %ebx + shrl $8, %eax + sall $24, %edx + orl %eax, %edx + shrl $2, %edx + movl %ebx, %eax + movl %edx, 692(%ebx) + addl $8, %eax + xorl %edx, %edx + jmp .L1235 +.L1236: + movl 16(%ebp), %esi + cmpb $0, (%edx,%esi) + movb $0, 680(%edx,%esi) + je .L1237 + cmpl $0, (%eax) + je .L1237 + movb $-128, 680(%edx,%esi) +.L1237: + incl %edx + addl $48, %eax +.L1235: + cmpl 8(%ebp), %edx + jl .L1236 + movl 16(%ebp), %eax + movl $592, %ecx + movl 16(%ebp), %edx + movl 692(%eax), %eax + movl 688(%edx), %ebx + movl %eax, -1300(%ebp) + movl $505290270, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP + movb $88, %cl +#APP + wrmsr +#NO_APP + testl %ebx, %ebx + je .L1241 + jmp .L1338 +.L1243: +#APP + bsfl %edi,%ecx + jnz 1f + movl $32,%ecx +1: + bsrl -1292(%ebp),%eax + jnz 1f + movl $0,%eax +1: +#NO_APP + cmpl %eax, %ecx + jbe .L1244 + movl %eax, %ecx +.L1244: + movl $1, -1296(%ebp) + sall %cl, -1296(%ebp) + pushl %eax + pushl %eax + movl -1296(%ebp), %eax + pushl $.LC63 + shrl $10, %eax + pushl %eax + movl %edi, %eax + shrl $10, %eax + pushl %eax + pushl -1244(%ebp) + pushl $.LC64 + pushl $7 + call do_printk + addl $32, %esp + cmpl $4194303, -1296(%ebp) + ja .L1245 + movl -1296(%ebp), %ebx + movl $255, -1256(%ebp) + sall $10, %ebx + negl %ebx + jmp .L1247 +.L1245: + movl -1296(%ebp), %eax + xorl %ebx, %ebx + shrl $22, %eax + negl %eax + andl $255, %eax + movl %eax, -1256(%ebp) +.L1247: + cmpl $7, -1244(%ebp) + ja .L1248 + cmpl $0, -1296(%ebp) + jne .L1250 + xorl %eax, %eax + movl %esi, %ecx + movl %eax, %edx + jmp .L1349 +.L1250: + movl %edi, %eax + movl %edi, %edx + sall $10, %eax + leal -1(%esi), %ecx + orl $6, %eax + shrl $22, %edx +#APP + wrmsr +#NO_APP + movl -1256(%ebp), %edx + orb $8, %bh + movl %esi, %ecx + movl %ebx, %eax +.L1349: +#APP + wrmsr +#NO_APP +.L1248: + incl -1244(%ebp) + addl $2, %esi + cmpl $8, -1244(%ebp) + je .L1241 + movl -1296(%ebp), %ebx + addl -1296(%ebp), %edi + subl %ebx, -1292(%ebp) + jne .L1243 +.L1241: + cmpl $0, -1300(%ebp) + jne .L1253 +.L1254: + movl 12(%ebp), %esi + movl $0, -1288(%ebp) + movl %esi, -1248(%ebp) + jmp .L1255 +.L1253: + movl $-1073676272, %ecx +#APP + rdmsr +#NO_APP + orl $6291456, %eax +#APP + wrmsr +#NO_APP + jmp .L1254 +.L1256: + movl -1288(%ebp), %eax + movl 16(%ebp), %edx + cmpb $-128, 680(%eax,%edx) + jne .L1257 + movl -1248(%ebp), %ecx + movl -1288(%ebp), %ebx + movl 8(%ecx), %eax + leal 64(,%ebx,8), %edx + shrl $4, %eax + orl %edx, %eax + movl $3320, %edx + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl 16(%ebp), %esi + movl %eax, 696(%esi,%ebx,4) + movl %ebx, %eax + movl $64, %ebx + sall $5, %eax + leal 728(%eax,%esi), %ecx + xorl %esi, %esi +.L1259: + movl -1248(%ebp), %edx + movl 12(%edx), %eax + movl $3320, %edx + shrl $4, %eax + orl %ebx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + incl %esi + addl $4, %ebx + movl %eax, (%ecx) + addl $4, %ecx + cmpl $8, %esi + jne .L1259 + movl -1248(%ebp), %ecx + movb $-8, %dl + movl 8(%ecx), %eax + orb $15, %ah + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl -1288(%ebp), %ecx + movl 16(%ebp), %ebx + movl %eax, 984(%ebx,%ecx,4) +#APP + rdtsc +#NO_APP + movl %eax, -52(%ebp) + pushl %eax + pushl $.LC65 + pushl $.LC5 + pushl $7 + movl %edx, -48(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl -1248(%ebp), %eax + movl %ebx, %ecx + movl $1, %edx + call train_DqsRcvrEn + addl $16, %esp + testl %eax, %eax + je .L1261 + movl -1288(%ebp), %esi + movb $-127, 680(%esi,%ebx) + jmp .L1263 +.L1261: + pushl %esi + pushl $.LC62 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + addl $12, %esp + pushl $.LC66 + pushl $.LC5 + pushl $7 + movl %edx, -40(%ebp) + movl %eax, -44(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl -1248(%ebp), %edx + movl 16(%ebp), %ecx + movl (%edx), %eax + imull $48, %eax, %edx + imull $36, %eax, %eax + movb 51(%edx,%ecx), %dl + addl $1016, %ecx + addl %ecx, %eax + movl %ecx, -1264(%ebp) + movl %eax, -1272(%ebp) + movb %dl, -1273(%ebp) +#APP + movl %cr4, %eax +#NO_APP + orb $2, %ah +#APP + movl %eax, %cr4 +#NO_APP + call set_wrap32dis + movl -1248(%ebp), %ebx + movl 12(%ebx), %ecx + movl $3320, %ebx + movl %ebx, %edx + orb $9, %ch + shrl $4, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -1284(%ebp) + movl %ebx, %edx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl -1284(%ebp), %eax + movb $-4, %dl + andl $-524289, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1204(%ebp), %ecx + addl $16, %esp + andl $-16, %ecx + xorl %edx, %edx + cmpb $0, -1273(%ebp) + movl %ecx, -1280(%ebp) + je .L1269 +.L1266: + movl TestPatternJD1b.5567(,%edx,4), %eax + movl -1280(%ebp), %ebx + movl %eax, (%ebx,%edx,4) + incl %edx + cmpl $288, %edx + jne .L1266 + movl $1, -1268(%ebp) + jmp .L1268 +.L1269: + movl TestPatternJD1a.5566(,%edx,4), %eax + movl -1280(%ebp), %esi + movl %eax, (%esi,%edx,4) + incl %edx + cmpl $144, %edx + jne .L1269 + movl $0, -1268(%ebp) +.L1268: + movl -1248(%ebp), %edx + xorl %ebx, %ebx + movl 16(%ebp), %ecx + imull $48, (%edx), %eax + movl 8(%eax,%ecx), %eax + testb $15, %al + jne .L1273 + xorl %ebx, %ebx + testb $-16, %al + setne %bl +.L1273: + xorl %edi, %edi + jmp .L1323 +.L1275: + xorl %esi, %esi +.L1276: + movl -1248(%ebp), %eax + xorl %ecx, %ecx + movl %ebx, %edx + pushl %esi + call SetDQSDelayAllCSR + movl -1248(%ebp), %eax + movl $1, %ecx + pushl 16(%ebp) + movl %ebx, %edx + pushl -1272(%ebp) + pushl -1280(%ebp) + pushl -1268(%ebp) + call TrainDQSPos + addl $20, %esp + testl %eax, %eax + je .L1277 + incl %esi + orl %eax, %edi + cmpl $48, %esi + je .L1279 + jmp .L1276 +.L1277: + pushl 16(%ebp) + xorl %ecx, %ecx + pushl -1272(%ebp) + movl %ebx, %edx + pushl -1280(%ebp) + pushl -1268(%ebp) + movl -1248(%ebp), %eax + call TrainDQSPos + addl $16, %esp + movl %eax, %edi +.L1279: + cmpb $1, -1273(%ebp) + adcl $1, %ebx +.L1323: + cmpl $1, %ebx + ja .L1282 + testl %edi, %edi + je .L1275 +.L1282: + movl -1248(%ebp), %ebx + movl $3320, %ecx + movl %ecx, %edx + movl 12(%ebx), %esi + orl $2304, %esi + shrl $4, %esi + andl $2147483644, %esi + orl $-2147483648, %esi + movl %esi, -1364(%ebp) + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -1364(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $524288, -1284(%ebp) + andl $-524289, %esi + orl -1284(%ebp), %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + call clear_wrap32dis +#APP + movl %cr4, %eax +#NO_APP + andb $253, %ah +#APP + movl %eax, %cr4 +#NO_APP + testl %edi, %edi + je .L1283 + pushl %ebx + pushl $.LC67 + pushl $.LC5 + pushl $3 + call do_printk + movl -1248(%ebp), %ecx + addl $12, %esp + pushl (%ecx) + pushl $.LC6 + pushl $3 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $3 + call do_printk + movl -1288(%ebp), %ebx + movl 16(%ebp), %esi + movb $-126, 680(%ebx,%esi) + jmp .L1350 +.L1283: + movl -1248(%ebp), %edx + xorl %edi, %edi + movl $1, -20(%ebp) + movl $0, -16(%ebp) + imull $36, (%edx), %eax + addl -1264(%ebp), %eax + movl %eax, -1260(%ebp) + jmp .L1285 +.L1286: + movl -1252(%ebp), %ecx + movl $4, %edx + movl %edi, %eax + pushl -1260(%ebp) + movl -24(%ebp,%ecx,4), %esi + movl %esi, %ecx + call get_dqs_delay + movl $5, %edx + popl %ecx + movl %esi, %ecx + pushl -1260(%ebp) + movzbl %al, %ebx + movl %edi, %eax + call get_dqs_delay + popl %edx + movzbl %al, %edx + cmpl %edx, %ebx + jbe .L1287 + subl %edx, %ebx + imull $255, %ebx, %eax + shrl $8, %eax + leal (%eax,%edx), %ebx +.L1287: + movl -1248(%ebp), %eax + movl $8, %ecx + movl %edi, %edx + pushl %ebx + pushl %esi + call SetDQSDelayCSR + movzbl %bl, %eax + movl %esi, %ecx + pushl %eax + movl $8, %edx + pushl -1260(%ebp) + movl %edi, %eax + call save_dqs_delay + addl $16, %esp + incl -1252(%ebp) + cmpl $3, -1252(%ebp) + jne .L1286 + incl %edi + cmpl $2, %edi + je .L1343 + jmp .L1285 +.L1291: + movl -1288(%ebp), %ebx + movl 16(%ebp), %esi + movb $-125, 680(%ebx,%esi) + jmp .L1263 +.L1346: + pushl %ecx + pushl $.LC62 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + movl %edx, -24(%ebp) + movl %eax, -28(%ebp) +.L1350: + addl $16, %esp +.L1263: + xorl %ebx, %ebx +.L1293: + leal -52(%ebp), %eax + pushl %edx + pushl %edx + pushl (%eax,%ebx,8) + pushl 4(%eax,%ebx,8) + pushl %ebx + incl %ebx + pushl $.LC68 + pushl $.LC69 + pushl $7 + call do_printk + addl $32, %esp + cmpl $4, %ebx + jne .L1293 + movl -1288(%ebp), %eax + movl 16(%ebp), %edx + cmpb $-128, 680(%eax,%edx) + jne .L1257 + movb $1, 680(%eax,%edx) +.L1257: + incl -1288(%ebp) + addl $36, -1248(%ebp) +.L1255: + movl 8(%ebp), %ecx + cmpl %ecx, -1288(%ebp) + jl .L1256 + movl 16(%ebp), %esi + movl $-1073676272, %ecx + movl 692(%esi), %ebx +#APP + rdmsr +#NO_APP + orl $524288, %eax +#APP + wrmsr +#NO_APP + xorl %eax, %eax + movl $592, %ecx + movl %eax, %edx +#APP + wrmsr +#NO_APP + movb $88, %cl +#APP + wrmsr +#NO_APP + movb $4, %cl +.L1297: + xorl %eax, %eax + movl %eax, %edx +#APP + wrmsr +#NO_APP + incl %ecx + cmpl $528, %ecx + jne .L1297 + testl %ebx, %ebx + je .L1299 + movl $-1073676272, %ecx +#APP + rdmsr +#NO_APP + andl $-6291457, %eax +#APP + wrmsr +#NO_APP +.L1299: + movl 16(%ebp), %ecx + xorl %ebx, %ebx + movl 1432(%ecx), %edi + movl $1, %ecx + cmpl $1, %edi + jne .L1303 + jmp .L1301 +.L1304: + movl 16(%ebp), %esi + cmpb $0, 680(%ecx,%esi) + je .L1305 + movl $1, %eax + sall %cl, %eax + orl %eax, %ebx +.L1305: + incl %ecx +.L1303: + cmpl %edi, %ecx + jb .L1304 + movl $1, %ecx +.L1308: + movl $1, %eax + sall %cl, %eax + testl %eax, %ebx + je .L1309 + movl 16(%ebp), %edx + cmpb $-128, 680(%edx,%ecx) + je .L1309 + notl %eax + andl %eax, %ebx +.L1309: + testl %ebx, %ebx + jne .L1312 + xorl %esi, %esi + jmp .L1314 +.L1312: + leal 1(%ecx), %eax + xorl %edx, %edx + divl %edi + movl %edx, %ecx + jmp .L1308 +.L1315: + pushl %edi + pushl $.LC70 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC71 + pushl $.LC5 + pushl $7 + call do_printk + movl 16(%ebp), %ecx + addl $12, %esp + movzbl 680(%ebx,%ecx), %eax + pushl %eax + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl 16(%ebp), %edx + addl $16, %esp + movb 680(%ebx,%edx), %al + addl $127, %eax + cmpb $2, %al + ja .L1316 + movl $1, %esi +.L1316: + incl %ebx +.L1314: + movl 16(%ebp), %ecx + cmpl 1432(%ecx), %ebx + jb .L1315 + testl %esi, %esi + je .L1301 + pushl %ecx + pushl $.LC72 + pushl $.LC5 + pushl $7 + call do_printk + call soft_reset + addl $16, %esp +.L1301: + pushl %edx + pushl $.LC73 + pushl $.LC5 + pushl $7 + call do_printk + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L1178: + movl $2106656, %edi + movl $1127202, -1344(%ebp) + jmp .L1155 +.L1176: + movl $2892320, %edi + movl $1119010, -1344(%ebp) + jmp .L1155 +.L1167: + movl $2105888, %edi + movl $1119010, -1344(%ebp) + jmp .L1155 +.L1159: + movl $3682048, %edi + movl $1119010, -1344(%ebp) + jmp .L1155 +.L1145: + movl $1119010, -1344(%ebp) + movl $3092224, %edi +.L1155: + movl $.LC53, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC56, %eax + call print_raminit + movl -1344(%ebp), %edx + movl $.LC57, %eax + call print_raminit + movl %edi, %edx + movl $.LC58, %eax + call print_raminit + jmp .L1181 +.L1161: + movl $2830080, %edi + jmp .L1166 +.L1146: + movl $3092224, %edi +.L1166: + movl $.LC53, %eax + call print_raminit + movl 24(%esi), %edx + movl $.LC54, %eax + call print_raminit + movl 28(%esi), %edx + movl $.LC55, %eax + call print_raminit + movl 32(%esi), %edx + movl $.LC56, %eax + call print_raminit + movl $1118754, %edx + movl $.LC57, %eax + call print_raminit + movl %edi, %edx + movl $.LC58, %eax + call print_raminit + movl $1118754, -1344(%ebp) + jmp .L1180 +.L1285: + movl $1, -1252(%ebp) + jmp .L1286 +.L1343: + pushl %eax + pushl $.LC62 + pushl $.LC5 + pushl $7 + call do_printk +#APP + rdtsc +#NO_APP + addl $12, %esp + pushl $.LC74 + pushl $.LC5 + pushl $7 + movl %edx, -32(%ebp) + movl %eax, -36(%ebp) + call do_printk + addl $12, %esp + pushl -1288(%ebp) + pushl $.LC6 + pushl $7 + call do_printk + movl 16(%ebp), %ecx + movl $2, %edx + movl -1248(%ebp), %eax + call train_DqsRcvrEn + addl $16, %esp + testl %eax, %eax + jne .L1291 + jmp .L1346 +.L1338: + xorl %edi, %edi + movl $517, %esi + movl $2, -1244(%ebp) + movl %ebx, -1292(%ebp) + jmp .L1243 + .size sdram_initialize, .-sdram_initialize + .section .rom.data.str1.1 +.LC75: + .string "Testing DRAM : %08x - %08x\r\n" +.LC76: + .string "DRAM fill: 0x%08x-0x%08x\r\n" +.LC77: + .string "%08x \r" +.LC78: + .string "%08x\r\nDRAM filled\r\n" +.LC79: + .string "DRAM verify: 0x%08x-0x%08x\r\n" +.LC80: + .string "Fail: @0x%08x Read value=0x%08x\r\n" +.LC81: + .string "Aborting.\n\r" +.LC82: + .string "\r\nDRAM did _NOT_ verify!\r\n" +.LC83: + .string "DRAM ERROR" +.LC84: + .string "\r\nDRAM range verified.\r\n" +.LC85: + .string "Done.\r\n" + .section .rom.text +.globl ram_check + .type ram_check, @function +ram_check: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $12, %esp + movl 12(%ebp), %edi + movl 8(%ebp), %esi + pushl %edi + pushl %esi + movl %esi, %ebx + pushl $.LC75 + pushl $7 + call do_printk + pushl %edi + pushl %esi + pushl $.LC76 + pushl $7 + call do_printk + addl $32, %esp + jmp .L1354 +.L1355: + testl $1048575, %ebx + jne .L1356 + pushl %eax + pushl %ebx + pushl $.LC77 + pushl $7 + call do_printk + addl $16, %esp +.L1356: +#APP + movnti %ebx, (%ebx) +#NO_APP + addl $4, %ebx +.L1354: + cmpl %edi, %ebx + jb .L1355 + pushl %eax + pushl %ebx + xorl %ebx, %ebx + pushl $.LC78 + pushl $7 + call do_printk + pushl %edi + pushl %esi + pushl $.LC79 + pushl $7 + call do_printk + addl $32, %esp + jmp .L1359 +.L1360: + testl $1048575, %esi + jne .L1361 + pushl %eax + pushl %esi + pushl $.LC77 + pushl $7 + call do_printk + addl $16, %esp +.L1361: + movl (%esi), %eax + cmpl %esi, %eax + je .L1363 + pushl %eax + incl %ebx + pushl %esi + pushl $.LC80 + pushl $3 + call do_printk + addl $16, %esp + cmpl $256, %ebx + jg .L1371 +.L1363: + addl $4, %esi +.L1359: + cmpl %edi, %esi + jb .L1360 + pushl %eax + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $16, %esp + testl %ebx, %ebx + je .L1368 +.L1366: + pushl %eax + pushl %eax + pushl $.LC82 + pushl $7 + call do_printk + movl $.LC83, %eax + call die + jmp .L1372 +.L1371: + pushl %edi + pushl %edi + pushl $.LC81 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1366 +.L1368: + pushl %esi + pushl %esi + pushl $.LC84 + pushl $7 + call do_printk +.L1372: + movl $.LC85, 12(%ebp) + addl $16, %esp + movl $7, 8(%ebp) + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + jmp do_printk + .size ram_check, .-ram_check + .section .rom.data.str1.1 +.LC86: + .string "\r\n\r\n\r\nINIT detected from " +.LC87: + .string "%s --- { APICID = %02x NODEID = %02x COREID = %02x} ---\r\n" +.LC88: + .string "\r\nIssuing SOFT_RESET...\r\n" +.LC89: + .string "fidvid_ap_stage1: time out while reading from BSP on " +.LC90: + .string "fidvid_ap_stage3: time out while reading from BSP on " +.LC91: + .string "while waiting for BSP signal to STOP, timeout in ap " +.LC92: + .string "BIST failed: %08x" +.LC93: + .string "*sysinfo range: [" +.LC94: + .string "," +.LC95: + .string ")\r\n" +.LC96: + .string "bsp_apicid=" +.LC97: + .string "core0 started: " +.LC98: + .string "started ap apicid: " +.LC99: + .string "begin msr fid, vid " +.LC100: + .string "end msr fid, vid " +.LC101: + .string "ht reset -\r\n" +.LC102: + .string "v_esp=" +.LC103: + .string "testx = " +.LC104: + .string "Copying data from cache to RAM -- switching to use RAM as stack... " +.LC105: + .string "Done\r\n" +.LC106: + .string "Disabling cache as ram now \r\n" +.LC107: + .string "Clearing initial memory region: " +.LC108: + .string "Uncompressing coreboot to RAM.\r\n" +.LC109: + .string "src=" +.LC110: + .string "dst=" +.LC111: + .string "coreboot_ram.nrv2b length = " +.LC112: + .string "coreboot_ram.bin length = " +.LC113: + .string "Jumping to coreboot.\r\n" +.LC114: + .string "should not be here -\r\n" +.LC115: + .string "fidvid_ap_stage2: time out while reading from BSP on " +.LC116: + .string "fidvid_bsp_stage1: time out while reading from ap " +.LC117: + .string "fidvid_bsp_stage2: time out while reading from ap " + .section .rom.text +.globl real_main + .type real_main, @function +real_main: + pushl %ebp + movl %esp, %ebp + pushl %edi + pushl %esi + pushl %ebx + subl $348, %esp + cmpl $0, 8(%ebp) + jne .L1374 + call read_nb_cfg_54 + leal -112(%ebp), %edx + pushl %eax + pushl %edx + call get_node_core_id + movl -108(%ebp), %esi + movl -112(%ebp), %ebx + popl %edx + testl %esi, %esi + movl %esi, -156(%ebp) + movl %ebx, -160(%ebp) + jne .L1376 + movl $-1073676257, %ecx +#APP + rdmsr +#NO_APP + orl $4194304, %edx +#APP + wrmsr +#NO_APP +.L1376: + movl $27, %ecx +#APP + rdmsr +#NO_APP + andl $2047, %eax + xorb %dl, %dl + orl $-18872320, %eax +#APP + wrmsr +#NO_APP + movl -18874336, %edi + shrl $24, %edi + cmpl $0, 12(%ebp) + je .L1378 + pushl %eax + pushl %eax + pushl %esi + pushl %ebx + pushl %edi + pushl $.LC86 + pushl $.LC87 + pushl $7 + call do_printk + addl $28, %esp + pushl $.LC88 + pushl $.LC5 + pushl $7 + call do_printk + call soft_reset + addl $16, %esp +.L1378: + cmpl $0, -156(%ebp) + jne .L1380 + movl -160(%ebp), %eax + movl $3320, %ecx + movl %ecx, %edx + addl $24, %eax + andl $31, %eax + sall $11, %eax + orl $-2147483540, %eax + movl %eax, -340(%ebp) +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $112, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1380: + movl %edi, %ecx + sall $24, %ecx + movl %ecx, %eax + orl $51, %eax + testl %edi, %edi + movl %ecx, -288(%ebp) + movl %eax, -18873472 + je .L1374 + cmpl $0, -156(%ebp) + jne .L1383 + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + movl %eax, -336(%ebp) + shrl $16, %eax + movl %edx, %ebx + andl $63, %eax + cmpl $41, %eax + jbe .L1385 + movl -336(%ebp), %eax + shrl $8, %eax + andl $63, %eax + addl $10, %eax + cmpl $41, %eax + jbe .L1385 + movl $12, %eax +.L1385: + movl %ebx, %esi + andl $63, %ebx + andl $63, -336(%ebp) + andl $4128768, %esi + sall $8, %eax + movl $-1073676223, %ecx + orl -288(%ebp), %eax + movl $1, %edx + sall $8, %ebx + orl -336(%ebp), %ebx + orl %eax, %esi + movl %ebx, %eax +#APP + wrmsr +#NO_APP + xorl %eax, %eax + movl $0, -28(%ebp) + call wait_cpu_state + testl %eax, %eax + je .L1388 + movl %edi, %edx + movl $.LC89, %eax + call print_initcpu8 +.L1388: + movl %esi, %eax + movl $999999, %ebx + orl $1, %eax + movl %eax, -18873472 +.L1390: + xorl %eax, %eax + movl $896, %edx + leal -28(%ebp), %ecx + call lapic_remote_read + testl %eax, %eax + jne .L1391 + movzbl -25(%ebp), %eax + cmpl %edi, %eax + je .L1393 +.L1391: + decl %ebx + je .L1533 + jmp .L1390 +.L1393: + movl -28(%ebp), %edx + movl $1, %ecx + movl %edi, %eax + andl $16776960, %edx + call set_fidvid + movl %eax, %esi + andl $16776960, %esi + orl -288(%ebp), %esi + movl %eax, -28(%ebp) +.L1395: + orl $2, %esi + xorl %eax, %eax + movl $3, %edx + movl %esi, -18873472 + call wait_cpu_state + testl %eax, %eax + je .L1383 + movl %edi, %edx + movl $.LC90, %eax + call print_initcpu8 +.L1383: + movl $99, %ebx +.L1397: + xorl %eax, %eax + movl $68, %edx + call wait_cpu_state + testl %eax, %eax + je .L1398 + decl %ebx + cmpl $-1, %ebx + jne .L1397 + movl %edi, %edx + movl $.LC91, %eax + call print_initcpu8 +.L1398: + orl $68, -288(%ebp) + movl -288(%ebp), %edx + movl %edx, -18873472 + call set_init_ram_access +#APP + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax, %cr0 + movl $0x269, %ecx + xorl %edx, %edx + xorl %eax, %eax + wrmsr + movl $0xC0010010, %ecx + rdmsr + andl $(~(3<<18)), %eax + wrmsr + movl $0x2ff, %ecx + xorl %edx, %edx + movl $0x00000800, %eax + wrmsr + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + +#NO_APP +.L1401: +#APP + hlt +#NO_APP + jmp .L1401 +.L1374: + movb $-121, %al +#APP + outb %al, $46 +#NO_APP + movb $1, %al +#APP + outb %al, $46 +#NO_APP + movb $85, %al +#APP + outb %al, $46 + outb %al, $46 +#NO_APP + movb $35, %al +#APP + outb %al, $46 +#NO_APP + movb $17, %al +#APP + outb %al, $47 +#NO_APP + movb $36, %al +#APP + outb %al, $46 + inb $47, %al +#NO_APP + testb $14, %al + movb %al, %dl + je .L1402 + movb $36, %al +#APP + outb %al, $46 +#NO_APP + orl $16, %edx + movzbl %dl, %eax +#APP + outb %al, $47 +#NO_APP + movb $7, %al +#APP + outb %al, $46 + outb %al, $47 +#NO_APP + movb $100, %al +#APP + outb %al, $46 +#NO_APP + movb $8, %al +#APP + outb %al, $47 +#NO_APP + movb $101, %al +#APP + outb %al, $46 +#NO_APP + movb $32, %al +#APP + outb %al, $47 +#NO_APP +.L1402: + movb $7, %al +#APP + outb %al, $46 +#NO_APP + movb $1, %cl + movb %cl, %al +#APP + outb %al, $47 +#NO_APP + movb $48, %dl + movb %dl, %al +#APP + outb %al, $46 +#NO_APP + xorl %eax, %eax +#APP + outb %al, $47 +#NO_APP + movb $96, %al +#APP + outb %al, $46 +#NO_APP + movb $3, %al +#APP + outb %al, $47 +#NO_APP + movb $97, %al +#APP + outb %al, $46 +#NO_APP + movb $-8, %al +#APP + outb %al, $47 +#NO_APP + movb %dl, %al +#APP + outb %al, $46 +#NO_APP + movb %cl, %al +#APP + outb %al, $47 +#NO_APP + movb $2, %al +#APP + outb %al, $46 + outb %al, $47 +#NO_APP + xorl %ebx, %ebx +.L1404: + movl register_values.6108(,%ebx,4), %edx + movl %edx, %eax + movl %edx, %ecx + xorb %al, %al + andl $252, %ecx + shrl $4, %eax + movl $3320, %edx + orl %eax, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %esi + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movb $-8, %dl + andl register_values.6108+4(,%ebx,4), %edi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + orl register_values.6108+8(,%ebx,4), %edi + movl %esi, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + addl $3, %ebx + cmpl $117, %ebx + jne .L1404 + xorl %ecx, %ecx + movl $3, %edx + movl $392, %eax + call read_option + pushl $3 + andl $7, %eax + movzbl divisor.1504(%eax), %eax + pushl %eax + pushl $1016 + call uart8250_init + addl $12, %esp + cmpl $0, 8(%ebp) + je .L1406 + pushl %eax + pushl 8(%ebp) + pushl $.LC92 + pushl $0 + call do_printk + movl $.LC7, %eax + call die + addl $16, %esp +.L1406: + pushl %eax + movl $-2147434388, %edi + pushl $console_test.1909 + movl $3320, %ebx + pushl $.LC5 + pushl $6 + call do_printk + addl $12, %esp + pushl $.LC93 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $847872 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC94 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $849712 + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC95 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC96 + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl $0 + pushl $.LC6 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl %edi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-4, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147433496, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + addl $16, %esp + testb $48, %ah + jne .L1408 + movl $-2147434392, %ebx + movl $3320, %edi + movl %ebx, %eax + movl %edi, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %edi, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + orl $1823, %ecx + movb $-4, %dl + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP +.L1408: + xorl %ecx, %ecx + movl $1, %edx + movl $399, %eax + movl $1, %edi + call read_option + testl %eax, %eax + jne .L1412 + movl $-2147433496, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movl %esi, %edx +#APP + inl %dx, %eax +#NO_APP + shrl $12, %eax + andl $3, %eax + leal 1(%eax), %edi +.L1412: + movl $3320, %ecx + movl $-2147434400, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl $-2147434400, %eax +#APP + outl %eax, %dx +#NO_APP + leal -1(%edi), %eax + andl $-983153, %esi + sall $16, %eax + movl %ebx, %edx + orl %eax, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $-2147434392, %edi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + andl $-251682817, %esi + movl %ebx, %edx + orl $251707392, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + call get_nodes + movl $1, %ebx + movl %eax, %esi + pushl %eax + pushl $.LC97 + pushl $.LC5 + pushl $7 + call do_printk + addl $16, %esp + jmp .L1413 +.L1520: + leal 24(%ebx), %eax + movl $3320, %edx + andl $31, %eax + sall $11, %eax + orl $-2147483540, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + testb $64, %al + je .L1520 + movl %ebx, %edx + movl $.LC12, %eax + call print_initcpu8_nocr + incl %ebx +.L1413: + cmpl %esi, %ebx + jb .L1520 + pushl %eax + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + xorl %ecx, %ecx + movl $1, %edx + movl $399, %eax + call read_option + addl $16, %esp + testl %eax, %eax + jne .L1417 + call get_nodes + movl $0, -280(%ebp) + movl %eax, -284(%ebp) + jmp .L1419 +.L1420: + movl -280(%ebp), %esi + movl $3320, %edx + addl $24, %esi + andl $31, %esi + sall $15, %esi + movl %esi, %ecx + orb $48, %ch + shrl $4, %ecx + movl %ecx, %eax + orl $-2147483416, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %edi + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + testb $48, %ah + je .L1421 + movl %ecx, %ebx + movl $3320, %ecx + orl $-2147483580, %ebx + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -336(%ebp) + movl %ecx, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + orl $134217728, -336(%ebp) + movl %ebx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + shrl $4, %esi + movl %ecx, %edx + movl %esi, -340(%ebp) + orl $-2147483544, -340(%ebp) + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %esi + movl %ecx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $32, %esi + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP +.L1421: + incl -280(%ebp) +.L1419: + movl -284(%ebp), %ecx + cmpl %ecx, -280(%ebp) + jne .L1420 +.L1417: + pushl %eax + pushl $.LC98 + pushl $.LC5 + pushl $7 + call do_printk + movl $wait_ap_started, %ecx + movl $2, %edx + xorl %eax, %eax + movl $0, (%esp) + call for_each_ap + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl $847872, %eax + call ht_setup_chains_x + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + addl $12, %esp + movl %edx, %ebx + pushl $.LC99 + movl %eax, %esi + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + movl $-2147434400, %eax + movl $3320, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + shrl $4, %eax + addl $16, %esp + andl $7, %eax + movl %eax, -276(%ebp) + movl $24, -140(%ebp) + jmp .L1423 +.L1424: + movl -140(%ebp), %edi + movl $3320, %ecx + andl $31, %edi + sall $15, %edi + movl %edi, %esi + orl $12288, %esi + shrl $4, %esi + movl %esi, %edx + orl $-2147483432, %edx + movl %edx, -336(%ebp) + movl %edx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl $3324, %ebx + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, -340(%ebp) + movl %ecx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + andl $-1880096768, -340(%ebp) + movl %ebx, %edx + orl $536880912, -340(%ebp) + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ecx, %edx + orl $-2147483436, %eax +#APP + outl %eax, %dx +#NO_APP + movl $81962759, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + shrl $4, %edi + movl %ecx, %edx + movl %edi, -336(%ebp) + orl $-2147482988, -336(%ebp) + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %edx +#APP + inl %dx, %eax +#NO_APP + movl %eax, %edi + movl %ecx, %edx + movl -336(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + orl $16384, %edi + movl %ebx, %edx + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %esi, %eax + movl %ecx, %edx + orl $-2147483520, %eax +#APP + outl %eax, %dx +#NO_APP + movl $587663104, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + orl $-2147483516, %esi + movl %ecx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movl $1253651, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + incl -140(%ebp) +.L1423: + movl -276(%ebp), %eax + addl $25, %eax + cmpl %eax, -140(%ebp) + jne .L1424 + movl $-1073676222, %ecx +#APP + rdmsr +#NO_APP + movl %eax, %ebx + movl %edx, %ecx + shrl $16, %eax + andl $63, %eax + cmpl $41, %eax + jbe .L1426 + shrl $8, %ebx + andl $63, %ebx + leal 10(%ebx), %eax + cmpl $41, %eax + jbe .L1426 + movl $12, %eax +.L1426: + movl %eax, %esi + subl $12, %esp + andl $4128768, %ecx + movl $1, %edx + leal -96(%ebp), %eax + sall $8, %esi + movl $1, -18873472 + orl %ecx, %esi + movl $store_ap_apicid, %ecx + pushl %eax + xorl %eax, %eax + movl $0, -96(%ebp) + call for_each_ap + addl $16, %esp + movl $0, -272(%ebp) + jmp .L1429 +.L1430: + movl -272(%ebp), %ecx + movl $999999, %ebx + movl $0, -28(%ebp) + movl -92(%ebp,%ecx,4), %edi +.L1431: + leal -28(%ebp), %ecx + movl $896, %edx + movl %edi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L1432 + cmpb $1, -28(%ebp) + je .L1434 +.L1432: + decl %ebx + je .L1537 + jmp .L1431 +.L1434: + movl -28(%ebp), %ecx + movl %esi, %edx + andl $65280, %edx + andl $16776960, %ecx + movl %ecx, %eax + andl $65280, %eax + cmpl %eax, %edx + jbe .L1436 + movl %ecx, %esi +.L1436: + incl -272(%ebp) +.L1429: + movl -272(%ebp), %ebx + cmpl -96(%ebp), %ebx + jb .L1430 + movl $1, %ecx + movl %esi, %edx + xorl %eax, %eax + call set_fidvid + movl $0, -116(%ebp) + movl %eax, %ebx + andl $16776960, %ebx + jmp .L1439 +.L1440: + movl -116(%ebp), %eax + movl $999999, %edi + movl $0, -28(%ebp) + movl -92(%ebp,%eax,4), %esi + movl %esi, %eax + sall $24, %eax + orl $2, %eax + orl %ebx, %eax + movl %eax, -18873472 +.L1441: + leal -28(%ebp), %ecx + movl $896, %edx + movl %esi, %eax + call lapic_remote_read + testl %eax, %eax + jne .L1442 + cmpb $2, -28(%ebp) + je .L1444 +.L1442: + decl %edi + je .L1538 + jmp .L1441 +.L1444: + incl -116(%ebp) +.L1439: + movl -116(%ebp), %edx + cmpl -96(%ebp), %edx + jb .L1440 + orl $3, %ebx + movl $-1073676222, %ecx + movl %ebx, -18873472 +#APP + rdmsr +#NO_APP + pushl %edi + movl %edx, %ebx + pushl $.LC100 + movl %eax, %esi + pushl $.LC5 + pushl $7 + call do_printk + addl $12, %esp + pushl %ebx + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl %esi + pushl $.LC23 + pushl $7 + call do_printk + addl $12, %esp + pushl $.LC7 + pushl $.LC5 + pushl $7 + call do_printk + call get_nodes + addl $16, %esp + movl $0, -264(%ebp) + movl $0, -268(%ebp) + movl %eax, -260(%ebp) + jmp .L1447 +.L1448: + movl -264(%ebp), %esi + movl $3320, %edx + addl $24, %esi + andl $31, %esi + sall $15, %esi + movl %esi, %ebx + shrl $4, %ebx + orl $-2147482660, %ebx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + xorl %edi, %edi + movl %eax, -136(%ebp) + movl %eax, -344(%ebp) + movl $152, -144(%ebp) +.L1449: + movl %esi, %eax + movl $3320, %edx + shrl $4, %eax + orl -144(%ebp), %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $7, %eax + cmpl $3, %eax + jne .L1450 + movl %edi, %ecx + movb $-1, %al + sall %cl, %eax + notl %eax + andl %eax, -344(%ebp) + movl $37, %eax + sall %cl, %eax + orl %eax, -344(%ebp) +.L1450: + addl $32, -144(%ebp) + addl $8, %edi + cmpl $248, -144(%ebp) + jne .L1449 + movl -136(%ebp), %eax + cmpl %eax, -344(%ebp) + je .L1453 + movl $3320, %edx + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl -344(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl $1, -268(%ebp) +.L1453: + incl -264(%ebp) +.L1447: + movl -260(%ebp), %edx + cmpl %edx, -264(%ebp) + jne .L1448 + movl 849692, %ecx + movl $0, -248(%ebp) + movl $0, -252(%ebp) + movl $0, -316(%ebp) + movl %ecx, -256(%ebp) + jmp .L1456 +.L1457: + movl -316(%ebp), %eax + addl $849308, %eax + movl 20(%eax), %ebx + movl 12(%eax), %edx + movl 8(%eax), %ecx + movl %ebx, -204(%ebp) + movl -316(%ebp), %ebx + movl %edx, -240(%ebp) + movb 4(%eax), %dl + movb 16(%eax), %al + movl %ecx, -196(%ebp) + movl 849308(%ebx), %ebx + movb %dl, -189(%ebp) + addl %ecx, %edx + movb %al, -197(%ebp) + movzbl %dl, %edx + movl %ebx, %eax + movl %ebx, -236(%ebp) + call ht_read_freq_cap + movb -197(%ebp), %dl + addl -204(%ebp), %edx + movzbl %dl, %edx + movl %eax, %ebx + movl -240(%ebp), %eax + call ht_read_freq_cap + andl %eax, %ebx + movzwl %bx, %eax +#APP + bsrl %eax, %eax + jnz 1f + movl $-1, %eax + 1: + +#NO_APP + movl -196(%ebp), %edx + movl -236(%ebp), %ebx + movzbl -189(%ebp), %ecx + movb %al, -217(%ebp) + movzbl %dh, %eax + shrl $4, %ebx + movl %ebx, -224(%ebp) + leal (%eax,%ecx), %ebx + orl -224(%ebp), %ebx + movl %ecx, -208(%ebp) + movl $3320, %ecx + movl %ecx, %edx + movl %ebx, %edi + andl $2147483644, %edi + orl $-2147483648, %edi + movl %edi, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ebx, %eax + andl $3, %eax + addw $3324, %ax + movw %ax, -226(%ebp) + movl %eax, %edx +#APP + inb %dx, %al +#NO_APP + movzbl -197(%ebp), %ebx + movl %eax, %esi + movl -240(%ebp), %eax + movl %ebx, -212(%ebp) + movl -204(%ebp), %ebx + shrl $4, %eax + movl %eax, -232(%ebp) + movzbl %bh, %edx + addl -212(%ebp), %edx + orl %eax, %edx + movl %edx, %ebx + andl $2147483644, %ebx + orl $-2147483648, %ebx + movl %edx, -336(%ebp) + movl %ebx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl -336(%ebp), %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + andl $15, %esi + movl %esi, %edx + cmpb -217(%ebp), %dl + movb -217(%ebp), %dl + movb %al, -329(%ebp) + setne -312(%ebp) + andl $15, %eax + cmpb %dl, %al + movb -312(%ebp), %al + setne %dl + orl %edx, %eax + movl %ecx, %edx + movl %eax, %esi + movl %edi, %eax + andl $1, %esi +#APP + outl %eax, %dx +#NO_APP + movzbl -217(%ebp), %edi + movw -226(%ebp), %dx + movl %edi, %eax +#APP + outb %al, %dx +#NO_APP + movl %ebx, %eax + movl %ecx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx +#APP + outb %al, %dx +#NO_APP + movl -196(%ebp), %edi + movb -189(%ebp), %al + shrl $16, %edi + addl %edi, %eax + movzbl %al, %edx + movl -236(%ebp), %eax + call ht_read_width_cap + movl -204(%ebp), %ecx + shrl $16, %ecx + movl %ecx, -216(%ebp) + movb %al, %bl + movb -197(%ebp), %al + addl %ecx, %eax + movzbl %al, %edx + movl -240(%ebp), %eax + call ht_read_width_cap + movl %ebx, %edx + andl $7, %edx + movb link_width_to_pow2.3155(%edx), %dl + shrb $4, %bl + andl $7, %ebx + movb link_width_to_pow2.3155(%ebx), %cl + movb %dl, -129(%ebp) + movb %al, %dl + andl $7, %eax + shrb $4, %dl + movb link_width_to_pow2.3155(%eax), %al + andl $7, %edx + movb link_width_to_pow2.3155(%edx), %dl + cmpb -129(%ebp), %dl + jbe .L1458 + movb -129(%ebp), %dl +.L1458: + cmpb %cl, %al + movzbl %dl, %edx + jbe .L1459 + movb %cl, %al +.L1459: + movzbl %al, %eax + movb pow2_to_link_width.3156(%edx), %dl + movzbl pow2_to_link_width.3156(%eax), %eax + movl -208(%ebp), %ebx + sall $4, %eax + orl %eax, %edx + movb %dl, -130(%ebp) + movl %edi, %edx + andl $255, %edx + leal 1(%edx,%ebx), %edi + movl $3320, %ebx + orl -224(%ebp), %edi + movl %ebx, %edx + movl %edi, %ecx + andl $2147483644, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + andl $119, %eax + movzbl -130(%ebp), %edi + movl %ebx, %edx + cmpb -130(%ebp), %al + setne %al + movzbl %al, %eax + orl %eax, %esi + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx +#APP + outb %al, %dx +#NO_APP + movl %edi, %edx + andl $7, %edi + movl -212(%ebp), %eax + andl $112, %edx + sarl $4, %edx + sall $4, %edi + orl %edx, %edi + movzbl -216(%ebp),%edx + leal 1(%edx,%eax), %ecx + orl -232(%ebp), %ecx + movl %ecx, %edx + andl $2147483644, %edx + orl $-2147483648, %edx + movl %edx, -340(%ebp) + movl %edx, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx + andl $3, %edx + addw $3324, %dx + movw %dx, -336(%ebp) +#APP + inb %dx, %al +#NO_APP + movb %al, %cl + movl %ebx, %edx + movl -340(%ebp), %eax +#APP + outl %eax, %dx +#NO_APP + movl %edi, %eax + movl -336(%ebp), %edx + andl $119, %eax +#APP + outb %al, %dx +#NO_APP + andl $119, %ecx + movl %edi, %ebx + xorl %eax, %eax + cmpb %bl, %cl + setne %al + orl %eax, %esi + incl -248(%ebp) + orl %esi, -252(%ebp) + addl $24, -316(%ebp) +.L1456: + movl -256(%ebp), %eax + cmpl %eax, -248(%ebp) + jne .L1457 + movb 849696, %dl + movl $0, -188(%ebp) + movl $0, -148(%ebp) + movb %dl, -241(%ebp) + jmp .L1461 +.L1462: + movzbl %dl, %eax + movl $3320, %ebx + leal 224(,%eax,4), %eax + movl %ebx, %edx + orl $-2147434240, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + andl $16711680, %eax + orl $-2147483648, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $65535, %eax + cmpl $4130, %eax + je .L1463 + cmpl $4318, %eax + jne .L1465 +.L1463: + movl %ecx, %edi + andl $240, %ecx + shrl $4, %ecx + andl $3840, %edi + leal 24(%ecx), %ebx + movl $3320, %edx + shrl $8, %edi + andl $31, %ebx + sall $15, %ebx + movl %edi, %eax + movl %ebx, %ecx + sall $5, %eax + addl $152, %eax + shrl $4, %ecx + orl %eax, %ecx + orl $-2147483648, %ecx + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + andl $7, %eax + cmpl $7, %eax + jne .L1466 + movl %ebx, %esi + movb $-8, %dl + shrl $4, %esi + orl $-2147482660, %esi + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl $255, %ebx + leal 0(,%edi,8), %ecx + sall %cl, %ebx + notl %ebx + andl %eax, %ebx + movl %eax, -336(%ebp) + movl $37, %eax + sall %cl, %eax + orl %eax, %ebx + cmpl -336(%ebp), %ebx + je .L1466 + movb $-8, %dl + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl + movl %ebx, %eax +#APP + outl %eax, %dx +#NO_APP + movl $1, %eax + jmp .L1469 +.L1466: + xorl %eax, %eax +.L1469: + orl %eax, -188(%ebp) +.L1465: + incl -148(%ebp) +.L1461: + movzbl -241(%ebp), %eax + cmpl %eax, -148(%ebp) + movb -148(%ebp), %dl + jne .L1462 + call mcp55_early_setup_x + movl -188(%ebp), %edx + orl %edx, -252(%ebp) + movl -268(%ebp), %ecx + orl %eax, -252(%ebp) + orl -252(%ebp), %ecx + je .L1471 + pushl %ecx + pushl $.LC101 + pushl $.LC5 + pushl $6 + call do_printk + call soft_reset + addl $16, %esp +.L1471: + movl 849304, %ebx + xorl %esi, %esi + xorl %edi, %edi + movl $68, -18873472 + movl $0, -152(%ebp) + movl %ebx, -184(%ebp) + jmp .L1473 +.L1474: + leal 24(%esi), %eax + movl $1, %ecx + andl $31, %eax + sall $15, %eax + movl %eax, %edx + leal 848264(%edi), %ebx + orb $16, %dh + movl %edx, 8(%ebx) + movl %eax, %edx + movl %eax, 4(%ebx) + orb $32, %dh + orb $48, %ah + movl %esi, 848264(%edi) + movl %edx, 12(%ebx) + movl %eax, 16(%ebx) +.L1475: + movl -152(%ebp), %eax + addl %ecx, %eax + movw spd_addr.6923-2(%eax,%eax), %dx + movw %dx, 18(%ebx,%ecx,2) + movw spd_addr.6923+6(%eax,%eax), %ax + movw %ax, 26(%ebx,%ecx,2) + incl %ecx + cmpl $5, %ecx + jne .L1475 + addl $8, -152(%ebp) + incl %esi + addl $36, %edi +.L1473: + cmpl -184(%ebp), %esi + jl .L1474 + xorl %ecx, %ecx +.L1478: + movl %ecx, %eax + movl $3320, %edx + shrl $4, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + cmpl $57151710, %eax + je .L1479 + addl $4096, %ecx + cmpl $268435456, %ecx + jne .L1478 + orl $-1, %ecx +.L1479: + shrl $4, %ecx + movl $3320, %ebx + movl %ecx, %eax + movl %ebx, %edx + andl $268435452, %eax + orl $-2147483616, %eax +#APP + outl %eax, %dx +#NO_APP + movl $4097, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %eax + movl %ebx, %edx + andl $268435452, %eax + orl $-2147483612, %eax +#APP + outl %eax, %dx +#NO_APP + movl $4353, %eax + movb $-4, %dl +#APP + outl %eax, %dx +#NO_APP + orl $4, %ecx + movl %ebx, %edx + movl %ecx, %eax + andl $2147483644, %eax + orl $-2147483648, %eax +#APP + outl %eax, %dx +#NO_APP + movl %ecx, %edx + movl $1, %eax + andl $2, %edx + addw $3324, %dx + movzwl %dx, %edx +#APP + outw %ax, %dx +#NO_APP + movl $4097, %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + movl $4353, %edx +#APP + inb %dx, %al +#NO_APP + movzbl %al, %eax +#APP + outb %al, %dx +#NO_APP + pushl %edx + pushl $847872 + pushl $848264 + pushl 849304 + call sdram_initialize +#APP + movl %esp, %eax + +#NO_APP + movl %eax, %edx + movl $.LC102, %eax + call print_debug_pcar + movl $1515870810, %edx + movl $.LC103, %eax + call print_debug_pcar + movl $819200, %esi + movl $2064384, %edi + call set_init_ram_access + addl $12, %esp + pushl $.LC104 + pushl $.LC5 + pushl $7 + call do_printk + movl $8192, %ecx +#APP + cld + rep; movsl + +#NO_APP + movl $-1245184, %eax +#APP + subl %eax, %ebp + subl %eax, %esp + +#NO_APP + addl $12, %esp + pushl $.LC105 + pushl $.LC5 + pushl $7 + call do_printk + movl $1515870810, %edx + movl $.LC103, %eax + call print_debug_pcar + addl $12, %esp + pushl $.LC106 + pushl $.LC5 + pushl $7 + call do_printk +#APP + pushl %edx + pushl %ecx + + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax, %cr0 + movl $0x269, %ecx + xorl %edx, %edx + xorl %eax, %eax + wrmsr + movl $0xC0010010, %ecx + rdmsr + andl $(~(3<<18)), %eax + wrmsr + movl $0x2ff, %ecx + xorl %edx, %edx + movl $0x00000800, %eax + wrmsr + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + + popl %ecx + popl %edx + +#NO_APP + addl $12, %esp + movl $-2147434388, %esi + pushl $.LC107 + pushl $.LC5 + pushl $7 + call do_printk + call clear_init_ram + addl $12, %esp + pushl $.LC105 + pushl $.LC5 + pushl $7 + call do_printk + movl %esi, %eax + movl %ebx, %edx +#APP + outl %eax, %dx +#NO_APP + movb $-4, %dl +#APP + inl %dx, %eax +#NO_APP + movl %eax, %ecx + movl %ebx, %edx + movl %esi, %eax +#APP + outl %eax, %dx +#NO_APP + andb $253, %ch + movb $-4, %dl + orb $2, %ch + movl %ecx, %eax +#APP + outl %eax, %dx +#NO_APP + addl $12, %esp + pushl $.LC108 + pushl $.LC5 + pushl $7 + call do_printk +#APP + leal _liseg, %eax + leal _iseg, %ebx + +#NO_APP + movl %eax, %edx + movl %eax, %esi + movl $.LC109, %eax + addl $4, %esi + movl %ebx, -164(%ebp) + xorl %edi, %edi + call print_debug_cp_run + movl %ebx, %edx + movl $.LC110, %eax + call print_debug_cp_run + xorl %ebx, %ebx + addl $16, %esp + movl %esi, -120(%ebp) + xorl %esi, %esi + movl $0, -168(%ebp) + movl $1, -172(%ebp) + jmp .L1550 +.L1483: + movl -120(%ebp), %edx + movl -164(%ebp), %ecx + movb (%edx,%edi), %al + incl %edi + movl -168(%ebp), %edx + movb %al, (%ecx,%edx) + incl %edx + movl %edx, -168(%ebp) +.L1550: + testl %esi, %esi + je .L1484 + decl %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + andl $1, %eax + jmp .L1486 +.L1484: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax +.L1486: + testb %al, %al + jne .L1483 + movl $1, %edx +.L1488: + addl %edx, %edx + testl %esi, %esi + je .L1489 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %edx + testl %ecx, %ecx + jne .L1491 + jmp .L1543 +.L1489: + movl -120(%ebp), %ecx + movl (%ecx,%edi), %ebx + addl $4, %edi + movl $31, %ecx + movl %ebx, %eax + shrl $31, %eax + addl %eax, %edx +.L1491: + leal -1(%ecx), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + xorl $1, %eax + andl $1, %eax + jmp .L1493 +.L1543: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + xorl $1, %eax + andl $1, %eax +.L1493: + testb %al, %al + jne .L1488 + movl -172(%ebp), %ecx + cmpl $2, %edx + movl %ecx, -180(%ebp) + je .L1497 + movl -120(%ebp), %ecx + sall $8, %edx + movzbl (%ecx,%edi), %eax + incl %edi + leal -768(%edx,%eax), %eax + cmpl $-1, %eax + je .L1498 + incl %eax + movl %eax, -180(%ebp) + movl %eax, -172(%ebp) +.L1497: + testl %esi, %esi + je .L1500 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %eax + testl %ecx, %ecx + jne .L1502 + jmp .L1545 +.L1500: + movl -120(%ebp), %eax + movl $31, %ecx + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + addl %eax, %eax +.L1502: + leal -1(%ecx), %esi + movl %ebx, %edx + movl %esi, %ecx + shrl %cl, %edx + andl $1, %edx + jmp .L1504 +.L1545: + movl -120(%ebp), %edx + movl $31, %esi + movl (%edx,%edi), %ebx + addl $4, %edi + movl %ebx, %edx + shrl $31, %edx +.L1504: + addl %eax, %edx + jne .L1505 + movl $1, %edx +.L1507: + addl %edx, %edx + testl %esi, %esi + je .L1508 + leal -1(%esi), %ecx + movl %ebx, %eax + shrl %cl, %eax + andl $1, %eax + addl %eax, %edx + testl %ecx, %ecx + jne .L1510 + jmp .L1546 +.L1508: + movl -120(%ebp), %ecx + movl (%ecx,%edi), %ebx + addl $4, %edi + movl $31, %ecx + movl %ebx, %eax + shrl $31, %eax + addl %eax, %edx +.L1510: + leal -1(%ecx), %esi + movl %ebx, %eax + movl %esi, %ecx + shrl %cl, %eax + xorl $1, %eax + andl $1, %eax + jmp .L1512 +.L1546: + movl -120(%ebp), %eax + movl $31, %esi + movl (%eax,%edi), %ebx + addl $4, %edi + movl %ebx, %eax + shrl $31, %eax + xorl $1, %eax + andl $1, %eax +.L1512: + testb %al, %al + jne .L1507 + addl $2, %edx +.L1505: + xorl %eax, %eax + cmpl $3328, -180(%ebp) + seta %al + addl %eax, %edx + movl %edx, -128(%ebp) + movl -164(%ebp), %edx + addl -168(%ebp), %edx + movl %edx, %ecx + subl -180(%ebp), %ecx + movl %ecx, -176(%ebp) + movb (%ecx), %al + movb %al, (%edx) + movl -168(%ebp), %eax + movl $0, -344(%ebp) + incl %eax + movl %eax, -124(%ebp) +.L1514: + movl -344(%ebp), %ecx + movl -176(%ebp), %eax + movl -164(%ebp), %edx + addl -344(%ebp), %edx + movl %edx, -336(%ebp) + movb 1(%ecx,%eax), %cl + movl -168(%ebp), %eax + movb %cl, 1(%eax,%edx) + movl -128(%ebp), %edx + incl -344(%ebp) + cmpl %edx, -344(%ebp) + jne .L1514 + movl -124(%ebp), %ecx + addl %edx, %ecx + movl %ecx, -168(%ebp) + jmp .L1550 +.L1498: + movl %edi, %edx + movl $.LC111, %eax + call print_debug_cp_run + movl -168(%ebp), %edx + movl $.LC112, %eax + call print_debug_cp_run + pushl %eax + pushl $.LC113 + pushl $.LC5 + pushl $7 + call do_printk +#APP + xorl %ebp, %ebp + cli + leal _iseg, %edi + jmp *%edi + +#NO_APP + addl $12, %esp + pushl $.LC114 + pushl $.LC5 + pushl $7 + call do_printk + leal -12(%ebp), %esp + popl %ebx + popl %esi + popl %edi + popl %ebp + ret +.L1533: + movl %edi, %edx + movl $.LC115, %eax + call print_initcpu8 + jmp .L1395 +.L1537: + movl %edi, %edx + movl $.LC116, %eax + call print_initcpu8 + jmp .L1436 +.L1538: + movl %esi, %edx + movl $.LC117, %eax + call print_initcpu8 + jmp .L1444 + .size real_main, .-real_main +.globl cache_as_ram_main + .type cache_as_ram_main, @function +cache_as_ram_main: + pushl %ebp + movl %esp, %ebp + popl %ebp + jmp real_main + .size cache_as_ram_main, .-cache_as_ram_main +.globl init_timer + .type init_timer, @function +init_timer: + pushl %ebp + movl %esp, %ebp + movl $196608, -18873568 + movl $11, -18873376 + movl $-1, -18873472 + popl %ebp + ret + .size init_timer, .-init_timer +.globl uart8250_rx_byte + .type uart8250_rx_byte, @function +uart8250_rx_byte: + pushl %ebp + movl %esp, %ebp + pushl %ebx + movl 8(%ebp), %ebx +.L1557: + movl %ebx, %ecx + leal 5(%ecx), %edx + movzwl %dx, %edx +#APP + inb %dx, %al +#NO_APP + testb $1, %al + je .L1557 + movzwl %bx, %edx +#APP + inb %dx, %al +#NO_APP + popl %ebx + movzbl %al, %eax + popl %ebp + ret + .size uart8250_rx_byte, .-uart8250_rx_byte + .section .rom.data + .align 2 + .type spd_addr.6923, @object + .size spd_addr.6923, 16 +spd_addr.6923: + .value 80 + .value 82 + .value 0 + .value 0 + .value 81 + .value 83 + .value 0 + .value 0 + .align 32 + .type next_fid_a.6719, @object + .size next_fid_a.6719, 144 +next_fid_a.6719: + .byte 0 + .byte 9 + .byte 9 + .byte 8 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 0 + .byte 11 + .byte 11 + .byte 9 + .byte 9 + .byte 10 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 0 + .byte 13 + .byte 11 + .byte 11 + .byte 11 + .byte 11 + .byte 12 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 0 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 13 + .byte 14 + .byte 15 + .byte 4 + .byte 9 + .byte 9 + .byte 9 + .byte 0 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 9 + .byte 4 + .byte 5 + .byte 10 + .byte 10 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 9 + .byte 5 + .byte 11 + .byte 11 + .byte 9 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 10 + .byte 5 + .byte 6 + .byte 12 + .byte 10 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 11 + .byte 6 + .byte 13 + .byte 11 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 12 + .byte 12 + .byte 6 + .byte 7 + .byte 12 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 13 + .byte 13 + .byte 13 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 14 + .byte 14 + .byte 14 + .byte 7 + .byte 14 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .align 32 + .type register_values.6108, @object + .size register_values.6108, 468 +register_values.6108: + .long 790596 + .long 63736 + .long 0 + .long 790604 + .long 63736 + .long 1 + .long 790612 + .long 63736 + .long 2 + .long 790620 + .long 63736 + .long 3 + .long 790628 + .long 63736 + .long 4 + .long 790636 + .long 63736 + .long 5 + .long 790644 + .long 63736 + .long 6 + .long 790652 + .long 63736 + .long 7 + .long 790592 + .long 63740 + .long 0 + .long 790600 + .long 63740 + .long 0 + .long 790608 + .long 63740 + .long 0 + .long 790616 + .long 63740 + .long 0 + .long 790624 + .long 63740 + .long 0 + .long 790632 + .long 63740 + .long 0 + .long 790640 + .long 63740 + .long 0 + .long 790648 + .long 63740 + .long 0 + .long 790660 + .long 72 + .long 0 + .long 790668 + .long 72 + .long 0 + .long 790676 + .long 72 + .long 0 + .long 790684 + .long 72 + .long 0 + .long 790692 + .long 72 + .long 0 + .long 790700 + .long 72 + .long 0 + .long 790708 + .long 72 + .long 0 + .long 790656 + .long 240 + .long 0 + .long 790664 + .long 240 + .long 0 + .long 790672 + .long 240 + .long 0 + .long 790680 + .long 240 + .long 0 + .long 790688 + .long 240 + .long 0 + .long 790696 + .long 240 + .long 0 + .long 790704 + .long 240 + .long 0 + .long 790732 + .long -33550392 + .long 0 + .long 790740 + .long -33550392 + .long 0 + .long 790748 + .long -33550392 + .long 0 + .long 790728 + .long -33550388 + .long 0 + .long 790736 + .long -33550388 + .long 0 + .long 790744 + .long -33550388 + .long 0 + .long 790756 + .long 64648 + .long 0 + .long 790760 + .long 64648 + .long 0 + .long 790764 + .long 64648 + .long 0 + .type divisor.1504, @object + .size divisor.1504, 8 +divisor.1504: + .byte 1 + .byte 2 + .byte 3 + .byte 6 + .byte 12 + .byte 24 + .byte 48 + .byte 96 + .align 32 + .type console_test.1909, @object + .size console_test.1909, 74 +console_test.1909: + .string "\r\n\r\ncoreboot-2.0.0nf570_Normal Thu Oct 30 16:44:01 GMT 2008 starting...\r\n" + .type pow2_to_link_width.3156, @object + .size pow2_to_link_width.3156, 6 +pow2_to_link_width.3156: + .byte 7 + .byte 4 + .byte 5 + .byte 0 + .byte 1 + .byte 3 + .type link_width_to_pow2.3155, @object + .size link_width_to_pow2.3155, 8 +link_width_to_pow2.3155: + .byte 3 + .byte 4 + .byte 0 + .byte 5 + .byte 1 + .byte 2 + .byte 0 + .byte 0 + .align 4 + .type C.181.6395, @object + .size C.181.6395, 16 +C.181.6395: + .long 0 + .long 4 + .long 4 + .long 4 + .align 32 + .type ctrl_devport_conf.6240, @object + .size ctrl_devport_conf.6240, 36 +ctrl_devport_conf.6240: + .long 36968 + .long -65281 + .long 10240 + .long 36964 + .long -65281 + .long 9216 + .long 36960 + .long -65281 + .long 8192 + .align 32 + .type ctrl_conf_2.6341, @object + .size ctrl_conf_2.6341, 112 +ctrl_conf_2.6341: + .long 16 + .long 116 + .long -4081 + .long 2512 + .long 16 + .long 32884 + .long -32769 + .long 32768 + .long 32 + .long 9288 + .long -65537 + .long 65536 + .long 32 + .long 10336 + .long -256 + .long 18 + .long 16 + .long 37092 + .long -5242881 + .long 5242880 + .long 34 + .long 9412 + .long -256 + .long 4 + .long 34 + .long 9412 + .long -256 + .long 5 + .align 32 + .type ctrl_conf_master_only.6340, @object + .size ctrl_conf_master_only.6340, 32 +ctrl_conf_master_only.6340: + .long 32 + .long 8320 + .long 251658239 + .long 16777216 + .long 34 + .long 9408 + .long -13 + .long 0 + .align 32 + .type ctrl_conf_mcp55_only.6339, @object + .size ctrl_conf_mcp55_only.6339, 528 +ctrl_conf_mcp55_only.6339: + .long 16 + .long 36928 + .long 0 + .long -880537378 + .long 16 + .long 37088 + .long -257 + .long 0 + .long 16 + .long 37092 + .long -5 + .long 0 + .long 16 + .long 37096 + .long -5650177 + .long 12288 + .long 16 + .long 131136 + .long 0 + .long -880537378 + .long 16 + .long 131320 + .long -49 + .long 16 + .long 16 + .long 65600 + .long 0 + .long -880537378 + .long 16 + .long 69696 + .long 0 + .long -880537378 + .long 16 + .long 69732 + .long -125829121 + .long 83886080 + .long 16 + .long 69752 + .long -4161537 + .long 3538944 + .long 16 + .long 69736 + .long -33501121 + .long 20917248 + .long 16 + .long 69744 + .long -524289 + .long 524288 + .long 16 + .long 69756 + .long -4081 + .long 1392 + .long 16 + .long 69880 + .long -49 + .long 16 + .long 16 + .long 196612 + .long -261 + .long 260 + .long 16 + .long 196668 + .long -167772161 + .long 167772160 + .long 16 + .long 196672 + .long 13172735 + .long 120782848 + .long 16 + .long 196680 + .long -8 + .long 5 + .long 16 + .long 196684 + .long -33357825 + .long 4980736 + .long 16 + .long 196724 + .long -64 + .long 0 + .long 16 + .long 196800 + .long 0 + .long -880537378 + .long 16 + .long 196804 + .long -8 + .long 7 + .long 16 + .long 32888 + .long -1056964609 + .long 419430400 + .long 16 + .long 200768 + .long 0 + .long -880537378 + .long 34 + .long 9445 + .long 0 + .long 104 + .long 34 + .long 9446 + .long 0 + .long 104 + .long 34 + .long 9447 + .long 0 + .long 104 + .long 34 + .long 9448 + .long 0 + .long 104 + .long 34 + .long 9467 + .long 0 + .long 96 + .long 34 + .long 9468 + .long 0 + .long 96 + .long 34 + .long 9429 + .long -13 + .long 8 + .long 34 + .long 9430 + .long -13 + .long 8 + .long 34 + .long 9454 + .long -13 + .long 8 + .align 32 + .type ctrl_conf_1_1.6338, @object + .size ctrl_conf_1_1.6338, 144 +ctrl_conf_1_1.6338: + .long 16 + .long 163904 + .long 0 + .long -880537378 + .long 16 + .long 163920 + .long -4 + .long 3 + .long 16 + .long 163940 + .long -2 + .long 1 + .long 16 + .long 163952 + .long -983041 + .long 262144 + .long 16 + .long 164012 + .long -3841 + .long 256 + .long 16 + .long 163964 + .long -17 + .long 0 + .long 16 + .long 164040 + .long -16711936 + .long 655370 + .long 16 + .long 164048 + .long -251658241 + .long 50331648 + .long 16 + .long 164064 + .long -251658241 + .long 50331648 + .align 32 + .type ctrl_conf_1.6337, @object + .size ctrl_conf_1.6337, 640 +ctrl_conf_1.6337: + .long 32 + .long 8208 + .long 524287 + .long 267878400 + .long 32 + .long 8356 + .long -1179649 + .long 73728 + .long 32 + .long 8364 + .long -513 + .long 512 + .long 32 + .long 8372 + .long -3 + .long 2 + .long 32 + .long 10276 + .long -1057951601 + .long 637665840 + .long 32 + .long 10292 + .long 0 + .long 572662306 + .long 32 + .long 10248 + .long 2147483647 + .long 0 + .long 32 + .long 10284 + .long 2147483647 + .long -2147483648 + .long 32 + .long 10444 + .long -1537 + .long 0 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10444 + .long -1537 + .long 512 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10444 + .long -1537 + .long 1024 + .long 32 + .long 10288 + .long -1879048193 + .long 1073741824 + .long 32 + .long 10356 + .long -61451 + .long 61440 + .long 32 + .long 10360 + .long -16711936 + .long 1048592 + .long 32 + .long 10364 + .long -15732481 + .long 5244160 + .long 32 + .long 10368 + .long -25 + .long 0 + .long 32 + .long 10336 + .long -3145729 + .long 3145728 + .long 32 + .long 10384 + .long -65281 + .long 65280 + .long 32 + .long 10396 + .long -16711681 + .long 458752 + .long 16 + .long 64 + .long 0 + .long -880537378 + .long 16 + .long 72 + .long -8979 + .long 8194 + .long 16 + .long 120 + .long -114 + .long 17 + .long 16 + .long 128 + .long -65536 + .long 39203 + .long 16 + .long 136 + .long -2 + .long 0 + .long 16 + .long 140 + .long -65536 + .long 127 + .long 16 + .long 220 + .long -65537 + .long 65536 + .long 16 + .long 32832 + .long 0 + .long -880537378 + .long 16 + .long 32884 + .long -133 + .long 132 + .long 16 + .long 33016 + .long -49 + .long 16 + .long 16 + .long 37060 + .long -2 + .long 1 + .long 16 + .long 37104 + .long 2147483645 + .long 2 + .long 16 + .long 37112 + .long -49 + .long 16 + .long 16 + .long 262208 + .long 0 + .long -880537378 + .long 16 + .long 262248 + .long -256 + .long 255 + .long 16 + .long 262392 + .long -65 + .long 64 + .long 16 + .long 294976 + .long 0 + .long -880537378 + .long 16 + .long 295016 + .long -256 + .long 255 + .long 16 + .long 295160 + .long -65 + .long 64 + .align 32 + .type ctrl_devport_conf_clear.6265, @object + .size ctrl_devport_conf_clear.6265, 36 +ctrl_devport_conf_clear.6265: + .long 36968 + .long -65281 + .long 0 + .long 36964 + .long -65281 + .long 0 + .long 36960 + .long -65281 + .long 0 + .align 32 + .type register_values.3743, @object + .size register_values.3743, 456 +register_values.3743: + .long 790596 + .long 63736 + .long 0 + .long 790604 + .long 63736 + .long 1 + .long 790612 + .long 63736 + .long 2 + .long 790620 + .long 63736 + .long 3 + .long 790628 + .long 63736 + .long 4 + .long 790636 + .long 63736 + .long 5 + .long 790644 + .long 63736 + .long 6 + .long 790652 + .long 63736 + .long 7 + .long 790592 + .long 63740 + .long 0 + .long 790600 + .long 63740 + .long 0 + .long 790608 + .long 63740 + .long 0 + .long 790616 + .long 63740 + .long 0 + .long 790624 + .long 63740 + .long 0 + .long 790632 + .long 63740 + .long 0 + .long 790640 + .long 63740 + .long 0 + .long 790648 + .long 63740 + .long 0 + .long 794688 + .long -536362984 + .long 0 + .long 794692 + .long -536362984 + .long 0 + .long 794696 + .long -536362984 + .long 0 + .long 794700 + .long -536362984 + .long 0 + .long 794704 + .long -536362984 + .long 0 + .long 794708 + .long -536362984 + .long 0 + .long 794712 + .long -536362984 + .long 0 + .long 794716 + .long -536362984 + .long 0 + .long 794720 + .long -536362977 + .long 0 + .long 794724 + .long -536362977 + .long 0 + .long 794728 + .long -536362977 + .long 0 + .long 794732 + .long -536362977 + .long 0 + .long 794744 + .long -524288 + .long 102 + .long 794752 + .long -65536 + .long 0 + .long 794760 + .long 1224 + .long -16777214 + .long 794764 + .long 786575 + .long 131328 + .long 794768 + .long -655284 + .long 16 + .long 794772 + .long 11022080 + .long 32768 + .long 794784 + .long 16776192 + .long -16777216 + .long 798808 + .long -2039584 + .long 0 + .long 798812 + .long 62 + .long 0 + .long 798816 + .long -256 + .long 0 + .type addresses.4206, @object + .size addresses.4206, 24 +addresses.4206: + .byte 2 + .byte 3 + .byte 4 + .byte 5 + .byte 6 + .byte 9 + .byte 11 + .byte 13 + .byte 17 + .byte 18 + .byte 20 + .byte 21 + .byte 23 + .byte 26 + .byte 27 + .byte 28 + .byte 29 + .byte 30 + .byte 36 + .byte 37 + .byte 38 + .byte 41 + .byte 41 + .byte 42 + .type cs_map_aaa.3888, @object + .size cs_map_aaa.3888, 24 +cs_map_aaa.3888: + .byte 0 + .byte 1 + .byte 3 + .byte 0 + .byte 2 + .byte 6 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 0 + .byte 0 + .byte 5 + .byte 8 + .byte 0 + .byte 7 + .byte 9 + .byte 0 + .byte 10 + .byte 11 + .align 2 + .type min_cycle_times.4311, @object + .size min_cycle_times.4311, 8 +min_cycle_times.4311: + .value 592 + .value 768 + .value 885 + .value 1280 + .type latency_indicies.4310, @object + .size latency_indicies.4310, 3 +latency_indicies.4310: + .byte 25 + .byte 23 + .byte 9 + .align 4 + .type fraction.4292, @object + .size fraction.4292, 16 +fraction.4292: + .long 37 + .long 51 + .long 102 + .long 117 + .align 32 + .type speed, @object + .size speed, 120 +speed: + .value 1280 + .byte -56 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 0 + .string "200Mhz\r\n" + .zero 3 + .value 885 + .byte -106 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 1 + .string "266Mhz\r\n" + .zero 3 + .value 768 + .byte 120 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 2 + .string "333Mhz\r\n" + .zero 3 + .value 592 + .byte 100 + .byte 7 + .byte 2 + .byte 2 + .byte 3 + .byte 4 + .long 3 + .string "400Mhz\r\n" + .zero 3 + .value 0 + .zero 22 + .align 32 + .type dv_a.4275, @object + .size dv_a.4275, 48 +dv_a.4275: + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -56 + .byte -56 + .byte -56 + .byte 100 + .byte -56 + .byte -90 + .byte -90 + .byte 100 + .byte -56 + .byte -85 + .byte -114 + .byte 100 + .byte -56 + .byte -106 + .byte 125 + .byte 100 + .byte -56 + .byte -100 + .byte -123 + .byte 100 + .byte -56 + .byte -96 + .byte 120 + .byte 100 + .byte -56 + .byte -93 + .byte 127 + .byte 100 + .byte -56 + .byte -106 + .byte -123 + .byte 100 + .byte -56 + .byte -103 + .byte 123 + .byte 100 + .byte -56 + .byte -99 + .byte -128 + .byte 100 + .byte -56 + .byte -96 + .byte 120 + .byte 100 + .type fraction.4411, @object + .size fraction.4411, 7 +fraction.4411: + .byte 0 + .byte 1 + .byte 2 + .byte 2 + .byte 3 + .byte 3 + .byte 0 + .type faw_2k.4827, @object + .size faw_2k.4827, 4 +faw_2k.4827: + .byte 10 + .byte 14 + .byte 17 + .byte 18 + .type faw_1k.4826, @object + .size faw_1k.4826, 4 +faw_1k.4826: + .byte 8 + .byte 10 + .byte 13 + .byte 14 + .type csbase_low_f0_shift.3980, @object + .size csbase_low_f0_shift.3980, 12 +csbase_low_f0_shift.3980: + .byte 6 + .byte 7 + .byte 7 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte 9 + .byte 9 + .byte 8 + .byte 9 + .align 32 + .type TestPatternJD1b.5567, @object + .size TestPatternJD1b.5567, 1152 +TestPatternJD1b.5567: + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long 538976288 + .long 538976288 + .long 538976288 + .long 538976288 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .align 32 + .type TestPatternJD1a.5566, @object + .size TestPatternJD1a.5566, 576 +TestPatternJD1a.5566: + .long 0 + .long 0 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long -1 + .long -1 + .long 0 + .long 0 + .long 0 + .long 0 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 16843009 + .long 16843009 + .long -16843010 + .long -16843010 + .long -16843010 + .long -16843010 + .long 16843009 + .long 16843009 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long -33686019 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 33686018 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long 67372036 + .long 67372036 + .long 67372036 + .long 67372036 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long -67372037 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long 134744072 + .long 134744072 + .long -134744073 + .long -134744073 + .long -134744073 + .long -134744073 + .long 269488144 + .long 269488144 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long -269488145 + .long 269488144 + .long 269488144 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long 538976288 + .long 538976288 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -538976289 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long 1077952576 + .long 1077952576 + .long -1077952577 + .long -1077952577 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long 2139062143 + .long 2139062143 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .long -2139062144 + .align 32 + .type TestPattern2.5231, @object + .size TestPattern2.5231, 64 +TestPattern2.5231: + .long 305419896 + .long -2023406815 + .long 591751049 + .long -1737075662 + .long 1496864804 + .long 810116900 + .long 608765845 + .long -1718384845 + .long 1077433922 + .long 944132677 + .long 692265315 + .long 84310164 + .long 305434693 + .long -1737345945 + .long 305690164 + .long 878212643 + .align 32 + .type TestPattern1.5230, @object + .size TestPattern1.5230, 64 +TestPattern1.5230: + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .long 1431655765 + .align 32 + .type TestPattern0.5229, @object + .size TestPattern0.5229, 64 +TestPattern0.5229: + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .long -1431655766 + .align 32 + .type TT_a.5195, @object + .size TT_a.5195, 96 +TT_a.5195: + .value 6250 + .value 6250 + .value 6250 + .value 6250 + .value 5000 + .value 5000 + .value 5000 + .value 2500 + .value 5000 + .value 4166 + .value 4166 + .value 2500 + .value 5000 + .value 4285 + .value 3571 + .value 2500 + .value 5000 + .value 3750 + .value 3125 + .value 2500 + .value 5000 + .value 3888 + .value 3333 + .value 2500 + .value 5000 + .value 4000 + .value 3000 + .value 2500 + .value 5000 + .value 4090 + .value 3181 + .value 2500 + .value 5000 + .value 3750 + .value 3333 + .value 2500 + .value 5000 + .value 3846 + .value 3076 + .value 2500 + .value 5000 + .value 3928 + .value 3214 + .value 2500 + .value 5000 + .value 4000 + .value 3000 + .value 2500 + .align 2 + .type T1000_a.5194, @object + .size T1000_a.5194, 8 +T1000_a.5194: + .value 5000 + .value 3759 + .value 3003 + .value 2500 + .ident "GCC: (GNU) 4.1.3 20080308 (prerelease) (Ubuntu 4.1.2-21ubuntu1)" + .section .note.GNU-stack,"",@progbits +# 5 "crt0_includes.h" 2 +# 39 "crt0.S" 2 Index: targets/dfi/nf570/nf570/normal/crt0.S =================================================================== --- targets/dfi/nf570/nf570/normal/crt0.S (revision 0) +++ targets/dfi/nf570/nf570/normal/crt0.S (revision 0) @@ -0,0 +1,233 @@ +/* -*- asm -*- + * $ $ + * + */ + +/* + * Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer + * + * This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * Originally this code was part of ucl the data compression library + * for upx the ``Ultimate Packer of eXecutables''. + * + * - Converted to gas assembly, and refitted to work with etherboot. + * Eric Biederman 20 Aug 2002 + * - Merged the nrv2b decompressor into crt0.base of coreboot + * Eric Biederman 26 Sept 2002 + */ + + +#include <arch/asm.h> +#include <arch/intel.h> +#include <console/loglevel.h> + +/* + * This is the entry code the code in .reset section + * jumps to this address. + * + */ +.section ".rom.data", "a", @progbits +.section ".rom.text", "ax", @progbits + + intel_chip_post_macro(0x01) /* delay for chipsets */ + +#include "crt0_includes.h" + +#if USE_DCACHE_RAM == 0 +#ifndef CONSOLE_DEBUG_TX_STRING + /* uses: esp, ebx, ax, dx */ +# define __CRT_CONSOLE_TX_STRING(string) \ + mov string, %ebx ; \ + CALLSP(crt_console_tx_string) + +# if defined(TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) +# define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string) +# else +# define CONSOLE_DEBUG_TX_STRING(string) +# endif +#endif + + /* clear boot_complete flag */ + xorl %ebp, %ebp +__main: + CONSOLE_DEBUG_TX_STRING($str_copying_to_ram) + + /* + * Copy data into RAM and clear the BSS. Since these segments + * isn't really that big we just copy/clear using bytes, not + * double words. + */ + intel_chip_post_macro(0x11) /* post 11 */ + + cld /* clear direction flag */ + + /* copy coreboot from it's initial load location to + * the location it is compiled to run at. + * Normally this is copying from FLASH ROM to RAM. + */ +#if !CONFIG_COMPRESS + movl $_liseg, %esi + movl $_iseg, %edi + movl $_eiseg, %ecx + subl %edi, %ecx + movb %cl, %al + shrl $2, %ecx + andb $3, %al + rep movsl + movb %al, %cl + rep movsb +#else + leal 4+_liseg, %esi + leal _iseg, %edi + movl %ebp, %esp /* preserve %ebp */ + movl $-1, %ebp /* last_m_off = -1 */ + jmp dcl1_n2b + +/* ------------- DECOMPRESSION ------------- + + Input: + %esi - source + %edi - dest + %ebp - -1 + cld + + Output: + %eax - 0 + %ecx - 0 +*/ + +.macro getbit bits +.if \bits == 1 + addl %ebx, %ebx + jnz 1f +.endif + movl (%esi), %ebx + subl $-4, %esi /* sets carry flag */ + adcl %ebx, %ebx +1: +.endm + +decompr_literals_n2b: + movsb + +decompr_loop_n2b: + addl %ebx, %ebx + jnz dcl2_n2b +dcl1_n2b: + getbit 32 +dcl2_n2b: + jc decompr_literals_n2b + xorl %eax, %eax + incl %eax /* m_off = 1 */ +loop1_n2b: + getbit 1 + adcl %eax, %eax /* m_off = m_off*2 + getbit() */ + getbit 1 + jnc loop1_n2b /* while(!getbit()) */ + xorl %ecx, %ecx + subl $3, %eax + jb decompr_ebpeax_n2b /* if (m_off == 2) goto decompr_ebpeax_n2b ? */ + shll $8, %eax + movb (%esi), %al /* m_off = (m_off - 3)*256 + src[ilen++] */ + incl %esi + xorl $-1, %eax + jz decompr_end_n2b /* if (m_off == 0xffffffff) goto decomp_end_n2b */ + movl %eax, %ebp /* last_m_off = m_off ?*/ +decompr_ebpeax_n2b: + getbit 1 + adcl %ecx, %ecx /* m_len = getbit() */ + getbit 1 + adcl %ecx, %ecx /* m_len = m_len*2 + getbit()) */ + jnz decompr_got_mlen_n2b /* if (m_len == 0) goto decompr_got_mlen_n2b */ + incl %ecx /* m_len++ */ +loop2_n2b: + getbit 1 + adcl %ecx, %ecx /* m_len = m_len*2 + getbit() */ + getbit 1 + jnc loop2_n2b /* while(!getbit()) */ + incl %ecx + incl %ecx /* m_len += 2 */ +decompr_got_mlen_n2b: + cmpl $-0xd00, %ebp + adcl $1, %ecx /* m_len = m_len + 1 + (last_m_off > 0xd00) */ + movl %esi, %edx + leal (%edi,%ebp), %esi /* m_pos = dst + olen + -m_off */ + rep + movsb /* dst[olen++] = *m_pos++ while(m_len > 0) */ + movl %edx, %esi + jmp decompr_loop_n2b +decompr_end_n2b: + intel_chip_post_macro(0x12) /* post 12 */ + + movl %esp, %ebp +#endif + + CONSOLE_DEBUG_TX_STRING($str_pre_main) + leal _iseg, %edi + jmp *%edi + +.Lhlt: + intel_chip_post_macro(0xee) /* post fe */ + hlt + jmp .Lhlt + +#ifdef __CRT_CONSOLE_TX_STRING + /* Uses esp, ebx, ax, dx */ +crt_console_tx_string: + mov (%ebx), %al + inc %ebx + cmp $0, %al + jne 9f + RETSP +9: +/* Base Address */ +#ifndef TTYS0_BASE +#define TTYS0_BASE 0x3f8 +#endif +/* Data */ +#define TTYS0_RBR (TTYS0_BASE+0x00) + +/* Control */ +#define TTYS0_TBR TTYS0_RBR +#define TTYS0_IER (TTYS0_BASE+0x01) +#define TTYS0_IIR (TTYS0_BASE+0x02) +#define TTYS0_FCR TTYS0_IIR +#define TTYS0_LCR (TTYS0_BASE+0x03) +#define TTYS0_MCR (TTYS0_BASE+0x04) +#define TTYS0_DLL TTYS0_RBR +#define TTYS0_DLM TTYS0_IER + +/* Status */ +#define TTYS0_LSR (TTYS0_BASE+0x05) +#define TTYS0_MSR (TTYS0_BASE+0x06) +#define TTYS0_SCR (TTYS0_BASE+0x07) + + mov %al, %ah +10: mov $TTYS0_LSR, %dx + inb %dx, %al + test $0x20, %al + je 10b + mov $TTYS0_TBR, %dx + mov %ah, %al + outb %al, %dx + + jmp crt_console_tx_string +#endif /* __CRT_CONSOLE_TX_STRING */ + +#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) +.section ".rom.data" +#if CONFIG_COMPRESS +str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n" +#else +str_copying_to_ram: .string "Copying coreboot to RAM.\r\n" +#endif +str_pre_main: .string "Jumping to coreboot.\r\n" +.previous + +#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ + +#endif /* USE_DCACHE_RAM */ Index: targets/dfi/nf570/nf570/normal/coreboot_ram =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/coreboot_ram ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/ldoptions =================================================================== --- targets/dfi/nf570/nf570/normal/ldoptions (revision 0) +++ targets/dfi/nf570/nf570/normal/ldoptions (revision 0) @@ -0,0 +1,130 @@ +HAVE_MOVNTI = 1; +CONFIG_USE_INIT = 0; +HAVE_FALLBACK_BOOT = 1; +HAVE_FAILOVER_BOOT = 1; +ROM_IMAGE_SIZE = 0x20000; +PAYLOAD_SIZE = 0x20000; +_ROMBASE = 0xfffa0000; +_RESET = 0xfffa0000; +_EXCEPTION_VECTORS = 0xfffa0100; +STACK_SIZE = 0x2000; +HEAP_SIZE = 0x8000; +_RAMBASE = 0x100000; +USE_DCACHE_RAM = 1; +CAR_FAM10 = 0; +DCACHE_RAM_BASE = 0xc8000; +DCACHE_RAM_SIZE = 0x8000; +DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000; +CONFIG_AP_CODE_IN_CAR = 0; +MEM_TRAIN_SEQ = 2; +WAIT_BEFORE_CPUS_INIT = 0; +CONFIG_COMPRESS = 1; +CONFIG_UNCOMPRESSED = 0; +CONFIG_LB_MEM_TOPK = 2048; +HAVE_OPTION_TABLE = 1; +USE_OPTION_TABLE = 1; +LB_CKS_RANGE_START = 49; +LB_CKS_RANGE_END = 122; +LB_CKS_LOC = 123; +DEBUG = 1; +CONFIG_CONSOLE_VGA = 1; +CONFIG_CONSOLE_VGA_MULTI = 0; +CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST = 0; +CONFIG_CONSOLE_BTEXT = 0; +CONFIG_CONSOLE_LOGBUF = 0; +CONFIG_CONSOLE_SROM = 0; +CONFIG_CONSOLE_SERIAL8250 = 1; +CONFIG_USBDEBUG_DIRECT = 0; +DEFAULT_CONSOLE_LOGLEVEL = 8; +MAXIMUM_CONSOLE_LOGLEVEL = 8; +CONFIG_SERIAL_POST = 0; +TTYS0_BASE = 0x3f8; +TTYS0_BAUD = 115200; +TTYS0_LCS = 0x3; +CONFIG_USE_PRINTK_IN_CAR = 1; +MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130; +MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x2b80; +CONFIG_MAX_PCI_BUSES = 255; +CONFIG_SMP = 1; +CONFIG_MAX_CPUS = 2; +CONFIG_MAX_PHYSICAL_CPUS = 1; +CONFIG_LOGICAL_CPUS = 1; +CONFIG_AP_IN_SIPI_WAIT = 0; +SERIAL_CPU_INIT = 1; +APIC_ID_OFFSET = 16; +ENABLE_APIC_EXT_ID = 0; +LIFT_BSP_APIC_ID = 1; +CONFIG_IDE_PAYLOAD = 0; +CONFIG_ROM_PAYLOAD = 1; +CONFIG_ROM_PAYLOAD_START = 0xfff80000; +CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0; +CONFIG_COMPRESSED_PAYLOAD_LZMA = 0; +CONFIG_PRECOMPRESSED_PAYLOAD = 0; +CONFIG_SERIAL_PAYLOAD = 0; +CONFIG_FS_PAYLOAD = 0; +CONFIG_FS_EXT2 = 0; +CONFIG_FS_ISO9660 = 0; +CONFIG_FS_FAT = 0; +AUTOBOOT_DELAY = 2; +USE_WATCHDOG_ON_BOOT = 0; +CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1; +CONFIG_AGP_PLUGIN_SUPPORT = 1; +CONFIG_CARDBUS_PLUGIN_SUPPORT = 1; +CONFIG_PCIX_PLUGIN_SUPPORT = 1; +CONFIG_PCIEXP_PLUGIN_SUPPORT = 1; +CONFIG_IDE = 0; +IDE_BOOT_DRIVE = 0; +IDE_OFFSET = 0; +PCI_IO_CFG_EXT = 0; +CONFIG_CHIP_NAME = 1; +HAVE_INIT_TIMER = 1; +MAX_REBOOT_CNT = 3; +FAKE_SPDROM = 0; +HAVE_ACPI_TABLES = 0; +ACPI_SSDTX_NUM = 0; +HT_CHAIN_UNITID_BASE = 0; +HT_CHAIN_END_UNITID_BASE = 32; +SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0; +SB_HT_CHAIN_ON_BUS0 = 2; +PCI_BUS_SEGN_BITS = 0; +MMCONF_SUPPORT = 0; +MMCONF_SUPPORT_DEFAULT = 0; +HW_MEM_HOLE_SIZEK = 1048576; +HW_MEM_HOLE_SIZE_AUTO_INC = 0; +CONFIG_VAR_MTRR_HOLE = 1; +K8_HT_FREQ_1G_SUPPORT = 1; +K8_REV_F_SUPPORT = 1; +CBB = 0; +CDB = 24; +HT3_SUPPORT = 0; +EXT_RT_TBL_SUPPORT = 0; +EXT_CONF_SUPPORT = 0; +DIMM_SUPPORT = 0x4; +CPU_SOCKET_TYPE = 17; +CPU_ADDR_BITS = 40; +CONFIG_VGA_ROM_RUN = 0; +CONFIG_PCI_ROM_RUN = 1; +CONFIG_PCI_64BIT_PREF_MEM = 0; +CONFIG_AMDMCT = 0; +K8_MEM_BANK_B_ONLY = 0; +CONFIG_PCIE_CONFIGSPACE_HOLE = 0; +HAVE_MP_TABLE = 1; +HAVE_PIRQ_TABLE = 1; +USE_FALLBACK_IMAGE = 0; +USE_FAILOVER_IMAGE = 0; +HAVE_HARD_RESET = 1; +IRQ_SLOT_COUNT = 11; +CONFIG_IOAPIC = 1; +FALLBACK_SIZE = 0x3f000; +FAILOVER_SIZE = 0x1000; +ROM_SIZE = 0x80000; +ROM_SECTION_SIZE = 0x40000; +ROM_SECTION_OFFSET = 0x0; +XIP_ROM_SIZE = 0x40000; +XIP_ROM_BASE = 0xfff80000; +CONFIG_GDB_STUB = 0; +HAVE_FANCTL = 1; +CONFIG_UDELAY_IO = 0; +CONFIG_UDELAY_TSC = 0; +CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0; +AGP_APERTURE_SIZE = 0x4000000; Index: targets/dfi/nf570/nf570/normal/Makefile.settings =================================================================== --- targets/dfi/nf570/nf570/normal/Makefile.settings (revision 0) +++ targets/dfi/nf570/nf570/normal/Makefile.settings (revision 0) @@ -0,0 +1,316 @@ +# File: dfi/nf570/nf570/normal/Makefile.settings is autogenerated +TOP:=/home/chris/coreboot-v2 +TARGET_DIR:=dfi/nf570/nf570/normal + +export ARCH:=i386 +export HAVE_MOVNTI:=1 +export CROSS_COMPILE:= +export CC:=$(CROSS_COMPILE)gcc -m32 +export HOSTCC:=gcc +export OBJCOPY:=$(CROSS_COMPILE)objcopy --gap-fill 0xff +export COREBOOT_VERSION:="2.0.0" +export COREBOOT_BUILD:="$(shell date)" +export COREBOOT_COMPILE_TIME:="$(shell date +%T)" +export COREBOOT_COMPILE_BY:="$(shell whoami)" +export COREBOOT_COMPILE_HOST:="$(shell hostname)" +export COREBOOT_COMPILE_DOMAIN:="$(shell dnsdomainname)" +export COREBOOT_COMPILER:="$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)" +export COREBOOT_LINKER:="$(shell $(CC) -Wl,--version 2>&1 | grep version | tail -n 1)" +export COREBOOT_ASSEMBLER:="$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )" +export CONFIG_USE_INIT:=0 +export HAVE_FALLBACK_BOOT:=1 +export HAVE_FAILOVER_BOOT:=1 +export ROM_IMAGE_SIZE:=0x20000 +export PAYLOAD_SIZE:=0x20000 +export _ROMBASE:=0xfffa0000 +export _RESET:=0xfffa0000 +export _EXCEPTION_VECTORS:=0xfffa0100 +export STACK_SIZE:=0x2000 +export HEAP_SIZE:=0x8000 +export _RAMBASE:=0x100000 +export USE_DCACHE_RAM:=1 +export CAR_FAM10:=0 +export DCACHE_RAM_BASE:=0xc8000 +export DCACHE_RAM_SIZE:=0x8000 +export DCACHE_RAM_GLOBAL_VAR_SIZE:=0x1000 +export CONFIG_AP_CODE_IN_CAR:=0 +export MEM_TRAIN_SEQ:=2 +export WAIT_BEFORE_CPUS_INIT:=0 +export CONFIG_COMPRESS:=1 +export CONFIG_UNCOMPRESSED:=0 +export CONFIG_LB_MEM_TOPK:=2048 +export HAVE_OPTION_TABLE:=1 +export USE_OPTION_TABLE:=1 +export LB_CKS_RANGE_START:=49 +export LB_CKS_RANGE_END:=122 +export LB_CKS_LOC:=123 +export CRT0:=$(TOP)/src/arch/$(ARCH)/init/crt0.S.lb +export DEBUG:=1 +export CONFIG_CONSOLE_VGA:=1 +export CONFIG_CONSOLE_VGA_MULTI:=0 +export CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST:=0 +export CONFIG_CONSOLE_BTEXT:=0 +export CONFIG_CONSOLE_LOGBUF:=0 +export CONFIG_CONSOLE_SROM:=0 +export CONFIG_CONSOLE_SERIAL8250:=1 +export CONFIG_USBDEBUG_DIRECT:=0 +export DEFAULT_CONSOLE_LOGLEVEL:=8 +export MAXIMUM_CONSOLE_LOGLEVEL:=8 +export CONFIG_SERIAL_POST:=0 +export TTYS0_BASE:=0x3f8 +export TTYS0_BAUD:=115200 +export TTYS0_LCS:=0x3 +export CONFIG_USE_PRINTK_IN_CAR:=1 +export MAINBOARD:=/home/chris/coreboot-v2/src/mainboard/dfi/nf570 +export MAINBOARD_PART_NUMBER:="nf570" +export MAINBOARD_VENDOR:="DFI" +export MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID:=4130 +export MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID:=0x2b80 +export CONFIG_MAX_PCI_BUSES:=255 +export CONFIG_SMP:=1 +export CONFIG_MAX_CPUS:=2 +export CONFIG_MAX_PHYSICAL_CPUS:=1 +export CONFIG_LOGICAL_CPUS:=1 +export CONFIG_AP_IN_SIPI_WAIT:=0 +export SERIAL_CPU_INIT:=1 +export APIC_ID_OFFSET:=16 +export ENABLE_APIC_EXT_ID:=0 +export LIFT_BSP_APIC_ID:=1 +export CONFIG_IDE_PAYLOAD:=0 +export CONFIG_ROM_PAYLOAD:=1 +export CONFIG_ROM_PAYLOAD_START:=0xfff80000 +export CONFIG_COMPRESSED_PAYLOAD_NRV2B:=0 +export CONFIG_COMPRESSED_PAYLOAD_LZMA:=0 +export CONFIG_PRECOMPRESSED_PAYLOAD:=0 +export CONFIG_SERIAL_PAYLOAD:=0 +export CONFIG_FS_PAYLOAD:=0 +export CONFIG_FS_EXT2:=0 +export CONFIG_FS_ISO9660:=0 +export CONFIG_FS_FAT:=0 +export AUTOBOOT_DELAY:=2 +export AUTOBOOT_CMDLINE:="hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200" +export USE_WATCHDOG_ON_BOOT:=0 +export CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT:=1 +export CONFIG_AGP_PLUGIN_SUPPORT:=1 +export CONFIG_CARDBUS_PLUGIN_SUPPORT:=1 +export CONFIG_PCIX_PLUGIN_SUPPORT:=1 +export CONFIG_PCIEXP_PLUGIN_SUPPORT:=1 +export CONFIG_IDE:=0 +export IDE_BOOT_DRIVE:=0 +export IDE_OFFSET:=0 +export PCI_IO_CFG_EXT:=0 +export CONFIG_CHIP_NAME:=1 +export HAVE_INIT_TIMER:=1 +export MAX_REBOOT_CNT:=3 +export FAKE_SPDROM:=0 +export HAVE_ACPI_TABLES:=0 +export ACPI_SSDTX_NUM:=0 +export HT_CHAIN_UNITID_BASE:=0 +export HT_CHAIN_END_UNITID_BASE:=32 +export SB_HT_CHAIN_UNITID_OFFSET_ONLY:=0 +export SB_HT_CHAIN_ON_BUS0:=2 +export PCI_BUS_SEGN_BITS:=0 +export MMCONF_SUPPORT:=0 +export MMCONF_SUPPORT_DEFAULT:=0 +export HW_MEM_HOLE_SIZEK:=1048576 +export HW_MEM_HOLE_SIZE_AUTO_INC:=0 +export CONFIG_VAR_MTRR_HOLE:=1 +export K8_HT_FREQ_1G_SUPPORT:=1 +export K8_REV_F_SUPPORT:=1 +export CBB:=0 +export CDB:=24 +export HT3_SUPPORT:=0 +export EXT_RT_TBL_SUPPORT:=0 +export EXT_CONF_SUPPORT:=0 +export DIMM_SUPPORT:=0x4 +export CPU_SOCKET_TYPE:=17 +export CPU_ADDR_BITS:=40 +export CONFIG_VGA_ROM_RUN:=0 +export CONFIG_PCI_ROM_RUN:=1 +export CONFIG_PCI_64BIT_PREF_MEM:=0 +export CONFIG_AMDMCT:=0 +export K8_MEM_BANK_B_ONLY:=0 +export CONFIG_PCIE_CONFIGSPACE_HOLE:=0 +export HAVE_MP_TABLE:=1 +export HAVE_PIRQ_TABLE:=1 +export USE_FALLBACK_IMAGE:=0 +export USE_FAILOVER_IMAGE:=0 +export HAVE_HARD_RESET:=1 +export IRQ_SLOT_COUNT:=11 +export CONFIG_IOAPIC:=1 +export FALLBACK_SIZE:=0x3f000 +export FAILOVER_SIZE:=0x1000 +export ROM_SIZE:=0x80000 +export ROM_SECTION_SIZE:=0x40000 +export ROM_SECTION_OFFSET:=0x0 +export XIP_ROM_SIZE:=0x40000 +export XIP_ROM_BASE:=0xfff80000 +export COREBOOT_EXTRA_VERSION:="$(shell cat ../../VERSION)_Normal" +export MAINBOARD_POWER_ON_AFTER_POWER_FAIL:=MAINBOARD_POWER_ON +export CONFIG_GDB_STUB:=0 +export HAVE_FANCTL:=1 +export CONFIG_UDELAY_IO:=0 +export CONFIG_UDELAY_TSC:=0 +export CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2:=0 +export AGP_APERTURE_SIZE:=0x4000000 + +export VARIABLES := +export VARIABLES += ARCH +export VARIABLES += HAVE_MOVNTI +export VARIABLES += CROSS_COMPILE +export VARIABLES += CC +export VARIABLES += HOSTCC +export VARIABLES += OBJCOPY +export VARIABLES += COREBOOT_VERSION +export VARIABLES += COREBOOT_BUILD +export VARIABLES += COREBOOT_COMPILE_TIME +export VARIABLES += COREBOOT_COMPILE_BY +export VARIABLES += COREBOOT_COMPILE_HOST +export VARIABLES += COREBOOT_COMPILE_DOMAIN +export VARIABLES += COREBOOT_COMPILER +export VARIABLES += COREBOOT_LINKER +export VARIABLES += COREBOOT_ASSEMBLER +export VARIABLES += CONFIG_USE_INIT +export VARIABLES += HAVE_FALLBACK_BOOT +export VARIABLES += HAVE_FAILOVER_BOOT +export VARIABLES += ROM_IMAGE_SIZE +export VARIABLES += PAYLOAD_SIZE +export VARIABLES += _ROMBASE +export VARIABLES += _RESET +export VARIABLES += _EXCEPTION_VECTORS +export VARIABLES += STACK_SIZE +export VARIABLES += HEAP_SIZE +export VARIABLES += _RAMBASE +export VARIABLES += USE_DCACHE_RAM +export VARIABLES += CAR_FAM10 +export VARIABLES += DCACHE_RAM_BASE +export VARIABLES += DCACHE_RAM_SIZE +export VARIABLES += DCACHE_RAM_GLOBAL_VAR_SIZE +export VARIABLES += CONFIG_AP_CODE_IN_CAR +export VARIABLES += MEM_TRAIN_SEQ +export VARIABLES += WAIT_BEFORE_CPUS_INIT +export VARIABLES += CONFIG_COMPRESS +export VARIABLES += CONFIG_UNCOMPRESSED +export VARIABLES += CONFIG_LB_MEM_TOPK +export VARIABLES += HAVE_OPTION_TABLE +export VARIABLES += USE_OPTION_TABLE +export VARIABLES += LB_CKS_RANGE_START +export VARIABLES += LB_CKS_RANGE_END +export VARIABLES += LB_CKS_LOC +export VARIABLES += CRT0 +export VARIABLES += DEBUG +export VARIABLES += CONFIG_CONSOLE_VGA +export VARIABLES += CONFIG_CONSOLE_VGA_MULTI +export VARIABLES += CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST +export VARIABLES += CONFIG_CONSOLE_BTEXT +export VARIABLES += CONFIG_CONSOLE_LOGBUF +export VARIABLES += CONFIG_CONSOLE_SROM +export VARIABLES += CONFIG_CONSOLE_SERIAL8250 +export VARIABLES += CONFIG_USBDEBUG_DIRECT +export VARIABLES += DEFAULT_CONSOLE_LOGLEVEL +export VARIABLES += MAXIMUM_CONSOLE_LOGLEVEL +export VARIABLES += CONFIG_SERIAL_POST +export VARIABLES += TTYS0_BASE +export VARIABLES += TTYS0_BAUD +export VARIABLES += TTYS0_LCS +export VARIABLES += CONFIG_USE_PRINTK_IN_CAR +export VARIABLES += MAINBOARD +export VARIABLES += MAINBOARD_PART_NUMBER +export VARIABLES += MAINBOARD_VENDOR +export VARIABLES += MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +export VARIABLES += MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +export VARIABLES += CONFIG_MAX_PCI_BUSES +export VARIABLES += CONFIG_SMP +export VARIABLES += CONFIG_MAX_CPUS +export VARIABLES += CONFIG_MAX_PHYSICAL_CPUS +export VARIABLES += CONFIG_LOGICAL_CPUS +export VARIABLES += CONFIG_AP_IN_SIPI_WAIT +export VARIABLES += SERIAL_CPU_INIT +export VARIABLES += APIC_ID_OFFSET +export VARIABLES += ENABLE_APIC_EXT_ID +export VARIABLES += LIFT_BSP_APIC_ID +export VARIABLES += CONFIG_IDE_PAYLOAD +export VARIABLES += CONFIG_ROM_PAYLOAD +export VARIABLES += CONFIG_ROM_PAYLOAD_START +export VARIABLES += CONFIG_COMPRESSED_PAYLOAD_NRV2B +export VARIABLES += CONFIG_COMPRESSED_PAYLOAD_LZMA +export VARIABLES += CONFIG_PRECOMPRESSED_PAYLOAD +export VARIABLES += CONFIG_SERIAL_PAYLOAD +export VARIABLES += CONFIG_FS_PAYLOAD +export VARIABLES += CONFIG_FS_EXT2 +export VARIABLES += CONFIG_FS_ISO9660 +export VARIABLES += CONFIG_FS_FAT +export VARIABLES += AUTOBOOT_DELAY +export VARIABLES += AUTOBOOT_CMDLINE +export VARIABLES += USE_WATCHDOG_ON_BOOT +export VARIABLES += CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT +export VARIABLES += CONFIG_AGP_PLUGIN_SUPPORT +export VARIABLES += CONFIG_CARDBUS_PLUGIN_SUPPORT +export VARIABLES += CONFIG_PCIX_PLUGIN_SUPPORT +export VARIABLES += CONFIG_PCIEXP_PLUGIN_SUPPORT +export VARIABLES += CONFIG_IDE +export VARIABLES += IDE_BOOT_DRIVE +export VARIABLES += IDE_OFFSET +export VARIABLES += PCI_IO_CFG_EXT +export VARIABLES += CONFIG_CHIP_NAME +export VARIABLES += HAVE_INIT_TIMER +export VARIABLES += MAX_REBOOT_CNT +export VARIABLES += FAKE_SPDROM +export VARIABLES += HAVE_ACPI_TABLES +export VARIABLES += ACPI_SSDTX_NUM +export VARIABLES += HT_CHAIN_UNITID_BASE +export VARIABLES += HT_CHAIN_END_UNITID_BASE +export VARIABLES += SB_HT_CHAIN_UNITID_OFFSET_ONLY +export VARIABLES += SB_HT_CHAIN_ON_BUS0 +export VARIABLES += PCI_BUS_SEGN_BITS +export VARIABLES += MMCONF_SUPPORT +export VARIABLES += MMCONF_SUPPORT_DEFAULT +export VARIABLES += HW_MEM_HOLE_SIZEK +export VARIABLES += HW_MEM_HOLE_SIZE_AUTO_INC +export VARIABLES += CONFIG_VAR_MTRR_HOLE +export VARIABLES += K8_HT_FREQ_1G_SUPPORT +export VARIABLES += K8_REV_F_SUPPORT +export VARIABLES += CBB +export VARIABLES += CDB +export VARIABLES += HT3_SUPPORT +export VARIABLES += EXT_RT_TBL_SUPPORT +export VARIABLES += EXT_CONF_SUPPORT +export VARIABLES += DIMM_SUPPORT +export VARIABLES += CPU_SOCKET_TYPE +export VARIABLES += CPU_ADDR_BITS +export VARIABLES += CONFIG_VGA_ROM_RUN +export VARIABLES += CONFIG_PCI_ROM_RUN +export VARIABLES += CONFIG_PCI_64BIT_PREF_MEM +export VARIABLES += CONFIG_AMDMCT +export VARIABLES += K8_MEM_BANK_B_ONLY +export VARIABLES += CONFIG_PCIE_CONFIGSPACE_HOLE +export VARIABLES += HAVE_MP_TABLE +export VARIABLES += HAVE_PIRQ_TABLE +export VARIABLES += USE_FALLBACK_IMAGE +export VARIABLES += USE_FAILOVER_IMAGE +export VARIABLES += HAVE_HARD_RESET +export VARIABLES += IRQ_SLOT_COUNT +export VARIABLES += CONFIG_IOAPIC +export VARIABLES += FALLBACK_SIZE +export VARIABLES += FAILOVER_SIZE +export VARIABLES += ROM_SIZE +export VARIABLES += ROM_SECTION_SIZE +export VARIABLES += ROM_SECTION_OFFSET +export VARIABLES += XIP_ROM_SIZE +export VARIABLES += XIP_ROM_BASE +export VARIABLES += COREBOOT_EXTRA_VERSION +export VARIABLES += MAINBOARD_POWER_ON_AFTER_POWER_FAIL +export VARIABLES += CONFIG_GDB_STUB +export VARIABLES += HAVE_FANCTL +export VARIABLES += CONFIG_UDELAY_IO +export VARIABLES += CONFIG_UDELAY_TSC +export VARIABLES += CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +export VARIABLES += AGP_APERTURE_SIZE + + + +Makefile.settings: /home/chris/coreboot-v2/targets/dfi/nf570/nf570/config.py /home/chris/coreboot-v2/targets/dfi/nf570/Config.lb + (cd /home/chris/coreboot-v2/targets ; export PYTHONPATH=/home/chris/coreboot-v2/util/newconfig ; python dfi/nf570/nf570/config.py dfi/nf570/Config.lb /home/chris/coreboot-v2) + +DISTRO_CFLAGS+=-fno-stack-protector +DISTRO_LFLAGS+= -Wl,--build-id=none Index: targets/dfi/nf570/nf570/normal/coreboot =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/coreboot ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/coreboot.strip =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/coreboot.strip ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/normal/Makefile =================================================================== --- targets/dfi/nf570/nf570/normal/Makefile (revision 0) +++ targets/dfi/nf570/nf570/normal/Makefile (revision 0) @@ -0,0 +1,725 @@ +# File: dfi/nf570/nf570/normal/Makefile is autogenerated + +all: coreboot.rom + +.PHONY: all + +# Get the value of TOP, VARIABLES, and several other variables. +include Makefile.settings + +# Function to create an item like -Di586 or -DCONFIG_MAX_CPUS='1' or -Ui686 +D_item = $(if $(subst undefined,,$(origin $1)),-D$1$(if $($1),='$($1)',),-U$1) + +# Compute the value of CPUFLAGS here during make's first pass. +CPUFLAGS := $(foreach _var_,$(VARIABLES),$(call D_item,$(_var_))) + + CPP:= $(CC) -x assembler-with-cpp -DASSEMBLY -E + LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name) + GCC_INC_DIR := $(shell LC_ALL=C $(CC) -print-search-dirs | sed -ne "s/install: (.*)/\1include/gp") + CPPFLAGS := -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS) + CFLAGS := $(CPU_OPT) $(DISTRO_CFLAGS) $(CPPFLAGS) -Os -nostdinc -nostdlib -fno-builtin -Wall + HOSTCFLAGS:= -Os -Wall + COREBOOT_RAM-$(CONFIG_COMPRESS):=coreboot_ram.nrv2b + COREBOOT_RAM-$(CONFIG_UNCOMPRESSED):=coreboot_ram.bin + COREBOOT_APC:= + COREBOOT_RAM_ROM:=coreboot_ram.rom + .PHONY : crt0.s + .PHONY : version.o +PAYLOAD:=/boot/filo.elf + PAYLOAD-1:=payload + PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_NRV2B):=payload.nrv2b + PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_LZMA):=payload.lzma + + +# object dependencies (objectrules:) +INIT-OBJECTS := +OBJECTS := +DRIVER := + +SOURCES := +OBJECTS += malloc.o +SOURCES += /home/chris/coreboot-v2/src/lib/malloc.c +OBJECTS += cache.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/cache/cache.c +OBJECTS += pci_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_ops.c +OBJECTS += amd_mtrr.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/mtrr/amd_mtrr.c +OBJECTS += lapic.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/lapic.c +OBJECTS += smbus_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/smbus_ops.c +OBJECTS += memset.o +SOURCES += /home/chris/coreboot-v2/src/lib/memset.c +OBJECTS += pci_ops_auto.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_auto.c +OBJECTS += superio.o +SOURCES += /home/chris/coreboot-v2/src/superio/ite/it8716f/superio.c +OBJECTS += lapic_cpu_init.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c +OBJECTS += fallback_boot.o +SOURCES += /home/chris/coreboot-v2/src/lib/fallback_boot.c +OBJECTS += model_fxx_update_microcode.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_update_microcode.c +OBJECTS += mptable.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/mptable.c +OBJECTS += pciexp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pciexp_device.c +OBJECTS += tables.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/tables.c +OBJECTS += keyboard.o +SOURCES += /home/chris/coreboot-v2/src/pc80/keyboard.c +OBJECTS += microcode.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/microcode/microcode.c +OBJECTS += pnp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pnp_device.c +OBJECTS += printk.o +SOURCES += /home/chris/coreboot-v2/src/console/printk.c +OBJECTS += irq_tables.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/irq_tables.c +OBJECTS += pcix_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pcix_device.c +OBJECTS += get_bus_conf.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/get_bus_conf.c +OBJECTS += decode.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/decode.c +OBJECTS += pci_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_device.c +OBJECTS += console.o +SOURCES += /home/chris/coreboot-v2/src/console/console.c +OBJECTS += amd_sibling.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/dualcore/amd_sibling.c +OBJECTS += northbridge.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c +OBJECTS += elfboot.o +SOURCES += /home/chris/coreboot-v2/src/boot/elfboot.c +OBJECTS += hardwaremain.o +SOURCES += /home/chris/coreboot-v2/src/boot/hardwaremain.c +OBJECTS += boot.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/boot.c +OBJECTS += i8259.o +SOURCES += /home/chris/coreboot-v2/src/pc80/i8259.c +OBJECTS += delay.o +SOURCES += /home/chris/coreboot-v2/src/lib/delay.c +OBJECTS += get_sblk_pci1234.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/get_sblk_pci1234.c +OBJECTS += version.o +SOURCES += /home/chris/coreboot-v2/src/lib/version.c +OBJECTS += pci_ops_mmconf.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_mmconf.c +OBJECTS += memcmp.o +SOURCES += /home/chris/coreboot-v2/src/lib/memcmp.c +OBJECTS += secondary.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/lapic/secondary.S +OBJECTS += isa-dma.o +SOURCES += /home/chris/coreboot-v2/src/pc80/isa-dma.c +OBJECTS += mcp55_reset.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_reset.c +OBJECTS += pcibios.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/pcbios/pcibios.c +OBJECTS += hypertransport.o +SOURCES += /home/chris/coreboot-v2/src/devices/hypertransport.c +OBJECTS += vtxprintf.o +SOURCES += /home/chris/coreboot-v2/src/console/vtxprintf.c +OBJECTS += ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/ops.c +OBJECTS += prim_ops.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/prim_ops.c +OBJECTS += root_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/root_device.c +OBJECTS += cardbus_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/cardbus_device.c +OBJECTS += uart8250.o +SOURCES += /home/chris/coreboot-v2/src/lib/uart8250.c +OBJECTS += sys.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/sys.c +OBJECTS += fanctl.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/fanctl.c +OBJECTS += device_util.o +SOURCES += /home/chris/coreboot-v2/src/devices/device_util.c +OBJECTS += socket_AM2.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/socket_AM2/socket_AM2.c +OBJECTS += ./option_table.o +SOURCES += ./option_table.c +OBJECTS += compute_ip_checksum.o +SOURCES += /home/chris/coreboot-v2/src/lib/compute_ip_checksum.c +OBJECTS += device.o +SOURCES += /home/chris/coreboot-v2/src/devices/device.c +OBJECTS += mtrr.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/mtrr/mtrr.c +OBJECTS += processor_name.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/processor_name.c +OBJECTS += exception.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/exception.c +OBJECTS += memcpy.o +SOURCES += /home/chris/coreboot-v2/src/lib/memcpy.c +OBJECTS += agp_device.o +SOURCES += /home/chris/coreboot-v2/src/devices/agp_device.c +OBJECTS += clog2.o +SOURCES += /home/chris/coreboot-v2/src/lib/clog2.c +OBJECTS += pirq_routing.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/pirq_routing.c +OBJECTS += apic_timer.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/apic_timer.c +OBJECTS += memmove.o +SOURCES += /home/chris/coreboot-v2/src/lib/memmove.c +OBJECTS += pci_rom.o +SOURCES += /home/chris/coreboot-v2/src/devices/pci_rom.c +OBJECTS += pgtbl.o +SOURCES += /home/chris/coreboot-v2/src/cpu/x86/pae/pgtbl.c +OBJECTS += pci_ops_conf2.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_conf2.c +OBJECTS += pci_ops_conf1.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/pci_ops_conf1.c +OBJECTS += mc146818rtc.o +SOURCES += /home/chris/coreboot-v2/src/pc80/mc146818rtc.c +OBJECTS += fpu.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/fpu.c +OBJECTS += coreboot_table.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/boot/coreboot_table.c +OBJECTS += rom_stream.o +SOURCES += /home/chris/coreboot-v2/src/stream/rom_stream.c +OBJECTS += debug.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/debug.c +OBJECTS += c_start.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/c_start.S +OBJECTS += ops2.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/x86emu/ops2.c +OBJECTS += biosemu.o +SOURCES += /home/chris/coreboot-v2/src/devices/emulator/biosemu.c +OBJECTS += vsprintf.o +SOURCES += /home/chris/coreboot-v2/src/console/vsprintf.c +OBJECTS += cpu.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/lib/cpu.c +OBJECTS += mpspec.o +SOURCES += /home/chris/coreboot-v2/src/arch/i386/smp/mpspec.c +OBJECTS += static.o +SOURCES += static.c +DRIVER += mcp55_aza.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_aza.c +DRIVER += mcp55_ht.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_ht.c +DRIVER += mcp55_pci.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_pci.c +DRIVER += uart8250_console.o +SOURCES += /home/chris/coreboot-v2/src/console/uart8250_console.c +DRIVER += mcp55_ide.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_ide.c +DRIVER += vga_console.o +SOURCES += /home/chris/coreboot-v2/src/console/vga_console.c +DRIVER += mainboard.o +SOURCES += /home/chris/coreboot-v2/src/mainboard/dfi/nf570/mainboard.c +DRIVER += mcp55_lpc.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_lpc.c +DRIVER += mcp55_nic.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_nic.c +DRIVER += mcp55_pcie.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_pcie.c +DRIVER += mcp55_usb2.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_usb2.c +DRIVER += mcp55_sata.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_sata.c +DRIVER += mcp55.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55.c +DRIVER += mcp55_usb.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_usb.c +DRIVER += misc_control.o +SOURCES += /home/chris/coreboot-v2/src/northbridge/amd/amdk8/misc_control.c +DRIVER += model_fxx_init.o +SOURCES += /home/chris/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_init.c +DRIVER += mcp55_smbus.o +SOURCES += /home/chris/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_smbus.c + +# ldscript.ld dependencies: +LDSUBSCRIPTS-1 := +LDSUBSCRIPTS-1 += $(TOP)/src/arch/i386/init/ldscript.lb +LDSUBSCRIPTS-1 += $(TOP)/src//cpu/x86/32bit/reset32.lds +LDSUBSCRIPTS-1 += $(TOP)/src//southbridge/nvidia/mcp55/id.lds + +# Dependencies for crt0_includes.h +CRT0_INCLUDES:= +CRT0_INCLUDES += $(TOP)/src/cpu/x86/32bit/entry32.inc +CRT0_INCLUDES += $(TOP)/src/cpu/x86/32bit/reset32.inc +CRT0_INCLUDES += $(TOP)/src/southbridge/nvidia/mcp55/id.inc +CRT0_INCLUDES += $(TOP)/src/cpu/amd/car/cache_as_ram.inc +CRT0_INCLUDES += ./cache_as_ram_auto.inc + +# userdefines: + +# mainrulelist: +# From makerule or docipl commands: + +# initobjectrules: + +# objectrules: +malloc.o: $(TOP)/src/lib/malloc.c + $(CC) -c $(CFLAGS) -o $@ $< +cache.o: $(TOP)/src/cpu/x86/cache/cache.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops.o: $(TOP)/src/devices/pci_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +amd_mtrr.o: $(TOP)/src/cpu/amd/mtrr/amd_mtrr.c + $(CC) -c $(CFLAGS) -o $@ $< +lapic.o: $(TOP)/src/cpu/x86/lapic/lapic.c + $(CC) -c $(CFLAGS) -o $@ $< +smbus_ops.o: $(TOP)/src/devices/smbus_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +memset.o: $(TOP)/src/lib/memset.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_auto.o: $(TOP)/src/arch/i386/lib/pci_ops_auto.c + $(CC) -c $(CFLAGS) -o $@ $< +superio.o: $(TOP)/src/superio/ite/it8716f/superio.c + $(CC) -c $(CFLAGS) -o $@ $< +lapic_cpu_init.o: $(TOP)/src/cpu/x86/lapic/lapic_cpu_init.c + $(CC) -c $(CFLAGS) -o $@ $< +fallback_boot.o: $(TOP)/src/lib/fallback_boot.c + $(CC) -c $(CFLAGS) -o $@ $< +model_fxx_update_microcode.o: $(TOP)/src/cpu/amd/model_fxx/model_fxx_update_microcode.c + $(CC) -c $(CFLAGS) -o $@ $< +mptable.o: $(TOP)/src/mainboard/dfi/nf570/mptable.c + $(CC) -c $(CFLAGS) -o $@ $< +pciexp_device.o: $(TOP)/src/devices/pciexp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +tables.o: $(TOP)/src/arch/i386/boot/tables.c + $(CC) -c $(CFLAGS) -o $@ $< +keyboard.o: $(TOP)/src/pc80/keyboard.c + $(CC) -c $(CFLAGS) -o $@ $< +microcode.o: $(TOP)/src/cpu/amd/microcode/microcode.c + $(CC) -c $(CFLAGS) -o $@ $< +pnp_device.o: $(TOP)/src/devices/pnp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +printk.o: $(TOP)/src/console/printk.c + $(CC) -c $(CFLAGS) -o $@ $< +irq_tables.o: $(TOP)/src/mainboard/dfi/nf570/irq_tables.c + $(CC) -c $(CFLAGS) -o $@ $< +pcix_device.o: $(TOP)/src/devices/pcix_device.c + $(CC) -c $(CFLAGS) -o $@ $< +get_bus_conf.o: $(TOP)/src/mainboard/dfi/nf570/get_bus_conf.c + $(CC) -c $(CFLAGS) -o $@ $< +decode.o: $(TOP)/src/devices/emulator/x86emu/decode.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_device.o: $(TOP)/src/devices/pci_device.c + $(CC) -c $(CFLAGS) -o $@ $< +console.o: $(TOP)/src/console/console.c + $(CC) -c $(CFLAGS) -o $@ $< +amd_sibling.o: $(TOP)/src/cpu/amd/dualcore/amd_sibling.c + $(CC) -c $(CFLAGS) -o $@ $< +northbridge.o: $(TOP)/src/northbridge/amd/amdk8/northbridge.c + $(CC) -c $(CFLAGS) -o $@ $< +elfboot.o: $(TOP)/src/boot/elfboot.c + $(CC) -c $(CFLAGS) -o $@ $< +hardwaremain.o: $(TOP)/src/boot/hardwaremain.c + $(CC) -c $(CFLAGS) -o $@ $< +boot.o: $(TOP)/src/arch/i386/boot/boot.c + $(CC) -c $(CFLAGS) -o $@ $< +i8259.o: $(TOP)/src/pc80/i8259.c + $(CC) -c $(CFLAGS) -o $@ $< +delay.o: $(TOP)/src/lib/delay.c + $(CC) -c $(CFLAGS) -o $@ $< +get_sblk_pci1234.o: $(TOP)/src/northbridge/amd/amdk8/get_sblk_pci1234.c + $(CC) -c $(CFLAGS) -o $@ $< +version.o: $(TOP)/src/lib/version.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_mmconf.o: $(TOP)/src/arch/i386/lib/pci_ops_mmconf.c + $(CC) -c $(CFLAGS) -o $@ $< +memcmp.o: $(TOP)/src/lib/memcmp.c + $(CC) -c $(CFLAGS) -o $@ $< +secondary.o: secondary.s + $(CC) -c $(CPU_OPT) -o $@ $< +secondary.s: $(TOP)/src/cpu/x86/lapic/secondary.S + $(CPP) $(CPPFLAGS) $< >$@.new && mv $@.new $@ +isa-dma.o: $(TOP)/src/pc80/isa-dma.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_reset.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_reset.c + $(CC) -c $(CFLAGS) -o $@ $< +pcibios.o: $(TOP)/src/devices/emulator/pcbios/pcibios.c + $(CC) -c $(CFLAGS) -o $@ $< +hypertransport.o: $(TOP)/src/devices/hypertransport.c + $(CC) -c $(CFLAGS) -o $@ $< +vtxprintf.o: $(TOP)/src/console/vtxprintf.c + $(CC) -c $(CFLAGS) -o $@ $< +ops.o: $(TOP)/src/devices/emulator/x86emu/ops.c + $(CC) -c $(CFLAGS) -o $@ $< +prim_ops.o: $(TOP)/src/devices/emulator/x86emu/prim_ops.c + $(CC) -c $(CFLAGS) -o $@ $< +root_device.o: $(TOP)/src/devices/root_device.c + $(CC) -c $(CFLAGS) -o $@ $< +cardbus_device.o: $(TOP)/src/devices/cardbus_device.c + $(CC) -c $(CFLAGS) -o $@ $< +uart8250.o: $(TOP)/src/lib/uart8250.c + $(CC) -c $(CFLAGS) -o $@ $< +sys.o: $(TOP)/src/devices/emulator/x86emu/sys.c + $(CC) -c $(CFLAGS) -o $@ $< +fanctl.o: $(TOP)/src/mainboard/dfi/nf570/fanctl.c + $(CC) -c $(CFLAGS) -o $@ $< +device_util.o: $(TOP)/src/devices/device_util.c + $(CC) -c $(CFLAGS) -o $@ $< +socket_AM2.o: $(TOP)/src/cpu/amd/socket_AM2/socket_AM2.c + $(CC) -c $(CFLAGS) -o $@ $< +./option_table.o: ./option_table.c + $(CC) -c $(CFLAGS) -o $@ $< +compute_ip_checksum.o: $(TOP)/src/lib/compute_ip_checksum.c + $(CC) -c $(CFLAGS) -o $@ $< +device.o: $(TOP)/src/devices/device.c + $(CC) -c $(CFLAGS) -o $@ $< +mtrr.o: $(TOP)/src/cpu/x86/mtrr/mtrr.c + $(CC) -c $(CFLAGS) -o $@ $< +processor_name.o: $(TOP)/src/cpu/amd/model_fxx/processor_name.c + $(CC) -c $(CFLAGS) -o $@ $< +exception.o: $(TOP)/src/arch/i386/lib/exception.c + $(CC) -c $(CFLAGS) -o $@ $< +memcpy.o: $(TOP)/src/lib/memcpy.c + $(CC) -c $(CFLAGS) -o $@ $< +agp_device.o: $(TOP)/src/devices/agp_device.c + $(CC) -c $(CFLAGS) -o $@ $< +clog2.o: $(TOP)/src/lib/clog2.c + $(CC) -c $(CFLAGS) -o $@ $< +pirq_routing.o: $(TOP)/src/arch/i386/boot/pirq_routing.c + $(CC) -c $(CFLAGS) -o $@ $< +apic_timer.o: $(TOP)/src/cpu/amd/model_fxx/apic_timer.c + $(CC) -c $(CFLAGS) -o $@ $< +memmove.o: $(TOP)/src/lib/memmove.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_rom.o: $(TOP)/src/devices/pci_rom.c + $(CC) -c $(CFLAGS) -o $@ $< +pgtbl.o: $(TOP)/src/cpu/x86/pae/pgtbl.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_conf2.o: $(TOP)/src/arch/i386/lib/pci_ops_conf2.c + $(CC) -c $(CFLAGS) -o $@ $< +pci_ops_conf1.o: $(TOP)/src/arch/i386/lib/pci_ops_conf1.c + $(CC) -c $(CFLAGS) -o $@ $< +mc146818rtc.o: $(TOP)/src/pc80/mc146818rtc.c + $(CC) -c $(CFLAGS) -o $@ $< +fpu.o: $(TOP)/src/devices/emulator/x86emu/fpu.c + $(CC) -c $(CFLAGS) -o $@ $< +coreboot_table.o: $(TOP)/src/arch/i386/boot/coreboot_table.c + $(CC) -c $(CFLAGS) -o $@ $< +rom_stream.o: $(TOP)/src/stream/rom_stream.c + $(CC) -c $(CFLAGS) -o $@ $< +debug.o: $(TOP)/src/devices/emulator/x86emu/debug.c + $(CC) -c $(CFLAGS) -o $@ $< +c_start.o: c_start.s + $(CC) -c $(CPU_OPT) -o $@ $< +c_start.s: $(TOP)/src/arch/i386/lib/c_start.S + $(CPP) $(CPPFLAGS) $< >$@.new && mv $@.new $@ +ops2.o: $(TOP)/src/devices/emulator/x86emu/ops2.c + $(CC) -c $(CFLAGS) -o $@ $< +biosemu.o: $(TOP)/src/devices/emulator/biosemu.c + $(CC) -c $(CFLAGS) -o $@ $< +vsprintf.o: $(TOP)/src/console/vsprintf.c + $(CC) -c $(CFLAGS) -o $@ $< +cpu.o: $(TOP)/src/arch/i386/lib/cpu.c + $(CC) -c $(CFLAGS) -o $@ $< +mpspec.o: $(TOP)/src/arch/i386/smp/mpspec.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_aza.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_aza.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_ht.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_ht.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_pci.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_pci.c + $(CC) -c $(CFLAGS) -o $@ $< +uart8250_console.o: $(TOP)/src/console/uart8250_console.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_ide.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_ide.c + $(CC) -c $(CFLAGS) -o $@ $< +vga_console.o: $(TOP)/src/console/vga_console.c + $(CC) -c $(CFLAGS) -o $@ $< +mainboard.o: $(TOP)/src/mainboard/dfi/nf570/mainboard.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_lpc.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_lpc.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_nic.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_nic.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_pcie.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_pcie.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_usb2.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_usb2.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_sata.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_sata.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_usb.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_usb.c + $(CC) -c $(CFLAGS) -o $@ $< +misc_control.o: $(TOP)/src/northbridge/amd/amdk8/misc_control.c + $(CC) -c $(CFLAGS) -o $@ $< +model_fxx_init.o: $(TOP)/src/cpu/amd/model_fxx/model_fxx_init.c + $(CC) -c $(CFLAGS) -o $@ $< +mcp55_smbus.o: $(TOP)/src/southbridge/nvidia/mcp55/mcp55_smbus.c + $(CC) -c $(CFLAGS) -o $@ $< +static.o: static.c + $(CC) -c $(CFLAGS) -o $@ $< + +# Remember the automatically generated files +GENERATED:= +GENERATED += Makefile +GENERATED += nsuperio.c +GENERATED += static.c +GENERATED += corebootDoc.config +GENERATED += crt0_includes.h + +echo: + @echo ACPI_SSDTX_NUM='$(ACPI_SSDTX_NUM)' + @echo AGP_APERTURE_SIZE='$(AGP_APERTURE_SIZE)' + @echo AMD_UCODE_PATCH_FILE='$(AMD_UCODE_PATCH_FILE)' + @echo APIC_ID_OFFSET='$(APIC_ID_OFFSET)' + @echo ARCH='$(ARCH)' + @echo AUTOBOOT_CMDLINE='$(AUTOBOOT_CMDLINE)' + @echo AUTOBOOT_DELAY='$(AUTOBOOT_DELAY)' + @echo CAR_FAM10='$(CAR_FAM10)' + @echo CBB='$(CBB)' + @echo CC='$(CC)' + @echo CDB='$(CDB)' + @echo CONFIG_AGP_PLUGIN_SUPPORT='$(CONFIG_AGP_PLUGIN_SUPPORT)' + @echo CONFIG_AMDMCT='$(CONFIG_AMDMCT)' + @echo CONFIG_AP_CODE_IN_CAR='$(CONFIG_AP_CODE_IN_CAR)' + @echo CONFIG_AP_IN_SIPI_WAIT='$(CONFIG_AP_IN_SIPI_WAIT)' + @echo CONFIG_BRIQ_7400='$(CONFIG_BRIQ_7400)' + @echo CONFIG_BRIQ_750FX='$(CONFIG_BRIQ_750FX)' + @echo CONFIG_CARDBUS_PLUGIN_SUPPORT='$(CONFIG_CARDBUS_PLUGIN_SUPPORT)' + @echo CONFIG_CHIP_CONFIGURE='$(CONFIG_CHIP_CONFIGURE)' + @echo CONFIG_CHIP_NAME='$(CONFIG_CHIP_NAME)' + @echo CONFIG_COMPRESS='$(CONFIG_COMPRESS)' + @echo CONFIG_COMPRESSED_PAYLOAD_LZMA='$(CONFIG_COMPRESSED_PAYLOAD_LZMA)' + @echo CONFIG_COMPRESSED_PAYLOAD_NRV2B='$(CONFIG_COMPRESSED_PAYLOAD_NRV2B)' + @echo CONFIG_CONSOLE_BTEXT='$(CONFIG_CONSOLE_BTEXT)' + @echo CONFIG_CONSOLE_LOGBUF='$(CONFIG_CONSOLE_LOGBUF)' + @echo CONFIG_CONSOLE_SERIAL8250='$(CONFIG_CONSOLE_SERIAL8250)' + @echo CONFIG_CONSOLE_SROM='$(CONFIG_CONSOLE_SROM)' + @echo CONFIG_CONSOLE_VGA='$(CONFIG_CONSOLE_VGA)' + @echo CONFIG_CONSOLE_VGA_MULTI='$(CONFIG_CONSOLE_VGA_MULTI)' + @echo CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST='$(CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST)' + @echo CONFIG_FS_EXT2='$(CONFIG_FS_EXT2)' + @echo CONFIG_FS_FAT='$(CONFIG_FS_FAT)' + @echo CONFIG_FS_ISO9660='$(CONFIG_FS_ISO9660)' + @echo CONFIG_FS_PAYLOAD='$(CONFIG_FS_PAYLOAD)' + @echo CONFIG_GDB_STUB='$(CONFIG_GDB_STUB)' + @echo CONFIG_GFXUMA='$(CONFIG_GFXUMA)' + @echo CONFIG_GX1_VIDEO='$(CONFIG_GX1_VIDEO)' + @echo CONFIG_GX1_VIDEOMODE='$(CONFIG_GX1_VIDEOMODE)' + @echo CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT='$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT)' + @echo CONFIG_IDE='$(CONFIG_IDE)' + @echo CONFIG_IDE_PAYLOAD='$(CONFIG_IDE_PAYLOAD)' + @echo CONFIG_IOAPIC='$(CONFIG_IOAPIC)' + @echo CONFIG_LB_MEM_TOPK='$(CONFIG_LB_MEM_TOPK)' + @echo CONFIG_LOGICAL_CPUS='$(CONFIG_LOGICAL_CPUS)' + @echo CONFIG_MAX_CPUS='$(CONFIG_MAX_CPUS)' + @echo CONFIG_MAX_PCI_BUSES='$(CONFIG_MAX_PCI_BUSES)' + @echo CONFIG_MAX_PHYSICAL_CPUS='$(CONFIG_MAX_PHYSICAL_CPUS)' + @echo CONFIG_PCIBIOS_IRQ='$(CONFIG_PCIBIOS_IRQ)' + @echo CONFIG_PCIEXP_PLUGIN_SUPPORT='$(CONFIG_PCIEXP_PLUGIN_SUPPORT)' + @echo CONFIG_PCIE_CONFIGSPACE_HOLE='$(CONFIG_PCIE_CONFIGSPACE_HOLE)' + @echo CONFIG_PCIX_PLUGIN_SUPPORT='$(CONFIG_PCIX_PLUGIN_SUPPORT)' + @echo CONFIG_PCI_64BIT_PREF_MEM='$(CONFIG_PCI_64BIT_PREF_MEM)' + @echo CONFIG_PCI_ROM_RUN='$(CONFIG_PCI_ROM_RUN)' + @echo CONFIG_PRECOMPRESSED_PAYLOAD='$(CONFIG_PRECOMPRESSED_PAYLOAD)' + @echo CONFIG_ROM_PAYLOAD='$(CONFIG_ROM_PAYLOAD)' + @echo CONFIG_ROM_PAYLOAD_START='$(CONFIG_ROM_PAYLOAD_START)' + @echo CONFIG_SANDPOINT_ALTIMUS='$(CONFIG_SANDPOINT_ALTIMUS)' + @echo CONFIG_SANDPOINT_GYRUS='$(CONFIG_SANDPOINT_GYRUS)' + @echo CONFIG_SANDPOINT_TALUS='$(CONFIG_SANDPOINT_TALUS)' + @echo CONFIG_SANDPOINT_UNITY='$(CONFIG_SANDPOINT_UNITY)' + @echo CONFIG_SANDPOINT_VALIS='$(CONFIG_SANDPOINT_VALIS)' + @echo CONFIG_SERIAL_PAYLOAD='$(CONFIG_SERIAL_PAYLOAD)' + @echo CONFIG_SERIAL_POST='$(CONFIG_SERIAL_POST)' + @echo CONFIG_SMP='$(CONFIG_SMP)' + @echo CONFIG_SPLASH_GRAPHIC='$(CONFIG_SPLASH_GRAPHIC)' + @echo CONFIG_SYS_CLK_FREQ='$(CONFIG_SYS_CLK_FREQ)' + @echo CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2='$(CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2)' + @echo CONFIG_UDELAY_IO='$(CONFIG_UDELAY_IO)' + @echo CONFIG_UDELAY_TSC='$(CONFIG_UDELAY_TSC)' + @echo CONFIG_UNCOMPRESSED='$(CONFIG_UNCOMPRESSED)' + @echo CONFIG_USBDEBUG_DIRECT='$(CONFIG_USBDEBUG_DIRECT)' + @echo CONFIG_USE_INIT='$(CONFIG_USE_INIT)' + @echo CONFIG_USE_PRINTK_IN_CAR='$(CONFIG_USE_PRINTK_IN_CAR)' + @echo CONFIG_VAR_MTRR_HOLE='$(CONFIG_VAR_MTRR_HOLE)' + @echo CONFIG_VGA_ROM_RUN='$(CONFIG_VGA_ROM_RUN)' + @echo CONFIG_VIDEO_MB='$(CONFIG_VIDEO_MB)' + @echo COREBOOT_ASSEMBLER='$(COREBOOT_ASSEMBLER)' + @echo COREBOOT_BUILD='$(COREBOOT_BUILD)' + @echo COREBOOT_COMPILER='$(COREBOOT_COMPILER)' + @echo COREBOOT_COMPILE_BY='$(COREBOOT_COMPILE_BY)' + @echo COREBOOT_COMPILE_DOMAIN='$(COREBOOT_COMPILE_DOMAIN)' + @echo COREBOOT_COMPILE_HOST='$(COREBOOT_COMPILE_HOST)' + @echo COREBOOT_COMPILE_TIME='$(COREBOOT_COMPILE_TIME)' + @echo COREBOOT_EXTRA_VERSION='$(COREBOOT_EXTRA_VERSION)' + @echo COREBOOT_LINKER='$(COREBOOT_LINKER)' + @echo COREBOOT_VERSION='$(COREBOOT_VERSION)' + @echo CPU_ADDR_BITS='$(CPU_ADDR_BITS)' + @echo CPU_OPT='$(CPU_OPT)' + @echo CPU_SOCKET_TYPE='$(CPU_SOCKET_TYPE)' + @echo CROSS_COMPILE='$(CROSS_COMPILE)' + @echo CRT0='$(CRT0)' + @echo DCACHE_RAM_BASE='$(DCACHE_RAM_BASE)' + @echo DCACHE_RAM_GLOBAL_VAR_SIZE='$(DCACHE_RAM_GLOBAL_VAR_SIZE)' + @echo DCACHE_RAM_SIZE='$(DCACHE_RAM_SIZE)' + @echo DEBUG='$(DEBUG)' + @echo DEFAULT_CONSOLE_LOGLEVEL='$(DEFAULT_CONSOLE_LOGLEVEL)' + @echo DIMM_SUPPORT='$(DIMM_SUPPORT)' + @echo EMBEDDED_RAM_SIZE='$(EMBEDDED_RAM_SIZE)' + @echo ENABLE_APIC_EXT_ID='$(ENABLE_APIC_EXT_ID)' + @echo EXT_CONF_SUPPORT='$(EXT_CONF_SUPPORT)' + @echo EXT_RT_TBL_SUPPORT='$(EXT_RT_TBL_SUPPORT)' + @echo FAILOVER_SIZE='$(FAILOVER_SIZE)' + @echo FAKE_SPDROM='$(FAKE_SPDROM)' + @echo FALLBACK_SIZE='$(FALLBACK_SIZE)' + @echo HAVE_ACPI_TABLES='$(HAVE_ACPI_TABLES)' + @echo HAVE_FAILOVER_BOOT='$(HAVE_FAILOVER_BOOT)' + @echo HAVE_FALLBACK_BOOT='$(HAVE_FALLBACK_BOOT)' + @echo HAVE_FANCTL='$(HAVE_FANCTL)' + @echo HAVE_HARD_RESET='$(HAVE_HARD_RESET)' + @echo HAVE_INIT_TIMER='$(HAVE_INIT_TIMER)' + @echo HAVE_MOVNTI='$(HAVE_MOVNTI)' + @echo HAVE_MP_TABLE='$(HAVE_MP_TABLE)' + @echo HAVE_OPTION_TABLE='$(HAVE_OPTION_TABLE)' + @echo HAVE_PIRQ_TABLE='$(HAVE_PIRQ_TABLE)' + @echo HAVE_SMI_HANDLER='$(HAVE_SMI_HANDLER)' + @echo HEAP_SIZE='$(HEAP_SIZE)' + @echo HOSTCC='$(HOSTCC)' + @echo HT3_SUPPORT='$(HT3_SUPPORT)' + @echo HT_CHAIN_END_UNITID_BASE='$(HT_CHAIN_END_UNITID_BASE)' + @echo HT_CHAIN_UNITID_BASE='$(HT_CHAIN_UNITID_BASE)' + @echo HW_MEM_HOLE_SIZEK='$(HW_MEM_HOLE_SIZEK)' + @echo HW_MEM_HOLE_SIZE_AUTO_INC='$(HW_MEM_HOLE_SIZE_AUTO_INC)' + @echo IDE_BOOT_DRIVE='$(IDE_BOOT_DRIVE)' + @echo IDE_OFFSET='$(IDE_OFFSET)' + @echo IDE_SWAB='$(IDE_SWAB)' + @echo INTEL_PPRO_MTRR='$(INTEL_PPRO_MTRR)' + @echo IRQ_SLOT_COUNT='$(IRQ_SLOT_COUNT)' + @echo ISA_IO_BASE='$(ISA_IO_BASE)' + @echo ISA_MEM_BASE='$(ISA_MEM_BASE)' + @echo K8_HT_FREQ_1G_SUPPORT='$(K8_HT_FREQ_1G_SUPPORT)' + @echo K8_MEM_BANK_B_ONLY='$(K8_MEM_BANK_B_ONLY)' + @echo K8_REV_F_SUPPORT='$(K8_REV_F_SUPPORT)' + @echo LB_CKS_LOC='$(LB_CKS_LOC)' + @echo LB_CKS_RANGE_END='$(LB_CKS_RANGE_END)' + @echo LB_CKS_RANGE_START='$(LB_CKS_RANGE_START)' + @echo LIFT_BSP_APIC_ID='$(LIFT_BSP_APIC_ID)' + @echo MAINBOARD='$(MAINBOARD)' + @echo MAINBOARD_PART_NUMBER='$(MAINBOARD_PART_NUMBER)' + @echo MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID='$(MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID)' + @echo MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID='$(MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID)' + @echo MAINBOARD_POWER_ON_AFTER_POWER_FAIL='$(MAINBOARD_POWER_ON_AFTER_POWER_FAIL)' + @echo MAINBOARD_VENDOR='$(MAINBOARD_VENDOR)' + @echo MAXIMUM_CONSOLE_LOGLEVEL='$(MAXIMUM_CONSOLE_LOGLEVEL)' + @echo MAX_REBOOT_CNT='$(MAX_REBOOT_CNT)' + @echo MEMORY_HOLE='$(MEMORY_HOLE)' + @echo MEM_TRAIN_SEQ='$(MEM_TRAIN_SEQ)' + @echo MMCONF_SUPPORT='$(MMCONF_SUPPORT)' + @echo MMCONF_SUPPORT_DEFAULT='$(MMCONF_SUPPORT_DEFAULT)' + @echo NO_POST='$(NO_POST)' + @echo OBJCOPY='$(OBJCOPY)' + @echo PAYLOAD_SIZE='$(PAYLOAD_SIZE)' + @echo PCIC0_CFGADDR='$(PCIC0_CFGADDR)' + @echo PCIC0_CFGDATA='$(PCIC0_CFGDATA)' + @echo PCI_BUS_SEGN_BITS='$(PCI_BUS_SEGN_BITS)' + @echo PCI_IO_CFG_EXT='$(PCI_IO_CFG_EXT)' + @echo PIRQ_ROUTE='$(PIRQ_ROUTE)' + @echo PNP_CFGADDR='$(PNP_CFGADDR)' + @echo PNP_CFGDATA='$(PNP_CFGDATA)' + @echo ROM_IMAGE_SIZE='$(ROM_IMAGE_SIZE)' + @echo ROM_SECTION_OFFSET='$(ROM_SECTION_OFFSET)' + @echo ROM_SECTION_SIZE='$(ROM_SECTION_SIZE)' + @echo ROM_SIZE='$(ROM_SIZE)' + @echo SB_HT_CHAIN_ON_BUS0='$(SB_HT_CHAIN_ON_BUS0)' + @echo SB_HT_CHAIN_UNITID_OFFSET_ONLY='$(SB_HT_CHAIN_UNITID_OFFSET_ONLY)' + @echo SERIAL_CPU_INIT='$(SERIAL_CPU_INIT)' + @echo STACK_SIZE='$(STACK_SIZE)' + @echo TTYS0_BASE='$(TTYS0_BASE)' + @echo TTYS0_BAUD='$(TTYS0_BAUD)' + @echo TTYS0_DIV='$(TTYS0_DIV)' + @echo TTYS0_LCS='$(TTYS0_LCS)' + @echo USE_DCACHE_RAM='$(USE_DCACHE_RAM)' + @echo USE_FAILOVER_IMAGE='$(USE_FAILOVER_IMAGE)' + @echo USE_FALLBACK_IMAGE='$(USE_FALLBACK_IMAGE)' + @echo USE_OPTION_TABLE='$(USE_OPTION_TABLE)' + @echo USE_WATCHDOG_ON_BOOT='$(USE_WATCHDOG_ON_BOOT)' + @echo WAIT_BEFORE_CPUS_INIT='$(WAIT_BEFORE_CPUS_INIT)' + @echo XIP_ROM_BASE='$(XIP_ROM_BASE)' + @echo XIP_ROM_SIZE='$(XIP_ROM_SIZE)' + @echo _EXCEPTION_VECTORS='$(_EXCEPTION_VECTORS)' + @echo _IO_BASE='$(_IO_BASE)' + @echo _RAMBASE='$(_RAMBASE)' + @echo _RAMSTART='$(_RAMSTART)' + @echo _RESET='$(_RESET)' + @echo _ROMBASE='$(_ROMBASE)' + @echo _ROMSTART='$(_ROMSTART)' +all: coreboot.rom +coreboot_ram.o: $(DRIVER) coreboot.a $(LIBGCC_FILE_NAME) + $(CC) $(DISTRO_LFLAGS) -nostdlib -r -o $@ c_start.o $(DRIVER) coreboot.a $(LIBGCC_FILE_NAME) +coreboot_ram: coreboot_ram.o $(TOP)/src/config/coreboot_ram.ld ldoptions + $(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/coreboot_ram.ld coreboot_ram.o + $(CROSS_COMPILE)nm -n coreboot_ram | sort > coreboot_ram.map +coreboot.strip: coreboot + $(OBJCOPY) -O binary coreboot coreboot.strip +coreboot_ram.bin: coreboot_ram + $(OBJCOPY) -O binary $< $@ +coreboot.rom: coreboot.strip buildrom $(PAYLOAD-1) + ./buildrom $< $@ $(PAYLOAD-1) $(ROM_IMAGE_SIZE) $(ROM_SECTION_SIZE) +etags: $(SOURCES) + etags $(SOURCES) +payload: $(PAYLOAD) + cp $< $@ +nrv2b: $(TOP)/util/nrv2b/nrv2b.c + $(HOSTCC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG -DBITSIZE=32 -DENDIAN=0 $< -o $@ +ldscript.ld: ldoptions $(LDSUBSCRIPTS-1) + echo '/*ldoptions*/' > $@; cat ldoptions >> $@ ; for file in $(LDSUBSCRIPTS-1) ; do echo /* $$file */ >> $@; cat $$file >> $@ ; done +payload.lzma: $(PAYLOAD) + lzma e $(PAYLOAD) $@ +option_table.c: build_opt_tbl $(MAINBOARD)/cmos.layout + ./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout --header option_table.h +../romcc: $(TOP)/util/romcc/romcc.c + $(HOSTCC) -g $(HOSTCFLAGS) $< -o romcc.tmpfile + mv romcc.tmpfile $@ +option_table.h: build_opt_tbl $(MAINBOARD)/cmos.layout + ./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout --header option_table.h +build_opt_tbl: $(TOP)/util/options/build_opt_tbl.c $(TOP)/src/include/pc80/mc146818rtc.h $(TOP)/src/include/boot/coreboot_tables.h Makefile.settings Makefile + $(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) $< -o $@ +corebootDoc.config: $(TOP)/src/config/corebootDoc.config + cat $(TOP)/src/config/corebootDoc.config > corebootDoc.config + echo 'INPUT=$(SOURCES)' >> corebootDoc.config +coreboot_ram.rom: $(COREBOOT_RAM-1) + cp $(COREBOOT_RAM-1) coreboot_ram.rom +raminit_test: $(TOP)/src/northbridge/amd/amdk8/raminit_test.c $(TOP)/src/northbridge/amd/amdk8/raminit.c + $(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@ +tags: $(SOURCES) + ctags $(SOURCES) +floppy: all + mcopy -o coreboot.rom a: +crt0.S: $(CRT0) + cp $< $@ +coreboot_ram.nrv2b: coreboot_ram.bin nrv2b + ./nrv2b e $< $@ +coreboot: crt0.o $(INIT-OBJECTS) $(COREBOOT_APC) $(COREBOOT_RAM_ROM) ldscript.ld + $(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o $(INIT-OBJECTS) + $(CROSS_COMPILE)nm -n coreboot | sort > coreboot.map +coreboot.a: $(OBJECTS) + rm -f coreboot.a + $(CROSS_COMPILE)ar cr coreboot.a $(OBJECTS) +documentation: corebootDoc.config + doxygen corebootDoc.config +crt0.s: crt0.S $(CRT0_INCLUDES) + $(CPP) $(CPPFLAGS) -I. -I$(TOP)/src $< > $@.new && mv $@.new $@ +crt0.o: crt0.s + @$(CC) -c $(CPU_OPT) -o $@ $< +clean: + rm -f coreboot.* *~ + rm -f coreboot + rm -f ldscript.ld + rm -f a.out *.s *.l *.o *.E *.inc + rm -f TAGS tags romcc* + rm -f docipl buildrom* chips.c *chip.c coreboot_apc* coreboot_ram* coreboot_pay* + rm -f build_opt_tbl* nrv2b* option_table.c crt0.S + rm -f romimage payload.* +payload.nrv2b: $(PAYLOAD) nrv2b + ./nrv2b e $(PAYLOAD) $@ +./cache_as_ram_auto.inc: $(MAINBOARD)/cache_as_ram_auto.c option_table.h + $(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@ + perl -e 's/.rodata/.rom.data/g' -pi $@ + perl -e 's/.text/.section .rom.text/g' -pi $@ +buildrom: $(TOP)/util/buildrom/buildrom.c + $(HOSTCC) -o $@ $< + + +Makefile: /home/chris/coreboot-v2/targets/dfi/nf570/nf570/config.py /home/chris/coreboot-v2/targets/dfi/nf570/Config.lb + (cd /home/chris/coreboot-v2/targets ; export PYTHONPATH=/home/chris/coreboot-v2/util/newconfig ; python dfi/nf570/nf570/config.py dfi/nf570/Config.lb /home/chris/coreboot-v2) + Index: targets/dfi/nf570/nf570/normal/buildrom =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/normal/buildrom ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/coreboot.rom =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
Property changes on: targets/dfi/nf570/nf570/coreboot.rom ___________________________________________________________________ Added: svn:mime-type + application/octet-stream
Index: targets/dfi/nf570/nf570/config.py =================================================================== --- targets/dfi/nf570/nf570/config.py (revision 0) +++ targets/dfi/nf570/nf570/config.py (revision 0) @@ -0,0 +1,2738 @@ +# -*- python -*- +import sys +import os +import re +import string +import types + +import traceback + +warnings = 0 +errors = 0 + +target_dir = '' +target_name = '' +treetop = '' +full_mainboard_path = '' +mainboard_path = '' +global_options = {} +global_options_by_order = [] +global_option_values = {} +global_uses_options = {} +global_exported_options = [] +romimages = {} +buildroms = [] +curimage = 0 +alloptions = 0 # override uses at top level + +local_path = re.compile(r'^.') +include_pattern = re.compile(r'%%([^%]+)%%') + +# the cpu type for this mainboard +cpu_type = 0 + +# ----------------------------------------------------------------------------- +# Utility Classes +# ----------------------------------------------------------------------------- + +class stack: + """Used to keep track of the current part or dir""" + class __stack_iter: + def __init__ (self, stack): + self.index = 0 + self.len = len(stack) + self.stack = stack + + def __iter__ (self): + return self + + def next (self): + if (self.index < self.len): + s = self.stack[self.index] + self.index = self.index + 1 + return s + raise StopIteration + + def __init__ (self): + self.stack = [] + + def __len__ (self): + return len(self.stack) + + def __getitem__ (self, i): + return self.stack[i] + + def __iter__ (self): + return self.__stack_iter(self.stack) + + def push(self, part): + self.stack.append(part) + + def pop(self): + try: + return self.stack.pop() + except IndexError: + return 0 + + def tos(self): + try: + return self.stack[-1] + except IndexError: + return 0 + + def empty(self): + return (len(self.stack) == 0) +partstack = stack() +dirstack = stack() + +class debug_info: + none = 0 + gencode = 1 + dumptree = 2 + object = 3 + dict = 4 + statement = 5 + dump = 6 + + def __init__(self, *level): + self.__level = level + + def setdebug(self, *level): + self.__level = level + + def level(self, level): + return level in self.__level + + def info(self, level, str): + if level in self.__level: + print str + +global debug +debug = debug_info(debug_info.none) + +# ----------------------------------------------------------------------------- +# Error Handling +# ----------------------------------------------------------------------------- + +class location: + """Used to keep track of our current location while parsing + configuration files""" + class __place: + def __init__(self, file, line, command): + self.file = file + self.line = line + self.command = command + def next_line(self, command): + self.line = self.line + 1 + self.command = command + def at(self): + return "%s:%d" % (self.file, self.line) + + def __init__ (self): + self.stack = stack() + + def __str__ (self): + s = '' + for p in self.stack: + if (s == ''): + s = p.at() + else: + s = s + '\n' + p.at() + return s + + def file(self): + return self.stack.tos().file + + def line(self): + return self.stack.tos().line + + def command(self): + return self.stack.tos().command + + def push(self, file): + self.stack.push(self.__place(os.path.normpath(file), 0, "")) + + def pop(self): + self.stack.pop() + + def next_line(self, command): + self.stack.tos().next_line(command) + + def at(self): + return self.stack.tos().at() +loc = location() + +def error(string): + """Print error message""" + global errors, loc + errors = errors + 1 + print "===> ERROR: %s" % string + print "%s" % loc + +def fatal(string): + """Print error message and exit""" + error(string) + exitiferrors() + +def warning(string): + """Print warning message""" + global warnings, loc + warnings = warnings + 1 + print "===> WARNING: %s" % string + +def notice(string): + """Print notice message""" + #print "===> NOTE: %s" % string + +def exitiferrors(): + """Exit parser if an error has been encountered""" + if (errors != 0): + sys.exit(1) + +def safe_open(file, mode): + try: + return open(file, mode) + except IOError: + fatal("Could not open file "%s"" % file) + +# ----------------------------------------------------------------------------- +# Main classes +# ----------------------------------------------------------------------------- + +class romimage: + """A rom image is the ultimate goal of coreboot""" + def __init__ (self, name): + # name of this rom image + self.name = name + + # set by 'arch' directive + self.arch = '' + + # set by 'payload' directive + self.payload = '' + + # set by 'init' directive + self.initfile = '' + + # make rules added by 'makerule' directive + self.makebaserules = {} + + # object files added by 'object' directive + self.objectrules = {} + + # init object files added by 'initobject' directive + self.initobjectrules = {} + + # driver files added by 'driver' directive + self.driverrules = {} + + # loader scripts added by 'ldscript' directive + self.ldscripts = [] + + # user defines added by 'makedefine' directive + self.userdefines = [] + + # files to be included in crt0.S + self.initincludes = {} + + # as above, but order is preserved + self.initincludesorder = [] + + # transitional flag to support old crtinclude format + self.useinitincludes = 0 + + # instance counter for parts + self.partinstance = 0 + + # chip config files included by the 'config' directive + self.configincludes = {} + + # root of part tree + self.root = 0 + + # name of target directory specified by 'target' directive + self.target_dir = '' + + # option values used in rom image + self.values = {} + + # exported options + self.exported_options = [] + + # Last device built + self.last_device = 0 + + def getname(self): + return self.name + + def getvalues(self): + return self.values + + def setarch(self, arch): + self.arch = arch + + def setpayload(self, payload): + self.payload = payload + + def setinitfile(self, initfile): + self.initfile = initfile + + def getinitfile(self): + return self.initfile + + def addmakerule(self, id): + o = getdict(self.makebaserules, id) + if (o): + warning("rule %s previously defined" % id) + o = makerule(id) + setdict(self.makebaserules, id, o) + + def getmakerules(self): + return self.makebaserules + + def getmakerule(self, id): + o = getdict(self.makebaserules, id) + if (o): + return o + fatal("No such make rule "%s"" % id) + + def addmakeaction(self, id, str): + o = getdict(self.makebaserules, id) + if (o): + a = dequote(str) + o.addaction(a) + return + fatal("No such rule "%s" for addmakeaction" % id) + + def addmakedepend(self, id, str): + o = getdict(self.makebaserules, id) + if (o): + a = dequote(str) + o.adddependency(a) + return + fatal("No such rule "%s" for addmakedepend" % id) + + # this is called with an an object name. + # the easiest thing to do is add this object to the current + # component. + # such kludgery. If the name starts with '.' then make the + # dependency be on ./thing.x gag me. + def addobjectdriver(self, dict, object_name): + global dirstack + suffix = object_name[-2:] + if (suffix == '.o'): + suffix = '.c' + base = object_name[:-2] + type = object_name[-1:] + if (object_name[0] == '.'): + source = base + suffix + else: + source = os.path.join(dirstack.tos(), base + suffix) + object = base + '.o' + debug.info(debug.object, "add object %s source %s" % (object_name, source)) + l = getdict(dict, base) + if (l): + warning("object/driver %s previously defined" % base) + setdict(dict, base, [object, source, type, base]) + + def addinitobjectrule(self, name): + self.addobjectdriver(self.initobjectrules, name) + + def addobjectrule(self, name): + self.addobjectdriver(self.objectrules, name) + + def adddriverrule(self, name): + self.addobjectdriver(self.driverrules, name) + + def getinitobjectrules(self): + return self.initobjectrules + + def getinitobjectrule(self, name): + o = getdict(self.initobjectrules, name) + if (o): + return o + fatal("No such init object rule "%s"" % name) + + def getobjectrules(self): + return self.objectrules + + def getobjectrule(self, name): + o = getdict(self.objectrules, name) + if (o): + return o + fatal("No such object rule "%s"" % name) + + def getdriverrules(self): + return self.driverrules + + def getdriverrule(self, name): + o = getdict(self.driverrules, name) + if (o): + return o + fatal("No such driver rule "%s"" % name) + + def addldscript(self, path): + self.ldscripts.append(path) + + def getldscripts(self): + return self.ldscripts + + def adduserdefine(self, str): + self.userdefines.append(str) + + def getuserdefines(self): + return self.userdefines + + def addinitinclude(self, str, path): + if (str != 0): + self.useinitincludes = 1 + + debug.info(debug.object, "ADDCRT0: %s -> %s" % (str, path)) + o = getdict(self.initincludes, path) + if (o): + warning("init include for %s previously defined" % path) + o = initinclude(str, path) + setdict(self.initincludes, path, o) + self.initincludesorder.append(path) + + def getinitincludes(self): + return self.initincludesorder + + def getinitinclude(self, path): + o = getdict(self.initincludes, path) + if (o): + return o + fatal("No such init include "%s"" % path) + + def addconfiginclude(self, part, path): + setdict(self.configincludes, part, path) + + def getconfigincludes(self): + return self.configincludes + + def getincludefilename(self): + if (self.useinitincludes): + return "crt0.S" + else: + return "crt0_includes.h" + + def newformat(self): + return self.useinitincludes + + def numparts(self): + return self.partinstance + + def newpartinstance(self): + i = self.partinstance + self.partinstance = self.partinstance + 1 + return i + + def setroot(self, part): + self.root = part + + def getroot(self): + return self.root + + def settargetdir(self, path): + self.targetdir = path + + def gettargetdir(self): + return self.targetdir + +class buildrom: + """A buildrom statement""" + def __init__ (self, filename, size, roms): + self.name = filename + self.size = size + self.roms = roms + + def __len__ (self): + return len(self.roms) + + def __getitem__(self,i): + return self.roms[i] + +class initinclude: + """include file for initialization code""" + def __init__ (self, str, path): + self.string = str + self.path = path + + def getstring(self): + return self.string + + def getpath(self): + return self.path + +class makerule: + """Rule to be included in Makefile""" + def __init__ (self, target): + self.target = target + self.dependency = [] + self.actions = [] + + def addaction(self, action): + self.actions.append(action) + + def adddependency(self, dependency): + self.dependency.append(dependency) + + def gtarget(self): + return self.target + + def gdependency(self): + return self.dependency + + def gaction(self): + return self.actions + +class option: + """Configuration option""" + def __init__ (self, name): + self.name = name # name of option + self.loc = 0 # current location + self.used = 0 # option has been used + # it is undefined) + self.comment = '' # description of option + self.exportable = 0 # option is able to be exported + self.format = '%s' # option print format + self.write = [] # parts that can set this option + + def where(self): + return self.loc + + def setcomment(self, comment, loc): + if (self.comment != ''): + print "%s: " % self.name + print "Attempt to modify comment at %s" % loc + return + self.comment = comment + + def setexportable(self): + self.exportable = 1 + + def setnoexport(self): + self.exportable = 0 + + def setformat(self, fmt): + self.format = fmt + + def getformat(self): + return self.format + + def setused(self): + if (self.exportable): + self.exported = 1 + self.used = 1 + + def setwrite(self, part): + self.write.append(part) + + def isexportable(self): + return self.exportable + + def iswritable(self, part): + return (part in self.write) + +class option_value: + """Value of a configuration option. The option has a default + value which can be changed at any time. Once an option has been + set the default value is no longer used.""" + def __init__(self, name, prev): + self.name = name + self.value = '' + self.set = 0 + if (prev): + self.value = prev.value + self.set = prev.set + + + def setvalue(self, value): + if ((self.set & 2) == 2): + warning("Changing option %s" % self.name) + else: + self.set |= 2 + self.value = value + + def setdefault(self, value): + if ((self.set & 1) == 1): + notice("Changing default value of %s" % self.name) + + if ((self.set & 2) == 0): + self.value = value + self.set |= 1 + + def contents(self): + return self.value + + def isset(self): + return (self.set & 2) == 2 + + +class partobj: + """A configuration part""" + def __init__ (self, image, dir, parent, part, type_name, instance_name, chip_or_device): + debug.info(debug.object, "partobj dir %s parent %s part %s" \ + % (dir, parent, part)) + + # romimage that is configuring this part + self.image = image + + # links for static device tree + self.children = 0 + self.prev_sibling = 0 + self.next_sibling = 0 + self.prev_device = 0 + self.next_device = 0 + self.chip_or_device = chip_or_device + + # list of init code files + self.initcode = [] + + # initializers for static device tree + self.registercode = {} + + # part name + self.part = part + + # type name of this part + self.type_name = type_name + + # object files needed to build this part + self.objects = [] + + # directory containg part files + self.dir = dir + + # instance number, used to distinguish anonymous + # instances of this part + self.instance = image.newpartinstance() + debug.info(debug.object, "INSTANCE %d" % self.instance) + + # Options used by this part + self.uses_options = {} + + # Name of chip config file (0 if not needed) + self.chipconfig = 0 + + # Flag to indicate that we have generated type + # definitions for this part (only want to do it once) + self.done_types = 0 + + # Path to the device + self.path = "" + + # Resources of the device + self.resoruce = "" + self.resources = 0 + + # Enabled state of the device + self.enabled = 1 + + # Flag if I am a dumplicate device + self.dup = 0 + + # If no instance name is supplied then generate + # a unique name + if (instance_name == 0): + self.instance_name = self.type_name + \ + "_dev%d" % self.instance + self.chipinfo_name = "%s_info_%d" \ + % (self.type_name, self.instance) + else: + self.instance_name = instance_name + self.chipinfo_name = "%s_info_%d" % (self.instance_name, self.instance) + + # Link this part into the device list + if (self.chip_or_device == 'device'): + if (image.last_device): + image.last_device.next_device = self + self.prev_device = image.last_device + image.last_device = self + + # Link this part into the tree + if (parent and (part != 'arch')): + debug.info(debug.gencode, "add to parent") + self.parent = parent + # add current child as my sibling, + # me as the child. + if (parent.children): + debug.info(debug.gencode, "add %s (%d) as sibling" % (parent.children.dir, parent.children.instance)) + youngest = parent.children + while(youngest.next_sibling): + youngest = youngest.next_sibling + youngest.next_sibling = self + self.prev_sibling = youngest + else: + parent.children = self + else: + self.parent = self + + + def info(self): + return "%s: %s" % (self.part, self.type) + def type(self): + return self.chip_or_device + + def readable_name(self): + name = "" + name = "%s_%d" % (self.type_name, self.instance) + if (self.chip_or_device == 'chip'): + name = "%s %s %s" % (name, self.part, self.dir) + else: + name = "%s %s" % (name, self.path) + return name + + def dumpme(self, lvl): + """Dump information about this part for debugging""" + print "%d: %s" % (lvl, self.readable_name()) + print "%d: part %s" % (lvl, self.part) + print "%d: instance %d" % (lvl, self.instance) + print "%d: chip_or_device %s" % (lvl, self.chip_or_device) + print "%d: dir %s" % (lvl,self.dir) + print "%d: type_name %s" % (lvl,self.type_name) + print "%d: parent: %s" % (lvl, self.parent.readable_name()) + if (self.children): + print "%d: child %s" % (lvl, self.children.readable_name()) + if (self.next_sibling): + print "%d: siblings %s" % (lvl, self.next_sibling.readable_name()) + print "%d: initcode " % lvl + for i in self.initcode: + print "\t%s" % i + print "%d: registercode " % lvl + for f, v in self.registercode.items(): + print "\t%s = %s" % (f, v) + print "\n" + + def firstchilddevice(self): + """Find the first device in the children link.""" + kid = self.children + while (kid): + if (kid.chip_or_device == 'device'): + return kid + else: + kid = kid.children + return 0 + + def firstparentdevice(self): + """Find the first device in the parent link.""" + parent = self.parent + while (parent and (parent.parent != parent) and (parent.chip_or_device != 'device')): + parent = parent.parent + if ((parent.parent != parent) and (parent.chip_or_device != 'device')): + parent = 0 + while(parent and (parent.dup == 1)): + parent = parent.prev_sibling + if (not parent): + fatal("Device %s has no device parent; this is a config file error" % self.readable_name()) + return parent + + def firstparentdevicelink(self): + """Find the first device in the parent link and record which link it is.""" + link = 0 + parent = self.parent + while (parent and (parent.parent != parent) and (parent.chip_or_device != 'device')): + parent = parent.parent + if ((parent.parent != parent) and (parent.chip_or_device != 'device')): + parent = 0 + while(parent and (parent.dup == 1)): + parent = parent.prev_sibling + link = link + 1 + if (not parent): + fatal("Device %s has no device parent; this is a config file error" % self.readable_name()) + return link + + + def firstparentchip(self): + """Find the first chip in the parent link.""" + parent = self.parent + while (parent): + if ((parent.parent == parent) or (parent.chip_or_device == 'chip')): + return parent + else: + parent = parent.parent + fatal("Device %s has no chip parent; this is a config file error" % self.readable_name()) + + def firstsiblingdevice(self): + """Find the first device in the sibling link.""" + sibling = self.next_sibling + while(sibling and (sibling.path == self.path)): + sibling = sibling.next_sibling + if ((not sibling) and (self.parent.chip_or_device == 'chip')): + sibling = self.parent.next_sibling + while(sibling): + if (sibling.chip_or_device == 'device'): + return sibling + else: + sibling = sibling.children + return 0 + + def gencode(self, file, pass_num): + """Generate static initalizer code for this part. Two passes + are used - the first generates type information, and the second + generates instance information""" + if (pass_num == 0): + if (self.chip_or_device == 'chip'): + return; + else: + if (self.instance): + file.write("struct device %s;\n" \ + % self.instance_name) + else: + file.write("struct device dev_root;\n") + return + # This is pass the second, which is pass number 1 + # this is really just a case statement ... + + if (self.chip_or_device == 'chip'): + if (self.chipconfig): + debug.info(debug.gencode, "gencode: chipconfig(%d)" % \ + self.instance) + file.write("struct %s_config %s" % (self.type_name ,\ + self.chipinfo_name)) + if (self.registercode): + file.write("\t= {\n") + for f, v in self.registercode.items(): + file.write( "\t.%s = %s,\n" % (f, v)) + file.write("};\n") + else: + file.write(";") + file.write("\n") + + if (self.instance == 0): + self.instance_name = "dev_root" + file.write("struct device **last_dev_p = &%s.next;\n" % (self.image.last_device.instance_name)) + file.write("struct device dev_root = {\n") + file.write("\t.ops = &default_dev_ops_root,\n") + file.write("\t.bus = &dev_root.link[0],\n") + file.write("\t.path = { .type = DEVICE_PATH_ROOT },\n") + file.write("\t.enabled = 1,\n\t.links = 1,\n") + file.write("\t.on_mainboard = 1,\n") + file.write("\t.link = {\n\t\t[0] = {\n") + file.write("\t\t\t.dev=&dev_root,\n\t\t\t.link = 0,\n") + file.write("\t\t\t.children = &%s,\n" % self.firstchilddevice().instance_name) + file.write("\t\t},\n") + file.write("\t},\n") + if (self.chipconfig): + file.write("\t.chip_ops = &%s_ops,\n" % self.type_name) + file.write("\t.chip_info = &%s_info_%s,\n" % (self.type_name, self.instance)) + file.write("\t.next = &%s,\n" % self.firstchilddevice().instance_name) + file.write("};\n") + return + + # Don't print duplicate devices, just print their children + if (self.dup): + return + + file.write("struct device %s = {\n" % self.instance_name) + file.write("\t.ops = 0,\n") + file.write("\t.bus = &%s.link[%d],\n" % \ + (self.firstparentdevice().instance_name, \ + self.firstparentdevicelink())) + file.write("\t.path = {%s},\n" % self.path) + file.write("\t.enabled = %d,\n" % self.enabled) + file.write("\t.on_mainboard = 1,\n") + if (self.resources): + file.write("\t.resources = %d,\n" % self.resources) + file.write("\t.resource = {%s\n\t },\n" % self.resource) + file.write("\t.link = {\n"); + links = 0 + bus = self + while(bus and (bus.path == self.path)): + child = bus.firstchilddevice() + if (child or (bus != self) or (bus.next_sibling and (bus.next_sibling.path == self.path))): + file.write("\t\t[%d] = {\n" % links) + file.write("\t\t\t.link = %d,\n" % links) + file.write("\t\t\t.dev = &%s,\n" % self.instance_name) + if (child): + file.write("\t\t\t.children = &%s,\n" %child.instance_name) + file.write("\t\t},\n") + links = links + 1 + if (1): + bus = bus.next_sibling + else: + bus = 0 + file.write("\t},\n") + file.write("\t.links = %d,\n" % (links)) + sibling = self.firstsiblingdevice(); + if (sibling): + file.write("\t.sibling = &%s,\n" % sibling.instance_name) + chip = self.firstparentchip() + if (chip and chip.chipconfig): + file.write("\t.chip_ops = &%s_ops,\n" % chip.type_name) + file.write("\t.chip_info = &%s_info_%s,\n" % (chip.type_name, chip.instance)) + if (self.next_device): + file.write("\t.next=&%s\n" % self.next_device.instance_name) + file.write("};\n") + return + + def addinit(self, code): + """Add init file to this part""" + self.initcode.append(code) + + def addconfig(self, path): + """Add chip config file to this part""" + self.chipconfig = os.path.join(self.dir, path) + self.image.addconfiginclude(self.type_name, self.chipconfig) + + def addregister(self, field, value): + """Register static initialization information""" + if (self.chip_or_device != 'chip'): + fatal("Only chips can have register values") + field = dequote(field) + value = dequote(value) + setdict(self.registercode, field, value) + + def set_enabled(self, enabled): + self.enabled = enabled + + def start_resources(self): + self.resource = "" + self.resources = 0 + + def end_resources(self): + self.resource = "%s" % (self.resource) + + def add_resource(self, type, index, value): + """ Add a resource to a device """ + self.resource = "%s\n\t\t{ .flags=%s, .index=0x%x, .base=0x%x}," % (self.resource, type, index, value) + self.resources = self.resources + 1 + + def set_path(self, path): + self.path = path + if (self.prev_sibling and (self.prev_sibling.path == self.path)): + self.dup = 1 + if (self.prev_device): + self.prev_device.next_device = self.next_device + if (self.next_device): + self.next_device.prev_device = self.prev_device + if (self.image.last_device == self): + self.image.last_device = self.prev_device + self.prev_device = 0 + self.next_device = 0 + + def addpcipath(self, slot, function): + """ Add a relative pci style path from our parent to this device """ + if ((slot < 0) or (slot > 0x1f)): + fatal("Invalid device id") + if ((function < 0) or (function > 7)): + fatal("Invalid pci function %s" % function ) + self.set_path(".type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x%x,%d)}}" % (slot, function)) + + def addpnppath(self, port, device): + """ Add a relative path to a pnp device hanging off our parent """ + if ((port < 0) or (port > 65536)): + fatal("Invalid port") + if ((device < 0) or (device > 0xffff)): + fatal("Invalid device") + self.set_path(".type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x%x, .device = 0x%x }}" % (port, device)) + + def addi2cpath(self, device): + """ Add a relative path to a i2c device hanging off our parent """ + if ((device < 0) or (device > 0x7f)): + fatal("Invalid device") + self.set_path(".type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x%x }}" % (device)) + + def addapicpath(self, apic_id): + """ Add a relative path to a cpu device hanging off our parent """ + if ((apic_id < 0) or (apic_id > 255)): + fatal("Invalid device") + self.set_path(".type=DEVICE_PATH_APIC,.u={.apic={ .apic_id = 0x%x }}" % (apic_id)) + + def addpci_domainpath(self, pci_domain): + """ Add a pci_domain number to a chip """ + if ((pci_domain < 0) or (pci_domain > 0xffff)): + fatal("Invalid pci_domain: 0x%x is out of the range 0 to 0xffff" % pci_domain) + self.set_path(".type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0x%x }}" % (pci_domain)) + + def addapic_clusterpath(self, cluster): + """ Add an apic cluster to a chip """ + if ((cluster < 0) or (cluster > 15)): + fatal("Invalid apic cluster: %d is out of the range 0 to ff" % cluster) + self.set_path(".type=DEVICE_PATH_APIC_CLUSTER,.u={.apic_cluster={ .cluster = 0x%x }}" % (cluster)) + + def addcpupath(self, cpu_id): + """ Add a relative path to a cpu device hanging off our parent """ + if ((cpu_id < 0) or (cpu_id > 255)): + fatal("Invalid device") + self.set_path(".type=DEVICE_PATH_CPU,.u={.cpu={ .id = 0x%x }}" % (cpu_id)) + + + def addcpu_buspath(self, id): + """ Add a cpu_bus to a chip """ + if ((id < 0) or (id > 255)): + fatal("Invalid device") + self.set_path(".type=DEVICE_PATH_CPU_BUS,.u={.cpu_bus={ .id = 0x%x }}" % (id)) + + def usesoption(self, name): + """Declare option that can be used by this part""" + global global_options + o = getdict(global_options, name) + if (o == 0): + fatal("can't use undefined option %s" % name) + o1 = getdict(self.uses_options, name) + if (o1): + return + setdict(self.uses_options, name, o) + exportoption(o, self.image.exported_options) + +# ----------------------------------------------------------------------------- +# statements +# ----------------------------------------------------------------------------- + +def getdict(dict, name): + if name not in dict.keys(): + debug.info(debug.dict, "Undefined: %s" % name) + return 0 + v = dict.get(name, 0) + debug.info(debug.dict, "getdict %s returning %s" % (name, v)) + return v + +def setdict(dict, name, value): + debug.info(debug.dict, "setdict sets %s to %s" % (name, value)) + dict[name] = value + +# options. +# to create an option, it has to not exist. +# When an option value is fetched, the fact that it was used is +# remembered. +# Legal things to do: +# set a default value, then set a real value before the option is used. +# set a value, try to set a default, default silently fails. +# Illegal: +# use the value, then try to set the value + +def newoption(name): + global global_options, global_options_by_order + o = getdict(global_options, name) + if (o): + fatal("option %s already defined" % name) + o = option(name) + setdict(global_options, name, o) + global_options_by_order.append(name) + +def newoptionvalue(name, image): + g = getdict(global_option_values, name) + v = option_value(name, g) + if (image): + setdict(image.getvalues(), name, v) + else: + setdict(global_option_values, name, v) + return v + +def getoptionvalue(name, op, image): + global global_option_values + #print "getoptionvalue name %s op %s image %s\n" % (name, op,image) + if (op == 0): + # we want to debug config files, not the config tool, so no: + # print_stack() + fatal("Option %s undefined (missing use command?)" % name) + if (image): + v = getdict(image.getvalues(), name) + else: + v = getdict(global_option_values, name) + return v + +def getoption(name, image): + """option must be declared before being used in a part + if we're not processing a part, then we must + be at the top level where all options are available""" + + global global_uses_options, alloptions, curimage + + #print "getoption: name %s image %s alloptions %s curimage %s\n\n" % (name, image, alloptions, curimage) + curpart = partstack.tos() + if (alloptions): + o = getdict(global_options, name) + elif (curpart): + o = getdict(curpart.uses_options, name) + if (o == 0): + print "curpart.uses_options is %s\n" % curpart.uses_options + else: + o = getdict(global_uses_options, name) + v = getoptionvalue(name, o, image) + if (v == 0): + v = getoptionvalue(name, o, 0) + if (v == 0): + fatal("No value for option %s" % name) + val = v.contents() + if (not (type(val) is types.StringType)): + return v.contents() + if (val == '' or val[0] != '{'): + return v.contents() + s = curimage + curimage = image + val = parse('delexpr', val) + curimage = s + exitiferrors() + return val + +def setoption(name, value, imp): + """Set an option from within a configuration file. Normally this + is only permitted in the target (top level) configuration file. + If 'imp' is true, then set an option implicitly (e.g. 'arch' + and 'mainboard' statements). Implicit options can be set anywhere + the statements are legal, but also performs an implicit 'uses' + for the option""" + + global loc, global_options, global_option_values, curimage + + curpart = partstack.tos() + if (not imp and curpart): + fatal("Options may only be set in target configuration file") + if (imp): + usesoption(name) + if (curpart): + o = getdict(curpart.uses_options, name) + else: + o = getdict(global_uses_options, name) + if (not o): + fatal("Attempt to set nonexistent option %s (missing USES?)" % name) + v = getoptionvalue(name, o, curimage) + if (v == 0): + v = newoptionvalue(name, curimage) + v.setvalue(value) + +def exportoption(op, exported_options): + if (not op.isexportable()): + return + if (not op in exported_options): + exported_options.append(op) + +def setdefault(name, value, isdef): + """Set the default value of an option from within a configuration + file. This is permitted from any configuration file, but will + result in a warning if the default is set more than once. + If 'isdef' is set, we're defining the option in Options.lb so + there is no need for 'uses'.""" + + global loc, global_options, curimage + + if (isdef): + o = getdict(global_options, name) + if (not o): + return + image = 0 + else: + curpart = partstack.tos() + if (curpart): + o = getdict(curpart.uses_options, name) + else: + o = getdict(global_uses_options, name) + if (not o): + fatal("Attempt to set default for nonexistent option %s (missing USES?)" % name) + image = curimage + + v = getoptionvalue(name, o, image) + if (v == 0): + v = newoptionvalue(name, image) + v.setdefault(value) + +def setnodefault(name): + global loc, global_options + o = getdict(global_options, name) + if (not o): + return + v = getdict(global_option_values, name) + if (v != 0): + warning("removing default for %s" % name) + del global_option_values[name] + +def setcomment(name, value): + global loc, global_options + o = getdict(global_options, name) + if (not o): + fatal("setcomment: %s not here" % name) + o.setcomment(value, loc) + +def setexported(name): + global global_options + o = getdict(global_options, name) + if (not o): + fatal("setexported: %s not here" % name) + o.setexportable() + global_exported_options.append(o) + +def setnoexport(name): + global global_options + o = getdict(global_options, name) + if (not o): + fatal("setnoexport: %s not here" % name) + o.setnoexport() + if (o in global_exported_options): + global_exported_options.remove(o) + +def setexportable(name): + global global_options + o = getdict(global_options, name) + if (not o): + fatal("setexportable: %s not here" % name) + o.setexportable() + +def setformat(name, fmt): + global global_options + o = getdict(global_options, name) + if (not o): + fatal("setformat: %s not here" % name) + o.setformat(fmt) + +def getformated(name, image): + global global_options, global_option_values + o = getdict(global_options, name) + v = getoption(name, image) + f = o.getformat() + return (f % v) + +def setwrite(name, part): + global global_options + o = getdict(global_options, name) + if (not o): + fatal("setwrite: %s not here" % name) + o.setwrite(part) + +def hasvalue(name, image): + global global_options + o = getdict(global_options, name) + if (o == 0): + return 0 + v = 0 + if (image): + v = getdict(image.getvalues(), name) + if (v == 0): + v = getdict(global_option_values, name) + return (v != 0) + +def isset(name, part): + global global_uses_options, global_option_values, curimage + if (part): + o = getdict(part.uses_options, name) + else: + o = getdict(global_uses_options, name) + if (o == 0): + return 0 + v = 0 + if (curimage): + v = getdict(curimage.getvalues(), name) + if (v == 0): + v = getdict(global_option_values, name) + return (v != 0 and v.isset()) + +def usesoption(name): + global global_options, global_uses_options + curpart = partstack.tos() + if (curpart): + curpart.usesoption(name) + return + o = getdict(global_options, name) + if (o == 0): + fatal("Can't use undefined option %s" % name) + o1 = getdict(global_uses_options, name) + if (o1): + return + setdict(global_uses_options, name, o) + exportoption(o, global_exported_options) + +def validdef(name, defval): + global global_options + o = getdict(global_options, name) + if (not o): + fatal("validdef: %s not here" % name) + if ((defval & 1) != 1): + fatal("Must specify default value for option %s" % name) + if ((defval & 2) != 2): + fatal("Must specify export for option %s" % name) + if ((defval & 4) != 4): + fatal("Must specify comment for option %s" % name) + +def loadoptions(path, file, rule): + file = os.path.join('src', path, file) + optionsfile = os.path.join(treetop, file) + fp = safe_open(optionsfile, 'r') + loc.push(file) + if (not parse(rule, fp.read())): + fatal("Could not parse file") + loc.pop() + +def addinit(path): + global curimage, dirstack + if (path[0] == '/'): + curimage.setinitfile(treetop + '/src/' + path) + else: + curimage.setinitfile(dirstack.tos() + '/' + path) + print "Adding init file: %s" % path + +def addconfig(path): + global partstack + curpart = partstack.tos() + curpart.addconfig(path) + +def addregister(field, value): + global partstack + curpart = partstack.tos() + curpart.addregister(field, value) + +def addcrt0include(path): + """we do the crt0include as a dictionary, so that if needed we + can trace who added what when. Also it makes the keys + nice and unique.""" + global curimage + curimage.addinitinclude(0, path) + +def addinitinclude(str, path): + global curimage + curimage.addinitinclude(dequote(str), path) + +def addldscript(path): + global curimage, dirstack + curdir = dirstack.tos() + if (path[0] == '/'): + fullpath = treetop + '/src/' + path + else: + fullpath = curdir + '/' + path + debug.info(debug.statement, "fullpath :%s: curdir :%s: path :%s:" % (fullpath, curdir, path)) + curimage.addldscript(fullpath) + +def payload(path): + global curimage + curimage.setpayload(path) + adduserdefine("PAYLOAD:=%s"%path) + +def startromimage(name): + global romimages, curimage, target_dir, target_name + curpart = partstack.tos() + print "Configuring ROMIMAGE %s Curimage %s" % (name, curimage) + print "Curpart is %s\n" % curpart + o = getdict(romimages, name) + if (o): + fatal("romimage %s previously defined" % name) + curimage = romimage(name) + curimage.settargetdir(os.path.join(target_dir, name)) + #o = partobj(curimage, target_dir, 0, 'board', target_name) + #curimage.setroot(o) + setdict(romimages, name, curimage) + dodir('/config', 'Config.lb') + +def endromimage(): + global curimage + mainboard() + print "End ROMIMAGE" + curimage = 0 + #curpart = 0 + +def mainboardsetup(path): + global full_mainboard_path, mainboard_path + mainboard_path = os.path.join('mainboard', path) + loadoptions(mainboard_path, 'Options.lb', 'mainboardvariables') + full_mainboard_path = os.path.join(treetop, 'src', 'mainboard', path) + vendor = re.sub("/.*", "", path) + part_number = re.sub("[^/]*/", "", path) + setdefault('MAINBOARD', full_mainboard_path, 0) + setdefault('MAINBOARD_VENDOR', vendor, 0) + setdefault('MAINBOARD_PART_NUMBER', part_number, 0) + +def mainboard(): + global curimage, dirstack, partstack + file = 'Config.lb' + partdir = mainboard_path + srcdir = os.path.join(treetop, 'src') + fulldir = os.path.join(srcdir, partdir) + type_name = flatten_name(partdir) + newpart = partobj(curimage, fulldir, partstack.tos(), 'mainboard', \ + type_name, 0, 'chip') + #print "Configuring PART %s" % (type) + partstack.push(newpart) + #print " new PART tos is now %s\n" %partstack.tos().info() + dirstack.push(fulldir) + loadoptions(mainboard_path, 'Options.lb', 'mainboardvariables') + # special case for 'cpu' parts. + # we could add a new function too, but this is rather trivial. + # if the part is a cpu, and we haven't seen it before, + # arrange to source the directory /cpu/'type' + doconfigfile(srcdir, partdir, file, 'cfgfile') + curimage.setroot(partstack.tos()) + partpop() + +def addbuildrom(filename, size, roms): + global buildroms + print "Build ROM size %d" % size + b = buildrom(filename, size, roms) + buildroms.append(b) + +def addinitobject(object_name): + global curimage + curimage.addinitobjectrule(object_name) + +def addobject(object_name): + global curimage + curimage.addobjectrule(object_name) + +def adddriver(driver_name): + global curimage + curimage.adddriverrule(driver_name) + +def target(name): + global target_dir, target_name + print "Configuring TARGET %s" % name + target_name = name + target_dir = os.path.join(os.path.dirname(loc.file()), name) + if not os.path.isdir(target_dir): + print "Creating directory %s" % target_dir + os.makedirs(target_dir) + print "Will place Makefile, crt0.S, etc. in %s" % target_dir + + +def cpudir(path): + global cpu_type + if (cpu_type and (cpu_type != path)): + fatal("Two different CPU types: %s and %s" % (cpu_type, path)) + srcdir = "/cpu/%s" % path + dodir(srcdir, "Config.lb") + cpu_type = path + +def devicepart(type): + global curimage, dirstack, partstack + newpart = partobj(curimage, 0, partstack.tos(), type, \ + '', 0, 'device') + #print "Configuring PART %s" % (type) + partstack.push(newpart) + #print " new PART tos is now %s\n" %partstack.tos().info() + # just push TOS, so that we can pop later. + dirstack.push(dirstack.tos()) + +def part(type, path, file, name): + global curimage, dirstack, partstack + partdir = os.path.join(type, path) + srcdir = os.path.join(treetop, 'src') + fulldir = os.path.join(srcdir, partdir) + type_name = flatten_name(partdir) + newpart = partobj(curimage, fulldir, partstack.tos(), type, \ + type_name, name, 'chip') + #print "Configuring PART %s, path %s" % (type, path) + partstack.push(newpart) + #print " new PART tos is now %s\n" %partstack.tos().info() + dirstack.push(fulldir) + # special case for 'cpu' parts. + # we could add a new function too, but this is rather trivial. + # if the part is a cpu, and we haven't seen it before, + # arrange to source the directory /cpu/'type' + if (type == 'cpu'): + cpudir(path) + else: + doconfigfile(srcdir, partdir, file, 'cfgfile') + +def partpop(): + global dirstack, partstack + curpart = partstack.tos() + if (curpart == 0): + fatal("Trying to pop non-existent part") + #print "End PART %s" % curpart.part + # Warn if options are used without being set in this part + for op in curpart.uses_options.keys(): + if (not isset(op, curpart)): + notice("Option %s using default value %s" % (op, getformated(op, curpart.image))) + oldpart = partstack.pop() + dirstack.pop() + #print "partstack.pop, TOS is now %s\n" % oldpart.info() + +def dodir(path, file): + """dodir is like part but there is no new part""" + global dirstack + # if the first char is '/', it is relative to treetop, + # else relative to curdir + # os.path.join screws up if the name starts with '/', sigh. + print "Configuring DIR %s" % os.path.join(path, file) + if (path[0] == '/'): + fullpath = os.path.join(treetop, 'src') + path = re.sub('^/*', '', path) + else: + fullpath = dirstack.tos() + debug.info(debug.statement, "DODIR: path %s, fullpath %s" % (path, fullpath)) + dirstack.push(os.path.join(fullpath, path)) + doconfigfile(fullpath, path, file, 'cfgfile') + dirstack.pop() + +def lookup(name): + global curimage + return getoption(name, curimage) + +def addrule(id): + global curimage + curimage.addmakerule(id) + +def adduserdefine(str): + global curimage + curimage.adduserdefine(str) + +def addaction(id, str): + global curimage + curimage.addmakeaction(id, str) + +def adddep(id, str): + global curimage + curimage.addmakedepend(id, str) + +def setarch(my_arch): + """arch is 'different' ... darn it.""" + global curimage + print "SETTING ARCH %s\n" % my_arch + curimage.setarch(my_arch) + setdefault('ARCH', my_arch, 1) + part('arch', my_arch, 'Config.lb', 0) + +def doconfigfile(path, confdir, file, rule): + rname = os.path.join(confdir, file) + loc.push(rname) + fullpath = os.path.join(path, rname) + fp = safe_open(fullpath, 'r') + if (not parse(rule, fp.read())): + fatal("Could not parse file") + exitiferrors() + loc.pop() + +#============================================================================= +# MISC FUNCTIONS +#============================================================================= +def ternary(val, yes, no): + debug.info(debug.statement, "ternary %s" % expr) + debug.info(debug.statement, "expr %s a %d yes %d no %d"% (expr, a, yes, no)) + if (val == 0): + debug.info(debug.statement, "Ternary returns %d" % yes) + return yes + else: + debug.info(debug.statement, "Ternary returns %d" % no) + return no + +def tohex(name): + """atoi is in the python library, but not strtol? Weird!""" + return eval('int(%s)' % name) + +def IsInt(str): + """ Is the given string an integer?""" + try: + num = long(str) + return 1 + except ValueError: + return 0 + +def dequote(str): + a = re.sub("^"", "", str) + a = re.sub(""$", "", a) + # highly un-intuitive, need four ! + a = re.sub("\\"", """, a) + return a + +def flatten_name(str): + a = re.sub("[/-]", "_", str) + return a + +def topify(path): + """If the first part of <path> matches treetop, replace + that part with $(TOP)""" + if path[0:len(treetop)] == treetop: + path = path[len(treetop):len(path)] + if (path[0:1] == "/"): + path = path[1:len(path)] + path = "$(TOP)/" + path + return path + + +from string import * +import re +from yappsrt import * + +class ConfigScanner(Scanner): + patterns = [ + ('"}"', re.compile('}')), + ('"{"', re.compile('{')), + ('","', re.compile(',')), + ("'.'", re.compile('.')), + ("'='", re.compile('=')), + ('"!"', re.compile('!')), + ('"\\)"', re.compile('\)')), + ('"\\("', re.compile('\(')), + ('">="', re.compile('>=')), + ('"<<"', re.compile('<<')), + ('"/"', re.compile('/')), + ('"[*]"', re.compile('[*]')), + ('"-"', re.compile('-')), + ('"[+]"', re.compile('[+]')), + ('"||"', re.compile('||')), + ('"&&"', re.compile('&&')), + ('\s+', re.compile('\s+')), + ('#.*?\r?\n', re.compile('#.*?\r?\n')), + ('ACTION', re.compile('action')), + ('ADDACTION', re.compile('addaction')), + ('ALWAYS', re.compile('always')), + ('ARCH', re.compile('arch')), + ('BUILDROM', re.compile('buildrom')), + ('COMMENT', re.compile('comment')), + ('CONFIG', re.compile('config')), + ('CPU', re.compile('cpu')), + ('CPU_BUS', re.compile('cpu_bus')), + ('CHIP', re.compile('chip')), + ('DEFAULT', re.compile('default')), + ('DEFINE', re.compile('define')), + ('DEPENDS', re.compile('depends')), + ('DEVICE', re.compile('device')), + ('DIR', re.compile('dir')), + ('DRIVER', re.compile('driver')), + ('DRQ', re.compile('drq')), + ('ELSE', re.compile('else')), + ('END', re.compile('end')), + ('EOF', re.compile('$')), + ('EQ', re.compile('=')), + ('EXPORT', re.compile('export')), + ('FORMAT', re.compile('format')), + ('IF', re.compile('if')), + ('INIT', re.compile('init')), + ('INITOBJECT', re.compile('initobject')), + ('INITINCLUDE', re.compile('initinclude')), + ('IO', re.compile('io')), + ('IRQ', re.compile('irq')), + ('LDSCRIPT', re.compile('ldscript')), + ('LOADOPTIONS', re.compile('loadoptions')), + ('MAINBOARD', re.compile('mainboard')), + ('MAINBOARDINIT', re.compile('mainboardinit')), + ('MAKEDEFINE', re.compile('makedefine')), + ('MAKERULE', re.compile('makerule')), + ('MEM', re.compile('mem')), + ('NEVER', re.compile('never')), + ('NONE', re.compile('none')), + ('NORTHBRIDGE', re.compile('northbridge')), + ('OBJECT', re.compile('object')), + ('OPTION', re.compile('option')), + ('PAYLOAD', re.compile('payload')), + ('PMC', re.compile('pmc')), + ('PRINT', re.compile('print')), + ('REGISTER', re.compile('register')), + ('ROMIMAGE', re.compile('romimage')), + ('SOUTHBRIDGE', re.compile('southbridge')), + ('SUPERIO', re.compile('superio')), + ('TARGET', re.compile('target')), + ('USED', re.compile('used')), + ('USES', re.compile('uses')), + ('WRITE', re.compile('write')), + ('NUM', re.compile('[0-9]+')), + ('HEX_NUM', re.compile('[0-9a-fA-F]+')), + ('HEX_PREFIX', re.compile('0x')), + ('PATH', re.compile('[-a-zA-Z0-9_.][-a-zA-Z0-9/_.]+[-a-zA-Z0-9_.]+')), + ('DIRPATH', re.compile('[-a-zA-Z0-9_$()./]+')), + ('ID', re.compile('[a-zA-Z_.]+[a-zA-Z0-9_.]*')), + ('DELEXPR', re.compile('{([^}]+|\\.)*}')), + ('STR', re.compile('"([^\\"]+|\\.)*"')), + ('RAWTEXT', re.compile('.*')), + ('ON', re.compile('on')), + ('OFF', re.compile('off')), + ('PCI', re.compile('pci')), + ('PNP', re.compile('pnp')), + ('I2C', re.compile('i2c')), + ('APIC', re.compile('apic')), + ('APIC_CLUSTER', re.compile('apic_cluster')), + ('CPU', re.compile('cpu')), + ('CPU_BUS', re.compile('cpu_bus')), + ('PCI_DOMAIN', re.compile('pci_domain')), + ] + def __init__(self, str): + Scanner.__init__(self,None,['\s+', '#.*?\r?\n'],str) + +class Config(Parser): + def expr(self): + logical = self.logical() + l = logical + while self._peek('"&&"', '"||"', '"\\)"', 'STR', '"}"', '","', "'='", '"[*]"', '"/"', '"<<"', '">="', 'END', 'DEFAULT', 'OPTION', 'ELSE', '"[+]"', '"-"', 'IF', 'PRINT', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'IO', 'MEM', 'IRQ', 'DRQ', 'FORMAT', 'EXPORT', 'COMMENT', 'WRITE', 'ROMIMAGE', 'BUILDROM') in ['"&&"', '"||"']: + _token_ = self._peek('"&&"', '"||"') + if _token_ == '"&&"': + self._scan('"&&"') + logical = self.logical() + l = l and logical + else: # == '"||"' + self._scan('"||"') + logical = self.logical() + l = l or logical + return l + + def logical(self): + factor = self.factor() + n = factor + while self._peek('"[+]"', '"-"', '"&&"', '"||"', '"\\)"', 'STR', '"}"', '","', "'='", '"[*]"', '"/"', '"<<"', '">="', 'END', 'DEFAULT', 'OPTION', 'ELSE', 'IF', 'PRINT', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'IO', 'MEM', 'IRQ', 'DRQ', 'FORMAT', 'EXPORT', 'COMMENT', 'WRITE', 'ROMIMAGE', 'BUILDROM') in ['"[+]"', '"-"']: + _token_ = self._peek('"[+]"', '"-"') + if _token_ == '"[+]"': + self._scan('"[+]"') + factor = self.factor() + n = n+factor + else: # == '"-"' + self._scan('"-"') + factor = self.factor() + n = n-factor + return n + + def factor(self): + term = self.term() + v = term + while self._peek('"[*]"', '"/"', '"<<"', '">="', '"[+]"', '"-"', '"&&"', '"||"', '"\\)"', 'STR', '"}"', '","', "'='", 'END', 'DEFAULT', 'OPTION', 'ELSE', 'IF', 'PRINT', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'IO', 'MEM', 'IRQ', 'DRQ', 'FORMAT', 'EXPORT', 'COMMENT', 'WRITE', 'ROMIMAGE', 'BUILDROM') in ['"[*]"', '"/"', '"<<"', '">="']: + _token_ = self._peek('"[*]"', '"/"', '"<<"', '">="') + if _token_ == '"[*]"': + self._scan('"[*]"') + term = self.term() + v = v*term + elif _token_ == '"/"': + self._scan('"/"') + term = self.term() + v = v/term + elif _token_ == '"<<"': + self._scan('"<<"') + term = self.term() + v = v << term + else: # == '">="' + self._scan('">="') + term = self.term() + v = (v < term) + return v + + def term(self): + _token_ = self._peek('NUM', 'HEX_PREFIX', 'ID', '"\\("', '"!"') + if _token_ == 'NUM': + NUM = self._scan('NUM') + return long(NUM, 10) + elif _token_ == 'HEX_PREFIX': + HEX_PREFIX = self._scan('HEX_PREFIX') + HEX_NUM = self._scan('HEX_NUM') + return long(HEX_NUM, 16) + elif _token_ == 'ID': + ID = self._scan('ID') + return lookup(ID) + elif _token_ == '"!"': + unop = self.unop() + return unop + else: # == '"\\("' + self._scan('"\\("') + expr = self.expr() + self._scan('"\\)"') + return expr + + def unop(self): + self._scan('"!"') + expr = self.expr() + return not(expr) + + def partend(self, C): + while self._peek('END', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'OPTION', 'ELSE') not in ['END', 'EOF', 'ELSE']: + stmt = self.stmt(C) + END = self._scan('END') + if (C): partpop() + + def partid(self): + _token_ = self._peek('ID', 'PATH') + if _token_ == 'ID': + ID = self._scan('ID') + return ID + else: # == 'PATH' + PATH = self._scan('PATH') + return PATH + + def parttype(self): + CHIP = self._scan('CHIP') + return '' + + def partdef(self, C): + name = 0 + parttype = self.parttype() + partid = self.partid() + if self._peek('STR', 'END', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'OPTION', 'EOF', 'ELSE') == 'STR': + STR = self._scan('STR') + name = dequote(STR) + if (C): part(parttype, partid, 'Config.lb', name) + partend = self.partend(C) + + def arch(self, C): + ARCH = self._scan('ARCH') + ID = self._scan('ID') + if (C): setarch(ID) + partend = self.partend(C) + + def mainboardinit(self, C): + MAINBOARDINIT = self._scan('MAINBOARDINIT') + DIRPATH = self._scan('DIRPATH') + if (C): addcrt0include(DIRPATH) + + def initinclude(self, C): + INITINCLUDE = self._scan('INITINCLUDE') + STR = self._scan('STR') + DIRPATH = self._scan('DIRPATH') + if (C): addinitinclude(STR, DIRPATH) + + def initobject(self, C): + INITOBJECT = self._scan('INITOBJECT') + DIRPATH = self._scan('DIRPATH') + if (C): addinitobject(DIRPATH) + + def object(self, C): + OBJECT = self._scan('OBJECT') + DIRPATH = self._scan('DIRPATH') + if (C): addobject(DIRPATH) + + def driver(self, C): + DRIVER = self._scan('DRIVER') + DIRPATH = self._scan('DIRPATH') + if (C): adddriver(DIRPATH) + + def dir(self, C): + DIR = self._scan('DIR') + DIRPATH = self._scan('DIRPATH') + if (C): dodir(DIRPATH, 'Config.lb') + + def default(self, C): + DEFAULT = self._scan('DEFAULT') + ID = self._scan('ID') + EQ = self._scan('EQ') + value = self.value() + if (C): setdefault(ID, value, 0) + + def ldscript(self, C): + LDSCRIPT = self._scan('LDSCRIPT') + DIRPATH = self._scan('DIRPATH') + if (C): addldscript(DIRPATH) + + def iif(self, C): + IF = self._scan('IF') + ID = self._scan('ID') + c = lookup(ID) + while self._peek('ELSE', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'END', 'EOF', 'OPTION') not in ['ELSE', 'END', 'EOF']: + stmt = self.stmt(C and c) + if self._peek('ELSE', 'END', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'OPTION') == 'ELSE': + ELSE = self._scan('ELSE') + while self._peek('ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'END', 'ELSE', 'OPTION') not in ['EOF', 'END', 'ELSE']: + stmt = self.stmt(C and not c) + END = self._scan('END') + + def depsacts(self, ID, C): + while self._peek('DEPENDS', 'ACTION', 'END') != 'END': + _token_ = self._peek('DEPENDS', 'ACTION') + if _token_ == 'DEPENDS': + DEPENDS = self._scan('DEPENDS') + STR = self._scan('STR') + if (C): adddep(ID, STR) + else: # == 'ACTION' + ACTION = self._scan('ACTION') + STR = self._scan('STR') + if (C): addaction(ID, STR) + + def makerule(self, C): + MAKERULE = self._scan('MAKERULE') + DIRPATH = self._scan('DIRPATH') + if (C): addrule(DIRPATH) + depsacts = self.depsacts(DIRPATH, C) + END = self._scan('END') + + def makedefine(self, C): + MAKEDEFINE = self._scan('MAKEDEFINE') + RAWTEXT = self._scan('RAWTEXT') + if (C): adduserdefine(RAWTEXT) + + def addaction(self, C): + ADDACTION = self._scan('ADDACTION') + ID = self._scan('ID') + STR = self._scan('STR') + if (C): addaction(ID, STR) + + def init(self, C): + INIT = self._scan('INIT') + DIRPATH = self._scan('DIRPATH') + if (C): addinit(DIRPATH) + + def field(self): + STR = self._scan('STR') + return STR + + def register(self, C): + REGISTER = self._scan('REGISTER') + field = self.field() + self._scan("'='") + STR = self._scan('STR') + if (C): addregister(field, STR) + + def enable(self, C): + val = 1 + _token_ = self._peek('ON', 'OFF') + if _token_ == 'ON': + ON = self._scan('ON') + val = 1 + else: # == 'OFF' + OFF = self._scan('OFF') + val = 0 + if(C): partstack.tos().set_enabled(val) + + def resource(self, C): + type = "" + _token_ = self._peek('IO', 'MEM', 'IRQ', 'DRQ') + if _token_ == 'IO': + IO = self._scan('IO') + type = "IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO" + elif _token_ == 'MEM': + MEM = self._scan('MEM') + type = "IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_MEM" + elif _token_ == 'IRQ': + IRQ = self._scan('IRQ') + type = "IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ" + else: # == 'DRQ' + DRQ = self._scan('DRQ') + type = "IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_DRQ" + term = self.term() + self._scan("'='") + index = term + term = self.term() + value = term + if (C): partstack.tos().add_resource(type, index, value) + + def resources(self, C): + if (C): partstack.tos().start_resources() + while self._peek('IO', 'MEM', 'IRQ', 'DRQ', 'END', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'OPTION', 'EOF', 'ELSE') in ['IO', 'MEM', 'IRQ', 'DRQ']: + resource = self.resource(C) + if (C): partstack.tos().end_resources() + + def pci(self, C): + PCI = self._scan('PCI') + if (C): devicepart('pci') + HEX_NUM = self._scan('HEX_NUM') + slot = int(HEX_NUM,16) + self._scan("'.'") + HEX_NUM = self._scan('HEX_NUM') + function = int(HEX_NUM, 16) + if (C): partstack.tos().addpcipath(slot, function) + + def pci_domain(self, C): + PCI_DOMAIN = self._scan('PCI_DOMAIN') + if (C): devicepart('pci_domain') + HEX_NUM = self._scan('HEX_NUM') + pci_domain = int(HEX_NUM, 16) + if (C): partstack.tos().addpci_domainpath(pci_domain) + + def pnp(self, C): + PNP = self._scan('PNP') + if (C): devicepart('pnp') + HEX_NUM = self._scan('HEX_NUM') + port = int(HEX_NUM,16) + self._scan("'.'") + HEX_NUM = self._scan('HEX_NUM') + device = int(HEX_NUM, 16) + if (C): partstack.tos().addpnppath(port, device) + + def i2c(self, C): + self._scan('I2C') + if (C): devicepart('i2c') + HEX_NUM = self._scan('HEX_NUM') + device = int(HEX_NUM, 16) + if (C): partstack.tos().addi2cpath(device) + + def apic(self, C): + APIC = self._scan('APIC') + if (C): devicepart('apic') + HEX_NUM = self._scan('HEX_NUM') + apic_id = int(HEX_NUM, 16) + if (C): partstack.tos().addapicpath(apic_id) + + def apic_cluster(self, C): + APIC_CLUSTER = self._scan('APIC_CLUSTER') + if (C): devicepart('apic_cluster') + HEX_NUM = self._scan('HEX_NUM') + cluster = int(HEX_NUM, 16) + if (C): partstack.tos().addapic_clusterpath(cluster) + + def cpu(self, C): + CPU = self._scan('CPU') + if (C): devicepart('cpu') + HEX_NUM = self._scan('HEX_NUM') + id = int(HEX_NUM, 16) + if (C): partstack.tos().addcpupath(id) + + def cpu_bus(self, C): + CPU_BUS = self._scan('CPU_BUS') + if (C): devicepart('cpu_bus') + HEX_NUM = self._scan('HEX_NUM') + id = int(HEX_NUM, 16) + if (C): partstack.tos().addcpu_buspath(id) + + def dev_path(self, C): + _token_ = self._peek('PCI', 'PCI_DOMAIN', 'PNP', 'I2C', 'APIC', 'APIC_CLUSTER', 'CPU', 'CPU_BUS') + if _token_ == 'PCI': + pci = self.pci(C) + return pci + elif _token_ == 'PCI_DOMAIN': + pci_domain = self.pci_domain(C) + return pci_domain + elif _token_ == 'PNP': + pnp = self.pnp(C) + return pnp + elif _token_ == 'I2C': + i2c = self.i2c(C) + return i2c + elif _token_ == 'APIC': + apic = self.apic(C) + return apic + elif _token_ == 'APIC_CLUSTER': + apic_cluster = self.apic_cluster(C) + return apic_cluster + elif _token_ == 'CPU': + cpu = self.cpu(C) + return cpu + else: # == 'CPU_BUS' + cpu_bus = self.cpu_bus(C) + return cpu_bus + + def prtval(self): + _token_ = self._peek('STR', 'NUM', 'HEX_PREFIX', 'ID', '"\\("', '"!"') + if _token_ != 'STR': + expr = self.expr() + return str(expr) + else: # == 'STR' + STR = self._scan('STR') + return STR + + def prtlist(self): + prtval = self.prtval() + el = "%(" + prtval + while self._peek('","', 'ELSE', 'END', 'OPTION', 'IF', 'PRINT', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'ROMIMAGE', 'BUILDROM', 'PAYLOAD') == '","': + self._scan('","') + prtval = self.prtval() + el = el + "," + prtval + return el + ")" + + def prtstmt(self, C): + PRINT = self._scan('PRINT') + STR = self._scan('STR') + val = STR + if self._peek('","', 'ELSE', 'END', 'OPTION', 'IF', 'PRINT', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'ROMIMAGE', 'BUILDROM', 'PAYLOAD') == '","': + self._scan('","') + prtlist = self.prtlist() + val = val + prtlist + if (C): print eval(val) + + def config(self, C): + CONFIG = self._scan('CONFIG') + PATH = self._scan('PATH') + if (C): addconfig(PATH) + + def device(self, C): + DEVICE = self._scan('DEVICE') + dev_path = self.dev_path(C) + enable = self.enable(C) + resources = self.resources(C) + partend = self.partend(C) + + def stmt(self, C): + _token_ = self._peek('ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'OPTION') + if _token_ == 'ARCH': + arch = self.arch(C) + return arch + elif _token_ == 'ADDACTION': + addaction = self.addaction(C) + return addaction + elif _token_ == 'CONFIG': + config = self.config(C) + return config + elif _token_ == 'DEFAULT': + default = self.default(C) + return default + elif _token_ == 'DIR': + dir = self.dir(C) + return dir + elif _token_ == 'DRIVER': + driver = self.driver(C) + return driver + elif _token_ == 'IF': + iif = self.iif(C) + return iif + elif _token_ == 'INIT': + init = self.init(C) + return init + elif _token_ == 'INITINCLUDE': + initinclude = self.initinclude(C) + return initinclude + elif _token_ == 'INITOBJECT': + initobject = self.initobject(C) + return initobject + elif _token_ == 'LDSCRIPT': + ldscript = self.ldscript(C) + return ldscript + elif _token_ == 'MAINBOARDINIT': + mainboardinit = self.mainboardinit(C) + return mainboardinit + elif _token_ == 'MAKEDEFINE': + makedefine = self.makedefine(C) + return makedefine + elif _token_ == 'MAKERULE': + makerule = self.makerule(C) + return makerule + elif _token_ == 'OBJECT': + object = self.object(C) + return object + elif _token_ == 'OPTION': + option = self.option(C) + return option + elif _token_ == 'CHIP': + partdef = self.partdef(C) + return partdef + elif _token_ == 'PRINT': + prtstmt = self.prtstmt(C) + return prtstmt + elif _token_ == 'REGISTER': + register = self.register(C) + return register + else: # == 'DEVICE' + device = self.device(C) + return device + + def cfgfile(self): + while self._peek('ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'ID', 'USES', 'OPTION', 'END', 'ELSE', 'PAYLOAD', 'ROMIMAGE', 'BUILDROM') == 'USES': + uses = self.uses(1) + while self._peek('ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'OPTION', 'END', 'ELSE') not in ['EOF', 'END', 'ELSE']: + stmt = self.stmt(1) + EOF = self._scan('EOF') + return 1 + + def cfgfile(self): + while self._peek('ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'ID', 'USES', 'OPTION', 'END', 'ELSE', 'PAYLOAD', 'ROMIMAGE', 'BUILDROM') == 'USES': + uses = self.uses(1) + while self._peek('ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'OPTION', 'END', 'ELSE') not in ['EOF', 'END', 'ELSE']: + stmt = self.stmt(1) + EOF = self._scan('EOF') + return 1 + + def usesid(self, C): + ID = self._scan('ID') + if (C): usesoption(ID) + + def uses(self, C): + USES = self._scan('USES') + while 1: + usesid = self.usesid(C) + if self._peek('ID', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'USES', 'OPTION', 'END', 'ELSE', 'PAYLOAD', 'ROMIMAGE', 'BUILDROM') != 'ID': break + + def mainboardvariables(self): + while self._peek('ID', 'USES', 'DEFAULT', 'ARCH', 'ADDACTION', 'CONFIG', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'OPTION', 'END', 'ELSE', 'PAYLOAD', 'ROMIMAGE', 'BUILDROM') == 'USES': + uses = self.uses(1) + while self._peek('DEFAULT', 'END', 'OPTION', 'ARCH', 'ADDACTION', 'CONFIG', 'DIR', 'DRIVER', 'IF', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'PRINT', 'REGISTER', 'DEVICE', 'EOF', 'ELSE', 'PAYLOAD', 'ROMIMAGE', 'BUILDROM') == 'DEFAULT': + default = self.default(1) + while self._peek('END', 'OPTION', 'ELSE', 'IF', 'PRINT', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'ROMIMAGE', 'BUILDROM') == 'OPTION': + option = self.option(1) + END = self._scan('END') + return 1 + + def value(self): + _token_ = self._peek('STR', 'DELEXPR', 'NUM', 'HEX_PREFIX', 'ID', '"\\("', '"!"') + if _token_ == 'STR': + STR = self._scan('STR') + return dequote(STR) + elif _token_ != 'DELEXPR': + expr = self.expr() + return expr + else: # == 'DELEXPR' + DELEXPR = self._scan('DELEXPR') + return DELEXPR + + def option(self, C): + OPTION = self._scan('OPTION') + ID = self._scan('ID') + EQ = self._scan('EQ') + value = self.value() + if (C): setoption(ID, value, 0) + + def opif(self, C): + IF = self._scan('IF') + ID = self._scan('ID') + c = lookup(ID) + while self._peek('ELSE', 'OPTION', 'IF', 'PRINT', 'END', 'ROMIMAGE', 'BUILDROM', 'EOF', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE') in ['OPTION', 'IF', 'PRINT']: + opstmt = self.opstmt(C and c) + if self._peek('ELSE', 'END', 'OPTION', 'IF', 'PRINT', 'ROMIMAGE', 'BUILDROM', 'EOF', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE') == 'ELSE': + ELSE = self._scan('ELSE') + while self._peek('OPTION', 'IF', 'PRINT', 'ELSE', 'END', 'ROMIMAGE', 'BUILDROM', 'EOF', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE') in ['OPTION', 'IF', 'PRINT']: + opstmt = self.opstmt(C and not c) + END = self._scan('END') + + def opstmt(self, C): + _token_ = self._peek('OPTION', 'IF', 'PRINT') + if _token_ == 'OPTION': + option = self.option(C) + elif _token_ == 'IF': + opif = self.opif(C) + else: # == 'PRINT' + prtstmt = self.prtstmt(C) + + def payload(self, C): + PAYLOAD = self._scan('PAYLOAD') + DIRPATH = self._scan('DIRPATH') + if (C): payload(DIRPATH) + + def mainboard(self): + MAINBOARD = self._scan('MAINBOARD') + PATH = self._scan('PATH') + mainboardsetup(PATH) + + def romif(self, C): + IF = self._scan('IF') + ID = self._scan('ID') + c = lookup(ID) + while self._peek('ELSE', 'IF', 'OPTION', 'PAYLOAD', 'END', 'PRINT', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'ROMIMAGE', 'BUILDROM') in ['IF', 'OPTION', 'PAYLOAD']: + romstmt = self.romstmt(C and c) + if self._peek('ELSE', 'END', 'IF', 'OPTION', 'PAYLOAD', 'PRINT', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'ROMIMAGE', 'BUILDROM') == 'ELSE': + ELSE = self._scan('ELSE') + while self._peek('IF', 'OPTION', 'PAYLOAD', 'ELSE', 'END', 'PRINT', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'ROMIMAGE', 'BUILDROM') in ['IF', 'OPTION', 'PAYLOAD']: + romstmt = self.romstmt(C and not c) + END = self._scan('END') + + def romstmt(self, C): + _token_ = self._peek('IF', 'OPTION', 'PAYLOAD') + if _token_ == 'IF': + romif = self.romif(C) + elif _token_ == 'OPTION': + option = self.option(C) + else: # == 'PAYLOAD' + payload = self.payload(C) + + def romimage(self): + ROMIMAGE = self._scan('ROMIMAGE') + STR = self._scan('STR') + startromimage(dequote(STR)) + while self._peek('IF', 'OPTION', 'PAYLOAD', 'END', 'ELSE', 'PRINT', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE', 'EOF', 'ROMIMAGE', 'BUILDROM') in ['IF', 'OPTION', 'PAYLOAD']: + romstmt = self.romstmt(1) + END = self._scan('END') + endromimage() + + def roms(self): + STR = self._scan('STR') + s = '[' + STR + while self._peek('STR', 'ELSE', 'END', 'ROMIMAGE', 'BUILDROM', 'OPTION', 'IF', 'PRINT', 'EOF', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE') == 'STR': + STR = self._scan('STR') + s = s + "," + STR + return eval(s + ']') + + def buildrom(self): + BUILDROM = self._scan('BUILDROM') + DIRPATH = self._scan('DIRPATH') + expr = self.expr() + roms = self.roms() + addbuildrom(DIRPATH, expr, roms) + + def romstmts(self): + _token_ = self._peek('ROMIMAGE', 'BUILDROM', 'OPTION', 'IF', 'PRINT') + if _token_ == 'ROMIMAGE': + romimage = self.romimage() + elif _token_ == 'BUILDROM': + buildrom = self.buildrom() + else: # in ['OPTION', 'IF', 'PRINT'] + opstmt = self.opstmt(1) + + def board(self): + loadoptions("config", "Options.lb", "options") + TARGET = self._scan('TARGET') + DIRPATH = self._scan('DIRPATH') + target(DIRPATH) + mainboard = self.mainboard() + while self._peek('ROMIMAGE', 'BUILDROM', 'OPTION', 'IF', 'PRINT', 'EOF', 'ELSE', 'END', 'PAYLOAD', 'ARCH', 'ADDACTION', 'CONFIG', 'DEFAULT', 'DIR', 'DRIVER', 'INIT', 'INITINCLUDE', 'INITOBJECT', 'LDSCRIPT', 'MAINBOARDINIT', 'MAKEDEFINE', 'MAKERULE', 'OBJECT', 'CHIP', 'REGISTER', 'DEVICE') in ['ROMIMAGE', 'BUILDROM', 'OPTION', 'IF', 'PRINT']: + romstmts = self.romstmts() + EOF = self._scan('EOF') + return 1 + + def delexpr(self): + self._scan('"{"') + expr = self.expr() + self._scan('"}"') + EOF = self._scan('EOF') + return expr + + def wrstr(self, ID): + STR = self._scan('STR') + setwrite(ID, dequote(STR)) + + def defstmts(self, ID): + d = 0 + while 1: + _token_ = self._peek('DEFAULT', 'FORMAT', 'EXPORT', 'COMMENT', 'WRITE') + if _token_ == 'DEFAULT': + DEFAULT = self._scan('DEFAULT') + _token_ = self._peek('STR', 'DELEXPR', 'NONE', 'NUM', 'HEX_PREFIX', 'ID', '"\\("', '"!"') + if _token_ != 'NONE': + value = self.value() + setdefault(ID, value, 1) + else: # == 'NONE' + NONE = self._scan('NONE') + setnodefault(ID) + d = d | 1 + elif _token_ == 'FORMAT': + FORMAT = self._scan('FORMAT') + STR = self._scan('STR') + setformat(ID, dequote(STR)) + elif _token_ == 'EXPORT': + EXPORT = self._scan('EXPORT') + _token_ = self._peek('ALWAYS', 'USED', 'NEVER') + if _token_ == 'ALWAYS': + ALWAYS = self._scan('ALWAYS') + setexported(ID) + elif _token_ == 'USED': + USED = self._scan('USED') + setexportable(ID) + else: # == 'NEVER' + NEVER = self._scan('NEVER') + setnoexport(ID) + d = d | 2 + elif _token_ == 'COMMENT': + COMMENT = self._scan('COMMENT') + STR = self._scan('STR') + setcomment(ID, dequote(STR)); d = d | 4 + else: # == 'WRITE' + WRITE = self._scan('WRITE') + while 1: + wrstr = self.wrstr(ID) + if self._peek('STR', 'DEFAULT', 'FORMAT', 'EXPORT', 'COMMENT', 'WRITE', 'END') != 'STR': break + if self._peek('DEFAULT', 'FORMAT', 'EXPORT', 'COMMENT', 'WRITE', 'STR', 'END') not in ['DEFAULT', 'FORMAT', 'EXPORT', 'COMMENT', 'WRITE']: break + return d + + def define(self): + DEFINE = self._scan('DEFINE') + ID = self._scan('ID') + newoption(ID) + defstmts = self.defstmts(ID) + END = self._scan('END') + validdef(ID, defstmts) + + def options(self): + while self._peek('DEFINE', 'EOF') == 'DEFINE': + define = self.define() + EOF = self._scan('EOF') + return 1 + + +def parse(rule, text): + P = Config(ConfigScanner(text)) + return wrap_error_reporter(P, rule) + + + + +#============================================================================= +# FILE OUTPUT +#============================================================================= +def writemakefileheader(file, fname): + file.write("# File: %s is autogenerated\n" % fname) + +def writemakefilefooter(file, fname): + file.write("\n\n%s: %s %s\n" + % (os.path.basename(fname), os.path.abspath(sys.argv[0]), top_config_file)) + file.write("\t(cd %s ; export PYTHONPATH=%s/util/newconfig ; python %s %s %s)\n\n" + % (os.getcwd(), treetop, sys.argv[0], sys.argv[1], sys.argv[2])) + +def writemakefilesettings(path): + """ Write Makefile.settings to seperate the settings + from the actual makefile creation.""" + + global treetop, target_dir + + filename = os.path.join(path, "Makefile.settings") + print "Creating", filename + file = safe_open(filename, 'w+') + writemakefileheader(file, filename) + file.write("TOP:=%s\n" % (treetop)) + file.write("TARGET_DIR:=%s\n" % target_dir) + writemakefilefooter(file, filename) + file.close() + +def writeimagesettings(image): + """Write Makefile.settings to seperate the settings + from the actual makefile creation.""" + + global treetop + global global_options_by_order + + filename = os.path.join(image.gettargetdir(), "Makefile.settings") + print "Creating", filename + file = safe_open(filename, 'w+') + writemakefileheader(file, filename) + file.write("TOP:=%s\n" % (treetop)) + file.write("TARGET_DIR:=%s\n" % (image.gettargetdir())) + file.write("\n") + exported = [] + for o in global_exported_options: + exported.append(o) + for o in image.exported_options: + if (not o in exported): + exported.append(o) + for o in exported: + file.write("export %s:=" % o.name) + if (hasvalue(o.name, image)): + file.write("%s" % getformated(o.name, image)) + file.write("\n") + file.write("\n") + file.write("export VARIABLES :=\n") + for o in exported: + file.write("export VARIABLES += %s\n" % o.name) + file.write("\n") + writemakefilefooter(file,filename) + file.close() + +# write the romimage makefile +# let's try the Makefile +# first, dump all the -D stuff + +def writeimagemakefile(image): + makefilepath = os.path.join(image.gettargetdir(), "Makefile") + print "Creating", makefilepath + file = safe_open(makefilepath, 'w+') + writemakefileheader(file, makefilepath) + + # main rule + file.write("\nall: coreboot.rom\n\n") + file.write(".PHONY: all\n\n") + #file.write("include cpuflags\n") + # Putting "include cpuflags" in the Makefile has the problem that the + # cpuflags file would be generated _after_ we want to include it. + # Instead, let make do the work of computing CPUFLAGS: + file.write("# Get the value of TOP, VARIABLES, and several other variables.\n") + file.write("include Makefile.settings\n\n") + file.write("# Function to create an item like -Di586 or -DCONFIG_MAX_CPUS='1' or -Ui686\n") + file.write("D_item = $(if $(subst undefined,,$(origin $1)),-D$1$(if $($1),='$($1)',),-U$1)\n\n") + file.write("# Compute the value of CPUFLAGS here during make's first pass.\n") + file.write("CPUFLAGS := $(foreach _var_,$(VARIABLES),$(call D_item,$(_var_)))\n\n") + + for i in image.getuserdefines(): + file.write("%s\n" %i) + file.write("\n") + + # print out all the object dependencies + file.write("\n# object dependencies (objectrules:)\n") + file.write("INIT-OBJECTS :=\n") + file.write("OBJECTS :=\n") + file.write("DRIVER :=\n") + file.write("\nSOURCES :=\n") + for irule, init in image.getinitobjectrules().items(): + i_name = init[0] + i_source = init[1] + file.write("INIT-OBJECTS += %s\n" % (i_name)) + file.write("SOURCES += %s\n" % (i_source)) + + for objrule, obj in image.getobjectrules().items(): + obj_name = obj[0] + obj_source = obj[1] + file.write("OBJECTS += %s\n" % (obj_name)) + file.write("SOURCES += %s\n" % (obj_source)) + + # for chip_target.c + file.write("OBJECTS += static.o\n") + file.write("SOURCES += static.c\n") + + for driverrule, driver in image.getdriverrules().items(): + obj_name = driver[0] + obj_source = driver[1] + file.write("DRIVER += %s\n" % (obj_name)) + file.write("SOURCES += %s\n" % (obj_source)) + + # Print out all ldscript.ld dependencies. + file.write("\n# ldscript.ld dependencies:\n") + file.write("LDSUBSCRIPTS-1 := \n" ) + for script in image.getldscripts(): + file.write("LDSUBSCRIPTS-1 += %s\n" % topify(script)) + + # Print out the dependencies for crt0_includes.h + file.write("\n# Dependencies for crt0_includes.h\n") + file.write("CRT0_INCLUDES:=\n") + for inc in image.getinitincludes(): + if (local_path.match(inc)): + file.write("CRT0_INCLUDES += %s\n" % inc) + else: + file.write("CRT0_INCLUDES += $(TOP)/src/%s\n" % inc) + + # Print out the user defines. + file.write("\n# userdefines:\n") + + # Print out the base rules. + # Need to have a rule that counts on 'all'. + file.write("\n# mainrulelist:") + + # Print out any user rules. + file.write("\n# From makerule or docipl commands:\n") + + file.write("\n# initobjectrules:\n") + for irule, init in image.getinitobjectrules().items(): + source = topify(init[1]) + type = init[2] + if (type == 'S'): + # for .S, .o depends on .s + file.write("%s: %s.s\n" % (init[0], init[3])) + file.write("\t$(CC) -c $(CPU_OPT) -o $@ $<\n") + # and .s depends on .S + file.write("%s.s: %s\n" % (init[3], source)) + # Note: next 2 lines are ONE output line! + file.write("\t$(CPP) $(CPPFLAGS) $< ") + file.write(">$@.new && mv $@.new $@\n") + else: + file.write("%s: %s\n" % (init[0], source)) + file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n") + + file.write("\n# objectrules:\n") + for objrule, obj in image.getobjectrules().items(): + source = topify(obj[1]) + type = obj[2] + if (type == 'S'): + # for .S, .o depends on .s + file.write("%s: %s.s\n" % (obj[0], obj[3])) + file.write("\t$(CC) -c $(CPU_OPT) -o $@ $<\n") + # and .s depends on .S + file.write("%s.s: %s\n" % (obj[3], source)) + # Note: next 2 lines are ONE output line! + file.write("\t$(CPP) $(CPPFLAGS) $< ") + file.write(">$@.new && mv $@.new $@\n") + else: + file.write("%s: %s\n" % (obj[0], source)) + file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n") + #file.write("%s\n" % objrule[2]) + + for driverrule, driver in image.getdriverrules().items(): + source = topify(driver[1]) + file.write("%s: %s\n" % (driver[0], source)) + file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n") + #file.write("%s\n" % objrule[2]) + + # special rule for chip_target.c + file.write("static.o: static.c\n") + file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n") + + # Print out the rules that will make cause the files + # generated by NLBConfig.py to be remade if any dependencies change. + + file.write("\n# Remember the automatically generated files\n") + file.write("GENERATED:=\n") + for genfile in ['Makefile', + 'nsuperio.c', + 'static.c', + 'corebootDoc.config' ]: + file.write("GENERATED += %s\n" % genfile) + file.write("GENERATED += %s\n" % image.getincludefilename()) + + keys = global_options_by_order + keys.sort() + file.write("\necho:\n") + for key in keys: + file.write("\t@echo %s='$(%s)'\n"% (key,key)) + + for i, m in image.getmakerules().items(): + file.write("%s: " %i) + for i in m.dependency: + file.write("%s " % i) + file.write("\n") + for i in m.actions: + file.write("\t%s\n" % i) + writemakefilefooter(file, makefilepath) + file.close() + +# +def writemakefile(path): + makefilepath = os.path.join(path, "Makefile") + print "Creating", makefilepath + file = safe_open(makefilepath, 'w+') + writemakefileheader(file, makefilepath) + + # main rule + file.write("\nall:") + for i in buildroms: + file.write(" %s" % i.name) + file.write("\n\n") + file.write("include Makefile.settings\n\n") + for i, o in romimages.items(): + file.write("%s/coreboot.rom:\n" % o.getname()) + file.write("\tif (cd %s; \\n" % o.getname()) + file.write("\t\t$(MAKE) coreboot.rom)\\n") + file.write("\tthen true; else exit 1; fi;\n\n") + file.write("clean: ") + for i in romimages.keys(): + file.write(" %s-clean" % i) + file.write(" base-clean") + file.write("\n\n") + for i, o in romimages.items(): + file.write("%s-clean:\n" % o.getname()) + file.write("\t(cd %s; $(MAKE) clean)\n\n" % o.getname()) + file.write("base-clean:\n") + file.write("\trm -f romcc*\n\n") + + for i in buildroms: + file.write("%s:" % i.name) + for j in i.roms: + file.write(" %s/coreboot.rom " % j) + file.write("\n") + file.write("\t cat ") + for j in i.roms: + file.write(" %s/coreboot.rom " % j) + file.write("> %s\n\n" %i.name) + + + file.write(".PHONY: all clean") + for i in romimages.keys(): + file.write(" %s-clean" % i) + for i, o in romimages.items(): + file.write(" %s/coreboot.rom" % o.getname()) + file.write("\n\n") + + writemakefilefooter(file, makefilepath) + file.close() + +def writeinitincludes(image): + global include_pattern + filepath = os.path.join(image.gettargetdir(), image.getincludefilename()) + print "Creating", filepath + outfile = safe_open(filepath, 'w+') + if (image.newformat()): + infile = safe_open(image.getinitfile(), 'r') + + line = infile.readline() + while (line): + p = include_pattern.match(line) + if (p): + for i in image.getinitincludes(): + inc = image.getinitinclude(i) + if (inc.getstring() == p.group(1)): + outfile.write("#include "%s"\n" % inc.getpath()) + else: + outfile.write(line) + line = infile.readline() + + infile.close() + else: + for i in image.getinitincludes(): + outfile.write("#include <%s>\n" % i) + outfile.close() + +def writeldoptions(image): + """Write ldoptions file.""" + filename = os.path.join(image.gettargetdir(), "ldoptions") + print "Creating", filename + file = safe_open(filename, 'w+') + for o in global_exported_options: + if (hasvalue(o.name, image) and IsInt(getoption(o.name, image))): + file.write("%s = %s;\n" % (o.name, getformated(o.name, image))) + for o in image.exported_options: + if (not o in global_exported_options and hasvalue(o.name, image) and IsInt(getoption(o.name, image))): + file.write("%s = %s;\n" % (o.name, getformated(o.name, image))) + file.close() + +def dumptree(part, lvl): + debug.info(debug.dumptree, "DUMPTREE ME is") + part.dumpme(lvl) + # dump the siblings -- actually are there any? not sure + # siblings are: + debug.info(debug.dumptree, "DUMPTREE SIBLINGS are") + kid = part.next_sibling + while (kid): + kid.dumpme(lvl) + kid = kid.next_sibling + # dump the kids + debug.info(debug.dumptree, "DUMPTREE KIDS are") + #for kid in part.children: + if (part.children): + dumptree(part.children, lvl+1) + kid = part.next_sibling + while (kid): + if (kid.children): + dumptree(kid.children, lvl + 1) + kid = kid.next_sibling + debug.info(debug.dumptree, "DONE DUMPTREE") + +def writecode(image): + filename = os.path.join(img_dir, "static.c") + print "Creating", filename + file = safe_open(filename, 'w+') + file.write("#include <device/device.h>\n") + file.write("#include <device/pci.h>\n") + for path in image.getconfigincludes().values(): + file.write("#include "%s"\n" % path) + gencode(image.getroot(), file, 0) + gencode(image.getroot(), file, 1) + file.close() + +def gencode(part, file, pass_num): + debug.info(debug.gencode, "GENCODE ME is") + part.gencode(file, pass_num) + # dump the siblings -- actually are there any? not sure + debug.info(debug.gencode, "GENCODE SIBLINGS are") + kid = part.next_sibling + while (kid): + kid.gencode(file, pass_num) + kid = kid.next_sibling + # now dump the children + debug.info(debug.gencode, "GENCODE KIDS are") + if (part.children): + gencode(part.children, file, pass_num) + kid = part.next_sibling + while (kid): + if (kid.children): + gencode(kid.children, file, pass_num) + kid = kid.next_sibling + debug.info(debug.gencode, "DONE GENCODE") + +def verifyparse(): + """Add any run-time checks to verify that parsing the configuration + was successful""" + + for image in romimages.values(): + print("Verifying ROMIMAGE %s" % image.name) + if (image.newformat() and image.getinitfile() == ''): + fatal("An init file must be specified") + for op in image.exported_options: + if (getoptionvalue(op.name, op, image) == 0 and getoptionvalue(op.name, op, 0) == 0): + warning("Exported option %s has no value (check Options.lb)" % op.name); + print("Verifing global options") + for op in global_exported_options: + if (getoptionvalue(op.name, op, 0) == 0): + notice("Exported option %s has no value (check Options.lb)" % op.name); + +#============================================================================= +# MAIN PROGRAM +#============================================================================= +if __name__=='__main__': + from sys import argv + if (len(argv) < 3): + fatal("Args: <file> <path to coreboot>") + + top_config_file = os.path.abspath(sys.argv[1]) + + treetop = os.path.abspath(sys.argv[2]) + + # Now read in the customizing script... + loc.push(argv[1]) + fp = safe_open(argv[1], 'r') + if (not parse('board', fp.read())): + fatal("Could not parse file") + loc.pop() + + verifyparse() + + # no longer need to check if an options has been used + alloptions = 1 + + for image_name, image in romimages.items(): + if (debug.level(debug.dumptree)): + debug.info(debug.dumptree, "DEVICE TREE:") + dumptree(image.getroot(), 0) + + img_dir = image.gettargetdir() + if not os.path.isdir(img_dir): + print "Creating directory %s" % img_dir + os.makedirs(img_dir) + + if (debug.level(debug.dump)): + for i in image.getinitincludes(): + debug.info(debug.dump, "crt0include file %s" % i) + for i in image.getdriverrules().keys(): + debug.info(debug.dump, "driver file %s" % i) + for i in image.getldscripts(): + debug.info(debug.dump, "ldscript file %s" % i) + for i, m in image.getmakerules().items(): + debug.info(debug.dump, " makerule %s dep %s act %s" % (i, m.dependency, m.actions)) + + writecode(image) + writeimagesettings(image) + writeinitincludes(image) + writeimagemakefile(image) + writeldoptions(image) + + writemakefilesettings(target_dir) + writemakefile(target_dir) + + sys.exit(0) Index: targets/dfi/nf570/nf570/Makefile.settings =================================================================== --- targets/dfi/nf570/nf570/Makefile.settings (revision 0) +++ targets/dfi/nf570/nf570/Makefile.settings (revision 0) @@ -0,0 +1,10 @@ +# File: dfi/nf570/nf570/Makefile.settings is autogenerated +TOP:=/home/chris/coreboot-v2 +TARGET_DIR:=dfi/nf570/nf570 + + +Makefile.settings: /home/chris/coreboot-v2/targets/dfi/nf570/nf570/config.py /home/chris/coreboot-v2/targets/dfi/nf570/Config.lb + (cd /home/chris/coreboot-v2/targets ; export PYTHONPATH=/home/chris/coreboot-v2/util/newconfig ; python dfi/nf570/nf570/config.py dfi/nf570/Config.lb /home/chris/coreboot-v2) + +DISTRO_CFLAGS+=-fno-stack-protector +DISTRO_LFLAGS+= -Wl,--build-id=none Index: targets/dfi/nf570/nf570/Makefile =================================================================== --- targets/dfi/nf570/nf570/Makefile (revision 0) +++ targets/dfi/nf570/nf570/Makefile (revision 0) @@ -0,0 +1,45 @@ +# File: dfi/nf570/nf570/Makefile is autogenerated + +all: ./coreboot.rom + +include Makefile.settings + +fallback/coreboot.rom: + if (cd fallback; \ + $(MAKE) coreboot.rom)\ + then true; else exit 1; fi; + +failover/coreboot.rom: + if (cd failover; \ + $(MAKE) coreboot.rom)\ + then true; else exit 1; fi; + +normal/coreboot.rom: + if (cd normal; \ + $(MAKE) coreboot.rom)\ + then true; else exit 1; fi; + +clean: fallback-clean failover-clean normal-clean base-clean + +fallback-clean: + (cd fallback; $(MAKE) clean) + +failover-clean: + (cd failover; $(MAKE) clean) + +normal-clean: + (cd normal; $(MAKE) clean) + +base-clean: + rm -f romcc* + +./coreboot.rom: normal/coreboot.rom fallback/coreboot.rom failover/coreboot.rom + cat normal/coreboot.rom fallback/coreboot.rom failover/coreboot.rom > ./coreboot.rom + +.PHONY: all clean fallback-clean failover-clean normal-clean fallback/coreboot.rom failover/coreboot.rom normal/coreboot.rom + + + +Makefile: /home/chris/coreboot-v2/targets/dfi/nf570/nf570/config.py /home/chris/coreboot-v2/targets/dfi/nf570/Config.lb + (cd /home/chris/coreboot-v2/targets ; export PYTHONPATH=/home/chris/coreboot-v2/util/newconfig ; python dfi/nf570/nf570/config.py dfi/nf570/Config.lb /home/chris/coreboot-v2) + Index: targets/dfi/nf570/Config.lb.kernel =================================================================== --- targets/dfi/nf570/Config.lb.kernel (revision 0) +++ targets/dfi/nf570/Config.lb.kernel (revision 0) @@ -0,0 +1,77 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@gmail.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +# Sample config file for + +target nf570 +mainboard dfi/nf570 + +option ROM_SIZE=0x200000 +option FALLBACK_SIZE=(ROM_SIZE-0x1000) + +romimage "fallback" + option USE_FAILOVER_IMAGE=0 + option USE_FALLBACK_IMAGE=1 + option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 + option CONFIG_PRECOMPRESSED_PAYLOAD=1 +# option ROM_IMAGE_SIZE=0x19800 + option ROM_IMAGE_SIZE=0x17000 +# option ROM_IMAGE_SIZE=0x15800 +# option ROM_IMAGE_SIZE=0x13800 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" +# payload ../../../payloads/tg3--ide_disk.zelf +# payload ../../../payloads/filo.elf +# payload ../../../payloads/filo_mem.elf +# payload ../../../payloads/filo.zelf +# payload ../../../payloads/tg3--filo_hda2.zelf +# payload ../../../payloads/tg3.zelf +# payload ../../../../payloads/tg3_vga.zelf +# payload ../../../../payloads/memtest +# payload ../../../../payloads/adlo.elf +# payload ../../../../payloads/e1000_vga.zelf +# payload ../../../../payloads/filo_hda.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga_5.4.1.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga_5.4.2.zelf + payload /home/yhlu/olpc-payload.elf.lzma +# payload ../../../../payloads/filo_hda.zelf +# payload ../../../../payloads/filo_hda2_novga.zelf +# payload ../../../payloads/tg3_com2.zelf +# payload ../../../payloads/e1000--filo.zelf +# payload ../../../payloads/tg3--e1000--filo.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf +end + +romimage "failover" + option USE_FAILOVER_IMAGE=1 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=FAILOVER_SIZE + option XIP_ROM_SIZE=FAILOVER_SIZE + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" +end + + +buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Index: targets/dfi/nf570/Config.lb =================================================================== --- targets/dfi/nf570/Config.lb (revision 0) +++ targets/dfi/nf570/Config.lb (revision 0) @@ -0,0 +1,106 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@gmail.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +target nf570 +mainboard dfi/nf570 + +# serengeti_leopard +romimage "normal" +# 48K for SCSI FW +# option ROM_SIZE = 475136 +# 48K for SCSI FW and 48K for ATI ROM +# option ROM_SIZE = 425984 +# 64K for Etherboot +# option ROM_SIZE = 458752 +# 44k for atixx.rom +# option ROM_SIZE = 479232 + option USE_FAILOVER_IMAGE=0 + option USE_FALLBACK_IMAGE=0 +# option ROM_IMAGE_SIZE=0x13800 +# option ROM_IMAGE_SIZE=0x18800 + option ROM_IMAGE_SIZE=0x20000 +# option ROM_IMAGE_SIZE=0x15800 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" +# payload ../../../payloads/tg3--ide_disk.zelf +# payload ../../../payloads/filo.elf +# payload ../../../payloads/filo_mem.elf +# payload ../../../payloads/filo.zelf +# payload ../../../payloads/tg3--filo_hda2.zelf +# payload ../../../payloads/tg3.zelf +# payload ../../../../payloads/tg3_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf +# payload ../../../payloads/tg3_com2.zelf +# payload ../../../payloads/e1000--filo.zelf +# payload ../../../payloads/tg3--e1000--filo.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf + payload /boot/filo.elf +end + +romimage "fallback" + option USE_FAILOVER_IMAGE=0 + option USE_FALLBACK_IMAGE=1 +# option ROM_IMAGE_SIZE=0x13800 +# option ROM_IMAGE_SIZE=0x19800 + option ROM_IMAGE_SIZE=0x20000 +# option ROM_IMAGE_SIZE=0x15800 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" +# payload ../../../payloads/tg3--ide_disk.zelf +# payload ../../../payloads/filo.elf +# payload ../../../payloads/filo_mem.elf +# payload ../../../payloads/filo.zelf +# payload ../../../payloads/tg3--filo_hda2.zelf +# payload ../../../payloads/tg3.zelf +# payload ../../../../payloads/tg3_vga.zelf +# payload ../../../../payloads/memtest +# payload ../../../../payloads/e1000_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga.zelf +# payload ../../../../payloads/filo_hda.zelf +# payload ../../../../payloads/adlo.elf +# payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf +# payload ../../../../payloads/forcedeth_mcp55_filo_hda2.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf +# payload ../../../payloads/tg3_com2.zelf +# payload ../../../payloads/e1000--filo.zelf +# payload ../../../payloads/tg3--e1000--filo.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf + payload /boot/filo.elf +end + +romimage "failover" + option USE_FAILOVER_IMAGE=1 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=FAILOVER_SIZE + option XIP_ROM_SIZE=FAILOVER_SIZE + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" +end + +#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" Index: targets/dfi/nf570/VERSION =================================================================== --- targets/dfi/nf570/VERSION (revision 0) +++ targets/dfi/nf570/VERSION (revision 0) @@ -0,0 +1 @@ +nf570 Index: targets/dfi/nf570/Config-lab.lb =================================================================== --- targets/dfi/nf570/Config-lab.lb (revision 0) +++ targets/dfi/nf570/Config-lab.lb (revision 0) @@ -0,0 +1,49 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@gmail.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +# Sample config file for + +target nf570 +mainboard dfi/nf570 + +option ROM_SIZE=0x100000 +option FALLBACK_SIZE=(ROM_SIZE-0x1000) + +romimage "fallback" + option USE_FAILOVER_IMAGE=0 + option USE_FALLBACK_IMAGE=1 + option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 + option CONFIG_PRECOMPRESSED_PAYLOAD=1 + option ROM_IMAGE_SIZE=0x17000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + payload ../payload.elf.lzma +end + +romimage "failover" + option USE_FAILOVER_IMAGE=1 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=FAILOVER_SIZE + option XIP_ROM_SIZE=FAILOVER_SIZE + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" +end + +buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" Index: targets/dfi/nf570/README =================================================================== --- targets/dfi/nf570/README (revision 0) +++ targets/dfi/nf570/README (revision 0) @@ -0,0 +1,9 @@ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/
Chris Lingard wrote:
Attached is a patch that implements coreboot on the above motherboard,
Sorry, the above patch is contaminated with some binary build stuff. Here is a corrected patch
Signed-off-by: Chris Lingard chris@stockwith.co.uk
Build and tested on a DFI NF570-M2/G
Re-applied and double checked
diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/apc_auto.c coreboot-v2/src/mainboard/dfi/nf570/apc_auto.c --- coreboot-v2.old/src/mainboard/dfi/nf570/apc_auto.c 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/apc_auto.c 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,139 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#define ASSEMBLY 1 +#define __ROMCC__ + +#define RAMINIT_SYSINFO 1 +#define CACHE_AS_RAM_ADDRESS_DEBUG 0 + +#define SET_NB_CFG_54 1 + +//used by raminit +#define QRANK_DIMM_SUPPORT 1 + +#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 + +#include <stdint.h> +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <arch/io.h> +#include <device/pnp_def.h> +#include <arch/romcc_io.h> +#include <cpu/x86/lapic.h> +#include "option_table.h" +#include "pc80/mc146818rtc_early.c" +#include "pc80/serial.c" + +#if CONFIG_USE_INIT == 0 + #include "lib/memcpy.c" +#endif + +#include "arch/i386/lib/console.c" + +#if 0 +static void post_code(uint8_t value) { +#if 1 + int i; + for(i=0;i<0x80000;i++) { + outb(value, 0x80); + } +#endif +} +#endif + +#include <cpu/amd/model_fxx_rev.h> +#include "northbridge/amd/amdk8/raminit.h" +#include "cpu/amd/model_fxx/apic_timer.c" + +#include "lib/delay.c" + +//#include "cpu/x86/lapic/boot_cpu.c" +#include "northbridge/amd/amdk8/reset_test.c" + +#include "northbridge/amd/amdk8/debug.c" + +#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" + +#include "northbridge/amd/amdk8/amdk8_f.h" + +#include "cpu/x86/mtrr.h" +#include "cpu/amd/mtrr.h" +#include "cpu/x86/tsc.h" + +#include "northbridge/amd/amdk8/amdk8_f_pci.c" +#include "northbridge/amd/amdk8/raminit_f_dqs.c" + +#include "cpu/amd/dualcore/dualcore.c" + +void hardwaremain(int ret_addr) +{ + struct sys_info *sysinfo = (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE + struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM + + struct node_core_id id; + + id = get_node_core_id_x(); + + //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + + train_ram(id.nodeid, sysinfo, sysinfox); + + /* + go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp + */ + + __asm__ volatile ( + "movl %0, %%edi\n\t" + "jmp *%%edi\n\t" + :: "a"(ret_addr) + ); + + + +} +struct eregs { + uint32_t eax, ecx, edx, ebx, esp, ebp, esi, edi; + uint32_t vector; + uint32_t error_code; + uint32_t eip; + uint32_t cs; + uint32_t eflags; +}; + +void x86_exception(struct eregs *info) +{ + do { + hlt(); + } while(1); +} + + diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/cache_as_ram_auto.c coreboot-v2/src/mainboard/dfi/nf570/cache_as_ram_auto.c --- coreboot-v2.old/src/mainboard/dfi/nf570/cache_as_ram_auto.c 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/cache_as_ram_auto.c 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,382 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#define ASSEMBLY 1 +#define __ROMCC__ + +#define RAMINIT_SYSINFO 1 + +#define K8_ALLOCATE_IO_RANGE 1 +//#define K8_SCAN_PCI_BUS 1 + + +#define QRANK_DIMM_SUPPORT 1 + +#if CONFIG_LOGICAL_CPUS==1 +#define SET_NB_CFG_54 1 +#endif + +//used by init_cpus and fidvid +#define K8_SET_FIDVID 1 +//if we want to wait for core1 done before DQS training, set it to 0 +#define K8_SET_FIDVID_CORE0_ONLY 1 + +#if K8_REV_F_SUPPORT == 1 +#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 +#endif + +#define DBGP_DEFAULT 7 + +#include <stdint.h> +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <arch/io.h> +#include <device/pnp_def.h> +#include <arch/romcc_io.h> +#include <cpu/x86/lapic.h> +#include "option_table.h" +#include "pc80/mc146818rtc_early.c" + +#if USE_FAILOVER_IMAGE==0 +#include "pc80/serial.c" +#include "arch/i386/lib/console.c" +#if CONFIG_USBDEBUG_DIRECT +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" +#include "pc80/usbdebug_direct_serial.c" +#endif +#include "ram/ramtest.c" + +#include <cpu/amd/model_fxx_rev.h> + +#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" +#include "northbridge/amd/amdk8/raminit.h" +#include "cpu/amd/model_fxx/apic_timer.c" +#include "lib/delay.c" + +#endif + +#include "cpu/x86/lapic/boot_cpu.c" +#include "northbridge/amd/amdk8/reset_test.c" +#include "superio/ite/it8716f/it8716f_early_serial.c" +#include "superio/ite/it8716f/it8716f_early_init.c" + +#if USE_FAILOVER_IMAGE==0 + +#include "cpu/x86/bist.h" + +#if CONFIG_USE_INIT == 0 + #include "lib/memcpy.c" +#endif + +#include "northbridge/amd/amdk8/debug.c" + +#include "cpu/amd/mtrr/amd_earlymtrr.c" + +#include "northbridge/amd/amdk8/setup_resource_map.c" + +#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1) +#define GPIO_DEV PNP_DEV(0x2e, IT8716F_GPIO) + +#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" + +static void memreset_setup(void) +{ +} + +static void memreset(int controllers, const struct mem_controller *ctrl) +{ +} + +static inline void activate_spd_rom(const struct mem_controller *ctrl) +{ + /* nothing to do */ +} + +static inline int spd_read_byte(unsigned device, unsigned address) +{ + return smbus_read_byte(device, address); +} + +#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/coherent_ht.c" + +#include "northbridge/amd/amdk8/incoherent_ht.c" + +#include "northbridge/amd/amdk8/raminit_f.c" + +#include "sdram/generic_sdram.c" + +#include "resourcemap.c" + +#include "cpu/amd/dualcore/dualcore.c" + +#define MCP55_NUM 1 +#define MCP55_USE_NIC 1 +#define MCP55_USE_AZA 1 + +#define MCP55_PCI_E_X_0 0 + +#define MCP55_MB_SETUP \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+37, 0x00, 0x68,/* GPIO38 PCI_REQ3 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+38, 0x00, 0x68,/* GPIO39 PCI_GNT3 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+39, 0x00, 0x68,/* GPIO40 PCI_GNT2 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+40, 0x00, 0x68,/* GPIO41 PCI_REQ2 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \ + RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */ + +#include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" +#include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c" + +#include "cpu/amd/car/copy_and_run.c" + +#include "cpu/amd/car/post_cache_as_ram.c" + +#include "cpu/amd/model_fxx/init_cpus.c" + +#include "cpu/amd/model_fxx/fidvid.c" + +#endif + +#if ((HAVE_FAILOVER_BOOT==1) && (USE_FAILOVER_IMAGE == 1)) || ((HAVE_FAILOVER_BOOT==0) && (USE_FALLBACK_IMAGE == 1)) + +#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" +#include "northbridge/amd/amdk8/early_ht.c" + + +static void sio_setup(void) +{ + + unsigned value; + uint32_t dword; + uint8_t byte; + + byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b); + byte |= 0x20; + pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte); + + dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0); + dword |= (1<<0); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword); + + dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4); + dword |= (1<<16); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword); +} + +void failover_process(unsigned long bist, unsigned long cpu_init_detectedx) +{ + unsigned last_boot_normal_x = last_boot_normal(); + + /* Is this a cpu only reset? or Is this a secondary cpu? */ + if ((cpu_init_detectedx) || (!boot_cpu())) { + if (last_boot_normal_x) { + goto normal_image; + } else { + goto fallback_image; + } + } + + /* Nothing special needs to be done to find bus 0 */ + /* Allow the HT devices to be found */ + + enumerate_ht_chain(); + + sio_setup(); + + /* Setup the mcp55 */ + mcp55_enable_rom(); + + /* Is this a deliberate reset by the bios */ + if (bios_reset_detected() && last_boot_normal_x) { + goto normal_image; + } + /* This is the primary cpu how should I boot? */ + else if (do_normal_boot()) { + goto normal_image; + } + else { + goto fallback_image; + } + normal_image: + __asm__ volatile ("jmp __normal_image" + : /* outputs */ + : "a" (bist), "b" (cpu_init_detectedx) /* inputs */ + ); + + fallback_image: +#if HAVE_FAILOVER_BOOT==1 + __asm__ volatile ("jmp __fallback_image" + : /* outputs */ + : "a" (bist), "b" (cpu_init_detectedx) /* inputs */ + ) +#endif + ; +} +#endif +void real_main(unsigned long bist, unsigned long cpu_init_detectedx); + +void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) +{ +#if HAVE_FAILOVER_BOOT==1 + #if USE_FAILOVER_IMAGE==1 + failover_process(bist, cpu_init_detectedx); + #else + real_main(bist, cpu_init_detectedx); + #endif +#else + #if USE_FALLBACK_IMAGE == 1 + failover_process(bist, cpu_init_detectedx); + #endif + real_main(bist, cpu_init_detectedx); +#endif +} + +#if USE_FAILOVER_IMAGE==0 + +void real_main(unsigned long bist, unsigned long cpu_init_detectedx) +{ + static const uint16_t spd_addr [] = { + (0xa<<3)|0, (0xa<<3)|2, 0, 0, + (0xa<<3)|1, (0xa<<3)|3, 0, 0, +#if CONFIG_MAX_PHYSICAL_CPUS > 1 + (0xa<<3)|4, (0xa<<3)|6, 0, 0, + (0xa<<3)|5, (0xa<<3)|7, 0, 0, +#endif + }; + + struct sys_info *sysinfo = (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); + + int needs_reset = 0; + unsigned bsp_apicid = 0; + uint8_t tmp = 0; + + if (bist == 0) { + bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); + } + + pnp_enter_ext_func_mode(SERIAL_DEV); + /* The following line will set CLKIN to 24 MHz, external */ + pnp_write_config(SERIAL_DEV, IT8716F_CONFIG_REG_CLOCKSEL, 0x11); + tmp = pnp_read_config(SERIAL_DEV, IT8716F_CONFIG_REG_SWSUSP); + /* Is serial flash enabled? Then enable writing to serial flash. */ + if (tmp & 0x0e) { + pnp_write_config(SERIAL_DEV, IT8716F_CONFIG_REG_SWSUSP, tmp | 0x10); + pnp_set_logical_device(GPIO_DEV); + /* Set Serial Flash interface to 0x0820 */ + pnp_write_config(GPIO_DEV, 0x64, 0x08); + pnp_write_config(GPIO_DEV, 0x65, 0x20); + /* We can get away with not resetting the logical device because + * it8716f_enable_dev(SERIAL_DEV, TTYS0_BASE) will do that. + */ + } + it8716f_enable_dev(SERIAL_DEV, TTYS0_BASE); + pnp_exit_ext_func_mode(SERIAL_DEV); + + setup_mb_resource_map(); + + uart_init(); + + /* Halt if there was a built in self test failure */ + report_bist_failure(bist); + + +#if CONFIG_USBDEBUG_DIRECT + mcp55_enable_usbdebug_direct(DBGP_DEFAULT); + early_usbdebug_direct_init(); +#endif + console_init(); + print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n"); + + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + +#if MEM_TRAIN_SEQ == 1 + set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram +#endif + setup_coherent_ht_domain(); // routing table and start other core0 + + wait_all_core0_started(); +#if CONFIG_LOGICAL_CPUS==1 + // It is said that we should start core1 after all core0 launched + /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, + * So here need to make sure last core0 is started, esp for two way system, + * (there may be apic id conflicts in that case) + */ + start_other_cores(); + wait_all_other_cores_started(bsp_apicid); +#endif + + /* it will set up chains and store link pair for optimization later */ + ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn + +#if K8_SET_FIDVID == 1 + + { + msr_t msr; + msr=rdmsr(0xc0010042); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + + } + + enable_fid_change(); + + enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); + + init_fidvid_bsp(bsp_apicid); + + // show final fid and vid + { + msr_t msr; + msr=rdmsr(0xc0010042); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + + } +#endif + + needs_reset |= optimize_link_coherent_ht(); + needs_reset |= optimize_link_incoherent_ht(sysinfo); + needs_reset |= mcp55_early_setup_x(); + + // fidvid change will issue one LDTSTOP and the HT change will be effective too + if (needs_reset) { + print_info("ht reset -\r\n"); + soft_reset(); + } + allow_all_aps_stop(bsp_apicid); + + //It's the time to set ctrl in sysinfo now; + fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); + + enable_smbus(); + + memreset_setup(); + + //do we need apci timer, tsc...., only debug need it for better output + /* all ap stopped? */ +// init_timer(); // Need to use TMICT to synconize FID/VID + + sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); + + post_cache_as_ram(); // bsp swtich stack to ram and copy sysinfo ram now + +} + + +#endif diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/chip.h coreboot-v2/src/mainboard/dfi/nf570/chip.h --- coreboot-v2.old/src/mainboard/dfi/nf570/chip.h 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/chip.h 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +extern struct chip_operations mainboard_dfi_nf570_ops; + +struct mainboard_dfi_nf570_config { +// int fixup_scsi; +// int fixup_vga; +}; diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/cmos.layout coreboot-v2/src/mainboard/dfi/nf570/cmos.layout --- coreboot-v2.old/src/mainboard/dfi/nf570/cmos.layout 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/cmos.layout 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,119 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@amd.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +entries + +#start-bit length config config-ID name +#0 8 r 0 seconds +#8 8 r 0 alarm_seconds +#16 8 r 0 minutes +#24 8 r 0 alarm_minutes +#32 8 r 0 hours +#40 8 r 0 alarm_hours +#48 8 r 0 day_of_week +#56 8 r 0 day_of_month +#64 8 r 0 month +#72 8 r 0 year +#80 4 r 0 rate_select +#84 3 r 0 REF_Clock +#87 1 r 0 UIP +#88 1 r 0 auto_switch_DST +#89 1 r 0 24_hour_mode +#90 1 r 0 binary_values_enable +#91 1 r 0 square-wave_out_enable +#92 1 r 0 update_finished_enable +#93 1 r 0 alarm_interrupt_enable +#94 1 r 0 periodic_interrupt_enable +#95 1 r 0 disable_clock_updates +#96 288 r 0 temporary_filler +0 384 r 0 reserved_memory +384 1 e 4 boot_option +385 1 e 4 last_boot +386 1 e 1 ECC_memory +388 4 r 0 reboot_bits +392 3 e 5 baud_rate +395 1 e 1 hw_scrubber +396 1 e 1 interleave_chip_selects +397 2 e 8 max_mem_clock +399 1 e 2 dual_core +400 1 e 1 power_on_after_fail +412 4 e 6 debug_level +416 4 e 7 boot_first +420 4 e 7 boot_second +424 4 e 7 boot_third +428 4 h 0 boot_index +432 8 h 0 boot_countdown +440 4 e 9 slow_cpu +444 1 e 1 nmi +445 1 e 1 iommu +728 256 h 0 user_data +984 16 h 0 check_sum +# Reserve the extended AMD configuration registers +1000 24 r 0 reserved_memory + + + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +5 0 115200 +5 1 57600 +5 2 38400 +5 3 19200 +5 4 9600 +5 5 4800 +5 6 2400 +5 7 1200 +6 6 Notice +6 7 Info +6 8 Debug +6 9 Spew +7 0 Network +7 1 HDD +7 2 Floppy +7 8 Fallback_Network +7 9 Fallback_HDD +7 10 Fallback_Floppy +#7 3 ROM +8 0 200Mhz +8 1 166Mhz +8 2 133Mhz +8 3 100Mhz +9 0 off +9 1 87.5% +9 2 75.0% +9 3 62.5% +9 4 50.0% +9 5 37.5% +9 6 25.0% +9 7 12.5% + +checksums + +checksum 392 983 984 + + diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/Config.lb coreboot-v2/src/mainboard/dfi/nf570/Config.lb --- coreboot-v2.old/src/mainboard/dfi/nf570/Config.lb 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/Config.lb 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,433 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@amd.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +if USE_FAILOVER_IMAGE + default ROM_SECTION_SIZE = FAILOVER_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) +else + if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + default ROM_SECTION_OFFSET = 0 + end +end + +## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + +## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) + +## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE=65536 + +if USE_FAILOVER_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) +else + if USE_FALLBACK_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) + else + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) + end +end + +arch i386 end + +## +## Build the objects we have code for in this directory. +## + +driver mainboard.o +#needed by irq_tables and mptable and acpi_tables +object get_bus_conf.o + +if HAVE_MP_TABLE object mptable.o end +if HAVE_PIRQ_TABLE object irq_tables.o end +#object reset.o +if USE_DCACHE_RAM + + if CONFIG_USE_INIT + makerule ./cache_as_ram_auto.o + depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h" + action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@" + end + else + makerule ./cache_as_ram_auto.inc + depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h" + action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@" + action "perl -e 's/.rodata/.rom.data/g' -pi $@" + action "perl -e 's/.text/.section .rom.text/g' -pi $@" + end + end + +end + +if USE_FAILOVER_IMAGE +else + if CONFIG_AP_CODE_IN_CAR + makerule ./apc_auto.o + depends "$(MAINBOARD)/apc_auto.c option_table.h" + action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/apc_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@" + end + ldscript /arch/i386/init/ldscript_apc.lb + end +end + + +## +## Build our 16 bit and 32 bit coreboot entry code +## +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + mainboardinit cpu/x86/16bit/entry16.inc + ldscript /cpu/x86/16bit/entry16.lds + end +else + if USE_FALLBACK_IMAGE + mainboardinit cpu/x86/16bit/entry16.inc + ldscript /cpu/x86/16bit/entry16.lds + end +end + +mainboardinit cpu/x86/32bit/entry32.inc + +if USE_DCACHE_RAM + if CONFIG_USE_INIT + ldscript /cpu/x86/32bit/entry32.lds + end + + if CONFIG_USE_INIT + ldscript /cpu/amd/car/cache_as_ram.lds + end +end + + +## +## Build our reset vector (This is where coreboot is entered) +## +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds + else + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds + end +else + if USE_FALLBACK_IMAGE + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds + else + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds + end +end + +## +## Include an id string (For safe flashing) +## +mainboardinit southbridge/nvidia/mcp55/id.inc +ldscript /southbridge/nvidia/mcp55/id.lds + +## +## ROMSTRAP table for MCP55 +## +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + mainboardinit southbridge/nvidia/mcp55/romstrap.inc + ldscript /southbridge/nvidia/mcp55/romstrap.lds + end +else + if USE_FALLBACK_IMAGE + mainboardinit southbridge/nvidia/mcp55/romstrap.inc + ldscript /southbridge/nvidia/mcp55/romstrap.lds + end +end + +if USE_DCACHE_RAM + ## + ## Setup Cache-As-Ram + ## + mainboardinit cpu/amd/car/cache_as_ram.inc +end + +### +### This is the early phase of coreboot startup +### Things are delicate and we test to see if we should +### failover to another image. +### +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + if USE_DCACHE_RAM + ldscript /arch/i386/lib/failover_failover.lds + end + end +else + if USE_FALLBACK_IMAGE + if USE_DCACHE_RAM + ldscript /arch/i386/lib/failover.lds + end + end +end + +if HAVE_FANCTL + object fanctl.o +end + +## +## Setup RAM +## +if USE_DCACHE_RAM + + if CONFIG_USE_INIT + initobject cache_as_ram_auto.o + else + mainboardinit ./cache_as_ram_auto.inc + end +end + +## +## Include the secondary Configuration files +## +if CONFIG_CHIP_NAME + config chip.h +end + +chip northbridge/amd/amdk8/root_complex + device apic_cluster 0 on + chip cpu/amd/socket_AM2 + device apic 0 on end + end + end + device pci_domain 0 on + chip northbridge/amd/amdk8 #mc0 + device pci 18.0 on + # devices on link 0, link 0 == LDT 0 + chip southbridge/nvidia/mcp55 + device pci 0.0 on end # HT + device pci 1.0 on # LPC + chip superio/ite/it8716f + # Floppy and any LDN + device pnp 2e.0 off + # Watchdog from CLKIN, CLKIN = 24 MHz + irq 0x23 = 0x11 + # Serial Flash (SPI only) + #0x24 = 0x1a + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.2 off # Com2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.3 off # Parallel Port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.4 on # EC + io 0x60 = 0x290 + io 0x62 = 0x230 + irq 0x70 = 9 + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + end + device pnp 2e.6 on # Mouse + irq 0x70 = 12 + end + device pnp 2e.7 on # GPIO, SPI flash + # pin 84 is not GP10 + irq 0x25 = 0x0 + # pin 21 is GP26, pin 26 is GP21, pin 27 is GP20 + irq 0x26 = 0x43 + # pin 13 is GP35 + irq 0x27 = 0x20 + # pin 70 is not GP46 + #irq 0x28 = 0x0 + # pin 6,3,128,127,126 is GP63,64,65,66,67 + irq 0x29 = 0x81 + # Enable FAN_CTL/FAN_TAC set to 5 (pin 21,23), enable FAN_CTL/FAN_TAC set to 4 (pin 20,22), pin 48 is PCIRST5#, pin91 is PCIRSTIN#, VIN7 is internal voltage divider for VCCH5V, pin 95 is ATXPG, VIN3 is internal voltage divider for VCC5V + #irq 0x2c = 0x1f + # Simple I/O base + io 0x62 = 0x800 + # Serial Flash I/O (SPI only) + io 0x64 = 0x820 + # watch dog force timeout (parallel flash only) + #irq 0x71 = 0x1 + # No WDT interrupt + irq 0x72 = 0x0 + # GPIO pin set 1 disable internal pullup + irq 0xb8 = 0x0 + # GPIO pin set 5 enable internal pullup + irq 0xbc = 0x01 + # SIO pin set 1 alternate function + #irq 0xc0 = 0x0 + # SIO pin set 2 mixed function + irq 0xc1 = 0x43 + # SIO pin set 3 mixed function + irq 0xc2 = 0x20 + # SIO pin set 4 alternate function + #irq 0xc3 = 0x0 + # SIO pin set 1 input mode + #irq 0xc8 = 0x0 + # SIO pin set 2 input mode + irq 0xc9 = 0x0 + # SIO pin set 4 input mode + #irq 0xcb = 0x0 + # Generate SMI# on EC IRQ + #irq 0xf0 = 0x10 + # SMI# level trigger + #irq 0xf1 = 0x40 + # HWMON alert beep pin location + irq 0xf6 = 0x28 + end + device pnp 2e.8 off # MIDI + io 0x60 = 0x300 + irq 0x70 = 10 + end + device pnp 2e.9 off # GAME + io 0x60 = 0x220 + end + device pnp 2e.a off end # CIR + end + end + device pci 1.1 on # SM 0 + chip drivers/generic/generic #dimm 0-0-0 + device i2c 50 on end + end + chip drivers/generic/generic #dimm 0-0-1 + device i2c 51 on end + end + chip drivers/generic/generic #dimm 0-1-0 + device i2c 52 on end + end + chip drivers/generic/generic #dimm 0-1-1 + device i2c 53 on end + end + chip drivers/generic/generic #dimm 1-0-0 + device i2c 54 on end + end + chip drivers/generic/generic #dimm 1-0-1 + device i2c 55 on end + end + chip drivers/generic/generic #dimm 1-1-0 + device i2c 56 on end + end + chip drivers/generic/generic #dimm 1-1-1 + device i2c 57 on end + end + end # SM +#WTF?!? We already have device pci 1.1 in the section above + device pci 1.1 on # SM 1 +#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? +# chip drivers/generic/generic #PCIXA Slot1 +# device i2c 50 on end +# end +# chip drivers/generic/generic #PCIXB Slot1 +# device i2c 51 on end +# end +# chip drivers/generic/generic #PCIXB Slot2 +# device i2c 52 on end +# end +# chip drivers/generic/generic #PCI Slot1 +# device i2c 53 on end +# end +# chip drivers/generic/generic #Master MCP55 PCI-E +# device i2c 54 on end +# end +# chip drivers/generic/generic #Slave MCP55 PCI-E +# device i2c 55 on end +# end + chip drivers/generic/generic #MAC EEPROM + device i2c 51 on end + end + + end # SM + device pci 2.0 on end # USB 1.1 + device pci 2.1 on end # USB 2 + device pci 4.0 on end # IDE + device pci 5.0 on end # SATA 0 + device pci 5.1 on end # SATA 1 + device pci 5.2 on end # SATA 2 + device pci 6.0 on end # PCI + device pci 6.1 on end # AZA + device pci 8.0 on end # NIC + device pci 9.0 off end # NIC + device pci a.0 on end # PCI E 5 + device pci b.0 on end # PCI E 4 + device pci c.0 on end # PCI E 3 + device pci d.0 on end # PCI E 2 + device pci e.0 on end # PCI E 1 + device pci f.0 on end # PCI E 0 + register "ide0_enable" = "1" + register "sata0_enable" = "1" + register "sata1_enable" = "1" + register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 + register "mac_eeprom_addr" = "0x51" + end + end # device pci 18.0 + device pci 18.0 on end # Link 1 + device pci 18.0 on end + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + end # mc0 + + end # PCI domain + +# chip drivers/generic/debug +# device pnp 0.0 off end # chip name +# device pnp 0.1 on end # pci_regs_all +# device pnp 0.2 on end # mem +# device pnp 0.3 off end # cpuid +# device pnp 0.4 on end # smbus_regs_all +# device pnp 0.5 off end # dual core msr +# device pnp 0.6 off end # cache size +# device pnp 0.7 off end # tsc +# device pnp 0.8 off end # io +# device pnp 0.9 off end # io +# end +end #root_complex diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/fanctl.c coreboot-v2/src/mainboard/dfi/nf570/fanctl.c --- coreboot-v2.old/src/mainboard/dfi/nf570/fanctl.c 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/fanctl.c 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,91 @@ + + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#include <arch/io.h> +#include <stdlib.h> + +static void write_index(uint16_t port_base, uint8_t reg, uint8_t value) +{ + outb(reg, port_base); + outb(value, port_base + 1); +} + +static const struct { + uint8_t index, value; +} sequence[]= { + /* Make sure we can monitor, and enable SMI# interrupt output */ + { 0x00, 0x13}, + /* Disable fan interrupt status bits for SMI# */ + { 0x04, 0x37}, + /* Disable VIN interrupt status bits for SMI# */ + { 0x05, 0xff}, + /* Disable fan interrupt status bits for IRQ */ + { 0x07, 0x37}, + /* Disable VIN interrupt status bits for IRQ */ + { 0x08, 0xff}, + /* Disable external sensor interrupt */ + { 0x09, 0x87}, + /* Enable 16 bit counter divisors */ + { 0x0c, 0x07}, + /* Set FAN_CTL control register (0x14) polarity to high, and + activate fans 1, 2 and 3. */ + { 0x14, 0xd7}, + /* set the correct sensor types 1,2 thermistor; 3 diode */ + { 0x51, 0x1c}, + /* set the 'zero' voltage for diode type sensor 3 */ + { 0x5c, 0x80}, +// { 0x56, 0xe5}, +// { 0x57, 0xe5}, + { 0x59, 0xec}, + { 0x5c, 0x00}, + /* fan1 (controlled by temp3) control parameters */ + /* fan off limit */ + { 0x60, 0xff}, + /* fan start limit */ + { 0x61, 0x14}, + /* ???? */ +// { 0x62, 0x00}, + /* start PWM */ + { 0x63, 0x27}, + /* smooth and slope PWM */ + { 0x64, 0x90}, + /* direct-down and interval */ + { 0x65, 0x03}, + /* temperature limit of fan stop for fan3 (automatic) */ + { 0x70, 0xff}, + /* temperature limit of fan start for fan3 (automatic) */ + { 0x71, 0x14}, + /* Set PWM start & slope for fan3 */ + { 0x73, 0x20}, + /* Initialize PWM automatic mode slope values for fan3 */ + { 0x74, 0x90}, + /* set smartguardian temperature interval for fan3 */ + { 0x75, 0x03}, + /* fan1 auto controlled by temp3 */ + { 0x15, 0x82}, + /* fan2 auto controlled by temp3 */ + { 0x16, 0x82}, + /* fan3 auto controlled by temp3 */ + { 0x17, 0x82}, + /* all fans enable, fan1 ctl smart */ + { 0x13, 0x77} +}; + +/* + * Called from superio.c + */ +void init_ec(uint16_t base) +{ + int i; + for (i=0; i<ARRAY_SIZE(sequence); i++) { + write_index(base, sequence[i].index, sequence[i].value); + } +} diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/get_bus_conf.c coreboot-v2/src/mainboard/dfi/nf570/get_bus_conf.c --- coreboot-v2.old/src/mainboard/dfi/nf570/get_bus_conf.c 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/get_bus_conf.c 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,157 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#include <console/console.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <string.h> +#include <stdint.h> +#if CONFIG_LOGICAL_CPUS==1 +#include <cpu/amd/dualcore.h> +#endif + +#include <cpu/amd/amdk8_sysconf.h> +#include <stdlib.h> + + +// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables +//busnum is default + unsigned char bus_isa; + unsigned char bus_mcp55[8]; //1 + unsigned apicid_mcp55; + + +unsigned pci1234x[] = +{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not + //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail + 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0 +}; +unsigned hcdnx[] = +{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most + 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +}; +unsigned bus_type[256]; + +extern void get_sblk_pci1234(void); + +static unsigned get_bus_conf_done = 0; + +void get_bus_conf(void) +{ + + unsigned apicid_base; + unsigned sbdn; + + device_t dev; + int i, j; + + if(get_bus_conf_done==1) return; //do it only once + + get_bus_conf_done = 1; + + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); + for(i=0;i<sysconf.hc_possible_num; i++) { + sysconf.pci1234[i] = pci1234x[i]; + sysconf.hcdn[i] = hcdnx[i]; + } + + get_sblk_pci1234(); + + sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain + sbdn = sysconf.sbdn; + + for(i=0; i<8; i++) { + bus_mcp55[i] = 0; + } + + for(i=0;i<256; i++) { + bus_type[i] = 0; + } + + bus_type[0] = 1; //pci + + bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff; + + bus_type[bus_mcp55[0]] = 1; + + /* MCP55 */ + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0)); + if (dev) { + bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); + bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_mcp55[2]++; + for(j=bus_mcp55[1];j<bus_mcp55[2]; j++) bus_type[j] = 1; + } + else { + printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06); + + bus_mcp55[1] = 2; + bus_mcp55[2] = 3; + } + + for(i=2; i<8;i++) { + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0)); + if (dev) { + bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); + bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_isa++; + for(j=bus_mcp55[i];j<bus_isa; j++) bus_type[j] = 1; + } + else { + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 ); + bus_isa = bus_mcp55[i-1]+1; + } + } + + +/*I/O APICs: APIC ID Version State Address*/ +#if CONFIG_LOGICAL_CPUS==1 + apicid_base = get_apicid_base(1); +#else + apicid_base = CONFIG_MAX_PHYSICAL_CPUS; +#endif + apicid_mcp55 = apicid_base+0; + +} diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/irq_tables.c coreboot-v2/src/mainboard/dfi/nf570/irq_tables.c --- coreboot-v2.old/src/mainboard/dfi/nf570/irq_tables.c 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/irq_tables.c 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,117 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This file was generated by getpir.c, do not modify! + (but if you do, please run checkpir on it to verify) + Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up + + Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM +*/ +#include <console/console.h> +#include <device/pci.h> +#include <string.h> +#include <stdint.h> +#include <arch/pirq_routing.h> + +#include <cpu/amd/amdk8_sysconf.h> + +static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, + uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3, + uint8_t slot, uint8_t rfu) +{ + pirq_info->bus = bus; + pirq_info->devfn = devfn; + pirq_info->irq[0].link = link0; + pirq_info->irq[0].bitmap = bitmap0; + pirq_info->irq[1].link = link1; + pirq_info->irq[1].bitmap = bitmap1; + pirq_info->irq[2].link = link2; + pirq_info->irq[2].bitmap = bitmap2; + pirq_info->irq[3].link = link3; + pirq_info->irq[3].bitmap = bitmap3; + pirq_info->slot = slot; + pirq_info->rfu = rfu; +} +extern unsigned char bus_isa; +extern unsigned char bus_mcp55[8]; //1 + +unsigned long write_pirq_routing_table(unsigned long addr) +{ + + struct irq_routing_table *pirq; + struct irq_info *pirq_info; + unsigned slot_num; + uint8_t *v; + unsigned sbdn; + + uint8_t sum=0; + int i; + + get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c + sbdn = sysconf.sbdn; + + /* Align the table to be 16 byte aligned. */ + addr += 15; + addr &= ~15; + + /* This table must be betweeen 0xf0000 & 0x100000 */ + printk_info("Writing IRQ routing tables to 0x%x...", addr); + + pirq = (void *)(addr); + v = (uint8_t *)(addr); + + pirq->signature = PIRQ_SIGNATURE; + pirq->version = PIRQ_VERSION; + + pirq->rtr_bus = bus_mcp55[0]; + pirq->rtr_devfn = ((sbdn+6)<<3)|0; + + pirq->exclusive_irqs = 0; + + pirq->rtr_vendor = 0x10de; + pirq->rtr_device = 0x0370; + + pirq->miniport_data = 0; + + memset(pirq->rfu, 0, sizeof(pirq->rfu)); + + pirq_info = (void *) ( &pirq->checksum + 1); + slot_num = 0; +//pci bridge + write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); + pirq_info++; slot_num++; + + pirq->size = 32 + 16 * slot_num; + + for (i = 0; i < pirq->size; i++) + sum += v[i]; + + sum = pirq->checksum - sum; + + if (sum != pirq->checksum) { + pirq->checksum = sum; + } + + printk_info("done.\n"); + + return (unsigned long) pirq_info; + +} diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/mainboard.c coreboot-v2/src/mainboard/dfi/nf570/mainboard.c --- coreboot-v2.old/src/mainboard/dfi/nf570/mainboard.c 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/mainboard.c 2008-10-31 14:20:55.000000000 +0000 @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include "chip.h" + +#if CONFIG_CHIP_NAME == 1 +struct chip_operations mainboard_dfi_nf570_ops = { + CHIP_NAME("DFI NF570 Mainboard") +}; +#endif diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/mptable.c coreboot-v2/src/mainboard/dfi/nf570/mptable.c --- coreboot-v2.old/src/mainboard/dfi/nf570/mptable.c 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/mptable.c 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,182 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +#include <console/console.h> +#include <arch/smp/mpspec.h> +#include <device/pci.h> +#include <string.h> +#include <stdint.h> + +#include <cpu/amd/amdk8_sysconf.h> +extern unsigned char bus_isa; +extern unsigned char bus_mcp55[8]; //1 + +extern unsigned apicid_mcp55; + +extern unsigned bus_type[256]; + +void *smp_write_config_table(void *v) +{ + static const char sig[4] = "PCMP"; + static const char oem[8] = "DFI"; + static const char productid[12] = "NF570 "; + struct mp_config_table *mc; + unsigned sbdn; + + int i,j; + + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + memset(mc, 0, sizeof(*mc)); + + memcpy(mc->mpc_signature, sig, sizeof(sig)); + mc->mpc_length = sizeof(*mc); /* initially just the header */ + mc->mpc_spec = 0x04; + mc->mpc_checksum = 0; /* not yet computed */ + memcpy(mc->mpc_oem, oem, sizeof(oem)); + memcpy(mc->mpc_productid, productid, sizeof(productid)); + mc->mpc_oemptr = 0; + mc->mpc_oemsize = 0; + mc->mpc_entry_count = 0; /* No entries yet... */ + mc->mpc_lapic = LAPIC_ADDR; + mc->mpe_length = 0; + mc->mpe_checksum = 0; + mc->reserved = 0; + + smp_write_processors(mc); + + get_bus_conf(); + sbdn = sysconf.sbdn; + +/*Bus: Bus ID Type*/ + /* define bus and isa numbers */ + for(j= 0; j < 256 ; j++) { + if(bus_type[j]) + smp_write_bus(mc, j, "PCI "); + } + smp_write_bus(mc, bus_isa, "ISA "); + +/*I/O APICs: APIC ID Version State Address*/ + { + device_t dev; + struct resource *res; + uint32_t dword; + + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_1); + if (res) { + smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base); + } + + dword = 0x43c6c643; + pci_write_config32(dev, 0x7c, dword); + + dword = 0x81001a00; + pci_write_config32(dev, 0x80, dword); + + dword = 0xd0001202; + pci_write_config32(dev, 0x84, dword); + + } + } + + /*I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ + smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0); + +/* ISA ints are edge-triggered, and usually originate from the ISA bus, + * or its remainings. + */ +#define ISA_INT(intr, pin)\ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, (intr), apicid_mcp55, (pin)) + + ISA_INT(1,1); + ISA_INT(0,2); + ISA_INT(3,3); + ISA_INT(4,4); + ISA_INT(6,6); + ISA_INT(7,7); + ISA_INT(8,8); + ISA_INT(12,12); + ISA_INT(13,13); + ISA_INT(14,14); + ISA_INT(15,15); + +/* PCI interrupts are level triggered, and are + * associated with a specific bus/device/function tuple. + */ +#define PCI_INT(bus, dev, fn, pin) \ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\ + bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin)) + + PCI_INT(0,sbdn+1,1, 10); /* SMBus */ + PCI_INT(0,sbdn+2,0, 22); /* USB */ + PCI_INT(0,sbdn+2,1, 23); /* USB */ + PCI_INT(0,sbdn+6,1, 23); /* HD Audio */ + PCI_INT(0,sbdn+5,0, 20); /* SATA */ + PCI_INT(0,sbdn+5,1, 23); /* SATA */ + PCI_INT(0,sbdn+5,2, 22); /* SATA, was 21 in M57SLI */ + + PCI_INT(0,sbdn+8,0, 21); /* GBit Ether, was 22 in M57SLI */ + + /* The PCIe slots, each on its own bus */ + for(j=7; j>=2; j--) { + if(!bus_mcp55[j]) continue; + for(i=0;i<4;i++) { /* map all functions */ + PCI_INT(j,0,i, 16+(1+j+i)%4); + } + } + + /* On bus 1: the physical PCI bus slots... */ + for(j=0; j<2; j++) /* on a Rev 1.x board, they are devs 7 and 8 */ + for(i=0;i<4;i++) { /* map all functions */ + PCI_INT(1,7+j,i, 16+(3+i+j)%4); + } + /* ... and OB FireWire */ + PCI_INT(1,0x0a,0, 18); + +/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ + smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0); + smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1); + /* There is no extension information... */ + + /* Compute the checksums */ + mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); + mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); + printk_debug("Wrote the mp table end at: %p - %p\n", + mc, smp_next_mpe_entry(mc)); + return smp_next_mpe_entry(mc); +} + +unsigned long write_smp_table(unsigned long addr) +{ + void *v; + v = smp_write_floating_table(addr); + return (unsigned long)smp_write_config_table(v); +} diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/Options.lb coreboot-v2/src/mainboard/dfi/nf570/Options.lb --- coreboot-v2.old/src/mainboard/dfi/nf570/Options.lb 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/Options.lb 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,362 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@amd.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +uses HAVE_MP_TABLE +uses HAVE_PIRQ_TABLE +uses HAVE_ACPI_TABLES +uses ACPI_SSDTX_NUM +uses USE_FALLBACK_IMAGE +uses USE_FAILOVER_IMAGE +uses HAVE_FALLBACK_BOOT +uses HAVE_FAILOVER_BOOT +uses HAVE_HARD_RESET +uses IRQ_SLOT_COUNT +uses HAVE_OPTION_TABLE +uses CONFIG_MAX_CPUS +uses CONFIG_MAX_PHYSICAL_CPUS +uses CONFIG_LOGICAL_CPUS +uses CONFIG_IOAPIC +uses CONFIG_SMP +uses FALLBACK_SIZE +uses FAILOVER_SIZE +uses ROM_SIZE +uses ROM_SECTION_SIZE +uses ROM_IMAGE_SIZE +uses ROM_SECTION_SIZE +uses ROM_SECTION_OFFSET +uses CONFIG_ROM_PAYLOAD +uses CONFIG_ROM_PAYLOAD_START +uses CONFIG_COMPRESSED_PAYLOAD_NRV2B +uses CONFIG_COMPRESSED_PAYLOAD_LZMA +uses CONFIG_PRECOMPRESSED_PAYLOAD +uses PAYLOAD_SIZE +uses _ROMBASE +uses XIP_ROM_SIZE +uses XIP_ROM_BASE +uses STACK_SIZE +uses HEAP_SIZE +uses USE_OPTION_TABLE +uses LB_CKS_RANGE_START +uses LB_CKS_RANGE_END +uses LB_CKS_LOC +uses MAINBOARD_PART_NUMBER +uses MAINBOARD_VENDOR +uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID +uses COREBOOT_EXTRA_VERSION +uses _RAMBASE +uses TTYS0_BAUD +uses TTYS0_BASE +uses TTYS0_LCS +uses DEFAULT_CONSOLE_LOGLEVEL +uses MAXIMUM_CONSOLE_LOGLEVEL +uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL +uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB +uses CONFIG_GDB_STUB +uses CROSS_COMPILE +uses CC +uses HOSTCC +uses OBJCOPY +uses CONFIG_CHIP_NAME +uses CONFIG_CONSOLE_VGA +uses CONFIG_USBDEBUG_DIRECT +uses CONFIG_PCI_ROM_RUN +uses HW_MEM_HOLE_SIZEK +uses HW_MEM_HOLE_SIZE_AUTO_INC +uses K8_HT_FREQ_1G_SUPPORT + +uses HT_CHAIN_UNITID_BASE +uses HT_CHAIN_END_UNITID_BASE +uses SB_HT_CHAIN_ON_BUS0 +uses SB_HT_CHAIN_UNITID_OFFSET_ONLY + +uses USE_DCACHE_RAM +uses DCACHE_RAM_BASE +uses DCACHE_RAM_SIZE +uses DCACHE_RAM_GLOBAL_VAR_SIZE +uses CONFIG_USE_INIT + +uses SERIAL_CPU_INIT + +uses ENABLE_APIC_EXT_ID +uses APIC_ID_OFFSET +uses LIFT_BSP_APIC_ID + +uses CONFIG_PCI_64BIT_PREF_MEM + +uses CONFIG_LB_MEM_TOPK + +uses CONFIG_AP_CODE_IN_CAR + +uses MEM_TRAIN_SEQ + +uses WAIT_BEFORE_CPUS_INIT + +uses CONFIG_USE_PRINTK_IN_CAR + +uses HAVE_FANCTL +### +### Build options +### + +## +## ROM_SIZE is the size of boot ROM that this board will use. +## +default ROM_SIZE=524288 +#default ROM_SIZE=0x100000 + +## +## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use +## +#default FALLBACK_SIZE=131072 +#default FALLBACK_SIZE=0x40000 + +#FALLBACK: 256K-4K +default FALLBACK_SIZE=0x3f000 +#FAILOVER: 4K +default FAILOVER_SIZE=0x01000 + +#more 1M for pgtbl +default CONFIG_LB_MEM_TOPK=2048 + +## +## Set-up automatic fan control +## +default HAVE_FANCTL=1 + +## +## Build code for the fallback boot +## +default HAVE_FALLBACK_BOOT=1 +default HAVE_FAILOVER_BOOT=1 + +## +## Build code to reset the motherboard from coreboot +## +default HAVE_HARD_RESET=1 + +## +## Build code to export a programmable irq routing table +## +default HAVE_PIRQ_TABLE=1 +default IRQ_SLOT_COUNT=11 + +## +## Build code to export an x86 MP table +## Useful for specifying IRQ routing values +## +default HAVE_MP_TABLE=1 + +## ACPI tables will be included +default HAVE_ACPI_TABLES=0 + +## +## Build code to export a CMOS option table +## +default HAVE_OPTION_TABLE=1 + +## +## Move the default coreboot cmos range off of AMD RTC registers +## +default LB_CKS_RANGE_START=49 +default LB_CKS_RANGE_END=122 +default LB_CKS_LOC=123 + +## +## Build code for SMP support +## Only worry about 2 micro processors +## +default CONFIG_SMP=1 +default CONFIG_MAX_CPUS=2 +default CONFIG_MAX_PHYSICAL_CPUS=1 +default CONFIG_LOGICAL_CPUS=1 + +#default SERIAL_CPU_INIT=0 + +default ENABLE_APIC_EXT_ID=0 +default APIC_ID_OFFSET=0x10 +default LIFT_BSP_APIC_ID=1 + +#CHIP_NAME ? +default CONFIG_CHIP_NAME=1 + +#memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. +#2G +#default HW_MEM_HOLE_SIZEK=0x200000 +#1G +default HW_MEM_HOLE_SIZEK=0x100000 +#512M +#default HW_MEM_HOLE_SIZEK=0x80000 + +#make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy +#default HW_MEM_HOLE_SIZE_AUTO_INC=1 + +#Opteron K8 1G HT Support +default K8_HT_FREQ_1G_SUPPORT=1 + +#VGA Console +default CONFIG_CONSOLE_VGA=1 +default CONFIG_PCI_ROM_RUN=1 + +#default CONFIG_USBDEBUG_DIRECT=1 + +#HT Unit ID offset, default is 1, the typical one, 0 mean only one HT device +default HT_CHAIN_UNITID_BASE=0 + +#real SB Unit ID, default is 0x20, mean dont touch it at last +#default HT_CHAIN_END_UNITID_BASE=0x6 + +#make the SB HT chain on bus 0, default is not (0) +default SB_HT_CHAIN_ON_BUS0=2 + +#only offset for SB chain?, default is yes(1) +default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0 + +#allow capable device use that above 4G +#default CONFIG_PCI_64BIT_PREF_MEM=1 + +## +## enable CACHE_AS_RAM specifics +## +default USE_DCACHE_RAM=1 +default DCACHE_RAM_BASE=0xc8000 +default DCACHE_RAM_SIZE=0x08000 +default DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000 +default CONFIG_USE_INIT=0 + +default CONFIG_AP_CODE_IN_CAR=0 +default MEM_TRAIN_SEQ=2 +default WAIT_BEFORE_CPUS_INIT=0 + +## +## Build code to setup a generic IOAPIC +## +default CONFIG_IOAPIC=1 + +## +## Clean up the motherboard id strings +## +default MAINBOARD_PART_NUMBER="nf570" +default MAINBOARD_VENDOR="DFI" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80 + +### +### coreboot layout values +### + +## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. +default ROM_IMAGE_SIZE = 65536 + +## +## Use a small 8K stack +## +default STACK_SIZE=0x2000 + +## +## Use a small 32K heap +## +default HEAP_SIZE=0x8000 + +## +## Only use the option table in a normal image +## +default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE ) + +## +## Coreboot C code runs at this location in RAM +## +default _RAMBASE=0x00100000 + +## +## Load the payload from the ROM +## +default CONFIG_ROM_PAYLOAD = 1 + +#default CONFIG_COMPRESSED_PAYLOAD_NRV2B = 1 + +### +### Defaults of options that you may want to override in the target config file +### + +## +## The default compiler +## +default CC="$(CROSS_COMPILE)gcc -m32" +default HOSTCC="gcc" + +## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## +## The Serial Console +## +default CONFIG_USE_PRINTK_IN_CAR=1 + +# To Enable the Serial Console +default CONFIG_CONSOLE_SERIAL8250=1 + +## Select the serial console baud rate +default TTYS0_BAUD=115200 +#default TTYS0_BAUD=57600 +#default TTYS0_BAUD=38400 +#default TTYS0_BAUD=19200 +#default TTYS0_BAUD=9600 +#default TTYS0_BAUD=4800 +#default TTYS0_BAUD=2400 +#default TTYS0_BAUD=1200 + +# Select the serial console base port +default TTYS0_BASE=0x3f8 + +# Select the serial protocol +# This defaults to 8 data bits, 1 stop bit, and no parity +default TTYS0_LCS=0x3 + +## +### Select the coreboot loglevel +## +## EMERG 1 system is unusable +## ALERT 2 action must be taken immediately +## CRIT 3 critical conditions +## ERR 4 error conditions +## WARNING 5 warning conditions +## NOTICE 6 normal but significant condition +## INFO 7 informational +## DEBUG 8 debug-level messages +## SPEW 9 Way too many details + +## Request this level of debugging output +default DEFAULT_CONSOLE_LOGLEVEL=8 +## At a maximum only compile in this level of debugging +default MAXIMUM_CONSOLE_LOGLEVEL=8 + +## +## Select power on after power fail setting +default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" + +### End Options.lb +end diff -Naur coreboot-v2.old/src/mainboard/dfi/nf570/resourcemap.c coreboot-v2/src/mainboard/dfi/nf570/resourcemap.c --- coreboot-v2.old/src/mainboard/dfi/nf570/resourcemap.c 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/src/mainboard/dfi/nf570/resourcemap.c 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,292 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu yinghailu@amd.com for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ + +static void setup_mb_resource_map(void) +{ + static const unsigned int register_values[] = { + /* Careful set limit registers before base registers which contain the enables */ + /* DRAM Limit i Registers + * F1:0x44 i = 0 + * F1:0x4C i = 1 + * F1:0x54 i = 2 + * F1:0x5C i = 3 + * F1:0x64 i = 4 + * F1:0x6C i = 5 + * F1:0x74 i = 6 + * F1:0x7C i = 7 + * [ 2: 0] Destination Node ID + * 000 = Node 0 + * 001 = Node 1 + * 010 = Node 2 + * 011 = Node 3 + * 100 = Node 4 + * 101 = Node 5 + * 110 = Node 6 + * 111 = Node 7 + * [ 7: 3] Reserved + * [10: 8] Interleave select + * specifies the values of A[14:12] to use with interleave enable. + * [15:11] Reserved + * [31:16] DRAM Limit Address i Bits 39-24 + * This field defines the upper address bits of a 40 bit address + * that define the end of the DRAM region. + */ + PCI_ADDR(0, 0x18, 1, 0x44), 0x0000f8f8, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x4C), 0x0000f8f8, 0x00000001, + PCI_ADDR(0, 0x18, 1, 0x54), 0x0000f8f8, 0x00000002, + PCI_ADDR(0, 0x18, 1, 0x5C), 0x0000f8f8, 0x00000003, + PCI_ADDR(0, 0x18, 1, 0x64), 0x0000f8f8, 0x00000004, + PCI_ADDR(0, 0x18, 1, 0x6C), 0x0000f8f8, 0x00000005, + PCI_ADDR(0, 0x18, 1, 0x74), 0x0000f8f8, 0x00000006, + PCI_ADDR(0, 0x18, 1, 0x7C), 0x0000f8f8, 0x00000007, + + /* DRAM Base i Registers + * F1:0x40 i = 0 + * F1:0x48 i = 1 + * F1:0x50 i = 2 + * F1:0x58 i = 3 + * F1:0x60 i = 4 + * F1:0x68 i = 5 + * F1:0x70 i = 6 + * F1:0x78 i = 7 + * [ 0: 0] Read Enable + * 0 = Reads Disabled + * 1 = Reads Enabled + * [ 1: 1] Write Enable + * 0 = Writes Disabled + * 1 = Writes Enabled + * [ 7: 2] Reserved + * [10: 8] Interleave Enable + * 000 = No interleave + * 001 = Interleave on A[12] (2 nodes) + * 010 = reserved + * 011 = Interleave on A[12] and A[14] (4 nodes) + * 100 = reserved + * 101 = reserved + * 110 = reserved + * 111 = Interleve on A[12] and A[13] and A[14] (8 nodes) + * [15:11] Reserved + * [13:16] DRAM Base Address i Bits 39-24 + * This field defines the upper address bits of a 40-bit address + * that define the start of the DRAM region. + */ + PCI_ADDR(0, 0x18, 1, 0x40), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x48), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x50), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x58), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x60), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x68), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x70), 0x0000f8fc, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x78), 0x0000f8fc, 0x00000000, + + /* Memory-Mapped I/O Limit i Registers + * F1:0x84 i = 0 + * F1:0x8C i = 1 + * F1:0x94 i = 2 + * F1:0x9C i = 3 + * F1:0xA4 i = 4 + * F1:0xAC i = 5 + * F1:0xB4 i = 6 + * F1:0xBC i = 7 + * [ 2: 0] Destination Node ID + * 000 = Node 0 + * 001 = Node 1 + * 010 = Node 2 + * 011 = Node 3 + * 100 = Node 4 + * 101 = Node 5 + * 110 = Node 6 + * 111 = Node 7 + * [ 3: 3] Reserved + * [ 5: 4] Destination Link ID + * 00 = Link 0 + * 01 = Link 1 + * 10 = Link 2 + * 11 = Reserved + * [ 6: 6] Reserved + * [ 7: 7] Non-Posted + * 0 = CPU writes may be posted + * 1 = CPU writes must be non-posted + * [31: 8] Memory-Mapped I/O Limit Address i (39-16) + * This field defines the upp adddress bits of a 40-bit address that + * defines the end of a memory-mapped I/O region n + */ + PCI_ADDR(0, 0x18, 1, 0x84), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x8C), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x94), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x9C), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000, +// PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00, + + /* Memory-Mapped I/O Base i Registers + * F1:0x80 i = 0 + * F1:0x88 i = 1 + * F1:0x90 i = 2 + * F1:0x98 i = 3 + * F1:0xA0 i = 4 + * F1:0xA8 i = 5 + * F1:0xB0 i = 6 + * F1:0xB8 i = 7 + * [ 0: 0] Read Enable + * 0 = Reads disabled + * 1 = Reads Enabled + * [ 1: 1] Write Enable + * 0 = Writes disabled + * 1 = Writes Enabled + * [ 2: 2] Cpu Disable + * 0 = Cpu can use this I/O range + * 1 = Cpu requests do not use this I/O range + * [ 3: 3] Lock + * 0 = base/limit registers i are read/write + * 1 = base/limit registers i are read-only + * [ 7: 4] Reserved + * [31: 8] Memory-Mapped I/O Base Address i (39-16) + * This field defines the upper address bits of a 40bit address + * that defines the start of memory-mapped I/O region i + */ + PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x88), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x90), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0x98), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xA0), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xA8), 0x000000f0, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xB0), 0x000000f0, 0x00000000, +// PCI_ADDR(0, 0x18, 1, 0xB8), 0x000000f0, 0x00fc0003, + + /* PCI I/O Limit i Registers + * F1:0xC4 i = 0 + * F1:0xCC i = 1 + * F1:0xD4 i = 2 + * F1:0xDC i = 3 + * [ 2: 0] Destination Node ID + * 000 = Node 0 + * 001 = Node 1 + * 010 = Node 2 + * 011 = Node 3 + * 100 = Node 4 + * 101 = Node 5 + * 110 = Node 6 + * 111 = Node 7 + * [ 3: 3] Reserved + * [ 5: 4] Destination Link ID + * 00 = Link 0 + * 01 = Link 1 + * 10 = Link 2 + * 11 = reserved + * [11: 6] Reserved + * [24:12] PCI I/O Limit Address i + * This field defines the end of PCI I/O region n + * [31:25] Reserved + */ +// PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000, + PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000, + + /* PCI I/O Base i Registers + * F1:0xC0 i = 0 + * F1:0xC8 i = 1 + * F1:0xD0 i = 2 + * F1:0xD8 i = 3 + * [ 0: 0] Read Enable + * 0 = Reads Disabled + * 1 = Reads Enabled + * [ 1: 1] Write Enable + * 0 = Writes Disabled + * 1 = Writes Enabled + * [ 3: 2] Reserved + * [ 4: 4] VGA Enable + * 0 = VGA matches Disabled + * 1 = matches all address < 64K and where A[9:0] is in the + * range 3B0-3BB or 3C0-3DF independen of the base & limit registers + * [ 5: 5] ISA Enable + * 0 = ISA matches Disabled + * 1 = Blocks address < 64K and in the last 768 bytes of eack 1K block + * from matching agains this base/limit pair + * [11: 6] Reserved + * [24:12] PCI I/O Base i + * This field defines the start of PCI I/O region n + * [31:25] Reserved + */ +// PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033, + PCI_ADDR(0, 0x18, 1, 0xC8), 0xFE000FCC, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xD0), 0xFE000FCC, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xD8), 0xFE000FCC, 0x00000000, + + /* Config Base and Limit i Registers + * F1:0xE0 i = 0 + * F1:0xE4 i = 1 + * F1:0xE8 i = 2 + * F1:0xEC i = 3 + * [ 0: 0] Read Enable + * 0 = Reads Disabled + * 1 = Reads Enabled + * [ 1: 1] Write Enable + * 0 = Writes Disabled + * 1 = Writes Enabled + * [ 2: 2] Device Number Compare Enable + * 0 = The ranges are based on bus number + * 1 = The ranges are ranges of devices on bus 0 + * [ 3: 3] Reserved + * [ 6: 4] Destination Node + * 000 = Node 0 + * 001 = Node 1 + * 010 = Node 2 + * 011 = Node 3 + * 100 = Node 4 + * 101 = Node 5 + * 110 = Node 6 + * 111 = Node 7 + * [ 7: 7] Reserved + * [ 9: 8] Destination Link + * 00 = Link 0 + * 01 = Link 1 + * 10 = Link 2 + * 11 - Reserved + * [15:10] Reserved + * [23:16] Bus Number Base i + * This field defines the lowest bus number in configuration region i + * [31:24] Bus Number Limit i + * This field defines the highest bus number in configuration region i + */ +// PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */ + PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, + + }; + + int max; + max = ARRAY_SIZE(register_values); + setup_resource_map(register_values, max); +} + diff -Naur coreboot-v2.old/targets/dfi/nf570/Config-abuild.lb coreboot-v2/targets/dfi/nf570/Config-abuild.lb --- coreboot-v2.old/targets/dfi/nf570/Config-abuild.lb 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/targets/dfi/nf570/Config-abuild.lb 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,42 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 Uwe Hermann uwe@hermann-uwe.de +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +target dfi_nf570 +mainboard dfi/nf570 + +__COMPRESSION__ + +romimage "normal" + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION=".0-Normal" + payload __PAYLOAD__ +end + +romimage "fallback" + option USE_FALLBACK_IMAGE=1 + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION=".0-Fallback" + payload __PAYLOAD__ +end + +buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" diff -Naur coreboot-v2.old/targets/dfi/nf570/Config-lab.lb coreboot-v2/targets/dfi/nf570/Config-lab.lb --- coreboot-v2.old/targets/dfi/nf570/Config-lab.lb 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/targets/dfi/nf570/Config-lab.lb 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,49 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@gmail.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +# Sample config file for + +target nf570 +mainboard dfi/nf570 + +option ROM_SIZE=0x100000 +option FALLBACK_SIZE=(ROM_SIZE-0x1000) + +romimage "fallback" + option USE_FAILOVER_IMAGE=0 + option USE_FALLBACK_IMAGE=1 + option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 + option CONFIG_PRECOMPRESSED_PAYLOAD=1 + option ROM_IMAGE_SIZE=0x17000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + payload ../payload.elf.lzma +end + +romimage "failover" + option USE_FAILOVER_IMAGE=1 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=FAILOVER_SIZE + option XIP_ROM_SIZE=FAILOVER_SIZE + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" +end + +buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" diff -Naur coreboot-v2.old/targets/dfi/nf570/Config.lb coreboot-v2/targets/dfi/nf570/Config.lb --- coreboot-v2.old/targets/dfi/nf570/Config.lb 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/targets/dfi/nf570/Config.lb 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,106 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@gmail.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +target nf570 +mainboard dfi/nf570 + +# serengeti_leopard +romimage "normal" +# 48K for SCSI FW +# option ROM_SIZE = 475136 +# 48K for SCSI FW and 48K for ATI ROM +# option ROM_SIZE = 425984 +# 64K for Etherboot +# option ROM_SIZE = 458752 +# 44k for atixx.rom +# option ROM_SIZE = 479232 + option USE_FAILOVER_IMAGE=0 + option USE_FALLBACK_IMAGE=0 +# option ROM_IMAGE_SIZE=0x13800 +# option ROM_IMAGE_SIZE=0x18800 + option ROM_IMAGE_SIZE=0x20000 +# option ROM_IMAGE_SIZE=0x15800 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" +# payload ../../../payloads/tg3--ide_disk.zelf +# payload ../../../payloads/filo.elf +# payload ../../../payloads/filo_mem.elf +# payload ../../../payloads/filo.zelf +# payload ../../../payloads/tg3--filo_hda2.zelf +# payload ../../../payloads/tg3.zelf +# payload ../../../../payloads/tg3_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf +# payload ../../../payloads/tg3_com2.zelf +# payload ../../../payloads/e1000--filo.zelf +# payload ../../../payloads/tg3--e1000--filo.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf + payload /boot/filo.elf +end + +romimage "fallback" + option USE_FAILOVER_IMAGE=0 + option USE_FALLBACK_IMAGE=1 +# option ROM_IMAGE_SIZE=0x13800 +# option ROM_IMAGE_SIZE=0x19800 + option ROM_IMAGE_SIZE=0x20000 +# option ROM_IMAGE_SIZE=0x15800 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" +# payload ../../../payloads/tg3--ide_disk.zelf +# payload ../../../payloads/filo.elf +# payload ../../../payloads/filo_mem.elf +# payload ../../../payloads/filo.zelf +# payload ../../../payloads/tg3--filo_hda2.zelf +# payload ../../../payloads/tg3.zelf +# payload ../../../../payloads/tg3_vga.zelf +# payload ../../../../payloads/memtest +# payload ../../../../payloads/e1000_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga.zelf +# payload ../../../../payloads/filo_hda.zelf +# payload ../../../../payloads/adlo.elf +# payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf +# payload ../../../../payloads/forcedeth_mcp55_filo_hda2.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf +# payload ../../../payloads/tg3_com2.zelf +# payload ../../../payloads/e1000--filo.zelf +# payload ../../../payloads/tg3--e1000--filo.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf + payload /boot/filo.elf +end + +romimage "failover" + option USE_FAILOVER_IMAGE=1 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=FAILOVER_SIZE + option XIP_ROM_SIZE=FAILOVER_SIZE + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" +end + +#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" diff -Naur coreboot-v2.old/targets/dfi/nf570/Config.lb.kernel coreboot-v2/targets/dfi/nf570/Config.lb.kernel --- coreboot-v2.old/targets/dfi/nf570/Config.lb.kernel 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/targets/dfi/nf570/Config.lb.kernel 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,77 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007 AMD +## Written by Yinghai Lu yinghailu@gmail.com for AMD. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +# Sample config file for + +target nf570 +mainboard dfi/nf570 + +option ROM_SIZE=0x200000 +option FALLBACK_SIZE=(ROM_SIZE-0x1000) + +romimage "fallback" + option USE_FAILOVER_IMAGE=0 + option USE_FALLBACK_IMAGE=1 + option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 + option CONFIG_PRECOMPRESSED_PAYLOAD=1 +# option ROM_IMAGE_SIZE=0x19800 + option ROM_IMAGE_SIZE=0x17000 +# option ROM_IMAGE_SIZE=0x15800 +# option ROM_IMAGE_SIZE=0x13800 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" +# payload ../../../payloads/tg3--ide_disk.zelf +# payload ../../../payloads/filo.elf +# payload ../../../payloads/filo_mem.elf +# payload ../../../payloads/filo.zelf +# payload ../../../payloads/tg3--filo_hda2.zelf +# payload ../../../payloads/tg3.zelf +# payload ../../../../payloads/tg3_vga.zelf +# payload ../../../../payloads/memtest +# payload ../../../../payloads/adlo.elf +# payload ../../../../payloads/e1000_vga.zelf +# payload ../../../../payloads/filo_hda.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga_5.4.1.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga_5.4.2.zelf + payload /home/yhlu/olpc-payload.elf.lzma +# payload ../../../../payloads/filo_hda.zelf +# payload ../../../../payloads/filo_hda2_novga.zelf +# payload ../../../payloads/tg3_com2.zelf +# payload ../../../payloads/e1000--filo.zelf +# payload ../../../payloads/tg3--e1000--filo.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf +# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf +end + +romimage "failover" + option USE_FAILOVER_IMAGE=1 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=FAILOVER_SIZE + option XIP_ROM_SIZE=FAILOVER_SIZE + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" +end + + +buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" diff -Naur coreboot-v2.old/targets/dfi/nf570/README coreboot-v2/targets/dfi/nf570/README --- coreboot-v2.old/targets/dfi/nf570/README 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/targets/dfi/nf570/README 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1,9 @@ + +/************************************************************************* +* * +* All these files have been copied from the Gigabyte M57SLI tree. String * +* "gigabyte" has been changed to "dfi", and "m57sli" changed to "nf570" * +* * +* The only change is in mptable.c where two interrupts are swapped * +* * +**************************************************************************/ diff -Naur coreboot-v2.old/targets/dfi/nf570/VERSION coreboot-v2/targets/dfi/nf570/VERSION --- coreboot-v2.old/targets/dfi/nf570/VERSION 1970-01-01 01:00:00.000000000 +0100 +++ coreboot-v2/targets/dfi/nf570/VERSION 2008-10-31 14:15:14.000000000 +0000 @@ -0,0 +1 @@ +nf570
-
Chris Lingard