[commit] r5833 - in trunk/src: mainboard/amd/dbm690t mainboard/amd/mahogany mainboard/amd/mahogany_fam10 mainboard/amd/pistachio mainboard/amd/tilapia_fam10 mainboard/asrock/939a785gmh mainboard/as...

[repository service]

Author: uwe
Date: Fri Sep 24 20:18:20 2010
New Revision: 5833
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5833

Log:
Hook up all AMD SB600/SB700 boards to the EHCI Debug Port infrastructure.

Without a (currently) dummy set_debug_port() function the build fails,
this may or may not be fixed differently in the future.

Manually build-tested on all SB600/SB700 boards, and tested on hardware on
one SB600 board I own, works fine.

Signed-off-by: Uwe Hermann 
Acked-by: Stefan Reinauer

Modified:
   trunk/src/mainboard/amd/dbm690t/romstage.c
   trunk/src/mainboard/amd/mahogany/romstage.c
   trunk/src/mainboard/amd/mahogany_fam10/romstage.c
   trunk/src/mainboard/amd/pistachio/romstage.c
   trunk/src/mainboard/amd/tilapia_fam10/romstage.c
   trunk/src/mainboard/asrock/939a785gmh/romstage.c
   trunk/src/mainboard/asus/m4a785-m/romstage.c
   trunk/src/mainboard/gigabyte/ma785gmt/romstage.c
   trunk/src/mainboard/gigabyte/ma78gm/romstage.c
   trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c
   trunk/src/mainboard/jetway/pa78vm5/romstage.c
   trunk/src/mainboard/kontron/kt690/romstage.c
   trunk/src/mainboard/technexion/tim5690/romstage.c
   trunk/src/mainboard/technexion/tim8690/romstage.c
   trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c
   trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c

Modified: trunk/src/mainboard/amd/dbm690t/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/dbm690t/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/amd/dbm690t/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -52,6 +52,11 @@
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"

+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb600/sb600_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"

@@ -123,6 +128,12 @@
    /* it8712f_enable_serial does not use its 1st parameter. */
    it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb600_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();

/* Halt if there was a built in self test failure */

Modified: trunk/src/mainboard/amd/mahogany/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/mahogany/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/amd/mahogany/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -52,6 +52,11 @@
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/ite/it8718f/it8718f_early_serial.c"

+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"

@@ -122,6 +127,12 @@

it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();

/* Halt if there was a built in self test failure */

Modified: trunk/src/mainboard/amd/mahogany_fam10/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/mahogany_fam10/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/amd/mahogany_fam10/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -60,6 +60,12 @@
 static int smbus_read_byte(u32 device, u32 address);

#include "superio/ite/it8718f/it8718f_early_serial.c"
+
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include <cpu/amd/mtrr.h>
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -138,6 +144,12 @@

it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();
    printk(BIOS_DEBUG, "\n");

Modified: trunk/src/mainboard/amd/pistachio/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/pistachio/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/amd/pistachio/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -46,6 +46,11 @@
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"

+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb600/sb600_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"

@@ -117,8 +122,14 @@
    sb600_lpc_init();

/* Pistachio used a FPGA to enable serial debug instead of a SIO
-	 * and it doens't require any special setup. */
+	 * and it doesn't require any special setup. */
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb600_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();

post_code(0x03);

Modified: trunk/src/mainboard/amd/tilapia_fam10/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/tilapia_fam10/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/amd/tilapia_fam10/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -60,6 +60,12 @@
 static int smbus_read_byte(u32 device, u32 address);

#include "superio/ite/it8718f/it8718f_early_serial.c"
+
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include <cpu/amd/mtrr.h>
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -138,6 +144,12 @@

it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();
    printk(BIOS_DEBUG, "\n");

Modified: trunk/src/mainboard/asrock/939a785gmh/romstage.c
==============================================================================
--- trunk/src/mainboard/asrock/939a785gmh/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/asrock/939a785gmh/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -53,6 +53,11 @@
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/winbond/w83627dhg/w83627dhg_early_serial.c"

+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"

@@ -176,6 +181,12 @@
    sio_init();
    w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();

/* Halt if there was a built in self test failure */

Modified: trunk/src/mainboard/asus/m4a785-m/romstage.c
==============================================================================
--- trunk/src/mainboard/asus/m4a785-m/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/asus/m4a785-m/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -60,6 +60,12 @@
 static int smbus_read_byte(u32 device, u32 address);

#include "superio/ite/it8712f/it8712f_early_serial.c"
+
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include <cpu/amd/mtrr.h>
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -139,6 +145,12 @@
    it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
    it8712f_kill_watchdog(); /* disable watchdog, so it does not reset while still booting */
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();
    printk(BIOS_DEBUG, "\n");

Modified: trunk/src/mainboard/gigabyte/ma785gmt/romstage.c
==============================================================================
--- trunk/src/mainboard/gigabyte/ma785gmt/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/gigabyte/ma785gmt/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -56,6 +56,12 @@
 static int smbus_read_byte(u32 device, u32 address);

#include "superio/ite/it8718f/it8718f_early_serial.c"
+
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include <cpu/amd/mtrr.h>
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -134,6 +140,12 @@
    it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
    it8718f_disable_reboot();
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();
    printk(BIOS_DEBUG, "\n");

Modified: trunk/src/mainboard/gigabyte/ma78gm/romstage.c
==============================================================================
--- trunk/src/mainboard/gigabyte/ma78gm/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/gigabyte/ma78gm/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -60,6 +60,12 @@
 static int smbus_read_byte(u32 device, u32 address);

#include "superio/ite/it8718f/it8718f_early_serial.c"
+
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include <cpu/amd/mtrr.h>
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -138,6 +144,12 @@
    it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
    it8718f_disable_reboot();
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();
    printk(BIOS_DEBUG, "\n");

Modified: trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c
==============================================================================
--- trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -63,6 +63,12 @@
 static int smbus_read_byte(u32 device, u32 address);

#include "superio/fintek/f71859/f71859_early_serial.c"
+
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include <cpu/amd/mtrr.h>
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -141,6 +147,12 @@

f71859_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();
    printk(BIOS_DEBUG, "\n");

Modified: trunk/src/mainboard/jetway/pa78vm5/romstage.c
==============================================================================
--- trunk/src/mainboard/jetway/pa78vm5/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/jetway/pa78vm5/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -67,6 +67,11 @@
 #define SERIAL_DEV PNP_DEV(0x2e, F71863FG_SP1)
 #endif

+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include <cpu/amd/mtrr.h>
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -146,6 +151,12 @@

f71863fg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb700_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();
    printk(BIOS_DEBUG, "\n");

Modified: trunk/src/mainboard/kontron/kt690/romstage.c
==============================================================================
--- trunk/src/mainboard/kontron/kt690/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/kontron/kt690/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -54,6 +54,11 @@
 #include "northbridge/amd/amdk8/debug.c"
 #include "superio/winbond/w83627dhg/w83627dhg_early_serial.c"

+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb600/sb600_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"

@@ -125,6 +130,12 @@
    dev=PNP_DEV(0x2e, W83627DHG_SP1);
    w83627dhg_enable_serial(dev, CONFIG_TTYS0_BASE);
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb600_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();

/* Halt if there was a built in self test failure */

Modified: trunk/src/mainboard/technexion/tim5690/romstage.c
==============================================================================
--- trunk/src/mainboard/technexion/tim5690/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/technexion/tim5690/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -53,6 +53,11 @@
 #include "northbridge/amd/amdk8/debug.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"

+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb600/sb600_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"

@@ -130,6 +135,12 @@
    it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
    it8712f_kill_watchdog();
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb600_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();

/* Halt if there was a built in self test failure */

Modified: trunk/src/mainboard/technexion/tim8690/romstage.c
==============================================================================
--- trunk/src/mainboard/technexion/tim8690/romstage.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/mainboard/technexion/tim8690/romstage.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -53,6 +53,11 @@
 #include "northbridge/amd/amdk8/debug.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"

+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb600/sb600_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"

@@ -124,6 +129,12 @@
    it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
    it8712f_kill_watchdog();
    uart_init();
+
+#if CONFIG_USBDEBUG
+	sb600_enable_usbdebug(0);
+	early_usbdebug_init();
+#endif
+
    console_init();

/* Halt if there was a built in self test failure */

Modified: trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c
==============================================================================
--- trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -17,6 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */

+#include <usbdebug.h>
+
 #ifndef SB600_DEVN_BASE

#define SB600_DEVN_BASE 0
@@ -27,6 +29,11 @@
 #define EHCI_BAR 0xFEF00000
 #define EHCI_DEBUG_OFFSET 0xE0

+/* Required for successful build, but currently empty. */
+void set_debug_port(unsigned int port)
+{
+}
+
 static void sb600_enable_usbdebug(u32 port)
 {
    set_debug_port(port);

Modified: trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c
==============================================================================
--- trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c	Fri Sep 24 20:12:46 2010	(r5832)
+++ trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c	Fri Sep 24 20:18:20 2010	(r5833)
@@ -17,6 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */

+#include <usbdebug.h>
+
 #ifndef SB700_DEVN_BASE

#define SB700_DEVN_BASE 0
@@ -27,6 +29,11 @@
 #define EHCI_BAR 0xFEF00000
 #define EHCI_DEBUG_OFFSET 0xE0

+/* Required for successful build, but currently empty. */
+void set_debug_port(unsigned int port)
+{
+}
+
 static void sb700_enable_usbdebug(u32 port)
 {
    set_debug_port(port);