[v2] r4750 - in trunk/coreboot-v2/src: . cpu/amd cpu/amd/socket_939 cpu/amd/socket_AM2r2 drivers drivers/ati/ragexl mainboard/arima mainboard/arima/hdama mainboard/asus mainboard/asus/a8n_e mainboard/asus/a8v-e_se mainboard/broadcom mainboard/broadcom/blast mainboard/hp mainboard/hp/dl145_g3 mainboard/ibm mainboard/ibm/e325 mainboard/ibm/e326 mainboard/intel/jarrell mainboard/iwill mainboard/iwill/dk8_htx mainboard/iwill/dk8s2 mainboard/iwill/dk8x mainboard/olpc mainboard/olpc/btest mainboard/olp

Author: oxygene
Date: 2009-10-09 14:32:52 +0200 (Fri, 09 Oct 2009)
New Revision: 4750

Added:
   trunk/coreboot-v2/src/cpu/amd/socket_939/Kconfig
   trunk/coreboot-v2/src/cpu/amd/socket_939/Makefile.inc
   trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Kconfig
   trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Makefile.inc
   trunk/coreboot-v2/src/drivers/ati/ragexl/Makefile.inc
   trunk/coreboot-v2/src/mainboard/arima/hdama/Kconfig
   trunk/coreboot-v2/src/mainboard/arima/hdama/Makefile.inc
   trunk/coreboot-v2/src/mainboard/asus/a8n_e/Kconfig
   trunk/coreboot-v2/src/mainboard/asus/a8n_e/Makefile.inc
   trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Kconfig
   trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Makefile.inc
   trunk/coreboot-v2/src/mainboard/broadcom/blast/Kconfig
   trunk/coreboot-v2/src/mainboard/broadcom/blast/Makefile.inc
   trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Kconfig
   trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Makefile.inc
   trunk/coreboot-v2/src/mainboard/ibm/e325/Kconfig
   trunk/coreboot-v2/src/mainboard/ibm/e325/Makefile.inc
   trunk/coreboot-v2/src/mainboard/ibm/e326/Kconfig
   trunk/coreboot-v2/src/mainboard/ibm/e326/Makefile.inc
   trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Kconfig
   trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Makefile.inc
   trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Kconfig
   trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Makefile.inc
   trunk/coreboot-v2/src/mainboard/iwill/dk8x/Kconfig
   trunk/coreboot-v2/src/mainboard/iwill/dk8x/Makefile.inc
   trunk/coreboot-v2/src/mainboard/olpc/btest/Kconfig
   trunk/coreboot-v2/src/mainboard/olpc/btest/Makefile.inc
   trunk/coreboot-v2/src/mainboard/olpc/rev_a/Kconfig
   trunk/coreboot-v2/src/mainboard/olpc/rev_a/Makefile.inc
Modified:
   trunk/coreboot-v2/src/Kconfig
   trunk/coreboot-v2/src/cpu/amd/Kconfig
   trunk/coreboot-v2/src/cpu/amd/Makefile.inc
   trunk/coreboot-v2/src/drivers/Makefile.inc
   trunk/coreboot-v2/src/mainboard/arima/Kconfig
   trunk/coreboot-v2/src/mainboard/asus/Kconfig
   trunk/coreboot-v2/src/mainboard/broadcom/Kconfig
   trunk/coreboot-v2/src/mainboard/hp/Kconfig
   trunk/coreboot-v2/src/mainboard/ibm/Kconfig
   trunk/coreboot-v2/src/mainboard/intel/jarrell/Kconfig
   trunk/coreboot-v2/src/mainboard/iwill/Kconfig
   trunk/coreboot-v2/src/mainboard/olpc/Kconfig
Log:
More Kconfig-supported boards, and also kconfig support
for amd/socket_AM2R2, amd/socket_939, drivers/ati/ragexl

Signed-off-by: Patrick Georgi 
Acked-by: Uwe Hermann

Modified: trunk/coreboot-v2/src/Kconfig
===================================================================
--- trunk/coreboot-v2/src/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -146,6 +146,10 @@
    bool
    default n

+config ATI_RAGE_XL
+	bool
+	default n
+
 source src/console/Kconfig

config HAVE_ACPI_RESUME

Modified: trunk/coreboot-v2/src/cpu/amd/Kconfig
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/cpu/amd/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -3,10 +3,10 @@
    default n

source src/cpu/amd/socket_754/Kconfig
-#source src/cpu/amd/socket_939/Kconfig
+source src/cpu/amd/socket_939/Kconfig
 source src/cpu/amd/socket_940/Kconfig
 source src/cpu/amd/socket_AM2/Kconfig
-#source src/cpu/amd/socket_AM2r2/Kconfig
+source src/cpu/amd/socket_AM2r2/Kconfig
 source src/cpu/amd/socket_F/Kconfig
 source src/cpu/amd/socket_F_1207/Kconfig
 source src/cpu/amd/socket_S1G1/Kconfig

Modified: trunk/coreboot-v2/src/cpu/amd/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/Makefile.inc	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/cpu/amd/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -1,7 +1,9 @@
 subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F
 subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754
+subdirs-$(CONFIG_CPU_AMD_SOCKET_939) += socket_939
 subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940
 subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += socket_AM2
+subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2R2) += socket_AM2r2
 subdirs-$(CONFIG_CPU_AMD_GX1) += model_gx1
 subdirs-$(CONFIG_CPU_AMD_GX2) += model_gx2
 subdirs-$(CONFIG_CPU_AMD_LX) += model_lx

Added: trunk/coreboot-v2/src/cpu/amd/socket_939/Kconfig
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/socket_939/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/cpu/amd/socket_939/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,9 @@
+config CPU_AMD_SOCKET_939
+	bool
+	default n
+	select CPU_AMD_MODEL_FXX
+
+config CPU_SOCKET_TYPE
+	hex
+	default 0x0
+	depends on CPU_AMD_SOCKET_939

Added: trunk/coreboot-v2/src/cpu/amd/socket_939/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/socket_939/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/cpu/amd/socket_939/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,14 @@
+obj-y += socket_939.o
+subdirs-y += ../model_fxx
+subdirs-y += ../dualcore
+subdirs-y += ../mtrr
+subdirs-y += ../microcode
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/pae

Added: trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Kconfig
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,18 @@
+config CPU_AMD_SOCKET_AM2R2
+	bool
+	default n
+	select CPU_AMD_MODEL_10XXX
+	select HT3_SUPPORT
+	select CAR_FAM10
+
+config CPU_SOCKET_TYPE
+	hex
+	default 0x11
+	depends on CPU_AMD_SOCKET_AM2R2
+
+# DDR2 and REG
+config DIMM_SUPPORT
+	hex
+	default 0x0104
+	depends on CPU_AMD_SOCKET_AM2R2
+

Added: trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,14 @@
+obj-y += socket_AM2r2.o
+subdirs-y += ../model_10xxx
+subdirs-y += ../quadcore
+subdirs-y += ../mtrr
+subdirs-y += ../microcode
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/pae
+subdirs-y += ../../x86/smm
+subdirs-y += ../../x86/mtrr

Modified: trunk/coreboot-v2/src/drivers/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/drivers/Makefile.inc	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/drivers/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -1 +1,2 @@
 subdirs-y += pci
+subdirs-y += ati/ragexl

Added: trunk/coreboot-v2/src/drivers/ati/ragexl/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/drivers/ati/ragexl/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/drivers/ati/ragexl/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1 @@
+driver-$(CONFIG_ATI_RAGE_XL) += xlinit.o

Modified: trunk/coreboot-v2/src/mainboard/arima/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/arima/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/mainboard/arima/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -1 +1,8 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_ARIMA
+        
+source "src/mainboard/arima/hdama/Kconfig"
+
+endchoice
+

Added: trunk/coreboot-v2/src/mainboard/arima/hdama/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/arima/hdama/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/arima/hdama/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,108 @@
+config BOARD_ARIMA_HDAMA
+	bool "HDAMA"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_940
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_AMD_AMD8111
+	select SOUTHBRIDGE_AMD_AMD8131
+	select SUPERIO_NSC_PC87360
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+	select AP_CODE_IN_CAR
+	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	select WAIT_BEFORE_CPUS_INIT
+
+config MAINBOARD_DIR
+	string
+	default arima/hdama
+	depends on BOARD_ARIMA_HDAMA
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on BOARD_ARIMA_HDAMA
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x08000
+	depends on BOARD_ARIMA_HDAMA
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_ARIMA_HDAMA
+
+config APIC_ID_OFFSET
+	hex
+	default 0x8
+	depends on BOARD_ARIMA_HDAMA
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_ARIMA_HDAMA
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_ARIMA_HDAMA
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "HDAMA"
+	depends on BOARD_ARIMA_HDAMA
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_ARIMA_HDAMA
+
+config MAX_CPUS
+	int
+	default 4
+	depends on BOARD_ARIMA_HDAMA
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_ARIMA_HDAMA
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+	depends on BOARD_ARIMA_HDAMA
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_ARIMA_HDAMA
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x6
+	depends on BOARD_ARIMA_HDAMA
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0xa
+	depends on BOARD_ARIMA_HDAMA
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_ARIMA_HDAMA
+
+config SERIAL_CPU_INIT
+	bool
+	default n
+	depends on BOARD_ARIMA_HDAMA
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+	depends on BOARD_ARIMA_HDAMA

Added: trunk/coreboot-v2/src/mainboard/arima/hdama/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/arima/hdama/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/arima/hdama/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,53 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable.
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Modified: trunk/coreboot-v2/src/mainboard/asus/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/asus/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/mainboard/asus/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -22,6 +22,8 @@
    prompt "Mainboard model"
    depends on VENDOR_ASUS

+source "src/mainboard/asus/a8n_e/Kconfig"
+source "src/mainboard/asus/a8v-e_se/Kconfig"
 source "src/mainboard/asus/p2b/Kconfig"
 source "src/mainboard/asus/p2b-d/Kconfig"
 source "src/mainboard/asus/p2b-f/Kconfig"

Added: trunk/coreboot-v2/src/mainboard/asus/a8n_e/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/asus/a8n_e/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/asus/a8n_e/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,99 @@
+config BOARD_ASUS_A8N_E
+	bool "A8N-E"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_939
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_NVIDIA_CK804
+	select SUPERIO_ITE_IT8712F
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+
+config MAINBOARD_DIR
+	string
+	default asus/a8n_e
+	depends on BOARD_ASUS_A8N_E
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xcf000
+	depends on BOARD_ASUS_A8N_E
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_ASUS_A8N_E
+
+config APIC_ID_OFFSET
+	hex
+	default 0x10
+	depends on BOARD_ASUS_A8N_E
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_ASUS_A8N_E
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	bool
+	default n
+	depends on BOARD_ASUS_A8N_E
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_ASUS_A8N_E
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_ASUS_A8N_E
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "A8N-E"
+	depends on BOARD_ASUS_A8N_E
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_ASUS_A8N_E
+
+config MAX_CPUS
+	int
+	default 2
+	depends on BOARD_ASUS_A8N_E
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 1
+	depends on BOARD_ASUS_A8N_E
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_ASUS_A8N_E
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_ASUS_A8N_E
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_ASUS_A8N_E
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_ASUS_A8N_E
+
+config IRQ_SLOT_COUNT
+	int
+	default 13
+	depends on BOARD_ASUS_A8N_E

Added: trunk/coreboot-v2/src/mainboard/asus/a8n_e/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/asus/a8n_e/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/asus/a8n_e/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,76 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
+	iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
+	mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
+	iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl
+	perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex
+	mv pci2.hex ssdt2.c
+
+$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
+	iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
+	perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
+	mv pci3.hex ssdt3.c
+
+$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
+	iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
+	perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
+	mv pci4.hex ssdt4.c
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Added: trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,104 @@
+config BOARD_ASUS_A8V_E_SE
+	bool "A8V-E SE"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_939
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_VIA_VT8237R
+	select SUPERIO_WINBOND_W83627EHG
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+	select HAVE_ACPI_TABLES
+
+config MAINBOARD_DIR
+	string
+	default asus/a8v-e_se
+	depends on BOARD_ASUS_A8V_E_SE
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xcc000
+	depends on BOARD_ASUS_A8V_E_SE
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x4000
+	depends on BOARD_ASUS_A8V_E_SE
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x1000
+	depends on BOARD_ASUS_A8V_E_SE
+
+config APIC_ID_OFFSET
+	hex
+	default 0x10
+	depends on BOARD_ASUS_A8V_E_SE
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_ASUS_A8V_E_SE
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	bool
+	default n
+	depends on BOARD_ASUS_A8V_E_SE
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_ASUS_A8V_E_SE
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_ASUS_A8V_E_SE
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "A8V-E SE"
+	depends on BOARD_ASUS_A8V_E_SE
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_ASUS_A8V_E_SE
+
+config MAX_CPUS
+	int
+	default 2
+	depends on BOARD_ASUS_A8V_E_SE
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 1
+	depends on BOARD_ASUS_A8V_E_SE
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_ASUS_A8V_E_SE
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_ASUS_A8V_E_SE
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_ASUS_A8V_E_SE
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_ASUS_A8V_E_SE
+
+config IRQ_SLOT_COUNT
+	int
+	default 13
+	depends on BOARD_ASUS_A8V_E_SE

Added: trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,41 @@
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+	iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+	mv $(obj)/dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Modified: trunk/coreboot-v2/src/mainboard/broadcom/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/broadcom/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/mainboard/broadcom/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -1 +1,8 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_BROADCOM
+        
+source "src/mainboard/broadcom/blast/Kconfig"
+
+endchoice
+

Added: trunk/coreboot-v2/src/mainboard/broadcom/blast/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/broadcom/blast/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/broadcom/blast/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,105 @@
+config BOARD_BROADCOM_BLAST
+	bool "Blast"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_940
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_BROADCOM_BCM5780
+	select SOUTHBRIDGE_BROADCOM_BCM5785
+	select SUPERIO_NSC_PC87417
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+
+config MAINBOARD_DIR
+	string
+	default broadcom/blast
+	depends on BOARD_BROADCOM_BLAST
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xcf000
+	depends on BOARD_BROADCOM_BLAST
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_BROADCOM_BLAST
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x0
+	depends on BOARD_BROADCOM_BLAST
+
+config APIC_ID_OFFSET
+	hex
+	default 0x10
+	depends on BOARD_BROADCOM_BLAST
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_BROADCOM_BLAST
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	bool
+	default n
+	depends on BOARD_BROADCOM_BLAST
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_BROADCOM_BLAST
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_BROADCOM_BLAST
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "BLAST"
+	depends on BOARD_BROADCOM_BLAST
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_BROADCOM_BLAST
+
+config MAX_CPUS
+	int
+	default 4
+	depends on BOARD_BROADCOM_BLAST
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_BROADCOM_BLAST
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_BROADCOM_BLAST
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_BROADCOM_BLAST
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_BROADCOM_BLAST
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_BROADCOM_BLAST
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+	depends on BOARD_BROADCOM_BLAST

Added: trunk/coreboot-v2/src/mainboard/broadcom/blast/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/broadcom/blast/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/broadcom/blast/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,35 @@
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+driver-y += ../../../drivers/i2c/i2cmux2/i2cmux2.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Modified: trunk/coreboot-v2/src/mainboard/hp/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/hp/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/mainboard/hp/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -1 +1,8 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_HP
+        
+source "src/mainboard/hp/dl145_g3/Kconfig"
+
+endchoice
+

Added: trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,105 @@
+config BOARD_HP_DL145_G3
+	bool "DL145-G3"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_F
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_BROADCOM_BCM21000
+	select SOUTHBRIDGE_BROADCOM_BCM5785
+	select SUPERIO_NSC_PC87417
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+
+config MAINBOARD_DIR
+	string
+	default hp/dl145_g3
+	depends on BOARD_HP_DL145_G3
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xcc000
+	depends on BOARD_HP_DL145_G3
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x04000
+	depends on BOARD_HP_DL145_G3
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_HP_DL145_G3
+
+config APIC_ID_OFFSET
+	hex
+	default 0x10
+	depends on BOARD_HP_DL145_G3
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_HP_DL145_G3
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	bool
+	default n
+	depends on BOARD_HP_DL145_G3
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_HP_DL145_G3
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_HP_DL145_G3
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "DL145G3"
+	depends on BOARD_HP_DL145_G3
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_HP_DL145_G3
+
+config MAX_CPUS
+	int
+	default 4
+	depends on BOARD_HP_DL145_G3
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_HP_DL145_G3
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_HP_DL145_G3
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_HP_DL145_G3
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_HP_DL145_G3
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_HP_DL145_G3
+
+config IRQ_SLOT_COUNT
+	int
+	default 15
+	depends on BOARD_HP_DL145_G3

Added: trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,33 @@
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Modified: trunk/coreboot-v2/src/mainboard/ibm/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/ibm/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/mainboard/ibm/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -1 +1,9 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_IBM
+        
+source "src/mainboard/ibm/e325/Kconfig"
+source "src/mainboard/ibm/e326/Kconfig"
+
+endchoice
+

Added: trunk/coreboot-v2/src/mainboard/ibm/e325/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/ibm/e325/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/ibm/e325/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,108 @@
+config BOARD_IBM_E325
+	bool "e325"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_940
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_AMD_AMD8111
+	select SOUTHBRIDGE_AMD_AMD8131
+	select SUPERIO_NSC_PC87366
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+	select AP_CODE_IN_CAR
+	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	select WAIT_BEFORE_CPUS_INIT
+
+config MAINBOARD_DIR
+	string
+	default ibm/e325
+	depends on BOARD_IBM_E325
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xcf000
+	depends on BOARD_IBM_E325
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x1000
+	depends on BOARD_IBM_E325
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x0
+	depends on BOARD_IBM_E325
+
+config APIC_ID_OFFSET
+	hex
+	default 0x8
+	depends on BOARD_IBM_E325
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_IBM_E325
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_IBM_E325
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "E325"
+	depends on BOARD_IBM_E325
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_IBM_E325
+
+config MAX_CPUS
+	int
+	default 1
+	depends on BOARD_IBM_E325
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 1
+	depends on BOARD_IBM_E325
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+	depends on BOARD_IBM_E325
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_IBM_E325
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x6
+	depends on BOARD_IBM_E325
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0xa
+	depends on BOARD_IBM_E325
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_IBM_E325
+
+config SERIAL_CPU_INIT
+	bool
+	default n
+	depends on BOARD_IBM_E325
+
+config IRQ_SLOT_COUNT
+	int
+	default 12
+	depends on BOARD_IBM_E325

Added: trunk/coreboot-v2/src/mainboard/ibm/e325/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/ibm/e325/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/ibm/e325/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,53 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Added: trunk/coreboot-v2/src/mainboard/ibm/e326/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/ibm/e326/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/ibm/e326/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,108 @@
+config BOARD_IBM_E326
+	bool "e326"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_940
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_AMD_AMD8111
+	select SOUTHBRIDGE_AMD_AMD8131
+	select SUPERIO_NSC_PC87366
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+	select AP_CODE_IN_CAR
+	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	select WAIT_BEFORE_CPUS_INIT
+
+config MAINBOARD_DIR
+	string
+	default ibm/e326
+	depends on BOARD_IBM_E326
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xcf000
+	depends on BOARD_IBM_E326
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x1000
+	depends on BOARD_IBM_E326
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x0
+	depends on BOARD_IBM_E326
+
+config APIC_ID_OFFSET
+	hex
+	default 0x8
+	depends on BOARD_IBM_E326
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_IBM_E326
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_IBM_E326
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "E326"
+	depends on BOARD_IBM_E326
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_IBM_E326
+
+config MAX_CPUS
+	int
+	default 2
+	depends on BOARD_IBM_E326
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_IBM_E326
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+	depends on BOARD_IBM_E326
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_IBM_E326
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x6
+	depends on BOARD_IBM_E326
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0xa
+	depends on BOARD_IBM_E326
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_IBM_E326
+
+config SERIAL_CPU_INIT
+	bool
+	default n
+	depends on BOARD_IBM_E326
+
+config IRQ_SLOT_COUNT
+	int
+	default 12
+	depends on BOARD_IBM_E326

Added: trunk/coreboot-v2/src/mainboard/ibm/e326/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/ibm/e326/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/ibm/e326/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,53 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Modified: trunk/coreboot-v2/src/mainboard/intel/jarrell/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/intel/jarrell/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/mainboard/intel/jarrell/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -8,6 +8,7 @@
    select SUPERIO_NSC_PC87427
    select HAVE_PIRQ_TABLE
    select UDELAY_TSC
+	select ATI_RAGE_XL

config MAINBOARD_DIR
    string
@@ -38,3 +39,4 @@
    int
    default 9
    depends on BOARD_INTEL_JARRELL
+

Modified: trunk/coreboot-v2/src/mainboard/iwill/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/iwill/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/mainboard/iwill/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -1 +1,10 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_IWILL
+        
+source "src/mainboard/iwill/dk8_htx/Kconfig"
+source "src/mainboard/iwill/dk8s2/Kconfig"
+source "src/mainboard/iwill/dk8x/Kconfig"
+
+endchoice
+

Added: trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,109 @@
+config BOARD_IWILL_DK8_HTX
+	bool "DK8-HTX"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_940
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_AMD_AMD8111
+	select SOUTHBRIDGE_AMD_AMD8131
+	select SUPERIO_WINBOND_W83627HF
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+	select AP_CODE_IN_CAR
+	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	select WAIT_BEFORE_CPUS_INIT
+	select HAVE_ACPI_TABLES
+
+config MAINBOARD_DIR
+	string
+	default iwill/dk8_htx
+	depends on BOARD_IWILL_DK8_HTX
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on BOARD_IWILL_DK8_HTX
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x08000
+	depends on BOARD_IWILL_DK8_HTX
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_IWILL_DK8_HTX
+
+config APIC_ID_OFFSET
+	hex
+	default 0x8
+	depends on BOARD_IWILL_DK8_HTX
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_IWILL_DK8_HTX
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_IWILL_DK8_HTX
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "DK8-HTX"
+	depends on BOARD_IWILL_DK8_HTX
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_IWILL_DK8_HTX
+
+config MAX_CPUS
+	int
+	default 4
+	depends on BOARD_IWILL_DK8_HTX
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_IWILL_DK8_HTX
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+	depends on BOARD_IWILL_DK8_HTX
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_IWILL_DK8_HTX
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x6
+	depends on BOARD_IWILL_DK8_HTX
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0xa
+	depends on BOARD_IWILL_DK8_HTX
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_IWILL_DK8_HTX
+
+config SERIAL_CPU_INIT
+	bool
+	default n
+	depends on BOARD_IWILL_DK8_HTX
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+	depends on BOARD_IWILL_DK8_HTX

Added: trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,90 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
+
+# ./ssdt.o is in northbridge/amd/amdk8/Config.lb
+obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt2.o
+obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt3.o
+obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt4.o
+obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt5.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
+	iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
+	mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
+	iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl
+	perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex
+	mv pci2.hex ssdt2.c
+
+$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
+	iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
+	perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
+	mv pci3.hex ssdt3.c
+
+$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
+	iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
+	perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
+	mv pci4.hex ssdt4.c
+
+$(obj)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci5.asl"
+	iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci5.asl
+	perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex
+	mv pci5.hex ssdt5.c
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Added: trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,109 @@
+config BOARD_IWILL_DK8S2
+	bool "DK8S2"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_940
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_AMD_AMD8111
+	select SOUTHBRIDGE_AMD_AMD8131
+	select SUPERIO_WINBOND_W83627HF
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+	select AP_CODE_IN_CAR
+	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	select WAIT_BEFORE_CPUS_INIT
+	select ATI_RAGE_XL
+
+config MAINBOARD_DIR
+	string
+	default iwill/dk8s2
+	depends on BOARD_IWILL_DK8S2
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on BOARD_IWILL_DK8S2
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x08000
+	depends on BOARD_IWILL_DK8S2
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_IWILL_DK8S2
+
+config APIC_ID_OFFSET
+	hex
+	default 0x8
+	depends on BOARD_IWILL_DK8S2
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_IWILL_DK8S2
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_IWILL_DK8S2
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "DK8S2"
+	depends on BOARD_IWILL_DK8S2
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_IWILL_DK8S2
+
+config MAX_CPUS
+	int
+	default 4
+	depends on BOARD_IWILL_DK8S2
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_IWILL_DK8S2
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+	depends on BOARD_IWILL_DK8S2
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_IWILL_DK8S2
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x6
+	depends on BOARD_IWILL_DK8S2
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0xa
+	depends on BOARD_IWILL_DK8S2
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_IWILL_DK8S2
+
+config SERIAL_CPU_INIT
+	bool
+	default n
+	depends on BOARD_IWILL_DK8S2
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+	depends on BOARD_IWILL_DK8S2

Added: trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,53 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Added: trunk/coreboot-v2/src/mainboard/iwill/dk8x/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/iwill/dk8x/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/iwill/dk8x/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,108 @@
+config BOARD_IWILL_DK8X
+	bool "DK8X"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_940
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_AMD_AMD8111
+	select SOUTHBRIDGE_AMD_AMD8131
+	select SUPERIO_WINBOND_W83627THF
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+	select AP_CODE_IN_CAR
+	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	select WAIT_BEFORE_CPUS_INIT
+
+config MAINBOARD_DIR
+	string
+	default iwill/dk8x
+	depends on BOARD_IWILL_DK8X
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on BOARD_IWILL_DK8X
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x08000
+	depends on BOARD_IWILL_DK8X
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_IWILL_DK8X
+
+config APIC_ID_OFFSET
+	hex
+	default 0x8
+	depends on BOARD_IWILL_DK8X
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_IWILL_DK8X
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_IWILL_DK8X
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "DK8X"
+	depends on BOARD_IWILL_DK8X
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_IWILL_DK8X
+
+config MAX_CPUS
+	int
+	default 4
+	depends on BOARD_IWILL_DK8X
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_IWILL_DK8X
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+	depends on BOARD_IWILL_DK8X
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_IWILL_DK8X
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x6
+	depends on BOARD_IWILL_DK8X
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0xa
+	depends on BOARD_IWILL_DK8X
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_IWILL_DK8X
+
+config SERIAL_CPU_INIT
+	bool
+	default n
+	depends on BOARD_IWILL_DK8X
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+	depends on BOARD_IWILL_DK8X

Added: trunk/coreboot-v2/src/mainboard/iwill/dk8x/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/iwill/dk8x/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/iwill/dk8x/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/.rodata/.rom.data/g' -pi $@
+	perl -e 's/.text/.section .rom.text/g' -pi $@
+
+endif
+

Modified: trunk/coreboot-v2/src/mainboard/olpc/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/olpc/Kconfig	2009-10-09 11:47:21 UTC (rev 4749)
+++ trunk/coreboot-v2/src/mainboard/olpc/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -1 +1,9 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_OLPC
+        
+source "src/mainboard/olpc/rev_a/Kconfig"
+source "src/mainboard/olpc/btest/Kconfig"
+
+endchoice
+

Added: trunk/coreboot-v2/src/mainboard/olpc/btest/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/olpc/btest/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/olpc/btest/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,34 @@
+config BOARD_OLPC_BTEST
+	bool "B-test"
+	select ARCH_X86
+	select CPU_AMD_GX2
+	select NORTHBRIDGE_AMD_GX2
+	select SOUTHBRIDGE_AMD_CS5536
+	select UDELAY_TSC
+	select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+	select HAVE_PIRQ_TABLE
+
+config MAINBOARD_DIR
+	string
+	default olpc/btest
+	depends on BOARD_OLPC_BTEST
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "BTEST"
+	depends on BOARD_OLPC_BTEST
+
+config HAVE_OPTION_TABLE
+	bool
+	default n
+	depends on BOARD_OLPC_BTEST
+
+config IRQ_SLOT_COUNT
+	int
+	default 2
+	depends on BOARD_OLPC_BTEST
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_OLPC_BTEST

Added: trunk/coreboot-v2/src/mainboard/olpc/btest/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/olpc/btest/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/olpc/btest/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,2 @@
+ROMCCFLAGS=-mcpu=p2 -O
+include $(src)/mainboard/Makefile.romccboard.inc

Added: trunk/coreboot-v2/src/mainboard/olpc/rev_a/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/olpc/rev_a/Kconfig	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/Kconfig	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,34 @@
+config BOARD_OLPC_REV_A
+	bool "Rev A"
+	select ARCH_X86
+	select CPU_AMD_GX2
+	select NORTHBRIDGE_AMD_GX2
+	select SOUTHBRIDGE_AMD_CS5536
+	select UDELAY_TSC
+	select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+	select HAVE_PIRQ_TABLE
+
+config MAINBOARD_DIR
+	string
+	default olpc/rev_a
+	depends on BOARD_OLPC_REV_A
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "REV A"
+	depends on BOARD_OLPC_REV_A
+
+config HAVE_OPTION_TABLE
+	bool
+	default n
+	depends on BOARD_OLPC_REV_A
+
+config IRQ_SLOT_COUNT
+	int
+	default 2
+	depends on BOARD_OLPC_REV_A
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_OLPC_REV_A

Added: trunk/coreboot-v2/src/mainboard/olpc/rev_a/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/olpc/rev_a/Makefile.inc	                        (rev 0)
+++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/Makefile.inc	2009-10-09 12:32:52 UTC (rev 4750)
@@ -0,0 +1,2 @@
+ROMCCFLAGS=-mcpu=p2 -O
+include $(src)/mainboard/Makefile.romccboard.inc