Author: uwe Date: 2009-10-27 22:49:33 +0100 (Tue, 27 Oct 2009) New Revision: 4874
Modified: trunk/coreboot-v2/Makefile trunk/coreboot-v2/src/arch/i386/boot/gdt.c trunk/coreboot-v2/src/arch/i386/boot/tables.c trunk/coreboot-v2/src/arch/i386/lib/pci_ops_auto.c trunk/coreboot-v2/src/console/vsprintf.c trunk/coreboot-v2/src/devices/device.c trunk/coreboot-v2/src/devices/pci_device.c trunk/coreboot-v2/src/devices/pciexp_device.c trunk/coreboot-v2/src/include/device/device.h trunk/coreboot-v2/src/include/device/pci.h trunk/coreboot-v2/src/northbridge/intel/i440bx/northbridge.c trunk/coreboot-v2/src/southbridge/intel/i82371eb/i82371eb_ide.c trunk/coreboot-v2/src/southbridge/intel/i82371eb/i82371eb_isa.c trunk/coreboot-v2/util/romcc/romcc.c trunk/coreboot-v2/util/sconfig/config.g trunk/coreboot-v2/util/sconfig/parsedesc.g trunk/coreboot-v2/util/sconfig/yapps2.py trunk/coreboot-v2/util/x86emu/x86.c Log: Improve coreboot build output and eliminate some warnings:
- Add static and const where possible.
- Turn some #warning entries into TODO comments.
- Add missing prototypes.
- Remove unused variables.
- Fix printf arguments or cast them as needed.
- Make sconfig output look better. Drop useless "PARSED THE TREE" output.
- Print "(this may take a while)" while building romcc. Add missing "\n".
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de Acked-by: Myles Watosn mylesgw@gmail.com
Modified: trunk/coreboot-v2/Makefile =================================================================== --- trunk/coreboot-v2/Makefile 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/Makefile 2009-10-27 21:49:33 UTC (rev 4874) @@ -311,7 +311,7 @@ awk '/^#define ([^"])* ([^"])*$$/ {print $$2 " = " $$3 ";";}' $< > $@
$(obj)/romcc: $(top)/util/romcc/romcc.c - @printf " HOSTCC romcc" + @printf " HOSTCC romcc (this may take a while)\n" $(HOSTCC) -g -O2 -Wall -o $@ $<
.PHONY: $(PHONY) prepare prepare2 clean distclean doxygen doxy coreboot
Modified: trunk/coreboot-v2/src/arch/i386/boot/gdt.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/gdt.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/arch/i386/boot/gdt.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -47,11 +47,11 @@ printk(BIOS_ERR, "Error: Could not relocate GDT.\n"); return; } - printk_debug("Moving GDT to %#lx...", newgdt); + printk_debug("Moving GDT to %p...", newgdt); memcpy((void*)newgdt, &gdt, num_gdt_bytes); }
- gdtarg.base = newgdt; + gdtarg.base = (u32)newgdt; gdtarg.limit = num_gdt_bytes - 1;
__asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg));
Modified: trunk/coreboot-v2/src/arch/i386/boot/tables.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/tables.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/arch/i386/boot/tables.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -191,7 +191,7 @@ #define MAX_COREBOOT_TABLE_SIZE (8 * 1024) post_code(0x9d);
- high_table_pointer = cbmem_add(CBMEM_ID_CBTABLE, MAX_COREBOOT_TABLE_SIZE); + high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_CBTABLE, MAX_COREBOOT_TABLE_SIZE);
if (high_table_pointer) { unsigned long new_high_table_pointer; @@ -202,7 +202,7 @@
if (new_high_table_pointer > (high_table_pointer + MAX_COREBOOT_TABLE_SIZE)) - printk_err("%s: coreboot table didn't fit (%llx)\n", + printk_err("%s: coreboot table didn't fit (%lx)\n", __func__, new_high_table_pointer - high_table_pointer);
Modified: trunk/coreboot-v2/src/arch/i386/lib/pci_ops_auto.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/lib/pci_ops_auto.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/arch/i386/lib/pci_ops_auto.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -43,7 +43,7 @@
struct pci_bus_operations *pci_bus_fallback_ops = NULL;
-const struct pci_bus_operations *pci_check_direct(void) +static const struct pci_bus_operations *pci_check_direct(void) { unsigned int tmp;
@@ -86,7 +86,7 @@ const struct pci_bus_operations *pci_remember_direct(void) { if (!pci_bus_fallback_ops) - pci_bus_fallback_ops = pci_check_direct(); + pci_bus_fallback_ops = (struct pci_bus_operations *)pci_check_direct(); return pci_bus_fallback_ops; }
Modified: trunk/coreboot-v2/src/console/vsprintf.c =================================================================== --- trunk/coreboot-v2/src/console/vsprintf.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/console/vsprintf.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -48,6 +48,8 @@ return i; }
+int sprintf(char *buf, const char *fmt, ...); + int sprintf(char *buf, const char *fmt, ...) { va_list args;
Modified: trunk/coreboot-v2/src/devices/device.c =================================================================== --- trunk/coreboot-v2/src/devices/device.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/devices/device.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -671,8 +671,11 @@ device_t vga_pri = 0; static void set_vga_bridge_bits(void) { -#warning "FIXME modify set_vga_bridge so it is less pci centric!" -#warning "This function knows too much about PCI stuff, it should be just a iterator/visitor." + /* + * FIXME: Modify set_vga_bridge so it is less PCI centric! + * This function knows too much about PCI stuff, it should be just + * an iterator/visitor. + */
/* FIXME: Handle the VGA palette snooping. */ struct device *dev, *vga, *vga_onboard, *vga_first, *vga_last;
Modified: trunk/coreboot-v2/src/devices/pci_device.c =================================================================== --- trunk/coreboot-v2/src/devices/pci_device.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/devices/pci_device.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -809,7 +809,7 @@ for (driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) { if ((driver->vendor == dev->vendor) && (driver->device == dev->device)) { - dev->ops = driver->ops; + dev->ops = (struct device_operations *)driver->ops; printk_spew("%s [%04x/%04x] %sops\n", dev_path(dev), driver->vendor, driver->device,
Modified: trunk/coreboot-v2/src/devices/pciexp_device.c =================================================================== --- trunk/coreboot-v2/src/devices/pciexp_device.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/devices/pciexp_device.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -34,8 +34,8 @@ /* error... */ return; } - printk_debug("PCIe: tuning %s\n", dev_path(dev)); -#warning "IMPLEMENT PCI EXPRESS TUNING" + // printk_debug("PCIe: tuning %s\n", dev_path(dev)); + /* TODO: Implement PCI Express tuning. */ }
unsigned int pciexp_scan_bus(struct bus *bus,
Modified: trunk/coreboot-v2/src/include/device/device.h =================================================================== --- trunk/coreboot-v2/src/include/device/device.h 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/include/device/device.h 2009-10-27 21:49:33 UTC (rev 4874) @@ -86,7 +86,7 @@ unsigned int links;
struct device_operations *ops; - struct chip_operations *chip_ops; + const struct chip_operations *chip_ops; void *chip_info; };
Modified: trunk/coreboot-v2/src/include/device/pci.h =================================================================== --- trunk/coreboot-v2/src/include/device/pci.h 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/include/device/pci.h 2009-10-27 21:49:33 UTC (rev 4874) @@ -38,7 +38,7 @@ };
struct pci_driver { - struct device_operations *ops; + const struct device_operations *ops; unsigned short vendor; unsigned short device; };
Modified: trunk/coreboot-v2/src/northbridge/intel/i440bx/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i440bx/northbridge.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/northbridge/intel/i440bx/northbridge.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -85,7 +85,6 @@ pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev->link[0].children; if (mc_dev) { - uint16_t tolm_r; unsigned long tomk, tolmk; int idx;
@@ -98,7 +97,7 @@ /* Convert to KB. */ tomk *= (8 * 1024);
- printk_debug("Setting RAM size to %d MB\n", tomk / 1024); + printk_debug("Setting RAM size to %ld MB\n", tomk / 1024);
/* Compute the top of low memory. */ tolmk = pci_tolm / 1024;
Modified: trunk/coreboot-v2/src/southbridge/intel/i82371eb/i82371eb_ide.c =================================================================== --- trunk/coreboot-v2/src/southbridge/intel/i82371eb/i82371eb_ide.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/southbridge/intel/i82371eb/i82371eb_ide.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -144,7 +144,7 @@ }
/* Intel 82371FB/SB */ -static struct device_operations ide_ops_fb_sb = { +static const struct device_operations ide_ops_fb_sb = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, @@ -155,7 +155,7 @@ };
/* Intel 82371AB/EB/MB */ -static struct device_operations ide_ops_ab_eb_mb = { +static const struct device_operations ide_ops_ab_eb_mb = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources,
Modified: trunk/coreboot-v2/src/southbridge/intel/i82371eb/i82371eb_isa.c =================================================================== --- trunk/coreboot-v2/src/southbridge/intel/i82371eb/i82371eb_isa.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/src/southbridge/intel/i82371eb/i82371eb_isa.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -69,7 +69,7 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; }
-const struct device_operations isa_ops = { +static const struct device_operations isa_ops = { .read_resources = sb_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources,
Modified: trunk/coreboot-v2/util/romcc/romcc.c =================================================================== --- trunk/coreboot-v2/util/romcc/romcc.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/util/romcc/romcc.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -23843,12 +23843,12 @@ long ref; ref = next_label(state); fprintf(fp, ".section "" DATA_SECTION ""\n"); - fprintf(fp, ".balign %ld\n", align_of_in_bytes(state, ins->type)); + fprintf(fp, ".balign %ld\n", (long int)align_of_in_bytes(state, ins->type)); fprintf(fp, "L%s%lu:\n", state->compiler->label_prefix, ref); print_const(state, ins, fp); fill_bytes = bits_to_bytes(size - size_of(state, ins->type)); if (fill_bytes) { - fprintf(fp, ".fill %ld, 1, 0\n", fill_bytes); + fprintf(fp, ".fill %ld, 1, 0\n", (long int)fill_bytes); } fprintf(fp, ".section "" TEXT_SECTION ""\n"); return ref; @@ -24657,7 +24657,7 @@ struct triple *ins, FILE *fp) { fprintf(fp, ".section "" DATA_SECTION ""\n"); - fprintf(fp, ".balign %ld\n", align_of_in_bytes(state, ins->type)); + fprintf(fp, ".balign %ld\n", (long int)align_of_in_bytes(state, ins->type)); fprintf(fp, "L%s%lu:\n", state->compiler->label_prefix, (unsigned long)(ins->u.cval)); print_const(state, MISC(ins, 0), fp);
Modified: trunk/coreboot-v2/util/sconfig/config.g =================================================================== --- trunk/coreboot-v2/util/sconfig/config.g 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/util/sconfig/config.g 2009-10-27 21:49:33 UTC (rev 4874) @@ -886,7 +886,7 @@
def writecode(image): filename = os.path.join(img_dir, "static.c") - print "Creating", filename + print " SCONFIG Creating", os.path.basename(filename) file = safe_open(filename, 'w+') file.write("#include <device/device.h>\n") file.write("#include <device/pci.h>\n") @@ -920,7 +920,7 @@
def writegraph(image): filename = os.path.join(img_dir, "static.dot") - print "Creating", filename + print " SCONFIG Creating", os.path.basename(filename) file = safe_open(filename, 'w+') file.write("digraph devicetree {\n") file.write(" rankdir=LR\n") @@ -1015,7 +1015,6 @@ fp = safe_open(config_file, 'r') if (not parse('devicetree', fp.read())): fatal("Could not parse file") - print "PARSED THE TREE" partstack.pop() img_dir = argv[3]
Modified: trunk/coreboot-v2/util/sconfig/parsedesc.g =================================================================== --- trunk/coreboot-v2/util/sconfig/parsedesc.g 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/util/sconfig/parsedesc.g 2009-10-27 21:49:33 UTC (rev 4874) @@ -126,8 +126,8 @@ if inputfilename[-2:]=='.g': outputfilename = inputfilename[:-2]+'.py' else: raise "Invalid Filename", outputfilename
- print 'Input Grammar:', inputfilename - print 'Output File:', outputfilename + print ' SCONFIG Input Grammar:', os.path.basename(inputfilename) + print ' SCONFIG Output File:', os.path.basename(outputfilename)
DIVIDER = '\n%%\n' # This pattern separates the pre/post parsers preparser, postparser = None, None # Code before and after the parser desc
Modified: trunk/coreboot-v2/util/sconfig/yapps2.py =================================================================== --- trunk/coreboot-v2/util/sconfig/yapps2.py 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/util/sconfig/yapps2.py 2009-10-27 21:49:33 UTC (rev 4874) @@ -18,6 +18,7 @@ from string import * from yappsrt import * import re +import os.path
INDENT = " "*4
@@ -709,8 +710,8 @@ if inputfilename[-2:]=='.g': outputfilename = inputfilename[:-2]+'.py' else: raise "Invalid Filename", outputfilename
- print 'Input Grammar:', inputfilename - print 'Output File:', outputfilename + print ' SCONFIG Input Grammar:', os.path.basename(inputfilename) + print ' SCONFIG Output File:', os.path.basename(outputfilename)
DIVIDER = '\n%%\n' # This pattern separates the pre/post parsers preparser, postparser = None, None # Code before and after the parser desc
Modified: trunk/coreboot-v2/util/x86emu/x86.c =================================================================== --- trunk/coreboot-v2/util/x86emu/x86.c 2009-10-27 16:24:22 UTC (rev 4873) +++ trunk/coreboot-v2/util/x86emu/x86.c 2009-10-27 21:49:33 UTC (rev 4874) @@ -149,6 +149,14 @@ u32 ebp, u32 esp, u32 ebx, u32 edx, u32 ecx, u32 eax, + u32 cs_ip, u16 stackflags); + +int __attribute__((regparm(0))) interrupt_handler(u32 intnumber, + u32 gsfs, u32 dses, + u32 edi, u32 esi, + u32 ebp, u32 esp, + u32 ebx, u32 edx, + u32 ecx, u32 eax, u32 cs_ip, u16 stackflags) { u32 ip;