Re: [coreboot] r877 - in coreboot-v3: arch/x86/amd/model_fxx mainboard/gigabyte/m57sli northbridge/amd/k8 southbridge/nvidia/mcp55
svn@coreboot.org wrote:
Author: rminnich Date: 2008-10-01 09:23:05 +0200 (Wed, 01 Oct 2008) New Revision: 877
Modified: coreboot-v3/arch/x86/amd/model_fxx/init_cpus.c coreboot-v3/mainboard/gigabyte/m57sli/mainboard.h coreboot-v3/northbridge/amd/k8/dqs.c coreboot-v3/northbridge/amd/k8/raminit.c coreboot-v3/southbridge/nvidia/mcp55/ide.c coreboot-v3/southbridge/nvidia/mcp55/lpc.c coreboot-v3/southbridge/nvidia/mcp55/mcp55.c coreboot-v3/southbridge/nvidia/mcp55/pci.c coreboot-v3/southbridge/nvidia/mcp55/pcie.c coreboot-v3/southbridge/nvidia/mcp55/sata.c coreboot-v3/southbridge/nvidia/mcp55/usb2.c Log: m57sli mostly builds again. The stage0 is too large at 24k. We need to figure out if we should just grow stage0. My inclination is to say 'yes'.
What's in stage0 that makes it so big? Is that part really required in stage0?
If so, we need to grow stage0. But we should try to answer that question first.
On Wed, Oct 1, 2008 at 2:32 AM, Stefan Reinauer stepan@coresystems.de wrote:
svn@coreboot.org wrote:
Author: rminnich Date: 2008-10-01 09:23:05 +0200 (Wed, 01 Oct 2008) New Revision: 877
Modified: coreboot-v3/arch/x86/amd/model_fxx/init_cpus.c coreboot-v3/mainboard/gigabyte/m57sli/mainboard.h coreboot-v3/northbridge/amd/k8/dqs.c coreboot-v3/northbridge/amd/k8/raminit.c coreboot-v3/southbridge/nvidia/mcp55/ide.c coreboot-v3/southbridge/nvidia/mcp55/lpc.c coreboot-v3/southbridge/nvidia/mcp55/mcp55.c coreboot-v3/southbridge/nvidia/mcp55/pci.c coreboot-v3/southbridge/nvidia/mcp55/pcie.c coreboot-v3/southbridge/nvidia/mcp55/sata.c coreboot-v3/southbridge/nvidia/mcp55/usb2.c Log: m57sli mostly builds again. The stage0 is too large at 24k. We need to figure out if we should just grow stage0. My inclination is to say 'yes'.
What's in stage0 that makes it so big? Is that part really required in stage0?
hyptertransport setup has to be in stage0. I can't see a way around it.
If so, we need to grow stage0. But we should try to answer that question first.
yes, I was able to hold the line on serengeti but m57sli needs more.
ron
On Wed, Oct 1, 2008 at 7:02 AM, ron minnich rminnich@gmail.com wrote:
What's in stage0 that makes it so big? Is that part really required in stage0?
hyptertransport setup has to be in stage0. I can't see a way around it.
The issue is that the mcp55 needs this function: set_ht_link_buffer_counts_chain and that in turn brings in all of incoherent_ht. I will see if I can seperate these out.
ron
here's a possible resolution.
ron
ron minnich wrote:
m57sli mostly builds again. The stage0 is too large at 24k. We need to figure out if we should just grow stage0. My inclination is to say 'yes'.
What's in stage0 that makes it so big? Is that part really required in stage0?
hyptertransport setup has to be in stage0. I can't see a way around it.
Why? Can't this go to initram?
On Thu, Oct 2, 2008 at 6:34 AM, Stefan Reinauer stepan@coresystems.de wrote:
ron minnich wrote:
m57sli mostly builds again. The stage0 is too large at 24k. We need to figure out if we should just grow stage0. My inclination is to say 'yes'.
What's in stage0 that makes it so big? Is that part really required in stage0?
hyptertransport setup has to be in stage0. I can't see a way around it.
Why? Can't this go to initram?
not for the mcp55.
I am gong to do a quick detour to 690 support, it looks not too bad and the nvidia parts are making my head hurt. I just remembered the special microcode support they need, with the special ldscript Owie.
ron
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ron minnich -
Stefan Reinauer