T60 - what went wrong?
Hi all, I have flashed my T60 according to the instructions on the wiki: The final flashing of the image showed the following error: ... Calibrating delay loop... delay loop is unreliable, trying to continue OK. Found chipset "Intel ICH7M". Enabling flash write... WARNING: SPI Configuration Lockdown activated. OK. Found SST flash chip "SST25VF016B.T60" (2048 kB, SPI) at physical address 0xffe00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom@flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -VE, -Vw), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... spi_block_erase_20 failed during command execution at address 0x0 Reading current flash chip contents... done. spi_block_erase_52 failed during command execution at address 0x0 Reading current flash chip contents... done. Transaction error! spi_block_erase_d8 failed during command execution at address 0x1f0000 Reading current flash chip contents... done. spi_chip_erase_60 failed during command execution Reading current flash chip contents... done. spi_chip_erase_c7 failed during command execution FAILED! Uh oh. Erase/write failed. Checking if anything changed. Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom@flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- Which is quite similar to the error referenced in this mail: http://www.flashrom.org/pipermail/flashrom/2012-April/009124.html So I tried to reboot, but the machine does not come up anymore. I am going to try to flash it, using an external prommer now, but I need to know what went wrong. Is there perhaps a prebuild image for initial flashing available, that I could use? Greets Marcus
On Tue, Mar 04, 2014 at 10:59:28AM +0100, Marcus Moeller wrote:
Hi all,
I have flashed my T60 according to the instructions on the wiki:
There is no support for the T60 in coreboot so I wonder what you were trying to flash? Did you backup you original BIOS? Regards, Björn
Dear Björn,
I have flashed my T60 according to the instructions on the wiki:
There is no support for the T60 in coreboot so I wonder what you were trying to flash? Did you backup you original BIOS?
The wiki says something else: http://www.coreboot.org/Board:lenovo/t60 Do you perhaps mean T61? Greets Marcus
Sorry, nvm my last message. I was somehow thinking of the T61! Regards, Björn
Marcus Moeller wrote:
spi_block_erase_d8 failed during command execution at address 0x1f0000 .. Which is quite similar to the error referenced in this mail:
http://www.flashrom.org/pipermail/flashrom/2012-April/009124.html
Right, the flashing was successful up until the last 64kb, which is expected.
So I tried to reboot, but the machine does not come up anymore. I am going to try to flash it, using an external prommer now, but I need to know what went wrong.
Define does not come up? How have you determined this? What ways of debugging do you have? Note that the screen backlight level defaults to backlight essentially off, after flashing coreboot. This is a really stupid property of the code, which I consider to be a bug. A coreboot built with serial console output, high debug log level and a docking station with null modem cable to another machine is the most reliable method. I assume you've set bucts 1 and that you've duplicated the top 64kb of coreboot.rom, according to the steps on the wiki page. And that you've built coreboot.rom using the crossgcc toolchain rather than the toolchain distribution which is usually broken. Beyond that, the tree could of course also have been broken by someone making changes to code that is relevant for the T60.
Is there perhaps a prebuild image for initial flashing available, that I could use?
Not really no. :\ //Peter
Dear Peter.
spi_block_erase_d8 failed during command execution at address 0x1f0000 .. Which is quite similar to the error referenced in this mail:
http://www.flashrom.org/pipermail/flashrom/2012-April/009124.html
Right, the flashing was successful up until the last 64kb, which is expected.
So I tried to reboot, but the machine does not come up anymore. I am going to try to flash it, using an external prommer now, but I need to know what went wrong.
Define does not come up? How have you determined this? What ways of debugging do you have? Note that the screen backlight level defaults to backlight essentially off, after flashing coreboot. This is a really stupid property of the code, which I consider to be a bug.
A coreboot built with serial console output, high debug log level and a docking station with null modem cable to another machine is the most reliable method.
I assume you've set bucts 1 and that you've duplicated the top 64kb of coreboot.rom, according to the steps on the wiki page.
Yes, of course.
And that you've built coreboot.rom using the crossgcc toolchain rather than the toolchain distribution which is usually broken.
I have build using crossgcc.
Beyond that, the tree could of course also have been broken by someone making changes to code that is relevant for the T60.
Might be the case. With the help of phcoder we have now managed to install coreboot, using an external prommer. We are using only grub payload, no need for Intel option ROM anymore (at least when you plan to boot Linux only). ... Greets Marcus
On Wed, 05 Mar 2014 08:54:29 +0100 Marcus Moeller <marcus.moeller@gmx.ch> wrote:
I assume you've set bucts 1 and that you've duplicated the top 64kb of coreboot.rom, according to the steps on the wiki page.
Yes, of course. If I remember well, removing all power sources, including the CMOS battery can clear the BUCTS register, Peter knows more about that.
Denis.
participants (4)
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Björn Busse -
Denis 'GNUtoo' Carikli -
Marcus Moeller -
Peter Stuge