[commit] r5366 - in trunk/src: mainboard/artecgroup/dbe61 mainboard/intel/eagleheights mainboard/intel/xe7501devkit northbridge/via/vx800 southbridge/intel/i82801cx superio/smsc/lpc47b272
Author: stepan Date: Wed Apr 7 04:30:57 2010 New Revision: 5366 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5366
Log: fix epia-m700 compilation, and remove more warnings. Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Modified: trunk/src/mainboard/artecgroup/dbe61/mainboard.c trunk/src/mainboard/intel/eagleheights/acpi_tables.c trunk/src/mainboard/intel/eagleheights/fadt.c trunk/src/mainboard/intel/eagleheights/mainboard.c trunk/src/mainboard/intel/eagleheights/mptable.c trunk/src/mainboard/intel/xe7501devkit/mptable.c trunk/src/northbridge/via/vx800/vx800.h trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c trunk/src/superio/smsc/lpc47b272/superio.c
Modified: trunk/src/mainboard/artecgroup/dbe61/mainboard.c ============================================================================== --- trunk/src/mainboard/artecgroup/dbe61/mainboard.c Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/mainboard/artecgroup/dbe61/mainboard.c Wed Apr 7 04:30:57 2010 (r5366) @@ -28,7 +28,7 @@ #include "../../../southbridge/amd/cs5536/cs5536.h" #include "chip.h"
-static void init_gpio() +static void init_gpio(void) { msr_t msr; printk(BIOS_DEBUG, "Checking GPIO module...\n");
Modified: trunk/src/mainboard/intel/eagleheights/acpi_tables.c ============================================================================== --- trunk/src/mainboard/intel/eagleheights/acpi_tables.c Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/mainboard/intel/eagleheights/acpi_tables.c Wed Apr 7 04:30:57 2010 (r5366) @@ -91,7 +91,6 @@ { unsigned int irq_start = 0; device_t dev = 0; - struct resource* res = NULL; unsigned char bus_isa;
/* Local Apic */ @@ -141,7 +140,6 @@ unsigned long write_acpi_tables(unsigned long start) { unsigned long current; - int i; acpi_rsdp_t *rsdp; acpi_rsdt_t *rsdt; acpi_hpet_t *hpet;
Modified: trunk/src/mainboard/intel/eagleheights/fadt.c ============================================================================== --- trunk/src/mainboard/intel/eagleheights/fadt.c Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/mainboard/intel/eagleheights/fadt.c Wed Apr 7 04:30:57 2010 (r5366) @@ -115,9 +115,9 @@ fadt->res3 = 0; fadt->res4 = 0; fadt->res5 = 0; - fadt->x_firmware_ctl_l = facs; + fadt->x_firmware_ctl_l = (u32)facs; fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = dsdt; + fadt->x_dsdt_l = (u32)dsdt; fadt->x_dsdt_h = 0;
fadt->x_pm1a_evt_blk.space_id = 1;
Modified: trunk/src/mainboard/intel/eagleheights/mainboard.c ============================================================================== --- trunk/src/mainboard/intel/eagleheights/mainboard.c Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/mainboard/intel/eagleheights/mainboard.c Wed Apr 7 04:30:57 2010 (r5366) @@ -21,10 +21,13 @@
#include <device/device.h> +#include <boot/tables.h> +#include <arch/coreboot_tables.h> #include "chip.h"
int add_mainboard_resources(struct lb_memory *mem) { + return 0; }
struct chip_operations mainboard_ops = {
Modified: trunk/src/mainboard/intel/eagleheights/mptable.c ============================================================================== --- trunk/src/mainboard/intel/eagleheights/mptable.c Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/mainboard/intel/eagleheights/mptable.c Wed Apr 7 04:30:57 2010 (r5366) @@ -75,7 +75,7 @@ dev = dev_find_slot(0, PCI_DEVFN(0x1F,0)); res = find_resource(dev, RCBA); if (!res) { - return; + return NULL; } rcba = res->base;
Modified: trunk/src/mainboard/intel/xe7501devkit/mptable.c ============================================================================== --- trunk/src/mainboard/intel/xe7501devkit/mptable.c Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/mainboard/intel/xe7501devkit/mptable.c Wed Apr 7 04:30:57 2010 (r5366) @@ -69,7 +69,7 @@ smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_B, P64H2_IOAPIC_VERSION, res->base); }
-void xe7501devkit_register_interrupts(struct mp_config_table *mc) +static void xe7501devkit_register_interrupts(struct mp_config_table *mc) { // Chipset PCI bus // Type Trigger | Polarity Bus ID IRQ APIC ID PIN#
Modified: trunk/src/northbridge/via/vx800/vx800.h ============================================================================== --- trunk/src/northbridge/via/vx800/vx800.h Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/northbridge/via/vx800/vx800.h Wed Apr 7 04:30:57 2010 (r5366) @@ -21,6 +21,7 @@ #define VX800_H 1
#ifndef __PRE_RAM__ +#include <device/device.h> static inline void vx800_noop(device_t dev) { }
Modified: trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c Wed Apr 7 04:30:57 2010 (r5366) @@ -23,7 +23,7 @@ #define MAINBOARD_POWER_ON 1
-void i82801cx_enable_ioapic( struct device *dev) +static void i82801cx_enable_ioapic( struct device *dev) { uint32_t dword; volatile uint32_t* ioapic_index = (volatile uint32_t*)0xfec00000; @@ -54,7 +54,7 @@ }
// This is how interrupts are received from the Super I/O chip -void i82801cx_enable_serial_irqs( struct device *dev) +static void i82801cx_enable_serial_irqs( struct device *dev) { // Recognize serial IRQs, continuous mode, frame size 21, 4 clock start frame pulse width pci_write_config8(dev, SERIRQ_CNTL, (1 << 7)|(1 << 6)|((21 - 17) << 2)|(0<< 0)); @@ -69,7 +69,7 @@ // Return Value: None // Description: Route all DMA channels to either PCI or LPC. // -void i82801cx_lpc_route_dma( struct device *dev, uint8_t mask) +static void i82801cx_lpc_route_dma( struct device *dev, uint8_t mask) { uint16_t dmaConfig; int channelIndex; @@ -84,7 +84,7 @@ pci_write_config16(dev, PCI_DMA_CFG, dmaConfig); }
-void i82801cx_rtc_init(struct device *dev) +static void i82801cx_rtc_init(struct device *dev) { uint32_t dword; int rtc_failed; @@ -116,7 +116,7 @@ }
-void i82801cx_1f0_misc(struct device *dev) +static void i82801cx_1f0_misc(struct device *dev) { // Prevent LPC disabling, enable parity errors, and SERR# (System Error) pci_write_config16(dev, PCI_COMMAND, 0x014f);
Modified: trunk/src/superio/smsc/lpc47b272/superio.c ============================================================================== --- trunk/src/superio/smsc/lpc47b272/superio.c Wed Apr 7 04:09:54 2010 (r5365) +++ trunk/src/superio/smsc/lpc47b272/superio.c Wed Apr 7 04:30:57 2010 (r5366) @@ -45,7 +45,7 @@
static void pnp_enter_conf_state(device_t dev); static void pnp_exit_conf_state(device_t dev); -static void dump_pnp_device(device_t dev); +//static void dump_pnp_device(device_t dev);
struct chip_operations superio_smsc_lpc47b272_ops = { CHIP_NAME("SMSC LPC47B272 Super I/O")
-
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