Author: stepan Date: 2006-09-06 18:15:02 +0200 (Wed, 06 Sep 2006) New Revision: 2397
Added: trunk/LinuxBIOSv2/src/superio/ite/it8705f/ trunk/LinuxBIOSv2/src/superio/ite/it8705f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8705f/chip.h trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f.h trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8705f/superio.c Log: Add support for ITE it8705f from Uwe Hermann
Added: trunk/LinuxBIOSv2/src/superio/ite/it8705f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/Config.lb (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/Config.lb 2006-09-06 16:15:02 UTC (rev 2397) @@ -0,0 +1,2 @@ +config chip.h +object superio.o
Added: trunk/LinuxBIOSv2/src/superio/ite/it8705f/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/chip.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/chip.h 2006-09-06 16:15:02 UTC (rev 2397) @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2006 Uwe Hermann uwe@hermann-uwe.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _SUPERIO_ITE_IT8705F +#define _SUPERIO_ITE_IT8705F + +/* This chip doesn't seem to have keyboard and mouse support. */ + +#include <uart8250.h> + +extern struct chip_operations superio_ITE_it8705f_ops; + +struct superio_ITE_it8705f_config { + struct uart8250 com1, com2; +}; + +#endif /* _SUPERIO_ITE_IT8705F */ +
Added: trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f.h 2006-09-06 16:15:02 UTC (rev 2397) @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2006 Uwe Hermann uwe@hermann-uwe.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8705_2.asp */ +/* Status: untested on real hardware, but it compiles. */ +/* Note: This should also work on an IT8705AF, they're almost the same. */ + +/* This chip doesn't seem to have keyboard and mouse support. */ + +#define IT8705F_FDC 0x00 /* Floppy */ +#define IT8705F_SP1 0x01 /* Com1 */ +#define IT8705F_SP2 0x02 /* Com2 */ +#define IT8705F_PP 0x03 /* Parallel port */ +#define IT8705F_EC 0x04 /* Environment controller */ +#define IT8705F_GPIO 0x05 /* GPIO */ +#define IT8705F_GAME 0x06 /* GAME port */ +#define IT8705F_IR 0x07 /* Consumer IR */ +#define IT8705F_MIDI 0x08 /* MIDI port */ +
Added: trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c 2006-09-06 16:15:02 UTC (rev 2397) @@ -0,0 +1,88 @@ +/* + * Copyright (C) 2006 Uwe Hermann uwe@hermann-uwe.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/romcc_io.h> +#include "it8705f.h" + +/* The base address is 0x2e or 0x4e, depending on config bytes. */ +#define SIO_BASE 0x2e +#define SIO_INDEX SIO_BASE +#define SIO_DATA SIO_BASE+1 + +/* Global Configuration Registers. */ +#define IT8705F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ +#define IT8705F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ +#define IT8705F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ + +/* WTF? 0x23 and 0x24 are swapped here (when compared to other IT87xx). */ +#define IT8705F_CONFIG_REG_CLOCKSEL 0x24 /* Clock Selection. */ +#define IT8705F_CONFIG_REG_SWSUSP 0x23 /* Software Suspend, Flash I/F. */ + +#define IT8705F_CONFIGURATION_PORT 0x2e /* Write-only. */ + +/* The content of IT8705F_CONFIG_REG_LDN (index 0x07) must be set to the + * LDN the register belongs to, before you can access the register. */ +static void it8705f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) +{ + outb(IT8705F_CONFIG_REG_LDN, SIO_BASE); + outb(ldn, SIO_DATA); + outb(index, SIO_BASE); + outb(value, SIO_DATA); +} + +/* Enable the peripheral devices on the IT8705F Super IO chip. */ +static void it8705f_enable_serial(device_t dev, unsigned iobase) +{ + /* (1) Enter the configuration state (MB PnP mode). */ + + /* Perform MB PnP setup to put the SIO chip at 0x2e. */ + /* Base address 0x2e: 0x87 0x01 0x55 0x55. */ + /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ + outb(0x87, IT8705F_CONFIGURATION_PORT); + outb(0x01, IT8705F_CONFIGURATION_PORT); + outb(0x55, IT8705F_CONFIGURATION_PORT); + outb(0x55, IT8705F_CONFIGURATION_PORT); + + /* (2) Modify the data of configuration registers. */ + + /* Select the chip to configure (if there's more than one). + * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + * If this register is not written, both chips are configured. */ + /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CONFIGSEL, 0x00); */ + + /* Enable all devices. */ + it8705f_sio_write(IT8705F_FDC, 0x30, 0x1); /* Floppy */ + it8705f_sio_write(IT8705F_SP1, 0x30, 0x1); /* Serial port 1 */ + it8705f_sio_write(IT8705F_SP2, 0x30, 0x1); /* Serial port 2 */ + it8705f_sio_write(IT8705F_PP, 0x30, 0x1); /* Parallel port */ + it8705f_sio_write(IT8705F_EC, 0x30, 0x1); /* Environment controller */ + /* GPIO */ + it8705f_sio_write(IT8705F_GAME, 0x30, 0x1); /* GAME port */ + it8705f_sio_write(IT8705F_IR, 0x30, 0x1); /* Consumer IR */ + it8705f_sio_write(IT8705F_MIDI, 0x30, 0x1); /* MIDI port */ + + /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ + /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CLOCKSEL, 0x00); */ + + /* Clear software suspend mode (clear bit 0). TODO: Needed? */ + /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_SWSUSP, 0x00); */ + + /* (3) Exit the configuration state (MB PnP mode). */ + it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CC, 0x02); +} +
Added: trunk/LinuxBIOSv2/src/superio/ite/it8705f/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/superio.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/superio.c 2006-09-06 16:15:02 UTC (rev 2397) @@ -0,0 +1,86 @@ +/* + * Copyright (C) 2006 Uwe Hermann uwe@hermann-uwe.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This chip doesn't seem to have keyboard and mouse support. */ + +#include <uart8250.h> +#include "chip.h" +#include "it8705f.h" + +static void init(device_t dev) +{ + struct superio_ITE_it8705f_config *conf; + struct resource *res0, *res1; + + if (!dev->enabled) { + return; + } + + conf = dev->chip_info; + + switch (dev->path.u.pnp.device) { + case IT8705F_FDC: /* TODO. */ + break; + case IT8705F_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + case IT8705F_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + case IT8705F_PP: /* TODO. */ + break; + case IT8705F_EC: /* TODO. */ + break; + case IT8705F_GPIO: /* TODO. */ + break; + case IT8705F_GAME: /* TODO. */ + break; + case IT8705F_IR: /* TODO. */ + break; + case IT8705F_MIDI: /* TODO. */ + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +/* TODO: FDC, PP, EC, GPIO, GAME, IR, MIDI. */ +static struct pnp_info pnp_dev_info[] = { + { &ops, IT8705F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8705F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); +} + +struct chip_operations superio_ITE_it8705f_ops = { + CHIP_NAME("ITE it8705f") + .enable_dev = enable_dev, +}; +
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