[LinuxBIOS] r2430 - in trunk/LinuxBIOSv2: src/config src/mainboard/artecgroup/dbe61 src/mainboard/digitallogic/msm800sev src/northbridge/amd/lx src/southbridge/amd/cs5536_lx targets/digitallogic/msm800sev
Author: rminnich Date: 2006-09-20 18:39:30 +0200 (Wed, 20 Sep 2006) New Revision: 2430
Modified: trunk/LinuxBIOSv2/src/config/Options.lb trunk/LinuxBIOSv2/src/mainboard/artecgroup/dbe61/Config.lb trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/Config.lb trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/Options.lb trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/auto.c trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/mainboard.c trunk/LinuxBIOSv2/src/northbridge/amd/lx/grphinit.c trunk/LinuxBIOSv2/src/northbridge/amd/lx/northbridge.c trunk/LinuxBIOSv2/src/southbridge/amd/cs5536_lx/chip.h trunk/LinuxBIOSv2/src/southbridge/amd/cs5536_lx/cs5536.c trunk/LinuxBIOSv2/targets/digitallogic/msm800sev/Config.lb Log: Lots of lx fixes. CLeanup mainly. THings now build Signed-off-by: Ronald G. Minnich
Modified: trunk/LinuxBIOSv2/src/config/Options.lb =================================================================== --- trunk/LinuxBIOSv2/src/config/Options.lb 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/config/Options.lb 2006-09-20 16:39:30 UTC (rev 2430) @@ -904,7 +904,14 @@ comment "allow PCI device get 4G above Region as pref mem" end
+define CONFIG_VIDEO_MB + default none + export used + comment "Integrated graphics with UMA has dynamic setup" +end
+ + ############################################### # Board specific options ###############################################
Modified: trunk/LinuxBIOSv2/src/mainboard/artecgroup/dbe61/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/artecgroup/dbe61/Config.lb 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/mainboard/artecgroup/dbe61/Config.lb 2006-09-20 16:39:30 UTC (rev 2430) @@ -134,10 +134,10 @@
device pci 1.0 on end # Host Bridge
- chip drivers/pci/realmode - device pci 1.1 on end # VGA - register "rom_address" = "0xfffc0000" # at the beginning of 256k - end +# chip drivers/pci/realmode +# device pci 1.1 on end # VGA +# register "rom_address" = "0xfffc0000" # at the beginning of 256k +# end device pci 1.2 off end # AES chip southbridge/amd/cs5536_lx @@ -184,10 +184,10 @@ device pci f.6 off end # UDC controller device pci f.7 off end # OTG controller end - chip drivers/pci/rtl8139 - device pci d.0 on end # Realtek LAN - register "nic_irq" = "10" - end +# chip drivers/pci/rtl8139 +## device pci d.0 on end # Realtek LAN +# register "nic_irq" = "10" +# end end end
Modified: trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/Config.lb 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/Config.lb 2006-09-20 16:39:30 UTC (rev 2430) @@ -126,7 +126,7 @@ chip northbridge/amd/lx # they keep changing this. 0:f.0 5c.w to see where it is register "irqmap" = "0xbaba" - register "setupflash" = "1" + register "setupflash" = "0" device apic_cluster 0 on chip cpu/amd/model_lx device apic 0 on end @@ -136,21 +136,44 @@ device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536_lx - register "enable_gpio0_inta" = "1" - register "enable_ide_nand_flash" = "0" - register "enable_uarta" = "1" - register "audio_irq" = "11" - register "usbf4_irq" = "11" - register "usbf11_irq" = "11" - register "usbf6_irq" = "11" - register "usbf7_irq" = "11" - device pci d.0 on end # EEPRO 1000 + register "isa_irq" = "0" + #register "flash_irq" = "14" + + ## IDE IRQ + register "enable_ide_irq" = "0" + + register "audio_irq" = "5" + register "usb_irq" = "7" + + register "uart0_irq" = "0" + register "uart1_irq" = "4" + + ## PCI INTA ... INTD and their GPIO pins + ## int==0: disable + register "pci_int[0]" = "0" + register "pci_int[1]" = "10" + register "pci_int[2]" = "0" + register "pci_int[3]" = "0" + register "pci_int_pin[0]" = "0" + register "pci_int_pin[1]" = "7" + register "pci_int_pin[2]" = "0" + register "pci_int_pin[3]" = "0" + + + # Keyboard Emulation Logic IRQs + # Enable keyboard IRQ2 + register "enable_kel_keyb_irq" = "0" + # Enable mouse IRQ12 + register "enable_kel_mouse_irq" = "0" + # Configure KEL Emulation IRQ, 0 to disable + register "kel_emul_irq" = "0" + device pci f.0 on end # ISA Bridge - device pci f.2 on end # IDE Controller + device pci f.1 on end # Flash controller + device pci f.2 off end # IDE controller device pci f.3 on end # Audio device pci f.4 on end # OHCI device pci f.5 on end # EHCI - register "unwanted_vpci[0]" = "0" # End of list has a zero end end end
Modified: trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/Options.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/Options.lb 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/Options.lb 2006-09-20 16:39:30 UTC (rev 2430) @@ -40,14 +40,21 @@ uses TTYS0_LCS uses CONFIG_UDELAY_TSC uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +uses CONFIG_CONSOLE_VGA +uses CONFIG_PCI_ROM_RUN +uses CONFIG_VIDEO_MB
+default CONFIG_VIDEO_MB=8 + + ## ROM_SIZE is the size of boot ROM that this board will use. -default ROM_SIZE = 256*1024 +default ROM_SIZE = 1024*1024
### ### Build options ### - +#default CONFIG_CONSOLE_VGA=1 +#default CONFIG_PCI_ROM_RUN=0 ## ## Build code for the fallback boot ##
Modified: trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/auto.c 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/auto.c 2006-09-20 16:39:30 UTC (rev 2430) @@ -39,22 +39,6 @@
- -/* sdram parameters for OLPC: - row address = 13 - col address = 9 - banks = 4 - dimm0size=128MB - d0_MB=1 (module banks) - d0_cb=4 (component banks) - do_psz=4KB (page size) - Trc=10 (clocks) (ref2act) - Tras=7 (act2pre) - Trcd=3 (act2cmd) - Trp=3 (pre2act) - Trrd=2 (act2act) - Tref=17.8ms - */ static void sdram_set_spd_registers(const struct mem_controller *ctrl) { /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) * @@ -66,49 +50,9 @@ unsigned char module_banks, val;
-#if 0 //GX3 - msr = rdmsr(MC_CF07_DATA); - - /* get module banks (sides) per dimm, SPD byte 5 */ - module_banks = 1; - module_banks >>= 1; - msr.hi &= ~(1 << CF07_UPPER_D0_MB_SHIFT); - msr.hi |= (module_banks << CF07_UPPER_D0_MB_SHIFT); - - /* get component banks per module bank, SPD byte 17 */ - val = 4; - val >>= 2; - msr.hi &= ~(0x1 << CF07_UPPER_D0_CB_SHIFT); - msr.hi |= (val << CF07_UPPER_D0_CB_SHIFT); - - /* get the module bank density, SPD byte 31 */ - /* this is multiples of 8 MB */ - /* actually it is 2^x*4, where x is the value you put in */ - /* for OLPC, set default size */ - /* dimm size - hardcoded 128Mb */ - val = 5; - msr.hi &= ~(0xf << CF07_UPPER_D0_SZ_SHIFT); - msr.hi |= (val << CF07_UPPER_D0_SZ_SHIFT); - - /* page size = 2^col address */ - val = 2; /* 4096 bytes */ - msr.hi &= ~(0x7 << CF07_UPPER_D0_PSZ_SHIFT); - msr.hi |= (val << CF07_UPPER_D0_PSZ_SHIFT); - - print_debug("computed msr.hi "); - print_debug_hex32(msr.hi); - print_debug("\r\n"); - - /* this is a standard value, DOES NOT PROBABLY MATCH FROM ABOVE */ - /* well, it may be close. It's about 200,000 ticks */ - msr.lo = 0x00003000; - wrmsr(MC_CF07_DATA, msr); - -#endif + msr.hi = 0x10075012; + msr.lo = 0x00000040; - msr.hi = 0x00005012; - msr.lo = 0x05000040; - wrmsr(MC_CF07_DATA, msr); //GX3
/* timing and mode ... */ @@ -140,16 +84,16 @@ #include "northbridge/amd/lx/raminit.c" #include "sdram/generic_sdram.c"
-#define PLLMSRhi 0x00001490 -#define PLLMSRlo 0x02000030 -#define PLLMSRlo1 ((0xde << 16) | (1 << 26) | (1 << 24)) -#define PLLMSRlo2 ((1<<14) |(1<<13) | (1<<0)) +/* CPU and GLIU mult/div */ +#define PLLMSRhi 0x0000039C +/* Hold Count - how long we will sit in reset */ +#define PLLMSRlo 0x00DE0000 + #include "northbridge/amd/lx/pll_reset.c" #include "cpu/amd/model_lx/cpureginit.c" #include "cpu/amd/model_lx/syspreinit.c" static void msr_init(void) { - __builtin_wrmsr(0x1808, 0x10f3bf00, 0x22fffc02);
__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000); __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
Modified: trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/mainboard.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/mainboard.c 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/mainboard/digitallogic/msm800sev/mainboard.c 2006-09-20 16:39:30 UTC (rev 2430) @@ -4,9 +4,25 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <arch/io.h> +#include <cpu/x86/msr.h> +#include <cpu/amd/lxdef.h> #include "chip.h"
+#define DIVIL_LBAR_GPIO 0x5140000c +static void init_gpio() + { + msr_t msr; + printk_debug("Initializing GPIO module...\n");
+ // initialize the GPIO LBAR + msr.lo = GPIO_BASE; + msr.hi = 0x0000f001; + wrmsr(DIVIL_LBAR_GPIO, msr); + msr = rdmsr(DIVIL_LBAR_GPIO); + printk_debug("DIVIL_LBAR_GPIO set to 0x%08x 0x%08x\n", msr.hi, msr.lo); +} + + static void init(struct device *dev) { unsigned bus = 0; @@ -17,6 +33,7 @@
printk_debug("DIGITALLOGIC MSM800SSEV ENTER %s\n", __FUNCTION__);
+#if 0 // FIXME: do we need to initialize USB OHCI this way? printk_debug("%s (%x,%x) set USB PCI interrupt line to %d\n", __FUNCTION__, bus, devUsb, irqUsb); @@ -33,6 +50,8 @@ nic = dev_find_slot(bus, devNic); if (!nic) printk_err("Could not find USB\n"); else pci_write_config8(nic, PCI_INTERRUPT_LINE, irqNic); +#endif + init_gpio();
printk_debug("DIGITALLOGIC MSM800SSEV EXIT %s\n", __FUNCTION__); }
Modified: trunk/LinuxBIOSv2/src/northbridge/amd/lx/grphinit.c =================================================================== --- trunk/LinuxBIOSv2/src/northbridge/amd/lx/grphinit.c 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/northbridge/amd/lx/grphinit.c 2006-09-20 16:39:30 UTC (rev 2430) @@ -47,7 +47,7 @@ * External Monochrome Card Support(12) 0, NO * Controller Priority Select(11) 1, Primary * Display Select(10:8) 0x0, CRT - * Graphics Memory Size(7:1) VIDEO_MB >> 1, + * Graphics Memory Size(7:1) CONFIG_VIDEO_MB >> 1, * defined in mainboard/../Options.lb * PLL Reference Clock Bypass(0) 0, Default */ @@ -57,7 +57,7 @@ * so we can add the real value in megabytes */ - wData = 0x0800 | (VIDEO_MB & VG_MEM_MASK); + wData = 0x0800 | (CONFIG_VIDEO_MB & VG_MEM_MASK); vrWrite(wClassIndex, wData); res = vrRead(wClassIndex);
Modified: trunk/LinuxBIOSv2/src/northbridge/amd/lx/northbridge.c =================================================================== --- trunk/LinuxBIOSv2/src/northbridge/amd/lx/northbridge.c 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/northbridge/amd/lx/northbridge.c 2006-09-20 16:39:30 UTC (rev 2430) @@ -521,7 +521,7 @@ /* Report the memory regions */ idx = 10; ram_resource(dev, idx++, 0, 640); - ram_resource(dev, idx++, 1024, ((sizeram() - VIDEO_MB) * 1024) - SMM_SIZE - 1024); + ram_resource(dev, idx++, 1024, ((sizeram() - CONFIG_VIDEO_MB) * 1024) - SMM_SIZE - 1024); }
assign_resources(&dev->link[0]);
Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536_lx/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536_lx/chip.h 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536_lx/chip.h 2006-09-20 16:39:30 UTC (rev 2430) @@ -1,11 +1,11 @@ -#ifndef _SOUTHBRIDGE_AMD_CS5536 -#define _SOUTHBRIDGE_AMD_CS5536 +#ifndef _SOUTHBRIDGE_AMD_CS5536_LX +#define _SOUTHBRIDGE_AMD_CS5536_LX
#define MAX_UNWANTED_VPCI 10 /* increase if needed */
-extern struct chip_operations southbridge_amd_cs5536_ops; +extern struct chip_operations southbridge_amd_cs5536_lx_ops;
-struct southbridge_amd_cs5536_config { +struct southbridge_amd_cs5536_lx_config { /* interrupt enable for LPC bus */ int lpc_serirq_enable; /* how to enable, e.g. 0x80 */ int lpc_irq; /* what to enable, e.g. 0x18 */ @@ -50,4 +50,4 @@ unsigned long unwanted_vpci[MAX_UNWANTED_VPCI]; };
-#endif /* _SOUTHBRIDGE_AMD_CS5536 */ +#endif /* _SOUTHBRIDGE_AMD_CS5536_LX */
Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536_lx/cs5536.c =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536_lx/cs5536.c 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536_lx/cs5536.c 2006-09-20 16:39:30 UTC (rev 2430) @@ -158,7 +158,7 @@
static void southbridge_init(struct device *dev) { - struct southbridge_amd_cs5536_config *sb = (struct southbridge_amd_cs5536_config *)dev->chip_info; + struct southbridge_amd_cs5536_lx_config *sb = (struct southbridge_amd_cs5536_lx_config *)dev->chip_info; msr_t msr; int i;
@@ -316,14 +316,14 @@ .scan_bus = scan_static_bus, };
-static struct pci_driver cs5536_pci_driver __pci_driver = { +static struct pci_driver cs5536_lx_pci_driver __pci_driver = { .ops = &southbridge_ops, .vendor = PCI_VENDOR_ID_AMD, .device = PCI_DEVICE_ID_AMD_CS5536_ISA };
-struct chip_operations southbridge_amd_cs5536_ops = { - CHIP_NAME("AMD cs5536") +struct chip_operations southbridge_amd_cs5536_lx_ops = { + CHIP_NAME("AMD cs5536 (LX)") /* This only called when this device is listed in the * static device tree. */
Modified: trunk/LinuxBIOSv2/targets/digitallogic/msm800sev/Config.lb =================================================================== --- trunk/LinuxBIOSv2/targets/digitallogic/msm800sev/Config.lb 2006-09-20 16:32:59 UTC (rev 2429) +++ trunk/LinuxBIOSv2/targets/digitallogic/msm800sev/Config.lb 2006-09-20 16:39:30 UTC (rev 2430) @@ -8,7 +8,7 @@ ## ROM_SIZE is the total number of bytes allocated for LinuxBIOS use ## (normal AND fallback images and payloads). ## leave 64k for vsa and 32K for video ROM -option ROM_SIZE = 1024*256 - 64*1024 - 32 * 1024 +option ROM_SIZE = 1024*1024 - 64*1024 - 32 * 1024
## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a LinuxBIOS image, ## not including any payload.
-
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