Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2791
-gerrit
commit 099bf93a146866edb3953390a90d15b69b345400 Author: Aaron Durbin adurbin@chromium.org Date: Fri Feb 8 17:15:53 2013 -0600
coreboot: introduce romstage_handoff structure
The romstage_handoff structure is intended to be a way for romstage and ramstage to communicate with one another instead of using sideband signals such as stuffing magic values in pci config or memory scratch space. Initially this structure just contains a single region that indicates to ramstage that it should reserve a memory region used by the romstage. Ramstage looks for a romstage_handoff structure in cbmem with an id of CBMEM_ID_ROMSTAGE_INFO. If found, it will honor reserving the region defined in the romstage_handoff structure.
Change-Id: I9274ea5124e9bd6584f6977d8280b7e9292251f0 Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/arch/x86/boot/coreboot_table.c | 20 ++++++++++++++++++++ src/include/romstage_handoff.h | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+)
diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c index ab0f7ef..463f723 100644 --- a/src/arch/x86/boot/coreboot_table.c +++ b/src/arch/x86/boot/coreboot_table.c @@ -31,6 +31,7 @@ #include <stdlib.h> #include <cbfs.h> #include <cbmem.h> +#include <romstage_handoff.h> #if CONFIG_USE_OPTION_TABLE #include <option_table.h> #endif @@ -591,6 +592,23 @@ static void add_lb_reserved(struct lb_memory *mem) lb_add_rsvd_range, mem); }
+static void add_romstage_resources(struct lb_memory *mem) +{ + struct romstage_handoff *handoff; + + /* Reserve memory requested to be reserved from romstage. */ + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff == NULL) + return; + + if (handoff->reserve_size == 0) + return; + + lb_add_memory_range(mem, LB_MEM_RESERVED, handoff->reserve_base, + handoff->reserve_size); +} + unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end) @@ -658,6 +676,8 @@ unsigned long write_coreboot_table( /* Add reserved regions */ add_lb_reserved(mem);
+ add_romstage_resources(mem); + lb_dump_memory_ranges(mem);
/* Note: diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h new file mode 100644 index 0000000..0cadfb5 --- /dev/null +++ b/src/include/romstage_handoff.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 ChromeOS Authors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#ifndef ROMSTAGE_HANDOFF_H +#define ROMSTAGE_HANDOFF_H + +#include <stdint.h> + +/* It is the chipset's responsbility for maintaining the integrity of this + * structure in CBMEM. For instance, if chipset code adds this structure + * using the CBMEM_ID_ROMSTAGE_INFO id it needs to ensure it doesn't clobber + * fields it doesn't own. */ +struct romstage_handoff { + /* This indicates to the ramstage to reserve a chunk of memory. */ + uint32_t reserve_base; + uint32_t reserve_size; +}; + +#endif /* ROMSTAGE_HANDOFF_H */ +