dbm690t initial attempt which fails; not signed off

[ron minnich]

I could use some help here; what am I doing wrong? attached.

ron

[Peter Stuge]

ron minnich wrote:
> I could use some help here; what am I doing wrong? attached.
> This is initial support for dbm690t.
>
> It does not build, in fact if fails as follows: 
> Makefile:115: mainboard//Makefile: No such file or directory
> make: *** No rule to make target `mainboard//Makefile'.  Stop.
>
> Help!

..
> +++ mainboard/amd/Kconfig	(working copy)
> @@ -35,6 +35,19 @@
>    help
>      AMD DB800 Geode LX development board.
>
> +config BOARD_AMD_DBM690T
> bool "dbm690t"
> select ARCH_X86
> select OPTION_TABLE
> select CPU_AMD_K8
> select NORTHBRIDGE_AMD_K8
> select SOUTHBRIDGE_AMD_SB600
> select SOUTHBRIDGE_AMD_RS690
> select SUPERIO_ITE/IT8712F
> select IOAPIC
> help
>  AMD dbm690t development board.
>
> config BOARD_AMD_NORWICH
>    bool "Norwich"
>    select ARCH_X86

Add this after endchoice:

config MAINBOARD_DIR
        string
        default amd/dbm690t
        depends BOARD_AMD_DBM690T

//Peter

[ron minnich]

On Fri, Oct 3, 2008 at 9:59 AM, Peter Stuge  wrote:
> Add this after endchoice:
>
> config MAINBOARD_DIR
>        string
>        default amd/dbm690t
>        depends BOARD_AMD_DBM690T

ah, right, thanks.

I don't know how I missed that.

OK, now later this weekend I get to track all the compile errors :-)

ron

[Marc Jones]

ron minnich wrote:
> I could use some help here; what am I doing wrong? attached.
>
> ron
> +/* this code is very mainboard dependent, sadly. */
> +/**
> call the amd 8111 memreset_setup_amd8111 function to jam the GPIOs to reset memory.
> */
>
> +static void memreset_setup(void)
> +{
> +}

fix comment?
> static const u16 spd_addr[] = {
> //first node
> RC0 | DIMM0, RC0 | DIMM2, 0, 0,
> RC0 | DIMM1, RC0 | DIMM3, 0, 0,
>
> +#if CONFIG_MAX_PHYSICAL_CPUS > 1
> //second node
> RC1 | DIMM0, RC1 | DIMM2, RC1 | DIMM4, RC1 | DIMM6,
> RC1 | DIMM1, RC1 | DIMM3, RC1 | DIMM5, RC1 | DIMM7,
>
> +#endif
> +#if CONFIG_MAX_PHYSICAL_CPUS > 2
> // third node
> RC2 | DIMM0, RC2 | DIMM2, 0, 0,
> RC2 | DIMM1, RC2 | DIMM3, 0, 0,
> // four node
> RC3 | DIMM0, RC3 | DIMM2, RC3 | DIMM4, RC3 | DIMM6,
> RC3 | DIMM1, RC3 | DIMM3, RC3 | DIMM5, RC3 | DIMM7,
>
> +#endif

This can be cleaned up for the dbm690. There are only 2 dimms and one 
physical CPU.
> +#if 0
> //it your CPU min fid is 1G, you can change HT to 1G and FID to max one time.
> needs_reset = optimize_link_coherent_ht();
> needs_reset |= optimize_link_incoherent_ht(sysinfo);
>
> +#endif

remove this?, it is already in the code below.
> static const struct rmap register_values[]

This is large and should be in a .h since it has been moved out of 
resourcemap.c?
> +void hardware_stage1(void)
> +{
> +/*
> void enumerate_ht_chain(void);
> int max;
> printk(BIOS_ERR, "Stage1: enable rom ...\n");
> max = ARRAY_SIZE(register_values);
> setup_resource_map(register_values, max);

I don't understand setting up the resource map before memory is inited. 
All memory and IO should be going to the subtractive port (southbridge).
> mainboard_name = "Serengeti";

:)
> Index: mainboard/amd/dbm690t/cmos.layout

It would be nice if cmos was handled better than the same layout file in 
every mainboard. It should be fairly easy to make this better and v3 is 
the place to do it.

Marc