[LinuxBIOS] r2477 - in trunk/LinuxBIOSv2/src: mainboard/dell/s1850 mainboard/intel/jarrell mainboard/supermicro/x6dai_g mainboard/supermicro/x6dhe_g mainboard/supermicro/x6dhe_g2 mainboard/supermicro/x6dhr_ig mainboard/supermicro/x6dhr_ig2 northbridge/intel/E7520 northbridge/intel/E7525

Author: uwe
Date: 2006-10-27 13:38:22 +0200 (Fri, 27 Oct 2006)
New Revision: 2477

Modified:
   trunk/LinuxBIOSv2/src/mainboard/dell/s1850/Config.lb
   trunk/LinuxBIOSv2/src/mainboard/dell/s1850/auto.c
   trunk/LinuxBIOSv2/src/mainboard/dell/s1850/failover.c
   trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/Config.lb
   trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/auto.c
   trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/failover.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/Config.lb
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/auto.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/failover.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/Config.lb
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/auto.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/failover.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/Config.lb
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/auto.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/auto.updated.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/failover.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/Config.lb
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/auto.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/failover.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/Config.lb
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/auto.c
   trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/failover.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7520/chip.h
   trunk/LinuxBIOSv2/src/northbridge/intel/E7520/northbridge.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_porta.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_porta1.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_portb.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_portc.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7525/chip.h
   trunk/LinuxBIOSv2/src/northbridge/intel/E7525/northbridge.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_porta.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_porta1.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_portb.c
   trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_portc.c
Log:
Rename E7520 to e7520, and E7525 to e7525 in the code. The next commit
will then rename the E7520 and E7525 directories respectively.

Signed-off-by: Uwe Hermann 
Acked-by: Stefan Reinauer

Modified: trunk/LinuxBIOSv2/src/mainboard/dell/s1850/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/dell/s1850/Config.lb	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/dell/s1850/Config.lb	2006-10-27 11:38:22 UTC (rev 2477)
@@ -132,7 +132,7 @@
 dir /pc80
 config chip.h

-chip northbridge/intel/E7520 # mch
+chip northbridge/intel/e7520 # mch
    device pci_domain 0 on 
    	chip southbridge/intel/i82801er # i82801er
    		# USB ports

Modified: trunk/LinuxBIOSv2/src/mainboard/dell/s1850/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/dell/s1850/auto.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/dell/s1850/auto.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -11,7 +11,7 @@
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
-#include "northbridge/intel/E7520/raminit.h"
+#include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -20,7 +20,7 @@
 #include "reset.c"
 #include "s2850_fixups.c"
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"

@@ -69,7 +69,7 @@
    return smbus_read_byte(device, address);
 }

-#include "northbridge/intel/E7520/raminit.c"
+#include "northbridge/intel/e7520/raminit.c"
 #include "sdram/generic_sdram.c"

Modified: trunk/LinuxBIOSv2/src/mainboard/dell/s1850/failover.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/dell/s1850/failover.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/dell/s1850/failover.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -9,7 +9,7 @@
 #include "arch/i386/lib/console.c"
 #include "pc80/mc146818rtc_early.c"
 #include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"

static unsigned long main(unsigned long bist)
 {

Modified: trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/Config.lb	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/Config.lb	2006-10-27 11:38:22 UTC (rev 2477)
@@ -132,7 +132,7 @@
 dir /pc80
 config chip.h

-chip northbridge/intel/E7520
+chip northbridge/intel/e7520
    device pci_domain 0 on 
    	device pci 00.0 on end
    	device pci 00.1 on end

Modified: trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/auto.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/auto.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -11,7 +11,7 @@
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
-#include "northbridge/intel/E7520/raminit.h"
+#include "northbridge/intel/e7520/raminit.h"
 #include "superio/nsc/pc87427/pc87427.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -20,7 +20,7 @@
 #include "power_reset_check.c"
 #include "jarrell_fixups.c"
 #include "superio/nsc/pc87427/pc87427_early_init.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"

#define SIO_GPIO_BASE 0x680
@@ -47,7 +47,7 @@
    return smbus_read_byte(device, address);
 }

-#include "northbridge/intel/E7520/raminit.c"
+#include "northbridge/intel/e7520/raminit.c"
 #include "sdram/generic_sdram.c"
 #include "debug.c"

Modified: trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/failover.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/failover.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/intel/jarrell/failover.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -9,7 +9,7 @@
 #include "arch/i386/lib/console.c"
 #include "pc80/mc146818rtc_early.c"
 #include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"

static unsigned long main(unsigned long bist)
 {

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/Config.lb	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/Config.lb	2006-10-27 11:38:22 UTC (rev 2477)
@@ -132,7 +132,7 @@
 dir /pc80
 config chip.h

-chip northbridge/intel/E7525 # mch
+chip northbridge/intel/e7525 # mch
    device pci_domain 0 on
    	chip southbridge/intel/esb6300  # esb6300 
    		register "pirq_a_d" = "0x0b0a0a05"

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/auto.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/auto.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -11,7 +11,7 @@
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/esb6300/esb6300_early_smbus.c"
-#include "northbridge/intel/E7525/raminit.h"
+#include "northbridge/intel/e7525/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -19,7 +19,7 @@
 #include "watchdog.c"
 #include "reset.c"
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
-#include "northbridge/intel/E7525/memory_initialized.c"
+#include "northbridge/intel/e7525/memory_initialized.c"
 #include "cpu/x86/bist.h"

@@ -50,7 +50,7 @@
    return smbus_read_byte(device, address);
 }

-#include "northbridge/intel/E7525/raminit.c"
+#include "northbridge/intel/e7525/raminit.c"
 #include "sdram/generic_sdram.c"

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/failover.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/failover.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dai_g/failover.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -9,7 +9,7 @@
 #include "arch/i386/lib/console.c"
 #include "pc80/mc146818rtc_early.c"
 #include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/E7525/memory_initialized.c"
+#include "northbridge/intel/e7525/memory_initialized.c"

static unsigned long main(unsigned long bist)
 {

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/Config.lb	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/Config.lb	2006-10-27 11:38:22 UTC (rev 2477)
@@ -132,7 +132,7 @@
 dir /pc80
 config chip.h

-chip northbridge/intel/E7520  # MCH
+chip northbridge/intel/e7520  # MCH
    chip drivers/generic/debug  # DEBUGGING
    	device pnp 00.0 on end
    	device pnp 00.1 off end

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/auto.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/auto.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -11,7 +11,7 @@
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/esb6300/esb6300_early_smbus.c"
-#include "northbridge/intel/E7520/raminit.h"
+#include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -20,7 +20,7 @@
 #include "reset.c"
 #include "x6dhe_g_fixups.c"
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"

@@ -68,7 +68,7 @@
    return smbus_read_byte(device, address);
 }

-#include "northbridge/intel/E7520/raminit.c"
+#include "northbridge/intel/e7520/raminit.c"
 #include "sdram/generic_sdram.c"

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/failover.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/failover.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g/failover.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -9,7 +9,7 @@
 #include "arch/i386/lib/console.c"
 #include "pc80/mc146818rtc_early.c"
 #include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"

static unsigned long main(unsigned long bist)
 {

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/Config.lb	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/Config.lb	2006-10-27 11:38:22 UTC (rev 2477)
@@ -132,7 +132,7 @@
 dir /pc80
 config chip.h

-chip northbridge/intel/E7520  # MCH
+chip northbridge/intel/e7520  # MCH
    chip drivers/generic/debug  # DEBUGGING
    	device pnp 00.0 off end
    	device pnp 00.1 off end

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/auto.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/auto.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -11,7 +11,7 @@
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
-#include "northbridge/intel/E7520/raminit.h"
+#include "northbridge/intel/e7520/raminit.h"
 #include "superio/nsc/pc87427/pc87427.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -20,7 +20,7 @@
 #include "reset.c"
 #include "x6dhe_g2_fixups.c"
 #include "superio/nsc/pc87427/pc87427_early_init.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"

@@ -68,7 +68,7 @@
    return smbus_read_byte(device, address);
 }

-#include "northbridge/intel/E7520/raminit.c"
+#include "northbridge/intel/e7520/raminit.c"
 #include "sdram/generic_sdram.c"

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/auto.updated.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/auto.updated.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/auto.updated.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -11,7 +11,7 @@
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/esb6300/esb6300_early_smbus.c"
-#include "northbridge/intel/E7520/raminit.h"
+#include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -20,7 +20,7 @@
 #include "reset.c"
 #include "x6dhe_g_fixups.c"
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"

@@ -68,7 +68,7 @@
    return smbus_read_byte(device, address);
 }

-#include "northbridge/intel/E7520/raminit.c"
+#include "northbridge/intel/e7520/raminit.c"
 #include "sdram/generic_sdram.c"

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/failover.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/failover.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhe_g2/failover.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -9,7 +9,7 @@
 #include "arch/i386/lib/console.c"
 #include "pc80/mc146818rtc_early.c"
 #include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"

static unsigned long main(unsigned long bist)
 {

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/Config.lb	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/Config.lb	2006-10-27 11:38:22 UTC (rev 2477)
@@ -132,7 +132,7 @@
 dir /pc80
 config chip.h

-chip northbridge/intel/E7520 # mch
+chip northbridge/intel/e7520 # mch
    device pci_domain 0 on 
    	chip southbridge/intel/i82801er # i82801er
    		# USB ports

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/auto.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/auto.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -11,7 +11,7 @@
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
-#include "northbridge/intel/E7520/raminit.h"
+#include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -20,7 +20,7 @@
 #include "reset.c"
 #include "x6dhr_fixups.c"
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"

@@ -69,7 +69,7 @@
    return smbus_read_byte(device, address);
 }

-#include "northbridge/intel/E7520/raminit.c"
+#include "northbridge/intel/e7520/raminit.c"
 #include "sdram/generic_sdram.c"

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/failover.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/failover.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig/failover.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -9,7 +9,7 @@
 #include "arch/i386/lib/console.c"
 #include "pc80/mc146818rtc_early.c"
 #include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"

static unsigned long main(unsigned long bist)
 {

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/Config.lb	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/Config.lb	2006-10-27 11:38:22 UTC (rev 2477)
@@ -132,7 +132,7 @@
 dir /pc80
 config chip.h

-chip northbridge/intel/E7520 # mch
+chip northbridge/intel/e7520 # mch
    device pci_domain 0 on 
    	chip southbridge/intel/i82801er # i82801er
    		# USB ports

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/auto.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/auto.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -11,7 +11,7 @@
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
-#include "northbridge/intel/E7520/raminit.h"
+#include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -20,7 +20,7 @@
 #include "reset.c"
 #include "x6dhr2_fixups.c"
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"

@@ -69,7 +69,7 @@
    return smbus_read_byte(device, address);
 }

-#include "northbridge/intel/E7520/raminit.c"
+#include "northbridge/intel/e7520/raminit.c"
 #include "sdram/generic_sdram.c"

Modified: trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/failover.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/failover.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/mainboard/supermicro/x6dhr_ig2/failover.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -9,7 +9,7 @@
 #include "arch/i386/lib/console.c"
 #include "pc80/mc146818rtc_early.c"
 #include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/E7520/memory_initialized.c"
+#include "northbridge/intel/e7520/memory_initialized.c"

static unsigned long main(unsigned long bist)
 {

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7520/chip.h
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7520/chip.h	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7520/chip.h	2006-10-27 11:38:22 UTC (rev 2477)
@@ -1,7 +1,7 @@
-struct northbridge_intel_E7520_config
+struct northbridge_intel_e7520_config
 {
         /* Interrupt line connect */
         unsigned int intrline;
 };

-extern struct chip_operations northbridge_intel_E7520_ops;
+extern struct chip_operations northbridge_intel_e7520_ops;

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7520/northbridge.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7520/northbridge.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7520/northbridge.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -264,7 +264,7 @@
    }
 }

-struct chip_operations northbridge_intel_E7520_ops = {
+struct chip_operations northbridge_intel_e7520_ops = {
    CHIP_NAME("Intel E7520 Northbridge")
    .enable_dev = enable_dev,
 };

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_porta.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_porta.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_porta.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -8,7 +8,7 @@
 #include "chip.h"
 #include <part/hard_reset.h>

-typedef struct northbridge_intel_E7520_config config_t;
+typedef struct northbridge_intel_e7520_config config_t;

static void pcie_init(struct device *dev)
 {

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_porta1.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_porta1.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_porta1.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -7,7 +7,7 @@
 #include <arch/io.h>
 #include "chip.h"

-typedef struct northbridge_intel_E7520_config config_t;
+typedef struct northbridge_intel_e7520_config config_t;

static void pcie_init(struct device *dev)
 {

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_portb.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_portb.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_portb.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -8,7 +8,7 @@
 #include <arch/io.h>
 #include "chip.h"

-typedef struct northbridge_intel_E7520_config config_t;
+typedef struct northbridge_intel_e7520_config config_t;

static void pcie_init(struct device *dev)
 {

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_portc.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_portc.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7520/pciexp_portc.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -7,7 +7,7 @@
 #include <arch/io.h>
 #include "chip.h"

-typedef struct northbridge_intel_E7520_config config_t;
+typedef struct northbridge_intel_e7520_config config_t;

static void pcie_init(struct device *dev)
 {

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7525/chip.h
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7525/chip.h	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7525/chip.h	2006-10-27 11:38:22 UTC (rev 2477)
@@ -1,7 +1,7 @@
-struct northbridge_intel_E7525_config
+struct northbridge_intel_e7525_config
 {
         /* Interrupt line connect */
         unsigned int intrline;
 };

-extern struct chip_operations northbridge_intel_E7525_ops;
+extern struct chip_operations northbridge_intel_e7525_ops;

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7525/northbridge.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7525/northbridge.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7525/northbridge.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -264,7 +264,7 @@
    }
 }

-struct chip_operations northbridge_intel_E7525_ops = {
+struct chip_operations northbridge_intel_e7525_ops = {
    CHIP_NAME("Intel E7525 Northbridge")
    .enable_dev = enable_dev,
 };

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_porta.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_porta.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_porta.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -7,7 +7,7 @@
 #include <arch/io.h>
 #include "chip.h"

-typedef struct northbridge_intel_E7525_config config_t;
+typedef struct northbridge_intel_e7525_config config_t;

static void pcie_init(struct device *dev)
 {

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_porta1.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_porta1.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_porta1.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -7,7 +7,7 @@
 #include <arch/io.h>
 #include "chip.h"

-typedef struct northbridge_intel_E7525_config config_t;
+typedef struct northbridge_intel_e7525_config config_t;

static void pcie_init(struct device *dev)
 {

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_portb.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_portb.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_portb.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -7,7 +7,7 @@
 #include <arch/io.h>
 #include "chip.h"

-typedef struct northbridge_intel_E7525_config config_t;
+typedef struct northbridge_intel_e7525_config config_t;

static void pcie_init(struct device *dev)
 {

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_portc.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_portc.c	2006-10-27 11:30:27 UTC (rev 2476)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/E7525/pciexp_portc.c	2006-10-27 11:38:22 UTC (rev 2477)
@@ -7,7 +7,7 @@
 #include <arch/io.h>
 #include "chip.h"

-typedef struct northbridge_intel_E7525_config config_t;
+typedef struct northbridge_intel_e7525_config config_t;

static void pcie_init(struct device *dev)
 {