if your G505S does NOT have a discrete GPU (= LA-A092P board), please test this coreboot build
I almost completed refining the HJK's dGPU patches and discrete GPU is still working at my G505S after these changes, but before submitting the patches I would like to make sure that they are not breaking the things for G505S without a discrete GPU. So if you have some free time and ready to "unbrick" by the hardware flashing - although I hope the things would go well ! - please help me by testing this coreboot build at your G505S: https://github.com/informer2016/shared_devfiles/blob/master/coreboot.rom SHA256 sum of this image = ab173394ba3ed57a73d1455a02f7d903a5f5c55a0ab5ba43b4c445e4eeeead20 Download this image, run sha256sum ./Downloads/coreboot.rom , and if it is correct - please flash it by executing sudo ./flashrom -p internal:laptop=force_I_want_a_brick,amd_imc_force=yes -w ./coreboot.rom - according to http://dangerousprototypes.com/docs/Lenovo_G505S_hacking instructions - then shutdown and try turning it on. It could take up to minute for G505S to boot because of high debug level and USB debug enabled, so wait patiently. After it reaches the SeaBIOS screen, press ESC and choose your Linux USB or HDD to boot from - otherwise the first-in-the-list floppy OS (MichalOS, btw it has a cool PLAYER .APP -> Piano) will be booted by default. If it could boot to Linux, clone the coreboot repository (if you haven't already) and get the logs: cd ./coreboot/util/cbmem make sudo ./cbmem -c > ./console.log and also sudo dmesg > ./kernel.log Remove the private information from these logs (such as your MAC addresses from kernel.log or USB model from console.log) and share these logs with me - I would like to take a look to see that there aren't any new angry messages. Also try S3 suspend (aka "hibernation"), see if it could resume successfully to Linux and report the results. If it could not boot to Linux and you don't have a FT232H or another debug dongle to capture the logs by USB, just tell me it didn't work and unbrick by following the hardware flashing instructions. Then I'll try to add more precautions...
Hello, On Sat, Feb 16, 2019, 14:49 Mike Banon <mikebdp2@gmail.com wrote:
https://github.com/informer2016/shared_devfiles/blob/master/coreboot.rom
How can one build a coreboot.rom like this one with the patches you mentioned? Best regards, Angel Pons
On Sat, Feb 16, 2019 at 3:49 PM Mike Banon <mikebdp2@gmail.com> wrote:
I almost completed refining the HJK's dGPU patches and discrete GPU is still working at my G505S after these changes, but before submitting the patches I would like to make sure that they are not breaking the things for G505S without a discrete GPU.
Just go ahead and submit your patches for gerrit review. You can set WIP flags or I can tag them with -2 until we feel happy about them getting merged. I won't be testing any random pre-built binary, need to build one myself. Kyösti
Out of curiosity, is there a config to disable the dGPU to save power if one is present? Thanks, -Matt On Sat, Feb 16, 2019 at 9:12 AM Kyösti Mälkki <kyosti.malkki@gmail.com> wrote:
On Sat, Feb 16, 2019 at 3:49 PM Mike Banon <mikebdp2@gmail.com> wrote:
I almost completed refining the HJK's dGPU patches and discrete GPU is still working at my G505S after these changes, but before submitting the patches I would like to make sure that they are not breaking the things for G505S without a discrete GPU.
Just go ahead and submit your patches for gerrit review. You can set WIP flags or I can tag them with -2 until we feel happy about them getting merged.
I won't be testing any random pre-built binary, need to build one myself.
Kyösti
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Hi friends, On Sat, Feb 16, 2019 at 11:56 PM Matt B <matthewwbradley6@gmail.com> wrote:
Is there a config to disable the dGPU to save power if one is present?
I haven't checked if "disabled" (not initialized) dGPU consumes less power than "enabled" (initialized) but not used dGPU. But I think such a config is needed - also because if MULTIPLE_VGA_ADAPTERS is enabled I have to load a discrete GPU VBIOS to ACPI VFCT instead of integrated to make a dGPU working, because if I try to load them both it doesn't end well (discrete GPU not working and maybe the other problems). But if a person does not have a discrete GPU, his ACPI VFCT tables wouldn't be filled with anything at all, because I haven't figured out how to - if MULTIPLE_VGA_ADAPTERS is enabled for all the G505S (with/without dGPU) - how to check if one has a physical GPU attached to that "device pci 2.0" PCI bus. Maybe we should find a way to create a single ACPI VFCT table for two VBIOSes, however I don't know anything about it and everything seems to work without that, so guess it could wait. Meanwhile it works fine if I do VFCT only for discrete in case of "with-dGPU G505S". I hope to submit these modified HJK patches today after some final cuts. Luckily they are working without any SeaBIOS changes Best regards, Mike Banon
Great news! /u/QubesN00b flashed this dGPU build to his "no-dGPU" G505S and everything seems to be working fine for him :D ( https://www.reddit.com/r/coreboot/comments/ar8v7d/if_your_g505s_does_not_hav... ) . Now I could e.g. remove "if (IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS))" condition from https://review.coreboot.org/c/coreboot/+/31450/3/src/mainboard/lenovo/g505s/... - and set BottomIo to 0xD0 for all G505S.
So, if one does not have a dGPU, one should not set CONFIG_MULTIPLE_VGA_ADAPTERS and the appropriate tables will be filled in with the vbios for the iGPU. And the dGPU will not be initialized. (or attempted, since it doesn't exist) If one does have a dGPU, then only information for the dGPU will be included (no vbios for iGPU) and the iGPU will not be initialized. Is this correct? -Matt On Mon, Feb 18, 2019 at 10:02 AM Mike Banon <mikebdp2@gmail.com> wrote:
Great news! /u/QubesN00b flashed this dGPU build to his "no-dGPU" G505S and everything seems to be working fine for him :D (
https://www.reddit.com/r/coreboot/comments/ar8v7d/if_your_g505s_does_not_hav... ) . Now I could e.g. remove "if (IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS))" condition from
https://review.coreboot.org/c/coreboot/+/31450/3/src/mainboard/lenovo/g505s/... - and set BottomIo to 0xD0 for all G505S.
On Thu, Feb 21, 2019 at 5:44 AM Matt B <matthewwbradley6@gmail.com> wrote:
... and the iGPU will not be initialized. Is this correct?
Integrated GPU will be initialized and will be working perfectly even if we are not doing the VFCT for it! :-) Aside from one angry "[drm:radeon_get_bios [radeon]] *ERROR* ACPI VFCT image header truncated" message at Linux kernel logs (see the end of this message) we have not noticed any downsides from doing the ACPI VFCT tables for G505S discrete GPU only instead of integrated. So both integrated and discrete GPU of G505S are now working fine with these three coreboot patches ( 31448 / 31449 / 31450 ). Although it is a bit disappointing to see they have not been received well, I will continue working on them and hopefully they would be merged to coreboot master one day. Meanwhile I could write a small script that will be securely downloading and applying them, just like we are already doing for the "15h / 16h updated microcode" changes. Best regards, Mike Banon ... [drm] radeon kernel modesetting enabled. checking generic (d0000000 420000) vs hw (d0000000 10000000) fb: switching to radeondrmfb from VESA VGA Console: switching to colour dummy device 80x25 [drm] initializing kernel modesetting (ARUBA 0x1002:0x990B 0x1002:0x990B 0x00). [drm:radeon_get_bios [radeon]] *ERROR* ACPI VFCT image header truncated ATOM BIOS: 113 radeon 0000:00:01.0: VRAM: 512M 0x0000000000000000 - 0x000000001FFFFFFF (512M used) radeon 0000:00:01.0: GTT: 1024M 0x0000000020000000 - 0x000000005FFFFFFF [drm] Detected VRAM RAM=512M, BAR=256M [drm] RAM width 64bits DDR [TTM] Zone kernel: Available graphics memory: 7977572 kiB [TTM] Zone dma32: Available graphics memory: 2097152 kiB [TTM] Initializing pool allocator [TTM] Initializing DMA pool allocator [drm] radeon: 512M of VRAM memory ready [drm] radeon: 1024M of GTT memory ready. [drm] Loading ARUBA Microcode [drm] Internal thermal controller without fan control [drm] radeon: dpm initialized [drm] Found VCE firmware/feedback version 50.0.1 / 17! [drm] GART: num cpu pages 262144, num gpu pages 262144 [drm] PCIE GART of 1024M enabled (table at 0x00000000001D6000). radeon 0000:00:01.0: WB enabled radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000020000c00 and cpu addr 0x (ptrval) radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000075a18 and cpu addr 0x (ptrval) radeon 0000:00:01.0: fence driver on ring 6 use gpu addr 0x0000000020000c18 and cpu addr 0x (ptrval) radeon 0000:00:01.0: fence driver on ring 7 use gpu addr 0x0000000020000c1c and cpu addr 0x (ptrval) radeon 0000:00:01.0: fence driver on ring 1 use gpu addr 0x0000000020000c04 and cpu addr 0x (ptrval) radeon 0000:00:01.0: fence driver on ring 2 use gpu addr 0x0000000020000c08 and cpu addr 0x (ptrval) radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000020000c0c and cpu addr 0x (ptrval) radeon 0000:00:01.0: fence driver on ring 4 use gpu addr 0x0000000020000c10 and cpu addr 0x (ptrval) [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [drm] Driver supports precise vblank timestamp query. radeon 0000:00:01.0: radeon: MSI limited to 32-bit radeon 0000:00:01.0: radeon: using MSI. [drm] radeon: irq initialized. [drm] ring test on 0 succeeded in 2 usecs [drm] ring test on 3 succeeded in 3 usecs [drm] ring test on 4 succeeded in 3 usecs ring test on 5 succeeded in 2 usecs [drm] UVD initialized successfully. [drm] ring test on 6 succeeded in 17 usecs [drm] ring test on 7 succeeded in 4 usecs [drm] VCE initialized successfully. [drm] ib test on ring 0 succeeded in 0 usecs [drm] ib test on ring 3 succeeded in 0 usecs [drm] ib test on ring 4 succeeded in 0 usecs ...
On Mon, Feb 18, 2019 at 10:02 AM Mike Banon <mikebdp2@gmail.com> wrote:
Great news! /u/QubesN00b from Reddit has flashed this dGPU build to his "no-dGPU" G505S and everything is working fine for him :D
participants (4)
-
Angel Pons -
Kyösti Mälkki -
Matt B -
Mike Banon