r1066 - in coreboot-v3: device include/device superio/fintek/f71805f superio/ite/it8712f superio/ite/it8716f superio/winbond/w83627hf superio/winbond/w83627thg
Author: myles Date: 2008-12-08 21:40:02 +0100 (Mon, 08 Dec 2008) New Revision: 1066
Modified: coreboot-v3/device/pnp_device.c coreboot-v3/include/device/pnp.h coreboot-v3/superio/fintek/f71805f/superio.c coreboot-v3/superio/ite/it8712f/superio.c coreboot-v3/superio/ite/it8716f/superio.c coreboot-v3/superio/winbond/w83627hf/superio.c coreboot-v3/superio/winbond/w83627thg/dts coreboot-v3/superio/winbond/w83627thg/superio.c Log: This patch makes all the SuperIOs build again, and reverts some breakage that I introduced earlier.
It adds a placeholder in the fintek SuperIO so the array indexing works. It moves the enable to make the struct more compatible with v2.
Signed-off-by: Myles Watson mylesgw@gmail.com Acked-by: Ronald G. Minnich rminnich@gmail.com
Modified: coreboot-v3/device/pnp_device.c =================================================================== --- coreboot-v3/device/pnp_device.c 2008-12-06 03:59:24 UTC (rev 1065) +++ coreboot-v3/device/pnp_device.c 2008-12-08 20:40:02 UTC (rev 1066) @@ -57,7 +57,7 @@
int pnp_read_enable(struct device *dev) { - return !!pnp_read_config(dev, 0x30); + return (pnp_read_config(dev, 0x30) ? 0x1 : 0x0); }
void pnp_set_iobase(struct device *dev, unsigned int index, unsigned int iobase) @@ -110,7 +110,7 @@ } resource->flags |= IORESOURCE_STORED;
- report_resource_stored(dev, resource, ""); + report_resource_stored(dev, resource, __func__); }
void pnp_set_resources(struct device *dev) @@ -192,7 +192,7 @@ resource->limit = info->mask | (step - 1); resource->size = 1 << gran; resource->base = info->val; - resource->flags |= IORESOURCE_FIXED || IORESOURCE_ASSIGNED; + resource->flags |= IORESOURCE_FIXED | IORESOURCE_ASSIGNED; }
static void get_resources(struct device *dev, struct pnp_info *info) @@ -215,29 +215,29 @@ resource = new_resource(dev, PNP_IDX_IRQ0); resource->size = 1; resource->flags |= IORESOURCE_IRQ; - resource->base = info->irq0.val; - resource->flags |= IORESOURCE_FIXED || IORESOURCE_ASSIGNED; + resource->base = info->irq0; + resource->flags |= IORESOURCE_FIXED | IORESOURCE_ASSIGNED; } if (info->flags & PNP_IRQ1) { resource = new_resource(dev, PNP_IDX_IRQ1); resource->size = 1; resource->flags |= IORESOURCE_IRQ; - resource->base = info->irq1.val; - resource->flags |= IORESOURCE_FIXED || IORESOURCE_ASSIGNED; + resource->base = info->irq1; + resource->flags |= IORESOURCE_FIXED | IORESOURCE_ASSIGNED; } if (info->flags & PNP_DRQ0) { resource = new_resource(dev, PNP_IDX_DRQ0); resource->size = 1; resource->flags |= IORESOURCE_DRQ; - resource->base = info->drq0.val; - resource->flags |= IORESOURCE_FIXED || IORESOURCE_ASSIGNED; + resource->base = info->drq0; + resource->flags |= IORESOURCE_FIXED | IORESOURCE_ASSIGNED; } if (info->flags & PNP_DRQ1) { resource = new_resource(dev, PNP_IDX_DRQ1); resource->size = 1; resource->flags |= IORESOURCE_DRQ; - resource->base = info->drq0.val; - resource->flags |= IORESOURCE_FIXED || IORESOURCE_ASSIGNED; + resource->base = info->drq0; + resource->flags |= IORESOURCE_FIXED | IORESOURCE_ASSIGNED; } }
@@ -254,6 +254,7 @@
/* Setup the ops and resources on the newly allocated devices. */ for (i = 0; i < functions; i++) { + path.pnp.device = info[i].function;
dev = find_dev_path(&base_dev->link[0], &path); @@ -263,7 +264,7 @@ __func__, dev->dtsname, dev_path(dev)); continue; } - + dev = alloc_dev(&base_dev->link[0], &path, &id);
if (!dev) @@ -310,12 +311,12 @@ { int i, idx; u16 port = dev->path.pnp.port; - + /* Determine Super I/O config port. */ idx = (port == 0x3f0) ? 0 : ((port == 0x3bd) ? 1 : 2); for (i = 0; i < 4; i++) outb(init[idx][i], ISA_PNP_ADDR); - + /* Sequentially write the 32 MB PnP init values. */ for (i = 0; i < 32; i++) outb(initkey_mbpnp[i], port);
Modified: coreboot-v3/include/device/pnp.h =================================================================== --- coreboot-v3/include/device/pnp.h 2008-12-06 03:59:24 UTC (rev 1065) +++ coreboot-v3/include/device/pnp.h 2008-12-08 20:40:02 UTC (rev 1066) @@ -59,7 +59,6 @@ struct pnp_info { struct device_operations *ops; unsigned function; - unsigned enable; unsigned flags; #define PNP_IO0 0x01 #define PNP_IO1 0x02 @@ -69,11 +68,15 @@ #define PNP_IRQ1 0x20 #define PNP_DRQ0 0x40 #define PNP_DRQ1 0x80 - struct io_info io0, io1, io2, io3, irq0, irq1, drq0, drq1; + struct io_info io0, io1, io2, io3; + unsigned irq0, irq1, drq0, drq1; + unsigned enable; }; + struct resource *pnp_get_resource(struct device * dev, unsigned index); + void pnp_enable_devices(struct device *dev, struct device_operations *ops, - unsigned functions, struct pnp_info *info); + unsigned functions, struct pnp_info *info);
#define PNP_IDX_IO0 0x60 #define PNP_IDX_IO1 0x62
Modified: coreboot-v3/superio/fintek/f71805f/superio.c =================================================================== --- coreboot-v3/superio/fintek/f71805f/superio.c 2008-12-06 03:59:24 UTC (rev 1065) +++ coreboot-v3/superio/fintek/f71805f/superio.c 2008-12-08 20:40:02 UTC (rev 1066) @@ -93,6 +93,8 @@ };
static struct pnp_info pnp_dev_info[] = { + /* Ops, function #, All resources needed by dev, io_info */ + { NULL, F71805F_FDC, }, /* Place holder. */ { &f71805f_ops, F71805F_COM1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &f71805f_ops, F71805F_COM2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, /* TODO: Everything else */ @@ -106,12 +108,12 @@ /* COM1 */ pnp_dev_info[F71805F_COM1].enable = conf->com1enable; pnp_dev_info[F71805F_COM1].io0.val = conf->com1io; - pnp_dev_info[F71805F_COM1].irq0.val = conf->com1irq; + pnp_dev_info[F71805F_COM1].irq0 = conf->com1irq;
/* COM2 */ pnp_dev_info[F71805F_COM2].enable = conf->com2enable; pnp_dev_info[F71805F_COM2].io0.val = conf->com2io; - pnp_dev_info[F71805F_COM2].irq0.val = conf->com2irq; + pnp_dev_info[F71805F_COM2].irq0 = conf->com2irq;
/* Initialize SuperIO for PNP children. */ if (!dev->links) {
Modified: coreboot-v3/superio/ite/it8712f/superio.c =================================================================== --- coreboot-v3/superio/ite/it8712f/superio.c 2008-12-06 03:59:24 UTC (rev 1065) +++ coreboot-v3/superio/ite/it8712f/superio.c 2008-12-08 20:40:02 UTC (rev 1066) @@ -95,18 +95,18 @@ };
static struct pnp_info pnp_dev_info[] = { - /* Enable, All resources need by dev, io_info_structs */ - {&it8712f_ops, IT8712F_FDC, 0, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0xff8, 0},}, - {&it8712f_ops, IT8712F_SP1, 0, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, - {&it8712f_ops, IT8712F_SP2, 0, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, - {&it8712f_ops, IT8712F_PP, 0, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0xffc, 0},}, - {&it8712f_ops, IT8712F_EC, 0, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xff8, 0}, {0xff8, 4},}, - {&it8712f_ops, IT8712F_KBCK, 0, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xfff, 0}, {0xfff, 4},}, - {&it8712f_ops, IT8712F_KBCM, 0, PNP_IRQ0,}, - {&it8712f_ops, IT8712F_GPIO, 0, }, - {&it8712f_ops, IT8712F_MIDI, 0, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, - {&it8712f_ops, IT8712F_GAME, 0, PNP_IO0, {0xfff, 0},}, - {&it8712f_ops, IT8712F_IR, 0, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, + /* All resources needed by dev, io_info_structs */ + {&it8712f_ops, IT8712F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0xff8, 0},}, + {&it8712f_ops, IT8712F_SP1, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, + {&it8712f_ops, IT8712F_SP2, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, + {&it8712f_ops, IT8712F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0xffc, 0},}, + {&it8712f_ops, IT8712F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xff8, 0}, {0xff8, 4},}, + {&it8712f_ops, IT8712F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xfff, 0}, {0xfff, 4},}, + {&it8712f_ops, IT8712F_KBCM, PNP_IRQ0,}, + {&it8712f_ops, IT8712F_GPIO, }, + {&it8712f_ops, IT8712F_MIDI, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, + {&it8712f_ops, IT8712F_GAME, PNP_IO0, {0xfff, 0},}, + {&it8712f_ops, IT8712F_IR, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, };
static void it8712f_setup_scan_bus(struct device *dev) @@ -116,38 +116,38 @@ /* Floppy */ pnp_dev_info[IT8712F_FDC].enable = conf->floppyenable; pnp_dev_info[IT8712F_FDC].io0.val = conf->floppyio; - pnp_dev_info[IT8712F_FDC].irq0.val = conf->floppyirq; - pnp_dev_info[IT8712F_FDC].drq0.val = conf->floppydrq; + pnp_dev_info[IT8712F_FDC].irq0 = conf->floppyirq; + pnp_dev_info[IT8712F_FDC].drq0 = conf->floppydrq;
/* COM1 */ pnp_dev_info[IT8712F_SP1].enable = conf->com1enable; pnp_dev_info[IT8712F_SP1].io0.val = conf->com1io; - pnp_dev_info[IT8712F_SP1].irq0.val = conf->com1irq; + pnp_dev_info[IT8712F_SP1].irq0 = conf->com1irq;
/* COM2 */ pnp_dev_info[IT8712F_SP2].enable = conf->com2enable; pnp_dev_info[IT8712F_SP2].io0.val = conf->com2io; - pnp_dev_info[IT8712F_SP2].irq0.val = conf->com2irq; + pnp_dev_info[IT8712F_SP2].irq0 = conf->com2irq;
/* Parallel port */ pnp_dev_info[IT8712F_PP].enable = conf->ppenable; pnp_dev_info[IT8712F_PP].io0.val = conf->ppio; - pnp_dev_info[IT8712F_PP].irq0.val = conf->ppirq; + pnp_dev_info[IT8712F_PP].irq0 = conf->ppirq;
/* Environment controller */ pnp_dev_info[IT8712F_EC].enable = conf->ecenable; pnp_dev_info[IT8712F_EC].io0.val = conf->ecio; - pnp_dev_info[IT8712F_EC].irq0.val = conf->ecirq; + pnp_dev_info[IT8712F_EC].irq0 = conf->ecirq;
/* Keyboard */ pnp_dev_info[IT8712F_KBCK].enable = conf->kbenable; pnp_dev_info[IT8712F_KBCK].io0.val = conf->kbio; pnp_dev_info[IT8712F_KBCK].io1.val = conf->kbio2; - pnp_dev_info[IT8712F_KBCK].irq0.val = conf->kbirq; + pnp_dev_info[IT8712F_KBCK].irq0 = conf->kbirq;
/* PS/2 mouse */ pnp_dev_info[IT8712F_KBCM].enable = conf->mouseenable; - pnp_dev_info[IT8712F_KBCM].irq0.val = conf->mouseirq; + pnp_dev_info[IT8712F_KBCM].irq0 = conf->mouseirq;
/* GPIO */ pnp_dev_info[IT8712F_GPIO].enable = conf->gpioenable; @@ -155,7 +155,7 @@ /* MIDI port */ pnp_dev_info[IT8712F_MIDI].enable = conf->midienable; pnp_dev_info[IT8712F_MIDI].io0.val = conf->midiio; - pnp_dev_info[IT8712F_MIDI].irq0.val = conf->midiirq; + pnp_dev_info[IT8712F_MIDI].irq0 = conf->midiirq;
/* Game port */ pnp_dev_info[IT8712F_GAME].enable = conf->gameenable; @@ -164,7 +164,7 @@ /* Consumer IR */ pnp_dev_info[IT8712F_IR].enable = conf->cirenable; pnp_dev_info[IT8712F_IR].io0.val = conf->cirio; - pnp_dev_info[IT8712F_IR].irq0.val = conf->cirirq; + pnp_dev_info[IT8712F_IR].irq0 = conf->cirirq;
/* Initialize SuperIO for PNP children. */ if (!dev->links) {
Modified: coreboot-v3/superio/ite/it8716f/superio.c =================================================================== --- coreboot-v3/superio/ite/it8716f/superio.c 2008-12-06 03:59:24 UTC (rev 1065) +++ coreboot-v3/superio/ite/it8716f/superio.c 2008-12-08 20:40:02 UTC (rev 1066) @@ -133,20 +133,20 @@ };
static struct pnp_info pnp_dev_info[] = { - /* Enable, All resources need by dev, io_info_structs */ - {&it8716f_ops, IT8716F_FDC, 0, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},}, - {&it8716f_ops, IT8716F_SP1, 0, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},}, - {&it8716f_ops, IT8716F_SP2, 0, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},}, - {&it8716f_ops, IT8716F_PP, 0, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},}, - {&it8716f_ops, IT8716F_EC, 0, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0}, + /* All resources needed by dev, io_info_structs */ + {&it8716f_ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},}, + {&it8716f_ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},}, + {&it8716f_ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},}, + {&it8716f_ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},}, + {&it8716f_ops, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0}, {0x7f8, 0x4},}, - {&it8716f_ops, IT8716F_KBCK, 0, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7ff, 0}, + {&it8716f_ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7ff, 0}, {0x7ff, 0x4},}, - {&it8716f_ops, IT8716F_KBCM, 0, PNP_IRQ0,}, - {&it8716f_ops, IT8716F_GPIO, 0, PNP_IO1 | PNP_IO2, {0, 0}, {0x7f8, 0}, {0x7f8, 0},}, - {&it8716f_ops, IT8716F_MIDI, 0, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4},}, - {&it8716f_ops, IT8716F_GAME, 0, PNP_IO0, {0x7ff, 0},}, - {&it8716f_ops, IT8716F_IR, 0,}, + {&it8716f_ops, IT8716F_KBCM, PNP_IRQ0,}, + {&it8716f_ops, IT8716F_GPIO, PNP_IO1 | PNP_IO2, {0, 0}, {0x7f8, 0}, {0x7f8, 0},}, + {&it8716f_ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4},}, + {&it8716f_ops, IT8716F_GAME, PNP_IO0, {0x7ff, 0},}, + {&it8716f_ops, IT8716F_IR, }, };
static void it8716f_setup_scan_bus(struct device *dev) @@ -156,38 +156,38 @@ /* Floppy */ pnp_dev_info[IT8716F_FDC].enable = conf->floppyenable; pnp_dev_info[IT8716F_FDC].io0.val = conf->floppyio; - pnp_dev_info[IT8716F_FDC].irq0.val = conf->floppyirq; - pnp_dev_info[IT8716F_FDC].drq0.val = conf->floppydrq; + pnp_dev_info[IT8716F_FDC].irq0 = conf->floppyirq; + pnp_dev_info[IT8716F_FDC].drq0 = conf->floppydrq;
/* COM1 */ pnp_dev_info[IT8716F_SP1].enable = conf->com1enable; pnp_dev_info[IT8716F_SP1].io0.val = conf->com1io; - pnp_dev_info[IT8716F_SP1].irq0.val = conf->com1irq; + pnp_dev_info[IT8716F_SP1].irq0 = conf->com1irq;
/* COM2 */ pnp_dev_info[IT8716F_SP2].enable = conf->com2enable; pnp_dev_info[IT8716F_SP2].io0.val = conf->com2io; - pnp_dev_info[IT8716F_SP2].irq0.val = conf->com2irq; + pnp_dev_info[IT8716F_SP2].irq0 = conf->com2irq;
/* Parallel port */ pnp_dev_info[IT8716F_PP].enable = conf->ppenable; pnp_dev_info[IT8716F_PP].io0.val = conf->ppio; - pnp_dev_info[IT8716F_PP].irq0.val = conf->ppirq; + pnp_dev_info[IT8716F_PP].irq0 = conf->ppirq;
/* Environment controller */ pnp_dev_info[IT8716F_EC].enable = conf->ecenable; pnp_dev_info[IT8716F_EC].io0.val = conf->ecio; - pnp_dev_info[IT8716F_EC].irq0.val = conf->ecirq; + pnp_dev_info[IT8716F_EC].irq0 = conf->ecirq;
/* Keyboard */ pnp_dev_info[IT8716F_KBCK].enable = conf->kbenable; pnp_dev_info[IT8716F_KBCK].io0.val = conf->kbio; pnp_dev_info[IT8716F_KBCK].io1.val = conf->kbio2; - pnp_dev_info[IT8716F_KBCK].irq0.val = conf->kbirq; + pnp_dev_info[IT8716F_KBCK].irq0 = conf->kbirq;
/* PS/2 mouse */ pnp_dev_info[IT8716F_KBCM].enable = conf->mouseenable; - pnp_dev_info[IT8716F_KBCM].irq0.val = conf->mouseirq; + pnp_dev_info[IT8716F_KBCM].irq0 = conf->mouseirq;
/* GPIO */ pnp_dev_info[IT8716F_GPIO].enable = conf->gpioenable; @@ -195,7 +195,7 @@ /* MIDI port */ pnp_dev_info[IT8716F_MIDI].enable = conf->midienable; pnp_dev_info[IT8716F_MIDI].io0.val = conf->midiio; - pnp_dev_info[IT8716F_MIDI].irq0.val = conf->midiirq; + pnp_dev_info[IT8716F_MIDI].irq0 = conf->midiirq;
/* Game port */ pnp_dev_info[IT8716F_GAME].enable = conf->gameenable; @@ -204,7 +204,7 @@ /* Consumer IR */ pnp_dev_info[IT8716F_IR].enable = conf->cirenable; pnp_dev_info[IT8716F_IR].io0.val = conf->cirio; - pnp_dev_info[IT8716F_IR].irq0.val = conf->cirirq; + pnp_dev_info[IT8716F_IR].irq0 = conf->cirirq;
/* Initialize SuperIO for PNP children. */ if (!dev->links) {
Modified: coreboot-v3/superio/winbond/w83627hf/superio.c =================================================================== --- coreboot-v3/superio/winbond/w83627hf/superio.c 2008-12-06 03:59:24 UTC (rev 1065) +++ coreboot-v3/superio/winbond/w83627hf/superio.c 2008-12-08 20:40:02 UTC (rev 1066) @@ -195,22 +195,21 @@ };
static struct pnp_info pnp_dev_info[] = { - /* Enable, All resources need by dev, io_info_structs */ - { &w83627hf_ops, W83627HF_FDC, 0, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &w83627hf_ops, W83627HF_PP, 0, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &w83627hf_ops, W83627HF_SP1, 0, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &w83627hf_ops, W83627HF_SP2, 0, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { 0,}, - { &w83627hf_ops, W83627HF_KBC, 0, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, - { &w83627hf_ops, W83627HF_CIR, 0,PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &w83627hf_ops, W83627HF_GAME_MIDI_GPIO1, 0,PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, }, - { &w83627hf_ops, W83627HF_GPIO2, 0 }, - { &w83627hf_ops, W83627HF_GPIO3, 0 }, - { &w83627hf_ops, W83627HF_ACPI, 0 }, - { &w83627hf_ops, W83627HF_HWM, 0, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, + /* Ops, function #, All resources needed by dev, io_info_structs */ + { &w83627hf_ops, W83627HF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &w83627hf_ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &w83627hf_ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &w83627hf_ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { 0, }, /* No function 4. */ + { &w83627hf_ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &w83627hf_ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &w83627hf_ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, }, + { &w83627hf_ops, W83627HF_GPIO2, }, + { &w83627hf_ops, W83627HF_GPIO3, }, + { &w83627hf_ops, W83627HF_ACPI, }, + { &w83627hf_ops, W83627HF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, };
- static void phase3_chip_setup_dev(struct device *dev) { /* Get dts values and populate pnp_dev_info. */ @@ -219,30 +218,30 @@ /* Floppy */ pnp_dev_info[W83627HF_FDC].enable = conf->floppyenable; pnp_dev_info[W83627HF_FDC].io0.val = conf->floppyio; - pnp_dev_info[W83627HF_FDC].irq0.val = conf->floppyirq; - pnp_dev_info[W83627HF_FDC].drq0.val = conf->floppydrq; + pnp_dev_info[W83627HF_FDC].irq0 = conf->floppyirq; + pnp_dev_info[W83627HF_FDC].drq0 = conf->floppydrq;
/* Parallel port */ pnp_dev_info[W83627HF_PP].enable = conf->ppenable; pnp_dev_info[W83627HF_PP].io0.val = conf->ppio; - pnp_dev_info[W83627HF_PP].irq0.val = conf->ppirq; + pnp_dev_info[W83627HF_PP].irq0 = conf->ppirq;
/* COM1 */ pnp_dev_info[W83627HF_SP1].enable = conf->com1enable; pnp_dev_info[W83627HF_SP1].io0.val = conf->com1io; - pnp_dev_info[W83627HF_SP1].irq0.val = conf->com1irq; + pnp_dev_info[W83627HF_SP1].irq0 = conf->com1irq;
/* COM2 */ pnp_dev_info[W83627HF_SP2].enable = conf->com2enable; pnp_dev_info[W83627HF_SP2].io0.val = conf->com2io; - pnp_dev_info[W83627HF_SP2].irq0.val = conf->com2irq; + pnp_dev_info[W83627HF_SP2].irq0 = conf->com2irq;
/* Keyboard */ pnp_dev_info[W83627HF_KBC].enable = conf->kbenable; pnp_dev_info[W83627HF_KBC].io0.val = conf->kbio; pnp_dev_info[W83627HF_KBC].io1.val = conf->kbio2; - pnp_dev_info[W83627HF_KBC].irq0.val = conf->kbirq; - pnp_dev_info[W83627HF_KBC].irq1.val = conf->kbirq2; + pnp_dev_info[W83627HF_KBC].irq0 = conf->kbirq; + pnp_dev_info[W83627HF_KBC].irq1 = conf->kbirq2;
/* Consumer IR */ pnp_dev_info[W83627HF_CIR].enable = conf->cirenable; @@ -251,7 +250,7 @@ pnp_dev_info[W83627HF_GAME_MIDI_GPIO1].enable = conf->gameenable; pnp_dev_info[W83627HF_GAME_MIDI_GPIO1].io0.val = conf->gameio; pnp_dev_info[W83627HF_GAME_MIDI_GPIO1].io1.val = conf->gameio2; - pnp_dev_info[W83627HF_GAME_MIDI_GPIO1].irq0.val = conf->gameirq; + pnp_dev_info[W83627HF_GAME_MIDI_GPIO1].irq0 = conf->gameirq;
/* GPIO2 */ pnp_dev_info[W83627HF_GPIO2].enable = conf->gpio2enable; @@ -265,7 +264,7 @@ /* Hardware Monitor */ pnp_dev_info[W83627HF_HWM].enable = conf->hwmenable; pnp_dev_info[W83627HF_HWM].io0.val = conf->hwmio; - pnp_dev_info[W83627HF_HWM].irq0.val = conf->hwmirq; + pnp_dev_info[W83627HF_HWM].irq0 = conf->hwmirq;
/* Initialize SuperIO for PNP children. */ if (!dev->links) { @@ -275,7 +274,6 @@ dev->link[0].link = 0; }
- /* Call init with updated tables to create children. */ + /* Call init with updated tables to create and enable children. */ pnp_enable_devices(dev, &w83627hf_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); } -
Modified: coreboot-v3/superio/winbond/w83627thg/dts =================================================================== --- coreboot-v3/superio/winbond/w83627thg/dts 2008-12-06 03:59:24 UTC (rev 1065) +++ coreboot-v3/superio/winbond/w83627thg/dts 2008-12-08 20:40:02 UTC (rev 1066) @@ -24,33 +24,28 @@ /* To override any of these, put the over-ride in mainboard dts. */
/* Floppy */ - floppydev = "0"; floppyenable = "0"; floppyio = "0x3f0"; floppyirq = "6"; floppydrq = "2";
/* Parallel port */ - ppdev = "1"; ppenable = "0"; ppio = "0x378"; ppirq = "7"; ppdrq = "4";
/* COM1 */ - com1dev = "2"; com1enable = "0"; com1io = "0x3f8"; com1irq = "4";
/* COM2 */ - com2dev = "3"; com2enable = "0"; com2io = "0x2f8"; com2irq = "3";
/* PS/2 keyboard + PS/2 mouse */ - kbdev = "5"; kbenable = "0"; kbio = "0x60"; kbio2 = "0x64"; @@ -58,26 +53,21 @@ kbirq2 = "12";
/* Game port, MIDI port, GPIO1, GPIO5 */ - gamedev = "7"; gameenable = "0"; gameio = "0x201"; gameio2 = "0x330"; gameirq = "9";
/* GPIO2 */ - gpio2dev = "8"; gpio2enable = "0";
/* GPIO3, GPIO4 */ - gpio34dev = "9"; gpio34enable = "0";
/* ACPI */ - acpidev = "10"; acpienable = "0";
/* Hardware Monitor */ - hwmdev = "11"; hwmenable = "0"; hwmio = "0x290"; hwmirq = "5";
Modified: coreboot-v3/superio/winbond/w83627thg/superio.c =================================================================== --- coreboot-v3/superio/winbond/w83627thg/superio.c 2008-12-06 03:59:24 UTC (rev 1065) +++ coreboot-v3/superio/winbond/w83627thg/superio.c 2008-12-08 20:40:02 UTC (rev 1066) @@ -1,9 +1,9 @@ /* * This file is part of the coreboot project. * - * Copyright 2000 AG Electronics Ltd. + * Copyright 2000 AG Electronics Ltd. * Copyright 2003-2004 Linux Networx - * Copyright 2004 Tyan + * Copyright 2004 Tyan * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -25,10 +25,8 @@ #include <device/pnp.h> #include <console.h> #include <string.h> -//#include <bitops.h> #include <uart8250.h> #include <keyboard.h> -// #include <pc80/mc146818rtc.h> #include <statictree.h> #include "w83627thg.h"
@@ -93,17 +91,19 @@
/* TODO: this device is not at all filled out. Just copied from v2. */ static struct pnp_info pnp_dev_info[] = { - { &w83627thg_ops, W83627THG_FDC, 0, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &w83627thg_ops, W83627THG_PP, 0, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &w83627thg_ops, W83627THG_SP1, 0, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &w83627thg_ops, W83627THG_SP2, 0, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - // No 4 { 0,}, - { &w83627thg_ops, W83627THG_KBC, 0, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, - { &w83627thg_ops, W83627THG_GAME_MIDI_GPIO1, 0, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} }, - { &w83627thg_ops, W83627THG_GPIO2,}, - { &w83627thg_ops, W83627THG_GPIO3,}, - { &w83627thg_ops, W83627THG_ACPI, 0, PNP_IRQ0, }, - { &w83627thg_ops, W83627THG_HWM, 0, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } }, + /* Ops, function #, All resources needed by dev, io_info_structs */ + { &w83627thg_ops, W83627THG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &w83627thg_ops, W83627THG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &w83627thg_ops, W83627THG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &w83627thg_ops, W83627THG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { 0, }, /* No function 4. */ + { &w83627thg_ops, W83627THG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { 0, }, /* No function 6. */ + { &w83627thg_ops, W83627THG_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, }, + { &w83627thg_ops, W83627THG_GPIO2, }, + { &w83627thg_ops, W83627THG_GPIO3, }, + { &w83627thg_ops, W83627THG_ACPI, }, + { &w83627thg_ops, W83627THG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, };
static void phase3_chip_setup_dev(struct device *dev) @@ -111,33 +111,45 @@ /* Get dts values and populate pnp_dev_info. */ const struct superio_winbond_w83627thg_dts_config * const conf = dev->device_configuration;
-#if 0 -These are not set up at all v2. Ignore for now. */ /* Floppy */ pnp_dev_info[W83627THG_FDC].enable = conf->floppyenable; pnp_dev_info[W83627THG_FDC].io0.val = conf->floppyio; - pnp_dev_info[W83627THG_FDC].irq0.val = conf->floppyirq; - pnp_dev_info[W83627THG_FDC].drq0.val = conf->floppydrq; + pnp_dev_info[W83627THG_FDC].irq0 = conf->floppyirq; + pnp_dev_info[W83627THG_FDC].drq0 = conf->floppydrq;
/* Parallel port */ pnp_dev_info[W83627THG_PP].enable = conf->ppenable; pnp_dev_info[W83627THG_PP].io0.val = conf->ppio; - pnp_dev_info[W83627THG_PP].irq0.val = conf->ppirq; + pnp_dev_info[W83627THG_PP].irq0 = conf->ppirq;
- /* Consumer IR */ - pnp_dev_info[W83627THG_CIR].enable = conf->cirenable; + /* COM1 */ + pnp_dev_info[W83627THG_SP1].enable = conf->com1enable; + pnp_dev_info[W83627THG_SP1].io0.val = conf->com1io; + pnp_dev_info[W83627THG_SP1].irq0 = conf->com1irq;
+ /* COM2 */ + pnp_dev_info[W83627THG_SP2].enable = conf->com2enable; + pnp_dev_info[W83627THG_SP2].io0.val = conf->com2io; + pnp_dev_info[W83627THG_SP2].irq0 = conf->com2irq; + + /* Keyboard */ + pnp_dev_info[W83627THG_KBC].enable = conf->kbenable; + pnp_dev_info[W83627THG_KBC].io0.val = conf->kbio; + pnp_dev_info[W83627THG_KBC].io1.val = conf->kbio2; + pnp_dev_info[W83627THG_KBC].irq0 = conf->kbirq; + pnp_dev_info[W83627THG_KBC].irq1 = conf->kbirq2; + /* Game port */ pnp_dev_info[W83627THG_GAME_MIDI_GPIO1].enable = conf->gameenable; pnp_dev_info[W83627THG_GAME_MIDI_GPIO1].io0.val = conf->gameio; pnp_dev_info[W83627THG_GAME_MIDI_GPIO1].io1.val = conf->gameio2; - pnp_dev_info[W83627THG_GAME_MIDI_GPIO1].irq0.val = conf->gameirq; + pnp_dev_info[W83627THG_GAME_MIDI_GPIO1].irq0 = conf->gameirq;
/* GPIO2 */ pnp_dev_info[W83627THG_GPIO2].enable = conf->gpio2enable;
- /* GPIO3 */ - pnp_dev_info[W83627THG_GPIO3].enable = conf->gpio3enable; + /* GPIO3, GPIO4 */ + pnp_dev_info[W83627THG_GPIO3].enable = conf->gpio34enable;
/* ACPI */ pnp_dev_info[W83627THG_ACPI].enable = conf->acpienable; @@ -145,27 +157,8 @@ /* Hardware Monitor */ pnp_dev_info[W83627THG_HWM].enable = conf->hwmenable; pnp_dev_info[W83627THG_HWM].io0.val = conf->hwmio; - pnp_dev_info[W83627THG_HWM].irq0.val = conf->hwmirq; + pnp_dev_info[W83627THG_HWM].irq0 = conf->hwmirq;
-#endif - - /* COM1 */ - pnp_dev_info[W83627THG_SP1].enable = conf->com1enable; - pnp_dev_info[W83627THG_SP1].io0.val = conf->com1io; - pnp_dev_info[W83627THG_SP1].irq0.val = conf->com1irq; - - /* COM2 */ - pnp_dev_info[W83627THG_SP2].enable = conf->com2enable; - pnp_dev_info[W83627THG_SP2].io0.val = conf->com2io; - pnp_dev_info[W83627THG_SP2].irq0.val = conf->com2irq; - - /* Keyboard */ - pnp_dev_info[W83627THG_KBC].enable = conf->kbenable; - pnp_dev_info[W83627THG_KBC].io0.val = conf->kbio; - pnp_dev_info[W83627THG_KBC].io1.val = conf->kbio2; - pnp_dev_info[W83627THG_KBC].irq0.val = conf->kbirq; - pnp_dev_info[W83627THG_KBC].irq1.val = conf->kbirq2; - /* Initialize SuperIO for PNP children. */ if (!dev->links) { dev->links = 1; @@ -174,6 +167,6 @@ dev->link[0].link = 0; }
- /* Call init with updated tables to create children. */ + /* Call init with updated tables to create and enable children. */ pnp_enable_devices(dev, &w83627thg_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
-
svn＠coreboot.org