[commit] r5387 - in trunk/src: arch/i386/lib cpu/amd/car cpu/intel/model_106cx cpu/intel/model_6ex cpu/intel/model_6fx cpu/x86/car mainboard/amd/dbm690t mainboard/amd/mahogany mainboard/amd/mahogan...
Author: stepan Date: Fri Apr 9 12:43:49 2010 New Revision: 5387 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5387
Log: copy_and_run.c is not needed twice, and it is used on non-car too. So move it to src/arch/i386/lib/cbfs_and_run.c
Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Deleted: trunk/src/cpu/amd/car/copy_and_run.c trunk/src/cpu/x86/car/copy_and_run.c Modified: trunk/src/arch/i386/lib/cbfs_and_run.c trunk/src/cpu/intel/model_106cx/cache_as_ram_disable.c trunk/src/cpu/intel/model_6ex/cache_as_ram_disable.c trunk/src/cpu/intel/model_6fx/cache_as_ram_disable.c trunk/src/mainboard/amd/dbm690t/romstage.c trunk/src/mainboard/amd/mahogany/romstage.c trunk/src/mainboard/amd/mahogany_fam10/romstage.c trunk/src/mainboard/amd/pistachio/romstage.c trunk/src/mainboard/amd/serengeti_cheetah/romstage.c trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c trunk/src/mainboard/arima/hdama/romstage.c trunk/src/mainboard/asrock/939a785gmh/romstage.c trunk/src/mainboard/asus/a8n_e/romstage.c trunk/src/mainboard/asus/a8v-e_se/romstage.c trunk/src/mainboard/asus/m2v-mx_se/romstage.c trunk/src/mainboard/broadcom/blast/romstage.c trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c trunk/src/mainboard/gigabyte/m57sli/romstage.c trunk/src/mainboard/hp/dl145_g3/romstage.c trunk/src/mainboard/ibm/e325/romstage.c trunk/src/mainboard/ibm/e326/romstage.c trunk/src/mainboard/iwill/dk8_htx/romstage.c trunk/src/mainboard/iwill/dk8s2/romstage.c trunk/src/mainboard/iwill/dk8x/romstage.c trunk/src/mainboard/kontron/kt690/romstage.c trunk/src/mainboard/msi/ms7135/romstage.c trunk/src/mainboard/msi/ms7260/romstage.c trunk/src/mainboard/msi/ms9185/romstage.c trunk/src/mainboard/msi/ms9282/romstage.c trunk/src/mainboard/msi/ms9652_fam10/romstage.c trunk/src/mainboard/newisys/khepri/romstage.c trunk/src/mainboard/nvidia/l1_2pvv/romstage.c trunk/src/mainboard/sunw/ultra40/romstage.c trunk/src/mainboard/supermicro/h8dme/romstage.c trunk/src/mainboard/supermicro/h8dmr/romstage.c trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c trunk/src/mainboard/technexion/tim5690/romstage.c trunk/src/mainboard/technexion/tim8690/romstage.c trunk/src/mainboard/tyan/s2735/romstage.c trunk/src/mainboard/tyan/s2850/romstage.c trunk/src/mainboard/tyan/s2875/romstage.c trunk/src/mainboard/tyan/s2880/romstage.c trunk/src/mainboard/tyan/s2881/romstage.c trunk/src/mainboard/tyan/s2882/romstage.c trunk/src/mainboard/tyan/s2885/romstage.c trunk/src/mainboard/tyan/s2891/romstage.c trunk/src/mainboard/tyan/s2892/romstage.c trunk/src/mainboard/tyan/s2895/romstage.c trunk/src/mainboard/tyan/s2912/romstage.c trunk/src/mainboard/tyan/s2912_fam10/romstage.c trunk/src/mainboard/tyan/s4880/romstage.c trunk/src/mainboard/tyan/s4882/romstage.c trunk/src/mainboard/via/epia-m700/romstage.c trunk/src/mainboard/via/vt8454c/romstage.c trunk/src/northbridge/via/vx800/examples/romstage.c
Modified: trunk/src/arch/i386/lib/cbfs_and_run.c ============================================================================== --- trunk/src/arch/i386/lib/cbfs_and_run.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/arch/i386/lib/cbfs_and_run.c Fri Apr 9 12:43:49 2010 (r5387) @@ -40,3 +40,21 @@ :: "a"(ebp), "D"(dst) ); } + +void __attribute__((regparm(0))) copy_and_run(unsigned cpu_reset); + +void __attribute__((regparm(0))) copy_and_run(unsigned cpu_reset) +{ + // FIXME fix input parameters instead normalizing them here. + if (cpu_reset == 1) cpu_reset = -1; + else cpu_reset = 0; + + cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram", cpu_reset); +} + +#if CONFIG_AP_CODE_IN_CAR == 1 +static void __attribute__((regparm(0))) copy_and_run_ap_code_in_car(unsigned ret_addr) +{ + cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ap", ret_addr); +} +#endif
Modified: trunk/src/cpu/intel/model_106cx/cache_as_ram_disable.c ============================================================================== --- trunk/src/cpu/intel/model_106cx/cache_as_ram_disable.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/cpu/intel/model_106cx/cache_as_ram_disable.c Fri Apr 9 12:43:49 2010 (r5387) @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#include "cpu/x86/car/copy_and_run.c" +
/* called from assembler code */ void stage1_main(unsigned long bist);
Modified: trunk/src/cpu/intel/model_6ex/cache_as_ram_disable.c ============================================================================== --- trunk/src/cpu/intel/model_6ex/cache_as_ram_disable.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/cpu/intel/model_6ex/cache_as_ram_disable.c Fri Apr 9 12:43:49 2010 (r5387) @@ -19,7 +19,7 @@ * MA 02110-1301 USA */
-#include "cpu/x86/car/copy_and_run.c" +
/* called from assembler code */ void stage1_main(unsigned long bist);
Modified: trunk/src/cpu/intel/model_6fx/cache_as_ram_disable.c ============================================================================== --- trunk/src/cpu/intel/model_6fx/cache_as_ram_disable.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/cpu/intel/model_6fx/cache_as_ram_disable.c Fri Apr 9 12:43:49 2010 (r5387) @@ -19,7 +19,7 @@ * MA 02110-1301 USA */
-#include "cpu/x86/car/copy_and_run.c" +
void real_main(unsigned long bist);
Modified: trunk/src/mainboard/amd/dbm690t/romstage.c ============================================================================== --- trunk/src/mainboard/amd/dbm690t/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/amd/dbm690t/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -88,7 +88,7 @@
#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/amd/mahogany/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/amd/mahogany/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -88,7 +88,7 @@
#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/amd/mahogany_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/amd/mahogany_fam10/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -99,7 +99,7 @@
#include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_10xxx/init_cpus.c" #include "cpu/amd/model_10xxx/fidvid.c"
Modified: trunk/src/mainboard/amd/pistachio/romstage.c ============================================================================== --- trunk/src/mainboard/amd/pistachio/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/amd/pistachio/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -82,7 +82,7 @@
#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/amd/serengeti_cheetah/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/amd/serengeti_cheetah/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -128,7 +128,7 @@ #define DIMM6 0x56 #define DIMM7 0x57
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -117,7 +117,7 @@
#include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_10xxx/init_cpus.c" #include "cpu/amd/model_10xxx/fidvid.c"
Modified: trunk/src/mainboard/arima/hdama/romstage.c ============================================================================== --- trunk/src/mainboard/arima/hdama/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/arima/hdama/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -86,7 +86,7 @@ #define SECOND_CPU 1 #define TOTAL_CPUS (FIRST_CPU + SECOND_CPU)
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/asrock/939a785gmh/romstage.c ============================================================================== --- trunk/src/mainboard/asrock/939a785gmh/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/asrock/939a785gmh/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -93,7 +93,7 @@
#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/asus/a8n_e/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8n_e/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/asus/a8n_e/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -87,7 +87,7 @@ #include "lib/generic_sdram.c" #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" #include "southbridge/nvidia/ck804/ck804_early_setup.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/asus/a8v-e_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/asus/a8v-e_se/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -111,7 +111,7 @@ #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include "southbridge/via/k8t890/k8t890_early_car.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c"
Modified: trunk/src/mainboard/asus/m2v-mx_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/m2v-mx_se/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/asus/m2v-mx_se/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -96,7 +96,7 @@ #include "northbridge/amd/amdk8/incoherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/broadcom/blast/romstage.c ============================================================================== --- trunk/src/mainboard/broadcom/blast/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/broadcom/blast/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -87,7 +87,7 @@ #define DIMM2 0x52 #define DIMM3 0x53
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -134,7 +134,7 @@ #include "southbridge/sis/sis966/sis966_early_setup_ss.h" #include "southbridge/sis/sis966/sis966_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/gigabyte/m57sli/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/gigabyte/m57sli/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -132,7 +132,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/hp/dl145_g3/romstage.c ============================================================================== --- trunk/src/mainboard/hp/dl145_g3/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/hp/dl145_g3/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -134,7 +134,7 @@ #define DIMM6 0x56 #define DIMM7 0x57
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/ibm/e325/romstage.c ============================================================================== --- trunk/src/mainboard/ibm/e325/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/ibm/e325/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -83,7 +83,7 @@ #define SECOND_CPU 1 #define TOTAL_CPUS (FIRST_CPU + SECOND_CPU)
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/ibm/e326/romstage.c ============================================================================== --- trunk/src/mainboard/ibm/e326/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/ibm/e326/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -83,7 +83,7 @@ #define SECOND_CPU 1 #define TOTAL_CPUS (FIRST_CPU + SECOND_CPU)
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/iwill/dk8_htx/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8_htx/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/iwill/dk8_htx/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -113,7 +113,7 @@ #define DIMM6 0x56 #define DIMM7 0x57
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/iwill/dk8s2/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8s2/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/iwill/dk8s2/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -113,7 +113,7 @@ #define DIMM6 0x56 #define DIMM7 0x57
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/iwill/dk8x/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8x/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/iwill/dk8x/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -113,7 +113,7 @@ #define DIMM6 0x56 #define DIMM7 0x57
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/kontron/kt690/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/kt690/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/kontron/kt690/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -89,7 +89,7 @@
#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/msi/ms7135/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7135/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/msi/ms7135/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -89,7 +89,7 @@ #include "lib/generic_sdram.c" #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" #include "southbridge/nvidia/ck804/ck804_early_setup_car.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/msi/ms7260/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/msi/ms7260/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -115,7 +115,7 @@
#include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c"
Modified: trunk/src/mainboard/msi/ms9185/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9185/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/msi/ms9185/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -129,7 +129,7 @@ #define DIMM6 0x56 #define DIMM7 0x57
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/msi/ms9282/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9282/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/msi/ms9282/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -123,7 +123,7 @@
#include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/msi/ms9652_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/msi/ms9652_fam10/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -122,7 +122,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/newisys/khepri/romstage.c ============================================================================== --- trunk/src/mainboard/newisys/khepri/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/newisys/khepri/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -88,7 +88,7 @@ #endif #include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/nvidia/l1_2pvv/romstage.c ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -132,7 +132,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/sunw/ultra40/romstage.c ============================================================================== --- trunk/src/mainboard/sunw/ultra40/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/sunw/ultra40/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -100,7 +100,7 @@
#include "southbridge/nvidia/ck804/ck804_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/supermicro/h8dme/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dme/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/supermicro/h8dme/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -175,7 +175,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/supermicro/h8dmr/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/supermicro/h8dmr/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -120,7 +120,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -111,7 +111,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -115,7 +115,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/technexion/tim5690/romstage.c ============================================================================== --- trunk/src/mainboard/technexion/tim5690/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/technexion/tim5690/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -88,7 +88,7 @@
#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/technexion/tim8690/romstage.c ============================================================================== --- trunk/src/mainboard/technexion/tim8690/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/technexion/tim8690/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -88,7 +88,7 @@
#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/tyan/s2735/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2735/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2735/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -63,7 +63,7 @@ #include "northbridge/intel/e7501/reset_test.c" #include "lib/generic_sdram.c"
-#include "cpu/x86/car/copy_and_run.c" +
void stage1_main(unsigned long bist) {
Modified: trunk/src/mainboard/tyan/s2850/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2850/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2850/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -74,7 +74,7 @@ #endif #include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2875/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2875/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2875/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -76,7 +76,7 @@ #endif #include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2880/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2880/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2880/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -76,7 +76,7 @@ #endif #include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2881/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2881/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2881/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -76,7 +76,7 @@
#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2882/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2882/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2882/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -80,7 +80,7 @@ #define SECOND_CPU 1 #define TOTAL_CPUS (FIRST_CPU + SECOND_CPU)
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2885/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2885/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2885/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -78,7 +78,7 @@ #endif #include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2891/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2891/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2891/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -68,7 +68,7 @@ #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" #include "southbridge/nvidia/ck804/ck804_early_setup.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2892/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2892/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2892/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -72,7 +72,7 @@
#include "southbridge/nvidia/ck804/ck804_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2895/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2895/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2895/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -101,7 +101,7 @@
#include "southbridge/nvidia/ck804/ck804_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
Modified: trunk/src/mainboard/tyan/s2912/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2912/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -130,7 +130,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s2912_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s2912_fam10/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -121,7 +121,7 @@ #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s4880/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s4880/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s4880/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -102,7 +102,7 @@ #define DIMM2 0x52 #define DIMM3 0x53
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/tyan/s4882/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s4882/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/tyan/s4882/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -110,7 +110,7 @@ #define DIMM2 0x52 #define DIMM3 0x53
-#include "cpu/amd/car/copy_and_run.c" +
#include "cpu/amd/car/post_cache_as_ram.c"
Modified: trunk/src/mainboard/via/epia-m700/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-m700/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/via/epia-m700/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -47,7 +47,7 @@
#include "northbridge/via/vx800/raminit.h" #include "northbridge/via/vx800/raminit.c" -#include "cpu/x86/car/copy_and_run.c" + #include "wakeup.h"
#include "superio/winbond/w83697hf/w83697hf_early_serial.c"
Modified: trunk/src/mainboard/via/vt8454c/romstage.c ============================================================================== --- trunk/src/mainboard/via/vt8454c/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/mainboard/via/vt8454c/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -34,7 +34,7 @@
#define DEACTIVATE_CAR 1 #define DEACTIVATE_CAR_FILE "cpu/via/car/cache_as_ram_post.c" -#include "cpu/x86/car/copy_and_run.c" + #include "pc80/udelay_io.c" #include "lib/delay.c" #include "northbridge/via/cx700/cx700_early_smbus.c"
Modified: trunk/src/northbridge/via/vx800/examples/romstage.c ============================================================================== --- trunk/src/northbridge/via/vx800/examples/romstage.c Fri Apr 9 12:12:18 2010 (r5386) +++ trunk/src/northbridge/via/vx800/examples/romstage.c Fri Apr 9 12:43:49 2010 (r5387) @@ -45,7 +45,7 @@
#include "northbridge/via/vx800/raminit.h" #include "northbridge/via/vx800/raminit.c" -#include "cpu/x86/car/copy_and_run.c" +
int acpi_is_wakeup_early_via_vx800(void) {
-
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