the following patch was just integrated into master: commit 3b2653b1fc207111e96585a273294cedffc49141 Author: Martin Roth martin.roth@se-eng.com Date: Sun Feb 24 10:46:11 2013 -0700
AMD Fam14: Add SPD read functions to wrapper code
Change: This is the initial step for moving the AMD F14 & HUDSON1,2,3 SPD-read callout out of the mainboard directories and into the wrapper. The next step is to update the platforms to use this routine in BiosCallouts.c and to delete the code from the mainboard directories. The DIMM addresses should be moved into devicetree.cb. If there are significant differences or reasons that the mainboard needs to override this code, it's perfectly reasonable to keep using the version in the mainboard, but this allows us to remove duplicated code and simplify the mainboard directories.
Notes: This started by duplicating what was in Persimmon, and was changed to use the devicetree.cb structures. The ASF setup was also removed from the persimmon copy (PMIO writes to 0x28 & 0x29) as that's not needed for the SPD access and doesn't make sense to initialize here. Significant cleanup and magic number reduction was done as well.
It is intended that this file will not be included in ramstage as the DIMM init is all done in romstage.
This is similar to what was done for Parmer/Thatcher in commit 7fb692bd - http://review.coreboot.org/#/c/2190/ Fam15tn: Move SPD read from mainboards into wrapper
Yes, it would make sense to split this into two separate files and move the SMBUS initialization and access into the southbridge wrapper. Maybe that can come next.
Change-Id: I1e106d3912c160b0015bf02158d9faba4f578ee3 Signed-off-by: Martin Roth martin.roth@se-eng.com Reviewed-on: http://review.coreboot.org/2497 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich rminnich@gmail.com Reviewed-by: Jens Rottmann JRottmann@LiPPERTembedded.de Reviewed-by: Marc Jones marc.jones@se-eng.com
Build-Tested: build bot (Jenkins) at Tue Mar 5 00:04:05 2013, giving +1 Reviewed-By: Marc Jones marc.jones@se-eng.com at Thu Mar 7 00:39:19 2013, giving +2 Reviewed-By: Ronald G. Minnich rminnich@gmail.com at Tue Mar 5 01:17:58 2013, giving +1 See http://review.coreboot.org/2497 for details.
-gerrit