Patch set updated for coreboot: db823ad SPEEDSTEP: write _CST tables

[Sven Schnelle]

Sven Schnelle ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/321

-gerrit

commit db823adef073b9b781828fab9a3b0cc0bf460257
Author: Sven Schnelle 
Date:   Sat Oct 22 13:41:16 2011 +0200

SPEEDSTEP: write _CST tables

Change-Id: Idb4b57044808918de343d31519768d0986840f01
    Signed-off-by: Sven Schnelle 
---
 src/arch/x86/include/arch/acpigen.h |    2 ++
 src/cpu/intel/speedstep/acpi.c      |   10 ++++++++++
 2 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index 7feaa8e..0833371 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -66,4 +66,6 @@ int acpigen_write_resourcetemplate_footer(int len);
 int acpigen_write_mainboard_resource_template(void);
 int acpigen_write_mainboard_resources(const char *scope, const char *name);

+int get_cst_entries(struct cst_entry **) __attribute__((weak));
+
 #endif
diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c
index 48e1a3c..8f32e4f 100644
--- a/src/cpu/intel/speedstep/acpi.c
+++ b/src/cpu/intel/speedstep/acpi.c
@@ -62,6 +62,11 @@ static int get_fsb(void)
    return 200;
 }

+int get_cst_entries(struct cst_entry **entries __attribute__((unused)))
+{
+	return 0;
+}
+
 void generate_cpu_entries(void)
 {
    int len_pr, len_ps;
@@ -70,6 +75,9 @@ void generate_cpu_entries(void)
    int totalcores = determine_total_number_of_cores();
    int cores_per_package = (cpuid_ebx(1)>>16) & 0xff;
    int numcpus = totalcores/cores_per_package; // this assumes that all CPUs share the same layout
+	int count;
+	struct cst_entry *cst_entries;
+
    printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package);

for (cpuID=1; cpuID <=numcpus; cpuID++) {
@@ -81,6 +89,8 @@ void generate_cpu_entries(void)
    	len_pr = acpigen_write_processor((cpuID-1)*cores_per_package+coreID-1, pcontrol_blk, plen);
    		len_pr += acpigen_write_empty_PCT();
    		len_pr += acpigen_write_PSD_package(cpuID-1,cores_per_package,SW_ANY);
+			if ((count = get_cst_entries(&cst_entries)) > 0)
+				len_pr += acpigen_write_CST_package(cst_entries, count);
    		len_pr += acpigen_write_name("_PSS");

int max_states=8;