Patch merged into coreboot/master: c2f2bd0 AGESA: Fix CR0_PE bit define

the following patch was just integrated into master:
commit c2f2bd0a6d00a7f8df4005f148f67373db6d26d6
Author: Konstantin Aladyshev 
Date:   Wed Mar 6 22:13:42 2013 +0400

AGESA: Fix CR0_PE bit define

AGESA code has wrong definition of CR0_PE bit (1 instead of 0).

PE [Protected Mode Enable] is 0 bit in CR0 register
    (If PE=1, system is in protected mode, else system is in real mode)

Bit 1 is MP [Monitor co-processor]
    (Controls interaction of WAIT/FWAIT instructions with TS flag in CR0)

System uses CR0_PE define, but I didn't expect any consequences because of this bug.

Change-Id: I54d9a8c0ee3af0a2e0267777036f227a9e05f3e1
    Signed-off-by: Konstantin Aladyshev 
    Reviewed-on: http://review.coreboot.org/2591
    Tested-by: build bot (Jenkins)
    Reviewed-by: Marc Jones

Build-Tested: build bot (Jenkins) at Wed Mar  6 19:38:43 2013, giving +1
Reviewed-By: Marc Jones  at Wed Mar  6 19:53:01 2013, giving +2
See http://review.coreboot.org/2591 for details.

-gerrit