Hello,
An HT configuration change is needed to allow the southbridge link to run at HT3 frequencies on supported hardware. AMD family 10h processors support HT3, as do many AMD motherboards. When the southbridge runs at the default settings of 8-bit, 200 MHz, the throughput is insufficient for supporting high resolution graphics.
I have the needed changes ready but can test only the mahogany_fam10 project. The change involves the buid swap list, which is also used by projects supporting the previous generation AMD processor (family 0Fh). The change may also allow family 0Fh boards to use improved SB link settings.
Here is my proposal. If it seems OK, I will submit a patch.
1) Add an option for HT_MANUAL_SWAP_LIST to amdfam10/kconfig and amdk8/kconfig. The default is zero, which means it has no effect unless overridden. 2) Modify ht_wrapper.c to use HT_MANUAL_SWAP_LIST as the swap list, if non-zero. 3) In mainboard/amd/mahogany_fam10/Kconfig, override HT_MANUAL_SWAP_LIST with the value that is known to allow HT3 to work. 4) Possibly do the same for mainboard/amd/mahogany/Kconfig and test using a family 0Fh processor (I think I can find one). 5) Modify amdht/comlib.h so that if a critical HT initialization error occurs, it is no longer ignored. It will now log a message such as: === Failure at line 1145 of file src/northbridge/amd/amdht/h3finit.c ===, though execution will continue for backwards compatibility.
The idea is that nothing changes by default, except for the one or two projects I can test on real hardware. For other boards, owners of the hardware can add the HT_MANUAL_SWAP_LIST override to their mainboard kconfig and tweak it until it works.
Thanks, Scott
On Mon, Oct 25, 2010 at 2:53 PM, Scott Duplichan scott@notabs.org wrote:
Hello,
An HT configuration change is needed to allow the southbridge link to run at HT3 frequencies on supported hardware. AMD family 10h processors support HT3, as do many AMD motherboards. When the southbridge runs at the default settings of 8-bit, 200 MHz, the throughput is insufficient for supporting high resolution graphics.
I have the needed changes ready but can test only the mahogany_fam10 project. The change involves the buid swap list, which is also used by projects supporting the previous generation AMD processor (family 0Fh). The change may also allow family 0Fh boards to use improved SB link settings.
Here is my proposal. If it seems OK, I will submit a patch.
- Add an option for HT_MANUAL_SWAP_LIST to amdfam10/kconfig and
amdk8/kconfig. The default is zero, which means it has no effect unless overridden. 2) Modify ht_wrapper.c to use HT_MANUAL_SWAP_LIST as the swap list, if non-zero. 3) In mainboard/amd/mahogany_fam10/Kconfig, override HT_MANUAL_SWAP_LIST with the value that is known to allow HT3 to work. 4) Possibly do the same for mainboard/amd/mahogany/Kconfig and test using a family 0Fh processor (I think I can find one). 5) Modify amdht/comlib.h so that if a critical HT initialization error occurs, it is no longer ignored. It will now log a message such as: === Failure at line 1145 of file src/northbridge/amd/amdht/h3finit.c ===, though execution will continue for backwards compatibility.
The idea is that nothing changes by default, except for the one or two projects I can test on real hardware. For other boards, owners of the hardware can add the HT_MANUAL_SWAP_LIST override to their mainboard kconfig and tweak it until it works.
Hi Scott,
I think that this seems reasonable. We will try to get others to test some more platforms too.
Marc
Scott Duplichan wrote:
Here is my proposal. If it seems OK, I will submit a patch.
- Add an option for HT_MANUAL_SWAP_LIST to amdfam10/kconfig and amdk8/kconfig. The default is zero, which means it has no effect unless overridden.
- Modify ht_wrapper.c to use HT_MANUAL_SWAP_LIST as the swap list, if non-zero.
- In mainboard/amd/mahogany_fam10/Kconfig, override HT_MANUAL_SWAP_LIST with the value that is known to allow HT3 to work.
I think it would be nice if the Kconfig option is slightly higher-level than containing the actual values. Would it be at all possible to e.g. determine some distinct swap lists that boards can choose from?
//Peter
-----Original Message----- From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Peter Stuge Sent: Tuesday, October 26, 2010 12:03 AM To: coreboot@coreboot.org Subject: Re: [coreboot] HT3 for AMD boards
]Scott Duplichan wrote: ]> Here is my proposal. If it seems OK, I will submit a patch. ]> ]> 1) Add an option for HT_MANUAL_SWAP_LIST to amdfam10/kconfig and ]> amdk8/kconfig. The default is zero, which means it has no effect ]> unless overridden. ]> 2) Modify ht_wrapper.c to use HT_MANUAL_SWAP_LIST as the swap list, ]> if non-zero. ]> 3) In mainboard/amd/mahogany_fam10/Kconfig, override HT_MANUAL_SWAP_LIST ]> with the value that is known to allow HT3 to work. ] ]I think it would be nice if the Kconfig option is slightly ]higher-level than containing the actual values. Would it be at all ]possible to e.g. determine some distinct swap lists that boards can ]choose from? ] ]//Peter
Hello Peter,
The problem is that the only real hardware I have for testing is an RS780/SB700 board. Here is the kconfig addition I have for it, as it stands now:
# ----------------overrides--------------------
# With this BUID swap list override, an AMD RS780/SB700/fam10h system can # run the southbridge HT link in HT3 mode. Without it, the link runs at 8-bit # 200 MHz, which prevents high resolution UMA graphics modes from working.
config HT_MANUAL_SWAP_LIST default 0xFF00FF0100
For Serengetti-Cheetah, I think it would look like:
config HT_MANUAL_SWAP_LIST default 0xFF060AFF06000A00
... but I have no way to test it.
Thanks, Scott
On Mon, Oct 25, 2010 at 11:14 PM, Scott Duplichan scott@notabs.org wrote:
-----Original Message----- From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Peter Stuge Sent: Tuesday, October 26, 2010 12:03 AM To: coreboot@coreboot.org Subject: Re: [coreboot] HT3 for AMD boards
]Scott Duplichan wrote: ]> Here is my proposal. If it seems OK, I will submit a patch. ]> ]> 1) Add an option for HT_MANUAL_SWAP_LIST to amdfam10/kconfig and ]> amdk8/kconfig. The default is zero, which means it has no effect ]> unless overridden. ]> 2) Modify ht_wrapper.c to use HT_MANUAL_SWAP_LIST as the swap list, ]> if non-zero. ]> 3) In mainboard/amd/mahogany_fam10/Kconfig, override HT_MANUAL_SWAP_LIST ]> with the value that is known to allow HT3 to work. ] ]I think it would be nice if the Kconfig option is slightly ]higher-level than containing the actual values. Would it be at all ]possible to e.g. determine some distinct swap lists that boards can ]choose from? ] ]//Peter
Hello Peter,
The problem is that the only real hardware I have for testing is an RS780/SB700 board. Here is the kconfig addition I have for it, as it stands now:
# ----------------overrides--------------------
# With this BUID swap list override, an AMD RS780/SB700/fam10h system can # run the southbridge HT link in HT3 mode. Without it, the link runs at 8-bit # 200 MHz, which prevents high resolution UMA graphics modes from working.
config HT_MANUAL_SWAP_LIST default 0xFF00FF0100
For Serengetti-Cheetah, I think it would look like:
config HT_MANUAL_SWAP_LIST default 0xFF060AFF06000A00
... but I have no way to test it.
Thanks, Scott
Would it be better for the option to call a romstage.c function to set the swaplist?
Marc
Marc Jones wrote:
]Would it be better for the option to call a romstage.c function to set ]the swaplist? ] ]Marc ] ]-- ]http://se-eng.com
That is not a bad idea. It avoids adding anything to kconfig, and avoids any length limit on the swap list.
All it takes is this: 1) Remove the swap list from ht_wrapper.c and put it in each of 13 romstage.c files. 2) Add a prototype to amdfam10.h. 3) Modify the swap list where I have real hardware to test on (mahogany_fam10).
How about we do it this way?
Thanks, Scott
A test of the mahogany_fam10 project (AMD family 10h processor) shows the SB link runs at 200 MHZ, 8-bit. This low throughput HT connection prevents high resolution video modes when using UMA graphics. The expected connection for the processor used is 1800 MHz, 16-bit.
This patch allows mahogany_fam10 to run the SB HT link at the expected HT3 frequency and width by matching the BUID swap list to the production BIOS. In addition, the BUID swap list has been moved into the project-specific file romstage.c for the other 12 AMD family 10h projects as well. For projects using a desktop AMD family 10h processor, pasting in the mahogany_fam10 swap list will likely allow HT3 operation in some cases. This should be confirmed on real hardware before commiting any swap list change. A different swap list will be needed for server projects. For serengeti_cheetah_fam10, a reference BIOS swap list to try is: 0x00, 0x0A, 0x00, 0x06, 0xFF, 0x0A, 0x06, 0xFF.
The patch makes these changes:
1) Remove the BUID swap list from ht_wrapper.c and put it in each of 13 romstage.c files where it is used (AMD family 10h projects). 2) Add a prototype to amdfam10.h. 3) Modify the swap list where I have real hardware to test on (mahogany_fam10) and confirm HT3 operation for the SB link.
Abuild tested.
Thanks, Scott
Signed-off-by: Scott Duplichan scott@notabs.org
Index: src/mainboard/amd/mahogany_fam10/romstage.c =================================================================== --- src/mainboard/amd/mahogany_fam10/romstage.c (revision 5995) +++ src/mainboard/amd/mahogany_fam10/romstage.c (working copy) @@ -266,3 +266,33 @@ post_code(0x43); // Should never see this post code. }
+/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = {0, 1, 0xFF, 0, 0xFF}; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + + return 0; +} Index: src/mainboard/amd/serengeti_cheetah_fam10/romstage.c =================================================================== --- src/mainboard/amd/serengeti_cheetah_fam10/romstage.c (revision 5995) +++ src/mainboard/amd/serengeti_cheetah_fam10/romstage.c (working copy) @@ -273,3 +273,36 @@
}
+/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/amd/tilapia_fam10/romstage.c =================================================================== --- src/mainboard/amd/tilapia_fam10/romstage.c (revision 5995) +++ src/mainboard/amd/tilapia_fam10/romstage.c (working copy) @@ -266,3 +266,37 @@ post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. post_code(0x43); // Should never see this post code. } + +/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/asus/m4a785-m/romstage.c =================================================================== --- src/mainboard/asus/m4a785-m/romstage.c (revision 5995) +++ src/mainboard/asus/m4a785-m/romstage.c (working copy) @@ -267,3 +267,37 @@ post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. post_code(0x43); // Should never see this post code. } + +/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/gigabyte/ma785gmt/romstage.c =================================================================== --- src/mainboard/gigabyte/ma785gmt/romstage.c (revision 5995) +++ src/mainboard/gigabyte/ma785gmt/romstage.c (working copy) @@ -262,3 +262,37 @@ post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. post_code(0x43); // Should never see this post code. } + +/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/gigabyte/ma78gm/romstage.c =================================================================== --- src/mainboard/gigabyte/ma78gm/romstage.c (revision 5995) +++ src/mainboard/gigabyte/ma78gm/romstage.c (working copy) @@ -265,3 +265,36 @@ post_code(0x43); // Should never see this post code. }
+/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/hp/dl165_g6_fam10/romstage.c =================================================================== --- src/mainboard/hp/dl165_g6_fam10/romstage.c (revision 5995) +++ src/mainboard/hp/dl165_g6_fam10/romstage.c (working copy) @@ -237,3 +237,37 @@
post_cache_as_ram(); } + +/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/iei/kino-780am2-fam10/romstage.c =================================================================== --- src/mainboard/iei/kino-780am2-fam10/romstage.c (revision 5995) +++ src/mainboard/iei/kino-780am2-fam10/romstage.c (working copy) @@ -269,3 +269,36 @@ post_code(0x43); // Should never see this post code. }
+/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/jetway/pa78vm5/romstage.c =================================================================== --- src/mainboard/jetway/pa78vm5/romstage.c (revision 5995) +++ src/mainboard/jetway/pa78vm5/romstage.c (working copy) @@ -274,3 +274,36 @@ post_code(0x43); // Should never see this post code. }
+/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/msi/ms9652_fam10/romstage.c =================================================================== --- src/mainboard/msi/ms9652_fam10/romstage.c (revision 5995) +++ src/mainboard/msi/ms9652_fam10/romstage.c (working copy) @@ -282,3 +282,36 @@ post_code(0x43); // Should never see this post code. }
+/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/supermicro/h8dmr_fam10/romstage.c =================================================================== --- src/mainboard/supermicro/h8dmr_fam10/romstage.c (revision 5995) +++ src/mainboard/supermicro/h8dmr_fam10/romstage.c (working copy) @@ -275,3 +275,37 @@ post_cache_as_ram(); // BSP switch stack to ram, copy + execute stage 2 post_code(0x42); // Should never see this post code. } + +/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/supermicro/h8qme_fam10/romstage.c =================================================================== --- src/mainboard/supermicro/h8qme_fam10/romstage.c (revision 5995) +++ src/mainboard/supermicro/h8qme_fam10/romstage.c (working copy) @@ -317,3 +317,36 @@
}
+/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/mainboard/tyan/s2912_fam10/romstage.c =================================================================== --- src/mainboard/tyan/s2912_fam10/romstage.c (revision 5995) +++ src/mainboard/tyan/s2912_fam10/romstage.c (working copy) @@ -275,3 +275,36 @@ post_code(0x43); // Should never see this post code. }
+/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) +{ + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { + printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} Index: src/northbridge/amd/amdfam10/amdfam10.h =================================================================== --- src/northbridge/amd/amdfam10/amdfam10.h (revision 5995) +++ src/northbridge/amd/amdfam10/amdfam10.h (working copy) @@ -1199,4 +1199,7 @@ u8 get_sbbusn(u8 sblk); #endif
+#include "northbridge/amd/amdht/porting.h" +BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, const u8 **List); + #endif /* AMDFAM10_H */ Index: src/northbridge/amd/amdht/ht_wrapper.c =================================================================== --- src/northbridge/amd/amdht/ht_wrapper.c (revision 5995) +++ src/northbridge/amd/amdht/ht_wrapper.c (working copy) @@ -97,43 +97,7 @@
}
- /** - * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) - * Description: - * This routine is called every time a non-coherent chain is processed. - * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a - * swap list. The first part of the list controls the BUID assignment and the - * second part of the list provides the device to device linking. Device orientation - * can be detected automatically, or explicitly. See documentation for more details. - * - * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially - * based on each device's unit count. - * - * Parameters: - * @param[in] u8 node = The node on which this chain is located - * @param[in] u8 link = The link on the host for this chain - * @param[out] u8** list = supply a pointer to a list - * @param[out] BOOL result = true to use a manual list - * false to initialize the link automatically - */ -static BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) -{ - static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; - /* If the BUID was adjusted in early_ht we need to do the manual override */ - if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { - printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n"); - if ((node == 0) && (link == 0)) { /* BSP SB link */ - *List = swaplist; - return 1; - } - } - - return 0; -} - - -/** * void getAmdTopolist(u8 ***p) * * point to the stock topo list array
-
Marc Jones -
Peter Stuge -
Scott Duplichan