RE: 4G 4 Rank memory module

[YhLu]

It can treat 4G as 2G modules, if I comment out physical bank check. (!=2
get out).

YH

-----Original Message-----
From: Stefan Reinauer [mailto:[e-mail]] 
Sent: Tuesday, November 23, 2004 1:03 PM
To: YhLu
Cc: 'Eric W. Biederman'; 'LinuxBIOS'
Subject: Re: 4G 4 Rank memory module

* YhLu  [041123 22:04]:
> 2G modules for CPU0

It seems to dislike the 2G Modules it seems..? Can you try with only the
4G modules?
> 4G modules for CPU1.
>
> -----Original Message-----
> From: Stefan Reinauer [mailto:[e-mail]] 
> Sent: Tuesday, November 23, 2004 12:56 PM
> To: YhLu
> Cc: 'Eric W. Biederman'; 'LinuxBIOS'
> Subject: Re: 4G 4 Rank memory module
> YhLu  [041123 20:51]:
> > Ram2.00
> > rows: 0x0000000d 
> > columns: 0x0000000c 
> > banks: 0x00000004 
> > module data width : 0x00000048 
> > side2 banks: 0x00000002
> > Ram2.01
> > rows: 0x0000000d 
> > columns: 0x0000000c 
> > banks: 0x00000004 
> > module data width : 0x00000048 
> > side2 banks: 0x00000004 
> > Bad SPD value
> >
> > CPU0 got 2G modules
> > CPU1 got 4G modules
> > Side2 banks is different.
>
> Is this with two different modules? Ram2.00 Shows a difference.
> Maybe noise on the I2C bus? Ram2.01 seems to be ok..?!?
>
> Stefan

4G 4 Rank memory module

YhLu  writes:
> It can treat 4G as 2G modules, if I comment out physical bank check. (!=2
> get out).

Ah so it is the explicit check for <= 2 Ranks that is the immediate problem :)

This case is peculiar enough I did not add support because I could not test it.

Does your board have 4 chip selects running to the dimm socket?
If not you cannot support 4 rank dimms.

What does your struct mem_controller look like?

One partial solution would be to simply repeat the spd address
twice in the channel structure, and comment out the maximum bank check.
Of course that would fail for non quad rank dimms.

So I am not quite certain what the complete solution is.  YhLu once you describe
how your dimm sockets are wired we can figure something out.

static const struct mem_controller cpu[] = {
                {
                        .node_id = 0,
                        .f0 = PCI_DEV(0, 0x18, 0),
                        .f1 = PCI_DEV(0, 0x18, 1),
                        .f2 = PCI_DEV(0, 0x18, 2),
                        .f3 = PCI_DEV(0, 0x18, 3),
                        .channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 },
                        .channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 },
                },

Eric